Description Figure 1. Internal schematic diagram These Power MOSFETs are the latest development of STMicroelectronics unique "single feature size" strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps allowing remarkable manufacturing reproducibility.
VGS Gate-source voltage ±16 V ID(1) Drain current (continuous) at TC = 25°C 80 A ID Drain current (continuous) at TC = 100°C 57 A (2) IDM Drain current (pulsed) 320 A PTOT Total dissipation at TC = 25°C 300 W Derating factor 2 W/°C dv/dt (3) Peak diode recovery voltage slope 7 V/ns EAS(4) Single pulse avalanche energy 1.4 J Tj Operating junction temperature -55 to 175 °C Tstg Storage temperature 1. Current limited by package. 2. Pulse width limited by safe operating area . 3. ISD < 40A, di/dt < 300 A/µs, VDD=80% V(BR)DSS. 4. Starting Tj=25°C, ID=80A, VDD=40V.
Table 3. Thermal data
Symbol Parameter Value Unit
Rthj-case Thermal resistance junction-case max 0.5 °C/W
Rthj-a Thermal resistance junction-ambient max 62.5 °C/W Tl Maximum lead temperature for soldering purpose 300 °C
Note: For the P-CHANNEL MOSFET actual polarity of voltages and current has to be reversed
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Electrical characteristics STB80PF55, STP80PF55
2 Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 4. On/off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
Drain-source V(BR)DSS ID = 250 mA, VGS = 0 55 V breakdown voltage Zero gate voltage VDS = Max rating 1 µA IDSS drain current (VGS = 0) VDS = Max rating, TC=125 °C 10 µA Gate-body leakage IGSS VGS = ±16 V ±10 µA current (VDS = 0) VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 2 3 4 V Static drain-source on RDS(on) VGS = 10 V, ID = 40 A 0.016 0.018 Ω resistance
Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit
VDS > ID(on) x RDS(on)max,
gfs Forward transconductance - 32 S ID= 40 A Input capacitance Ciss 5500 pF Output capacitance VDS = 25 V, f = 1MHz, Coss - 1130 pF Reverse transfer VGS = 0 Crss 600 pF capacitance Qg Total gate charge ID = 25 A, VDD = 80 V, 190 258 nC Qgs Gate-source charge VGS = 10 V - 27 nC Qgd Gate-drain charge (see Figure 15) 65 nC
Table 6. Switching times
Symbol Parameter Test conditions Min. Typ. Max. Unit
VDD=25 V, ID=40 A, td(on) Turn-on delay time 35 ns RG=4.7 Ω, VGS=10 V - - tr Rise time 190 ns (see Figure 14) VDD=25 V, ID=40 A, td(off) Turn-off delay time 165 ns RG=4.7 Ω, VGS=10 V - - tf Fall time 80 ns (see Figure 14) tr(Voff) Off-voltage rise time Vclamp=40 V, ID=80 A, 60 ns tf Fall time RG=4.7 Ω, VGS=10 V - 40 - ns tc Cross-over time (see Figure 14) 85 ns
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STB80PF55, STP80PF55 Electrical characteristics
Table 7. Source drain diode
Symbol Parameter Test condictions Min. Typ. Max. Unit
ISD Source-drain current 10 A
- ISDM (1) Source-drain current (pulsed) 40 A VSD (2) Forward on voltage ISD = 80 A, VGS = 0 - 1.6 V trr Reverse recovery time 110 ns ISD = 80 A, di/dt = 100 A/µs Qrr Reverse recovery charge - 495 µC VDD = 25 V, Tj =150 °C IRRM Reverse recovery current 9 A 1. Pulse width limited by Tjmax . 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5 %.
Note: For the P-CHANNEL MOSFET actual polarity of voltages and current has to be reversed
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Electrical characteristics STB80PF55, STP80PF55
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area for TO-220 and Figure 3. Thermal impedance for TO-220 and D2PAK D2PAK
Figure 4. Output characterisics Figure 5. Transfer characteristics
Figure 6. Transconductance Figure 7. Static drain-source on resistance
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STB80PF55, STP80PF55 Electrical characteristics
Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations
Figure 10. Normalized gate threshold voltage Figure 11. Normalized on resistance vs vs temperature temperature
Figure 12. Source-drain diode forward Figure 13. Normalized BVDSS vs temperature characteristics
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Test circuits STB80PF55, STP80PF55
3 Test circuits
Figure 14. Switching times test circuit for Figure 15. Gate charge test circuit resistive load
Figure 16. Test circuit for inductive load
switching and diode recovery times
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STB80PF55, STP80PF55 Package mechanical data
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
A 4.40 4.60 b 0.61 0.88 b1 1.14 1.70 c 0.48 0.70 D 15.25 15.75 D1 1.27 E 10 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13 14 L1 3.50 3.93 L20 16.40 L30 28.90 ∅P 3.75 3.85 Q 2.65 2.95
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STB80PF55, STP80PF55 Package mechanical data
Figure 18. TO-220 drawing
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Packaging mechanical data STB80PF55, STP80PF55
5 Packaging mechanical data
D2PAK FOOTPRINT
TAPE AND REEL SHIPMENT
REEL MECHANICAL DATA
mm inch DIM. MIN. MAX. MIN. MAX. A 330 12.992 B 1.5 0.059 C 12.8 13.2 0.504 0.520 D 20.2 0795 G 24.4 26.4 0.960 1.039 N 100 3.937 T 30.4 1.197
BASE QTY BULK QTY
TAPE MECHANICAL DATA 1000 1000 mm inch DIM. MIN. MAX. MIN. MAX. A0 10.5 10.7 0.413 0.421 B0 15.7 15.9 0.618 0.626 D 1.5 1.6 0.059 0.063 D1 1.59 1.61 0.062 0.063 E 1.65 1.85 0.065 0.073 F 11.4 11.6 0.449 0.456 K0 4.8 5.0 0.189 0.197 P0 3.9 4.1 0.153 0.161 P1 11.9 12.1 0.468 0.476 P2 1.9 2.1 0.075 0.082 R 50 1.574 T 0.25 0.35 0.0098 0.0137 W 23.7 24.3 0.933 0.956 * on sales type
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STB80PF55, STP80PF55 Revision history
6 Revision history
Table 10. Document revision history
Date Revision Changes
09-Sep-2004 4 Revalidation 12-Sep-2006 5 New template, D2PAK added 09-Aug-2010 6 Content reworked to improve readability, no technical changes.
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STB80PF55, STP80PF55
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