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STP14NF12
STP14NF12FP
N-CHANNEL 120V - 0.16Ω - 14A TO-220/TO-220FP
LOW GATE CHARGE STripFET™ POWER MOSFET

TYPE VDSS RDS(on) ID

STP14NF12 120 V < 0.18 Ω 14 A

STP14NF12FP 120 V < 0.18 Ω 14 A
■ TYPICAL RDS(on) = 0.16Ω
■ EXCEPTIONAL dv/dt CAPABILITY
■ APPLICATION ORIENTED
3 3
CHARACTERIZATION 2 2
1 1

TO-220 TO-220FP
DESCRIPTION
This Power MOSFET series realized with STMicro-
electronics unique STripFET process has specifical-
INTERNAL SCHEMATIC DIAGRAM
ly been designed to minimize input capacitance and
gate charge. It is therefore suitable as primary
switch in advanced high-efficiency isolated DC-DC
converters for Telecom and Computer application. It
is also intended for any application with low gate
charge drive requirements

APPLICATIONS
■ HIGH-EFFICIENCY DC-DC CONVERTERS
■ UPS AND MOTOR CONTROL

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit
STP14NF12 STP14NF12FP
VDS Drain-source Voltage (VGS = 0) 120 V
VDGR Drain-gate Voltage (RGS = 20 kΩ) 120 V
VGS Gate- source Voltage ±20 V
ID Drain Current (continuous) at TC = 25°C 14 8.5 A
ID Drain Current (continuous) at TC = 100°C 9 6 A
IDM (
) Drain Current (pulsed) 56 34 A
PTOT Total Dissipation at TC = 25°C 60 25 W
Derating Factor 0.4 0.17 W/°C
dv/dt (1) Peak Diode Recovery voltage slope 9 V/ns
EAS (2) Single Pulse Avalanche Energy 60 mJ
VISO Insulation Withstand Voltage (DC) - 2500 V
Tj Operating Junction Temperature
-55 to 175 °C
Tstg Storage Temperature
(● ) Pulse width limited by safe operating area (1) ISD ≤14A, di/dt ≤300A/µs, VDD ≤ V(BR)DSS, Tj ≤ T JMAX.
(2) Starting Tj = 25°C, ID = 14A, VDD = 50V
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STP14NF12/STP14NF12FP

THERMAL DATA
TO-220 TO-220FP
Rthj-case Thermal Resistance Junction-case Max 2.5 6 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
Tl Maximum Lead Temperature For Soldering Purpose 300 °C

ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)

OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source ID = 250 µA, VGS = 0 120 V
Breakdown Voltage
IDSS Zero Gate Voltage VDS = Max Rating 1 µA
Drain Current (VGS = 0)
VDS = Max Rating, TC = 125 °C 10 µA
IGSS Gate-body Leakage VGS = ±20V ±100 nA
Current (VDS = 0)

ON (1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA 2 3 4 V
RDS(on) Static Drain-source On VGS = 10V, ID = 7 A 0.16 0.18 Ω
Resistance

DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (1) Forward Transconductance VDS = 15V , ID = 7 A 4 S
Ciss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 460 pF
Coss Output Capacitance 70 pF
Crss Reverse Transfer 30 pF
Capacitance

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STP14NF12/STP14NF12FP

ELECTRICAL CHARACTERISTICS (CONTINUED)

SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on) Turn-on Delay Time VDD = 50 V, ID = 7 A 16 ns
RG = 4.7Ω VGS = 10V
tr Rise Time (Resistive Load, see Figure 3) 25 ns

Qg Total Gate Charge VDD = 80 V, ID = 14 A, 15.5 21 nC

Qgs Gate-Source Charge VGS = 10V 3.7 nC
Qgd Gate-Drain Charge 4.7 nC

SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(off) Turn-off-Delay Time VDD = 50 V, ID = 7 A, 32 ns
tf Fall Time RG = 4.7Ω, VGS = 10V 8 ns
(Resistive Load, see Figure 3)

SOURCE DRAIN DIODE

Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD Source-drain Current 14 A
ISDM (2) Source-drain Current (pulsed) 56 A
VSD (1) Forward On Voltage ISD = 14 A, VGS = 0 1.5 V
trr Reverse Recovery Time ISD = 14 A, di/dt = 100A/µs, 92 ns
Qrr Reverse Recovery Charge VDD = 50 V, Tj = 150°C 230 nC
IRRM Reverse Recovery Current (see test circuit, Figure 5) 5 A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.

Safe Operating Area For TO-220 Safe Operating Area For TO-220FP

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STP14NF12/STP14NF12FP

Thermal Impedance For TO-220 Thermal Impedance For TO-220FP

Output Characteristics Transfer Characteristics

Transconductance Static Drain-source On Resistance

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STP14NF12/STP14NF12FP

Gate Charge vs Gate-source Voltage Capacitance Variations

Normalized Gate Threshold Voltage vs Temp. Normalized On Resistance vs Temperature

Source-drain Diode Forward Characteristics Normalized BVDSS vs Temperature

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STP14NF12/STP14NF12FP

Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform

Fig. 3: Switching Times Test Circuit For Fig. 4: Gate Charge test Circuit
Resistive Load

Fig. 5: Test Circuit For Inductive Load Switching

And Diode Recovery Times

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STP14NF12/STP14NF12FP

TO-220 MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.066
F2 1.14 1.70 0.044 0.066
G 4.95 5.15 0.194 0.202
G1 2.40 2.70 0.094 0.106
H2 10 10.40 0.393 0.409
L2 16.40 0.645
L3 28.90 1.137
L4 13 14 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.20 6.60 0.244 0.259
L9 3.50 3.93 0.137 0.154
DIA 3.75 3.85 0.147 0.151

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STP14NF12/STP14NF12FP

TO-220FP MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.45 0.7 0.017 0.027
F 0.75 1 0.030 0.039
F1 1.15 1.7 0.045 0.067
F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 .0385 0.417
L5 2.9 3.6 0.114 0.141
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
E
A

D
B

L3
L6
L7
F1

G1

G
H

F2

1 2 3
L5
L2 L4

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STP14NF12/STP14NF12FP

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
© The ST logo is a registered trademark of STMicroelectronics

© 2002 STMicroelectronics - Printed in Italy - All Rights Reserved

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