A binary parallel adder is a digital circuit used to perform the addition of binary numbers. It adds multiple binary numbers simultaneously.
Components 1.Full Adder: 1. Inputs: Two binary digits (bits) to be added and a carry-in bit from the previous stage. 2. Outputs: A sum bit and a carry-out bit.
2.Parallel Adder: •Consists of multiple full adders connected in parallel. •Each full adder handles one bit of the binary numbers. •The carry-out of one full adder is connected to the carry-in of the next higher-order full adder. Carry Look Ahead Adder In the case of the parallel adder, the speed at which the addition is performed is affected by the propagation delay at all the stages. That is, in a ripple carry adder, for every adder block, the two bits that are to be added are present immediately. However, all adder blocks wait for the carry to reach from its preceding block.
So, it is not possible to generate the sum and carry off any block until the input carry is identified. The Look Ahead Adder Carry adder speeds up the performance of the process, eliminating the ripple carry delay. Below are the important terms regarding the Look Ahead Adder Carry Adder. A carry-look-ahead adder decreases the propagation delay by including more complex hardware. In this configuration, the ripple carry design is suitably transformed such that the carry logic over fixed groups of bits of the adder is reduced to two-level logic. Below is the circuit diagram for 4-bit look ahead carry adder.
Pi=Ai⊕Bi→Carry propagates Gi=Ai Bi →Carry generation Si=Pi⊕Ci→Output Sum Ci+1=Gi+PiCi→Output Carry Where Ai , Bi , Ci are the inputs BCD Adder BCD stands for binary coded decimal. Assume, we are having two 4-bit numbers A and B. The value of A and B can range from 0(0000 in binary) to 9(1001 in binary) because we are examining decimal numbers. The output will range from 0 to 18 if we are not counting the carry from the earlier sum. But if we are analyzing the carry, then the maximum value of output will be 19 (i.e. 9+9+1 = 19). When we are simply combining A and B, then we get the binary sum. If the sum of two numbers is less than or equal to 9, then the value of the BCD sum and the binary sum will be identical. Whereas if the sum is greater than 9 we will add 6(0110 in binary) to the result to make it valid. Below is the block diagram for the BCD adder. We consider a 4-bit Binary-Adder, which uses addend and augend bits as an input with an input carry ‘Carry in’. The Binary-Adder returns five outputs, i.e., S3, S2, S1, S0, and output carry K. With the assistance of the output carry K and S3, S2, S1, S0 outputs, the logical circuit is designed to identify the Cout Decoder • Decoder is a combinational circuit. It has N inputs and 2N outputs. • The decoder is called n-to-m-line decoder, where m≤2n . • 2 to 4 Decoder. • It has 2 inputs and 22 = 4 outputs. 2 to 4 Decoder with Enable input 3 to 8 Decoder • Encoders is a combinational circuit which takes 2N inputs and gives out N outputs, the enable pin should be kept 1 for enabling the circuit. Encoders • 4 to 2 Encoder • An encoder is the inverse operation of a decoder. • A= Y2+Y3 • B=Y1+Y3 • An Encoder is a device that converts the active data signal into a coded message format or it is a device that converts analogue signal to digital signals. • When an input signal is applied to an encoder then logic circuitry involved within it converts that particular input into coded binary output. • To decode is to perform the reverse operation :converting a code back into an unambiguous form code and the device which perform this operation is termed as Decoder. Decimal to BCD Encoder
• The decimal-to-binary encoder usually
consists of 10 input lines and 4 output lines. Each input line corresponds to each decimal digit and 4 outputs correspond to the BCD code. This encoder accepts the decoded decimal data as an input and encodes it to the BCD output which is available on the output lines. Priority Encoders • A 4 to 2 priority encoder has 4 inputs: Y3, Y2, Y1 & Y0, and 2 outputs: A1 & A0. Here, the input, Y3 has the highest priority, whereas the input, Y0 has the lowest priority. In this case, even if more than one input is ‘1’ at the same time, the output will be the (binary) code corresponding to the input, which is having higher priority Octal to Binary Encoder (8 to 3 Encoder)
• The 8 to 3 Encoder or octal to Binary encoder consists of 8 inputs: Y7 to Y0 and 3 outputs: A2, A1 & A0. Each input line corresponds to each octal digit and three outputs generate corresponding binary code. • Application of Encoders • Encoders are very common electronic circuits used in all digital systems. • Encoders are used to translate the decimal values to the binary in order to perform binary functions such as addition, subtraction, multiplication, etc. • Other applications especially for Priority Encoders may include detecting interrupts in microprocessor applications. Multiplexer
• Multiplexer is a combinational circuit that
selects binary information from one of many inputs and directs it into single output. • The selection of particular input is controlled by a set of selection line • Mutliplexer has 2n inputs, n select line (control input) and one output Demultiplexer (DEMUX) • A demultiplexer, sometimes abbreviated demux, is a circuit that has one input and more than one output. It is used when a circuit intends to send a signal to one of many devices. • description sounds similar to the description given for a decoder, but a decoder is used to select among many devices while a demultiplexer is used to send a signal among many devices. • Applications of Demultiplexer • Synchronous data transmission systems • Combinational circuit design • Automatic test equipment systems FLIP FLOPS Flip-flop is a circuit that maintains a state until directed by input to change the state. Flip flop is popularly known as the basic digital memory circuit. It has its two states as logic 1(High) and logic 0(low) states Types of flip-flops: 1.SR Flip Flop 2.JK Flip Flop 3.D Flip Flop 4.T Flip Flop • Sequential circuits are digital circuits that store and use the previous state information to determine their next state. Unlike combinational circuits, which only depend on the current input values to produce outputs, sequential circuits depend on both the current inputs and the previous state stored in memory elements. • Flip-flop is a circuit that maintains a state until directed by input to change the state. • It has its two states as logic 1(High) and logic 0(low) states. • Sequential circuits are commonly used in digital systems to implement state machines, timers, counters, and memory elements. The memory elements in sequential circuits can be implemented using flip-flops. • Sequential circuit is a combinational logic circuit that consists of inputs variable (X), logic gates (Computational circuit), and output variable (Z). • The outputs of the sequential circuits depend on both the combination of present inputs and previous outputs. The previous output is treated as the present state. So, the sequential circuit contains the combinational circuit and its memory storage elements. A sequential circuit doesn't need to always contain a combinational circuit. So, the sequential circuit can contain only the memory element. • Types of Sequential Circuits • Asynchronous sequential circuits • The clock signals are not used by the Asynchronous sequential circuits • The asynchronous circuits do not use clock pulses. The internal state is changed when the input variable is changed. The un-clocked flip-flops or time-delayed are the memory elements of asynchronous sequential circuits. The asynchronous sequential circuit is similar to the combinational circuits with feedback. • Synchronous sequential circuits • In synchronous sequential circuits, synchronization of the memory element's state is done by the clock signal. The output is stored in either flip-flops or latches(memory devices). • The clock signal acts as a timing reference, and all state changes within the circuit occur at specific rising or falling edges of the clock. • In synchronous circuits, the outputs are updated only during these clock edges, ensuring that all components within the circuit operate in a well-defined and coordinated manner. • Asynchronous circuits do not rely on a common clock signal for synchronization. Instead, they use signals called handshakes, or request/acknowledge protocols, to coordinate the flow of data and control within the circuit. SR Latch • The Q and not-Q outputs are supposed to be in opposite states. • making both the S and R inputs equal to 1 results in both Q and not-Q being 0. For this reason, having both S and R equal to 1 is called an invalid or illegal state for the S-R Latch • Otherwise, making S=1 and R=0 “sets” the Latch so that Q=1 and not-Q=0. Conversely, making R=1 and S=0 “resets” the latch in the opposite state. When S and R are both equal to 0, the latch’s outputs “latch” in their prior states. • A flip flop in digital electronics is a circuit with two stable states that can be used to store binary data. The stored data can be changed by applying varying inputs. Flip-flops and latches are fundamental building blocks of digital electronics systems used in computers, communications, and many other types of systems. • The difference between latch and flip flop is that a latch is level-triggered (outputs can change as soon as the inputs change) and Flip-Flop is edge-triggered (only changes state when a control signal goes from high to low or low to high). • SR Flip Flop • The SR flip flop is a 1-bit memory bistable device having two inputs, i.e., SET and RESET. The SET input 'S' set the device or produce the output 1, and the RESET input 'R' reset the device or produce the output 0. The SET and RESET inputs are labeled as S and R, respectively. • The SR flip flop stands for "Set-Reset" flip flop. The reset input is used to get back the flip flop to its original state from the current state with an output 'Q'. SR FlipFlop Using NOR Gate Applications of SR Flip Flop • Register: SR Flip Flop used to create register. Designer can create any size of register by combining SR Flip Flops. • Counters: SR Flip Flops used in counters. Counters counts the number of events that occurs in a digital system. • Memory: SR Flip Flops used to create memory which are used to store data, when the power is turned off. • Synchronous System: SR Flip Flop are used in synchronous system which are used to synchronise the operation of different component. D FlipFlop • In SR NOR Gate Flipflop circuit, the undefined input condition of SET = “1" and RESET = “1" is forbidden. It is the drawback of the SR flip flop. • The D flip-flop is a clocked flip-flop with a single digital input 'D'. Each time a D flip-flop is clocked, its output follows the state of 'D'. The D Flip Flop has only two inputs D and CP. The D inputs go precisely to the S input and its complement is used to the R input. • In D flip flop, the single input "D" is referred to as the "Data" input. When the data input is set to 1, the flip flop would be set, and when it is set to 0, the flip flop would change and become reset. • When the clock input is set to true, the D input condition is only copied to the output Q. This forms the basis of another sequential device referred to as D Flip Flop. • Advantages of D Flip Flop • D flip flop is very simple to design. • The computation speed of D flip flop is very fast compared to other flip flops. • D flip flop requires very few components to design which makes it simple to understand. • Application of D Flip Flop • D flip flop is having numerous number of application in digital system is described as follows: • Memory: D flip flop is used to create memory circuit for holding the data. • Registers: D flip flop is used to create register, which can hold data in digital system. By using the D flip flop the designer can built any size of register as per the requirement. • Counters: D flip flops are used to create the counters which counts the number of event occurred in the digital system. • Synchronous System: D flip flop is having in developing the synchronous system. JK FlipFlop • The JK flip flop is one of the most used flip flops in digital circuits. The JK flip flop is a universal flip flop having two inputs 'J' and 'K’. • The only difference between JK flip flop and SR flip flop is that when both inputs of SR flip flop is set to 1, the circuit produces the invalid states as outputs, but in case of JK flip flop, there are no invalid states even if both 'J' and 'K' flip flops are set to 1 • Advantages of JK Flip-Flop • Toggle Functionality: The application which are required to get output as its complement of input that also can be developed by JK-flipflops as when J=K=1 it triggers toggle state which gives output which is complement with it’s each clock pulse. • Error Detection and Correction: We can use a complex circuit built by JK-flipflops which can detect and correct information during data-transmission. • Disadvantages of JK Flip-Flop • Complexity: Compared to other types of flipflops(D,T, SR), JK flipflop requires additional logic gates to implement which consumes extra memory resources and increases complexity to operate. • Propagation Delay: This is the major problem present in JK-FF. Propagation delay results a timing delay in certain application which are time-flow sensitive. • Race Problem: This issue arises when the clock input’s timing pulse isn’t given enough time to turn “Off” before the output Q’s state is altered. Race Around Condition in JK Flipflop • For J-K flip-flop, if J=K=1, and if clk=1 for a long period of time, then output Q will toggle as long as CLK remains high which makes the output unstable or uncertain. • This is called a race around condition in J-K flip-flop. • This problem can be overcome by making the clock =1 for very less duration. • The circuit used to overcome race around conditions is called the Master Slave JK flip flop. • Master Slave JK flip flop • Here two JK flip flops are connected in series. • The first JK flip flop is called the “master” and the other is a “slave”. • The output from the master is connected to the two inputs of the slave whose output is fed back to inputs of the master. • The circuit also has an inverter other than the two flip flops. • The Clock Pulse and inverter are connected because of which the flip flops get an inverted clock pulse. • In other words, if CP=0 for a master flip-flop, then CP=1 for a slave flip-flop and vice versa. • Working of a Master Slave flip flop • When the clock pulse goes high, the slave is isolated; J and K inputs can affect the state of the system. • When the CP goes back to 0, information is transmitted from the master flip-flop to the slave flip-flop and output is obtained. • As the master flip flop is positive triggered it responds first and the slave later • When the Clock pulse is high the output of master is high and remains high till the clock is low because the state is stored. • Now the output of master becomes low when the clock pulse becomes high again and remains low until the clock becomes high again. • Thus toggling takes place for a clock cycle. • When the clock pulse is high, the master is operational but not the slave thus the output of the slave remains low till the clock remains high. • When the clock is low, the slave becomes operational and remains high until the clock again becomes low. • Toggling takes place during the whole process since the output is changing once in a cycle. • If J=1 and K=1, it toggles on the positive transition of the clock and thus the slave toggles on the negative transition of the clock. Master FlipFlop Slave FlipFlop T FlipFlop
•T flip flop or to be precise is known as Toggle Flip Flop because it can able to toggle its output depending upon on the input. •T here stands for Toggle. •Toggle basically indicates that the bit will be flipped i.e., either from 1 to 0 or from 0 to 1. •Here, a clock pulse is supplied to operate this flop, hence it is a clocked flip-flop. • Characteristic Equation • The characteristic equation tells us about what will be the next state of flip flop in terms of present state. • Q(n+1) = TQn’ + T’Qn = T XOR Qn • Excitation Table
Excitation Table basically tells about the excitation which is required by flip flop to go from current state to next state. • Applications of T Flip Flop • There are numerous applications of T Flip Flop in Digital System, which are listed below: • Counters: T Flip Flops used in counters. Counters counts the number of events that occurs in a digital system. • Data Storage: T Flip Flops used to create memory which are used to store data, when the power is turned off. • Synchronous logic circuits: T flip-flops can be used to implement synchronous logic circuits. • Shift registers: T flip-flops can be used in shift registers which are used to shift binary data in one direction.
