UMW
UMW UC3842/43/44/45
Description
The 3842/43/44/45 are fixed frequency current mode PWM controller. They are specially designed for OFF−Line and DC to
DC converter applications with a minimal external components. Internally implemented circuits include a trimmed oscillator for precise
duty cycle control, a temperature compensated reference, high gain error amplifier, current sensing comparator, and a high current
totempole output ideally suited for driving a power MOSFET. Protection circuitry includes built undervoltage lockout and current
limiting. The 3842 and 3844 have UVLO thresholds of 16 V (on) and 10 V (off). The corresponding thresholds for the 3843/
45 are 8.4V (on) and 7.6V (off). The 3842) and 3843 can operate within 100% duty cycle. The 3844 and 3845 can operate within 50% duty
cycle.
The 384X has Start-Up Current 0.5mA (typ).
Features Pin Connection
• Low Start-Up and Operating Current
• High Current Totem Pole Output
• Undervoltage Lockout With Hysteresis
• Operating Frequency Up To 500KHz
Top view
Block diagram
(toggle flip flop used only in 3844, 3845)
Absolute Maximum Ratings
Symbol Parameter Maximum Units
VCC Supply Voltage (low impedance source) 30 V
IO Output Current ±1 A
VI Input Voltage (Analog Inputs pins 2,3) −0.3 to 5.5 V
ISINK (E.A) Error Amp Output Sink Current 10 mA
Po Power Dissipation (TA=250C) 1 W
o
Tstg Storage Temperature Range -65 to150 C
o
TL Lead Temperature (soldering 5 sec.) 260 C
o
TA Operating Ambient Temperature 0 to 70 C
www.umw-ic.com 1 友台半导体有限公司
UMW
R
UMW UC3842/43/44/45
Electrical characteristics
(*VCC=15V, RT=10kΩ, CT=3.3nF, TA=0℃ to +70℃, unless otherwise specified)
Characteristics Symbol Test Conditions Min Typ Max Units
Reference Section
Reference Output Voltage VREF TJ = 25°C, IREF = 1 mA 4.9 5.0 5.1 V
Line Regulation ∆VREF 12V ≤ VCC ≤ 25 V 6.0 20 mV
Load Regulation ∆VREF 1 mA ≤ IREF ≤ 20mA 6.0 25
Short Circuit Output Current ISC TA = 25°C -100 -180 mA
Oscillator Section
f TJ = 25°C 384X 47 50 57
Oscillation Frequency KHz
384X 47 52 57
Frequency Change with Voltage ∆f/∆VCC 12V ≤ VCC ≤ 25 V 0.05 1.0 %
Oscillator Amplitude V(OSC) (peak to peak) 1.6 V
Error Amplifier Section
Input Bias Current IBIAS VFB=3V -0.1 -2 µA
Input Voltage VI(E.A) Vpin1 = 2.5V 2.42 2.5 2.58 V
Open Loop Voltage Gain AVOL 2V ≤ V0 ≤ 4V 65 90
dB
Power Supply Rejection Ratio PSRR 12V ≤ VCC ≤ 25 V 60 70
Output Sink Current ISINK Vpin2 = 2.7V, Vpin1 = 1.1V 2 7 mA
Output Source Current ISOURCE Vpin2 = 2.3V, Vpin1 = 5V -0.5 -1.0 mA
High Output Voltage VOH Vpin2 = 2.3V, RL = 15KΩ to GND 5.0 6.0
V
Low Output Voltage VOL Vpin2 = 2.7V, RL = 15KΩ to PIN 8 0.8 1.1
Current Sense Section
Gain GV (Note 1 & 2) 2.85 3.0 3.15 V/V
Maximum Input Signal VI(MAX) V pin1 = 5V (Note1) 0.9 1.0 1.1 V
Supply Voltage Rejection SVR 12V ≤ VCC ≤ 25 V (Note 1) 70 dB
Input Bias Current IBIAS Vpin3 = 3V -3.0 -10 µA
Output Section
Low Output Voltage VOL ISINK = 20 mA 0.08 0.4
ISINK = 200 mA 1.4 2.2
V
High Output Voltage VOH ISINK = 20 mA 13 13.5
ISINK = 200 mA 12 13.0
Rise Time tR TJ = 25°C, CL = 1nF (Note 3) 45 150
nS
Fall Time tF TJ = 25°C, CL = 1nF (Note 3) 35 150
Undervoltage Lockout Section
Start Theshold VTH(ST) 3842/44 14.5 16.0 17.5
V
3843/45 7.8 8.4 9.0
Min. Operating Voltage VOPR(min) 3842/44 8.5 10 11.5
V
(After Turn On) 3843/45 7.0 7.6 8.2
PWM Section
Max. Duty Cycle D(MAX) 3842/43 95 97 100
3844/45 47 48 50 %
Min. Duty Cycle D(MAX) 0
Total Standby Current
Start−Up Current IST 384X 0.05
mA
Operating Supply Current ICC (OPR) Vpin3 = Vpin2 = 0V 13 17
Zener Voltage VZ ICC=25 mA 30 38 V
* - Adjust VCC above the start threshold before setting it to 15V.
Note 1: Parameter measured at trip point of latch with Vpin2=0.
Note 2: Gain defined as A=∆Vpin1/∆Vpin3 ; 0 ≤ Vpin3 ≤ 0.8V.
Note 3: These parameters, although guaranteed, are not 100% tested in production.
www.umw-ic.com 2 友台半导体有限公司
UMW
R
UMW UC3842/43/44/45
Pin functions
N Function Description
1 COMP This pin is the Error Amplifier output and is made for loop compensation.
2 VFB This is the inverting input of the Error Amplifier. It is normall y connected to the switching power supply
output through a resistor divider.
3 ISENSE A voltage proportional to inductor current is connected to this input. The PWM uses this information to
terminate the output switch conduction.
4 RT/CT The oscillator frequency and maximum Output duty cycle are programmed by connecting resistor R T to Vref
and capacitor CT to ground.
5 GROUND This pin is the combined control circuitry and power ground.
6 OUTPUT This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourced and sink by
this pin.
7 VCC This pin is the positive supply of the integrated circuit.
8 Vref This is the reference output. It provides charging current for capacitor C T through resistor RT .
Application information
2.5V
1mA
VFB 2
COMP 1
Figure 1. Error Amp Configuration
VCC 7
ON/OFF COMMAND TO S/R OF IC
ICC
3842 3843 13mA
3844 3845
VON 16V 8.4V
VOFF 10V 7.6V 0.2mA
VCC
VOFF VON
During UVLO, the Output is low
Figure 2. Undervoltage Lockout
ERROR
+ AMP 2R
2
VFB _
1V CURRENT
COMP 1
R SENSE
IS COMPARATOR
R
CURRENT 3
SENSE
RS C
5
GND
1.0V
Peak current is determined by IS max
RS
Figure 3. Current Sense Circuit
www.umw-ic.com 3
友台半导体有限公司
UMW
R
UMW UC3842/43/44/45
VREF VREF
8 8
RT RT
RT /CT RT /CT
4 4
RSLOPE 3842 RSLOPE 3842
IS IS
R1 ISENSE R1 ISENSE
3 3
5 5
RS RS
GND GND
Figure 4. Slope Compensation Techniques
SCR must be selected for a holding current of less than 0.5mA.
The simple two transistor circuit can be used in place of the SCR as shown.
Figure 5. Latched Shutdown
From V0
From V0
+ +
2.5 V 2.5 V
1mA Rp 1mA
RI + 2R + 2R
VFB RI VFB
- -
2 EA 2 EA
Cp
Rd Cf Rf
Rf Cf
R R
1
COMP 1
COMP
5 5
Error Amp compensation circuit for stabilizing any current-mode topology except for Error Amp compensation circuit for stabilizing current-mode boost and flyback
boost and flyback converters operating with continuous inductor current. topologies operating with continuous inductor current.
Figure 6. Error Amplifier Compensation
www.umw-ic.com 4 友台半导体有限公司
UMW
R
UMW UC3842/43/44/45
Figure 7. External Clock Synchronization
Figure 8. Soft-Start Circuit
www.umw-ic.com 5 友台半导体有限公司
UMW
R
UMW UC3842/43/44/45
Typical Performance Characteristics
)Ω
500 500
Figure 1. Timing Resistor vs. Oscillator Frequency Figure 2. Output Dead-Time vs. Oscillator Frequency
Figure 3. Maximum Output Duty Cycle vs. Figure 4. Error Amp Open-Loop Gain vs.
Timing Resistor (UC3842/43) Frequency
Figure 5. Current Sense Input Threshold vs. Figure 6. Reference Short Circuit Current vs.
Error Amp Output Voltage Temperature
www.umw-ic.com 6 友台半导体有限公司
.,
UMW
R
UMW UC3842/43/44/45
Rate
Figure 7. Output Saturation Voltage vs. Load Current
Current
Figure 8. Supply Current vs. Supply Voltage
o tag .e
TA = 25°C 5 .
Figure 9. Oscillator and Output Waveforms
Ordering information
www.umw-ic.com 7 友台半导体有限公司