Solution to Assignment 4 FM : 63

Transistors

1. a) Draw and explain the input and output characteristics of a bipolar junction transistor (BJT) operated in
common emitter (CE) mode. [7]

Input characteristics
The input set for the common-emitter amplifier as shown in the figure, relates an input current (IB) to an
input voltage (VBE) for various levels of output voltage (VCE).

Output characteristics
The output set relates an output current (IC) to an output voltage (VCE) for various levels of input current (IB) as
shown in the figure. The output or collector set of characteristics has three basic regions of interest, as indicated :
the active, cutoff, and saturation regions.
Note that the magnitude of IB is in μA, compared to mA of IC. Consider also that the curves of IB are not as horizontal
as those obtained for IE in the common-base configuration, indicating that the collector-to emitter voltage, VCE will
influence the magnitude of the collector current, due to “Early effect”. The active region for the common-emitter
configuration is that portion of the upper-right quadrant that has the greatest linearity, that is, that region in which
the curves for IB are nearly straight and equally spaced. In the figure, this region exists to the right of the vertical
dashed line at VCE sat and above the curve for IB equal to zero. The region to the left of VCE sat is called the saturation
region.

In the active region of a common-emitter amplifier, the base-emitter junction is forward-biased, whereas the
collector-base junction is reverse-biased.

The cutoff region for the common-emitter configuration is not as well defined as for the common-base
configuration. Note on the collector characteristics that IC is not equal to zero when IB is zero. For the common-
base configuration, when the input current IE was equal to zero, the collector current was equal only to the reverse
saturation current ICO, so that the curve IE = 0 and the voltage axis were, for all practical purposes, one.

The reason for this difference in collector characteristics can be seen from the equation
IC = α IE + ICBO
IC = α (IC + IB) + ICBO

If we consider the case, where IB = 0A, and substitute a typical value of α such as 0.996, the resulting collector
current is the following:

If ICBO were 1 μA, the resulting collector current with IB = 0A would be 250*(1 μA) = 0.25 mA, as reflected in the
output characteristics.

For linear (least distortion) amplification purposes, cutoff for the common-emitter configuration will be defined by
IC = ICEO. In other words, the region below IB = 0 μA is to be avoided if an undistorted output signal is required.
b) Write down the differences between BJT and FET. [4]
Difference in characteristic, neutral
1. BJT is a current-controlled device, whereas the FET is a voltage-controlled device.

Difference in characteristics, advantage BJT

1. BJT has a much higher sensitivity to changes in applied signals than a JFET (the variation in output
current is typically a great deal more for BJTs than for FETs for the same change in the applied
voltage).
2. The construction characteristics of some FETs can make them more sensitive to handling than BJTs.

Difference in characteristics, advantage JFET

1. JFET has a very high input impedance (one MΩ to several hundred MΩ), whereas BJT has low input
impedance (~KΩ).
2. JFET has better thermal stability compared to a BJT.
3. JFETs are usually smaller (in dimensions) than a BJT, making them particularly useful in fabrication
of integrated circuit (IC) chips.

Note : For a 4 marks question, writing any 4 of the above points would fetch full marks.

c) Explain pinch-off phenomenon in junction field effect transistor (JFET). [4]

For a n-channel JFET, as the voltage VDS is increased from 0 V to a few volts, the current will increase as determined
by Ohm’s Law, and the plot of ID vs VDS will appear as shown to the left. For the region of low values of VDS, the
resistance is essentially constant (straight slope of the curve). As VDS increases and approaches a level referred to
as VP, the depletion regions will widen, causing a noticeable reduction in channel width. The reduced path of
conduction causes the resistance to increase, and the curve in the graph shown occurs. The more horizontal the
curve, the higher the resistance, suggesting that the resistance is approaching “infinite” ohms in the horizontal
region. If VDS is increased to a level where it appears that the two depletion regions would “touch” as shown, a
condition referred to as pinch-off will result. The level of VDS that establishes this condition is referred to as pinch-
off voltage and is denoted by VP, as shown in the figure.
2. a) Draw and explain the input and output characteristics of a BJT operated in common base (CB) mode. [8]
Input characteristics
The input set for the common-base amplifier as shown in the figure, relates an input current (IE) to an input
voltage (VBE) for various levels of output voltage (VCB).

The input characteristics reveal that for fixed values of collector voltage (VCB), as the base-to-emitter voltage
increases, the emitter current increases in a manner that closely resembles the diode characteristics. However,
with increasing levels of VCB, the emitter current IE increases due to “Early effect”.

Output characteristics
The output set relates an output current (IC) to an output voltage (VCB) for various levels of input current (IE) as
shown in the figure. The output or collector set of characteristics has three basic regions of interest, as indicated :
the active, cutoff, and saturation regions.
The active region is the region normally employed for linear (undistorted) amplifiers. In particular, in the active
region the base-emitter junction is forward-biased, whereas the collector-base junction is reverse-biased.

At the lower end of the active region the emitter current (IE) is zero, and the collector current is simply that due to
the reverse saturation current, ICO, as indicated in the figure below. The current ICO is so small (microamperes) in
magnitude compared to the vertical scale of IC (mA) that it appears on virtually the same horizontal line as IC = 0.
The circuit conditions that exist when IE = 0 for the common-base configuration are shown in the figure.

As the emitter current increases above zero, the collector current increases to a magnitude essentially equal to
that of the emitter current as determined by the basic transistor-current relations. Note also the almost negligible
effect of VCB on the collector current for the active region. In the active region, IC = αIE + ICO. The second part of the
expression (~ μA) is negligible compared to the first part (~ mA). So, we can take IC ≈ αIE. However, as the curves
clearly indicate that a first approximation to the relationship between IC and IE in the active region is given by IC ≈
IE, since α ≈ 1 (Note α is always < 1).

As inferred by its name, the cutoff region is defined as that region where the collector current is 0 A. In addition,
in the cutoff region the base-emitter and collector-base junctions of a transistor are both reverse-biased.

The saturation region is defined as that region of the characteristics to the left of VCB = 0 V. The horizontal scale in
this region was expanded to clearly show the dramatic change in characteristics in this region. Note the exponential
increase in collector current as the voltage VCB increases toward 0 V. In the saturation region the base-emitter and
collector-base junctions are forward-biased. In the saturation region, IC < αIE.

b) Write down the different modes of operation of BJT for it to act as a current amplifier, a voltage amplifier
and a voltage buffer. [3]
i) Current amplifier– Common emitter
ii) Voltage amplifier– Common base
iii) Voltage buffer – Common collector.

c) Derive the relationship between α and β . Given α = 0.98, what will be the corresponding β. [2 + 2]
α (common-base amplification factor) and β (common-emitter amplification factor) are related by the
α 0.98 0.98
expression β = 1− α. So, for α = 0.98, β = 1− 0.98 or, β = 0.02 or, β = 49.
3. a) Explain the base width modulation in BJT. [3]

Taking the example of a common-emitter configuration, we observe that there is an upward slope of the output
characteristic curve. This is due to early effect i.e., base width modulation with change in reverse bias voltage, VCE.

For a particular value of base current IB (taking one from the family of curves), when the output voltage, VCE is
increased, the collector-base reverse bias increases. Consequently, the depletion width at this junction will
increase, and the effective base width will decrease. There will be lesser recombination of electron-hole pairs (EHP),
and the base current will tend to decrease. Moreover, the concentration gradient of charge carriers between
emitter and base increases, resulting in increase in emitter and collector current. Keeping the base current fixed at
a particular value, the result is an increase in collector current, IC. Thus, the output characteristic curve slopes
upwards.

Note : The same explanation can be given for a BJT in common base (CB) configuration. Either explanation is correct.

b) Draw the output characteristics of n-channel JFET showing all regions of operation. Indicate the pinch-off
voltage on the characteristics. [4]

The pinch-off voltage is VP, as shown in the figure. For VGS ≥ |VP|, the current ID is zero.

4. NULL
5. b) Draw and explain the output characteristics of n-channel enhancement type MOSFET showing
all regions of operation. [4]

The output (or drain) characteristics reveal that for the MOSFET device with VGS = 8 V, saturation occurs at a level
of VDS = 6 V. In fact, the saturation level for VDS is related to the level of applied VGS by VDS sat = VGS - VT. Obviously,
therefore, for a fixed value of VT, the higher the level of VGS, the greater is the saturation level for VDS, as shown in
the figure by the locus of saturation levels.

For the characteristics shown in the figure, the level of VT is 2 V, as revealed by the fact that the drain current has
dropped to 0 mA. In general, therefore, for values of VGS less than the threshold level, the drain current of an
enhancement type MOSFET is 0 mA.

The figure also reveals that as the level of VGS increases from VT to 8 V, the resulting saturation level for ID also
increases from a level of 0 mA to 10 mA. In addition, it is quite noticeable that the spacing between the levels of
VGS increases as the magnitude of VGS increases, resulting in ever-increasing increments in drain current.

For levels of VGS > VT, the drain current is related to the applied gate-to-source voltage by the following nonlinear
relationship:- ID = k(VGS - VT)2. Again, it is the squared term that results in the nonlinear (curved) relationship
between ID and VGS. The k term is a constant that is a function of the construction of the device.

Now, to identify the ohmic (triode) region, saturation region and cut-off region in the drain characteristics, draw
the locus of the line VDS (sat) = VGS – VT.

• The triode (ohmic) region is to the left of this locus, where VDS (sat) < VGS – VT.
• The saturation region is to the right of this locus, where VDS (sat) ≥ VGS – VT.
• The cut-off region is the region below the curve for VGS = VT, where VGS < VT.
Note : In the answer script, the different regions of operation should be drawn in the figure for the output
characteristic curves itself.

6. Find I B, IC, IE and

VCE for the voltage divider network shown in the Figure 1 below, and determine its region of
operation. R1 = R2 = 5KΩ, RE = 2KΩ, RC = 1KΩ, VCC = 10V, β = 100, VBE = 0.7V. [7 + 1 = 8]

Figure 1

The Thevenin voltage,

VTh = {R2 / (R2 + R1)} VCC

or, VTh = {5 / (5 + 5)} 10 = 5 V, and

the Thevenin resistance,

RTh = R1 || R2 = (R1 x R2) / (R1 + R2)

or, RTh = (5 x 5) / (5 + 5) = 2.5 KΩ.

Redrawing the circuit, we have

For loop 1

Applying KVL in loop 1, we get

- VTh + (IB x RTh) + VBE + (IE x RE) = 0

or, VTh – (IB x RTh) – VBE – (β + 1) IB x RE = 0

or, 5 – IB x (2.5 x 103) – 0.7 – 101 IB x (2 x 103) = 0

 or, IB = (5 – 0.7) / {103 (2.5 + 101 x 2)}

or, IB = 4.3 / (103 x 204.5)

or, IB = 21.03 μA

Therefore, IC = β IB = 100 x 21.03 μA

or, IC = 2.103 mA

Now, IE = (β + 1) IB = 101 x 21.03 μA

or, IE = 2.124 mA

For loop 2

Applying KVL in loop 2, we get

-VCC + (IC x RC) + VCE + (IE x RE) = 0

or, 10 – {(2.103 X 10-3) x (1 x 103)} – VCE – {(2.124 x 10-3) x (2 x 103)} = 0

or, VCE = 10 – 2.103 – (2.124 x2)

or, VCE = 10 – 2.103 – 4.248

or, VCE = 3.65 V.

7. What is thermal run-away? Determine the stability factor (S) with respect to reverse saturation current for
the Figure 1 above. [2 + 3]

Thermal run-away

Taking the example of a BJT in common-emitter (CE) configuration, we have

IC = β*IB + (β + 1)*ICO

where, in the second term, ICO is due to the flow of minority charge carriers, which in turn depends on the
temperature (T). With increase in temperature, ICO increases, so also IC. As a matter of fact, ICO doubles for every
100 rise in temperature.

Now, the flow of collector current, IC produces heat within the transistor. As a result, temperature increases,
ICO increases and the collector current, IC also increases. So, a cyclic process starts. Increase in temperature (T)
results in increase in the minority carrier current, ICO and consequently IC. This results in generation of heat
which raises the temperature further. This process repeats itself, and within a short period of time, the collector
current, IC will be high enough to burn the transistor. This self-destruction of an unstabilized transistor is called
thermal runaway.
Stability factor (S)

The rate of change of the collector current, IC w.r.t. the leakage current ICO, at constant input voltage VBE and
amplification factor, β is called Stability factor, S.

The Thevenin equivalent circuit for the potential divider bias circuit of Figure 1, is shown to the left.

Explanatory Note (not part of evaluation)

8. a) Write the importance of biasing of a transistor. [2]

Biasing means the application of dc voltages to establish a fixed level of current and voltage in a BJT or FET
transistor amplifier, i.e., to select the Q point (dc operating point) suitably to achieve maximum undistorted
output signal swing.

Once selected properly, the Q point should not shift because of change in IC due to variation in

 β, and
 temperature.

b) Calculate stability factor with respect to reverse saturation current for the collector to base feedback circuit.
[2]
c) Physically explain why a collector to base feedback circuit offers better thermal stability with respect to fixed
bias circuit. [2]
In fixed bias circuit, the Stability factor, S is given by the relation, S = β + 1. So, any change in β, has a direct
relationship with S. In case of collector to base feedback circuit, S depends on values of RB and RC, apart from β, as
deduced earlier.

The collector to base feedback configuration ensures that the transistor is always biased in the active region
regardless of the value of Beta (β). The DC base bias voltage is derived from the collector voltage VC, thus providing
good stability.

9. For Figure 2 below, find V CE and IC; β = 50. [3]

Figure 2

Redrawing the circuit (for convenience) as follows, we have

For loop 1

Applying KVL in loop 1, we get

- VCC + (IB x RB) + VBE + (IE x RE) = 0

or, VCC – (IB x RB) – VBE – (β + 1) (IB x RE) = 0

or, 12 – IB x (240 x 103) – 0.7 – 51 (IB x 470) = 0

or, IB = (12 – 0.7) / {103 (240 + 51 x 0.47)}

or, IB = 11.3 / (103 x 263.97)

or, IB = 42.8 μA

Therefore, IC = β IB = 50 x 42.8 μA

or, IC = 2.14 mA

For loop 2

Now, IE = (β + 1) IB = 51 x 42.8 μA

or, IE = 2.18 mA

Applying KVL in loop 2, we get

-VCC + (IC x RC) + VCE + (IE x RE) = 0

or, -12 + {(2.14 X 10-3) x (2.2 x 103)} + VCE + {(2.18 x 10-3) x 470} = 0

or, VCE = 12 – (2.14 x 2.2) – (2.18 x 0.47)

or, VCE = 12 – 4.708 – 1.025

or, VCE = 6.267 V.

10. Additional question, not part of evaluation

Why are the depletion regions for an n-channel JFET not uniform from Source to Drain during conduction ? [5]

The depletion region is wider near the top of both p - type materials. The reason for the change in width of the
region is best described through the help of the figure. Assuming a uniform resistance in the n - channel, we can
break down the resistance of the channel into the divisions appearing in in the figure. The current ID will establish
the voltage levels through the channel as indicated on the same figure. The result is that the upper region of the p
- type material will be reverse-biased by about 1.5 V, with the lower region only reverse-biased by 0.5 V. From the
discussion of the diode operation, it was found that the greater the applied reverse bias, the wider is the depletion
Region - hence the distribution of the depletion region as shown in the figure. The fact that the p – n junction is
reverse-biased for the length of the channel results in a gate current of zero amperes, as shown in the same figure.
The fact that IG = 0 A is an important characteristic of the JFET.

Reference:
1. Electronic Devices and Circuit Theory – Boylestad, Nashelsky
2. Youtube : Neso Academy – Analog Electronics.

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