ADE7878
ADE7878
P2 P1 P10 P12
                                 P3
                         ICP
                         ICN                                                                                                            Digital
                                                                                                                                                                   LPC2368               USB Port
                                                                                                                                       Isolators
                                               Filter Network                        ADE78xx
                         INP
                         INN                                                                                                                                                                    P13
                                 P4                                                                                                                                             P15
                                       Optional External
                                       1.2V Reference      ADR280                                       Optional External
                                                                                                            Clock In
                                                                                                                                                                               Connector to
                                                                                                                                                                               PC COM Port
P5 P6 P7 P8 P9 J2 J3 J4
VN GND VCP GND VBP GND VAP GND VDD GND CF3 CF2 CF1
Rev. PrB
Evaluation boards are only intended for device evaluation and not for production purposes.
Evaluation boards are supplied “as is” and without warranties of any kind, express, implied, or
statutory including, but not limited to, any implied warranty of merchantability or fitness for a
particular purpose. No license is granted by implication or otherwise under any patents or other
intellectual property by application or use of evaluation boards. Information furnished by Analog
Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result
from its use. Analog Devices reserves the right to change devices or specifications at any time                             One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
without notice. Trademarks and registered trademarks are the property of their respective owners.                           Tel: 781.329.4700                                  www.analog.com
Evaluation boards are not authorized to be used in life support devices or systems.                                         Fax: 781.461.3113       ©2009 Analog Devices, Inc. All rights reserved.
EVAL-ADE7878EB                                                                                                                                    Preliminary Technical Data
TABLE OF CONTENTS
Features .............................................................................................. 1                   Front Panel Screen ....................................................................7
General Description ......................................................................... 1                             PSM0 – Normal Power Mode..................................................8
   Evaluation Board Power Supplies............................................... 3                                         Enter PSM1 Mode .................................................................. 15
   Analog Inputs (P1, P2, P3, P4, P6, P7, and P8) ........................ 3                                                Enter PSM2 Mode .................................................................. 15
       Current Sense Inputs (P1, P2, P3, and P4 Connectors) ...... 3                                                        Enter PSM3 Mode .................................................................. 16
       Using a Current Transformer as the Current Sensor .......... 3                                                 Communication Protocol Between Microcontroller and
       Votage Sense Inputs (P5, P6, P7, and P8 Connectors) ........ 4                                                 ADE7878 ..................................................................................... 16
Setting Up the Evaluation Board as an Energy Meter ............. 5 Upgrading Microcontroller Firmware..................................... 19
Using the Evaluation Board with another microcontroller 7 Evaluation Board Schematic ..................................................... 23
the microcontroller and one side of the isocouplers, one that 100 1K
                                                                                                                                                                                  18000pF
                                                                                                                                                 18000pF
                                                                                                          JP1A
                                                                                                                                                                      C17
                                                                                                                        R1
supplies the other side of the optocouplers and one that supplies
                                                                                                                                         C9
                                                                                                 P1
ADE7878. The ground of the microcontroller’s power domain is                               IAP
connected to the ground of the PC through the USB cable. The IAN
                                                                                                                                                                                  18000pF
                                                                                                                                                 18000pF
ground of ADE7878 power domain is determined by the
JP2A
C10
                                                                                                                                                                      C18
                                                                                                                        R2
ground of the phase voltages VAP, VBP, VCP and VN and must                                                                        R10                      R18
                                                                                                                                                                                                      IAN
be different from the ground of the microcontroller’s power                                                                       100                      1K
domain.                                                                                                                                                                              TP2
                                                                                                                                  JP4A                     JP6A
The microcontroller 3.3V supply is provided at P12 connector.                            Figure 2. Phase A Current Input Structure on Evaluation Board
ADE7878 3.3V supply is provided at P9 connector. The same
                                                                                                                                         JP3A                         JP5A
supply should also be provided at P10 connector, the connector                                                                                                                                 TP1
                                                                                                                                                                      R17                                       ADE78xx
                                                                                                                                         R9
that supplies the other side of the isocouplers.                                                                                                                                                        IAP
100 1K
                                                                                                                                                                                            18000pF
ANALOG INPUTS (P1, P2, P3, P4, P6, P7, AND P8)                                           Imax=6 Arms
                                                                                                                                                            18000pF
                                                                                                                 JP1A
                                                                                                                                                                            C17
                                                                                                                             R1
                                                                                                                                               C9
                                                                                                                                    50
                                                                                              CT
                                                                                                     P1
                                                                                            1:2000
Current and voltage signals are connected at the screw
terminals P1 – P4 and P5 - P8 respectively. All analog input
                                                                                                                                                                                            18000pF
                                                                                                                                                            18000pF
signals are filtered using the on-board anti-aliasing filters before
JP2A
C10
                                                                                                                                                                            C18
                                                                                                                             R2
                                                                                                                                    50
being connected to ADE7878. The components used on the                                                                                   R10                          R18                               IAN
board are the recommended values to be used with ADE7878.                                                                               100                           1K
                                                                                                                                                                                               TP2
Current Sense Inputs (P1, P2, P3, and P4 Connectors)                                                                                 JP4A                             JP6A
ADE7878 measures 3 phase currents and the neutral current.                                   Figure 3. Example of a Current Transformer Connection
Current transformers or Rogowski coils can be used to sense                     The burden resistors R1 and R2 have to be chosen function of
the currents, but not mixed together. ADE7878 contains                          current transformer ratio and maximum current of the system.
different internal PGA gains on phase currents and on the                       The jumpers JP1A and JP2A should be opened if R1 and R2 are
neutral current, so sensors with different ratios can be used.                  used. The antialiasing filters should be enabled by opening
The only requirement is to have same scale signals at PGAs                      jumpers J5A and J6A (please see Figure 3).
outputs, otherwise the mismatch functionality of ADE7878 is
compromised (Please see Neutral Current Mismatch chapter in                     The transformer’s secondary current is converted to a voltage by
ADE7878 data sheet for more details). Figure 2 shows the                        using a burden resistor across the secondary winding outputs.
structure used for the phase A current: the sensor outputs are                  Care should be taken when using a current transformer as the
connected to P1 connector. The resistors R1 and R2 are the                      current sensor. If the secondary is left open, that is no burden is
burden resistors and by default, they are not populated. They                   connected, a large voltage could be present at the secondary
can also be disabled using JP1A and JP2A jumpers. The RC                        outputs. This can cause an electric shock hazard and potentially
networks R9/C9 and R10/C10 are used to provide phase                            damage electronic components.
compensation when a current transformer is being used. They                     Most current transformers introduce a phase shift that the
can be disabled using JP3A and JP4A jumpers. The RC                             manufacturer indicates in the data sheet. This phase shift can
networks R17/C17 and R18/C18 are the antialiasing filters. The                  lead to significant energy measurement errors, especially at low
default corner frequency of these low pass filters is 8.8KHz                    power factors. ADE7878 can correct the phase error using
(1KΩ/18nF). These filters can easily be adjusted by replacing                   APHCAL[9:0], BPHCAL[9:0] and CPHCAL[9:0] phase
the components on the evaluation board.                                         calibration registers as long as the error stays between -6.732°
All the other current channels, that is phase B, phase C and                    and +1.107° at 50Hz. Please see ADE7878 data sheet for more
neutral current have similar input structure.                                   details. The software supplied with the ADE7878 evaluation
                                                                                board allows user adjustment of phase calibration registers.
Using a Current Transformer as the Current Sensor
                                                                                For this particular example, burden resistors of 50 ohm signify
Figure 3 shows how a current transformer can be used as a                       an input current of 7.05 Arms at ADE7878 ADC full scale input
current sensor in one phase of a 3-phase 4-wire distribution                    (0.5V). In addition, the PGA gains for the current channel have
system (Phase A). The other two phases and the neutral current                  to be set at 1. For more information on setting PGA gains,
requires similar connections.                                                   please see ADE7878 data sheet. The evaluation software allows
                                                                                the user to configure the current channel gain.
                                                                                                                                                                            18000pF
                                                                                                                                  1M           100K
                                                                                                                                                                      C32
                                                                                                                    JP8B
R32
                                                                                                                                                                 1K
network on the voltage channels is designed such that the
                                                                                              Phase A
corner frequency (3dB frequency) of the network matches that
                                                                                  Neutral
                                                                                                                                                                                 VN
                                                                                                                                                         1
                                                                                                                                                      A 2
                                                                                                                                                     COM 3
of the antialiasing filters in the current channels inputs. This                                                                           JP9A
                                                                                                                                                      B
                                                                                                                                        JP7N
prevents obtaining large energy errors at low power factors.                                                  P5
                                                                                                                                                                                      TP9
                                                                                                        VN                               R25                                                VN
Figure 4 shows a typical connection of the phase A voltage
                                                                                                                                                       18000pF
                                                                                                                                         1K
JP8N
                                                                                                                                               C25
inputs: the resistor divider is enabled by opening JP7A jumper.
The antialiasing filter on VN data path is enabled by opening
JP7N jumper. JP8B and JP8N are opened. The analog input VN
                                                                                            Figure 4. Phase A Voltage Input Structure On Evaluation Board
is connected to AGND via the antialiasing filter R25/C25 using
JP8N connector.                                                               The maximum signal level permissible at VAP, VBP and VCP
                                                                              pins of ADE7878 is 0.5V peak. Although ADE7878 analog
The attenuation networks can be easily modified by the user to
                                                                              inputs can withstand ±2V without risk of permanent damage,
accommodate any input level. However, the value of R32 (1KΩ),
                                                                              the signal range should not exceed ±0.5V with respect to
should be modified only together with the corresponding
                                                                              AGND for specified operation.
SETTING UP THE EVALUATION BOARD AS AN                                        and the control circuit, the power supplies should have floating
ENERGY METER                                                                 voltage outputs.
Figure 5 shows a typical setup for the ADE7878 evaluation                    The evaluation board is connected to the PC using a regular
board. In this example, an energy meter for a 4 wire, three phase            USB cable supplied with the board. When the evaluation board
distribution system is shown. Current transformers are used to               has been powered up and is connected to the PC, the
sense the phase and neutral currents and are connected as                    enumeration process begins and the PC recognizes new
shown in Figure 5. The line voltages are connected directly to               hardware and asks to install the appropriate driver. The driver
the evaluation board as shown. Note the state of all jumpers                 is found in VirCOM_Driver_XP folder of the CD. After the
must match the indication in Figure 5 and the fact the board is              driver has been installed, the supplied evaluation software can
supplied from two different 3.3V power supplies, one for the                 be launched. The next section describes the ADE7878
ADE7878 domain, VDD, and one for LPC2368 domain,                             evaluation software in detail and how it can be installed and
MCU_VDD. As the two domains are isolated to ensure there is                  uninstalled.
no electrical connection between the high voltage test circuit
MCU_GND
                                                                                                               MCU_VDD
                                                             GND
                                                                   VDD
            Phase C
                                                        P9                                     P12
                                                                P1
  Neutral
                                                                            R1
                                                       IAN                                                                     JP3A, JP4A = closed
                                                                            R2
                                                                                                                         IAN   JP5A, JP6A = open
                                                                P2
                                                       IBP                  R3                                           IBP   JP1B, JP2B = open
C32
                                                                P7
                                                       VBP                  R27         R30
                                                                                                                     VBP
                                                                                                                               JP7B, JP8B = open
                                                                                         R33
C33
                                                                P6
                                                       VCP                  R28         R31
                                                                                                                     VCP
                                                                                                                               JP7C, JP8C = open
                                                                                         R34
C34
            Load
                                                                P5
                                                        VN                  R25
                                                                                                                         VN
                                                                                                                               JP7N, JP8N = open
                                                                                  C34
Neutral
Figure 11. CFx Configuration panel Figure 14. Fundamental Active Power panel
                                                                  Apparent Power
        Figure 12. Read Energy Registers panel
                                                                  When “Apparent Power” is selected, a new panel is opened
                                                                  (Figure 16). Similar to the other panels that deal with power
                                                                  measurement, this panel is divided in two horizontal halfs: the
                                                                  one below shows the apparent power data path of one phase
Power Quality
Power Quality panel is divided in two horizontal halfs. The
bottom one shows various registers that manage various power
quality measurements function of Active Measurement button.
The one above shows ADE7878 status and various buttons that
manage the measurements. When “Read Configuration” button
is pressed, all power quality registers (MASK1[31:0],
STATUS1[31:0], PERIOD[15:0], MMODE[7:0], ISUM[27:0],
OVLVL[23:0], OILVL[23:0], PHSTATUS[15:0], IPEAK[31:0],
VPEAK[31:0], SAGLVL[23:0], SAGCYC[7:0], ANGLE0[15:0],
ANGLE1[15:0], ANGLE2[15:0], COMPMODE[15:0],
CHECKSUM[31:0], PEAKCYC[7:0]) are read and the ones
belonging to the active window are visualized. Based on
PERIOD[15:0] register, the line frequency is computed and                                  Figure 20. Zero Crossing Measurements panel
visualized in the Zero Crossing Measurement window. Based on
Figure 21. Neutral Current Mismatch panel Figure 24. Time Intervals Between Phases panel
                                                                             Waveform Sampling
                                                                             This panel (see Figure 25) uses HSDC port to acquire data from
                                                                             the ADE7878 and visualize it. It can be accessed only if the
                                                                             communication between ADE7878 and LPC2368 is I2C. See
                                                                             Activating Serial Communication ADE7878 − LPC2368 section
                                                                             for details on how to set I2C communication on the ADE7878
                                                                             evaluation board.
                                                                             The HSDC transmits data to LPC2368 at 4MHz because this is
                                                                             the maximum speed the slave SPI of LPC2368 can receive data.
                                                                             The panel contains some switches that must be set before
                                                                             acquiring data:
                                                                             -One switch chooses what quantities are visualized: phase
                                                                             currents and voltages or phase powers. For every set of
                                                                             quantities, only two can be acquired at a time. This choice is
                                                                             done using the buttons “Select Waveform1” and “Select
    Figure 22. Overvoltage & Overcurrent management panel                    Waveform2”.
                                                                             -A second switch allows for acquired data to be stored in files
                                                                             for further utilization.
                                                                             -The acquisition time should also be set before an acquisition is
                                                                             ordered. By default, this time is 150msec. It is limited for phase
                                                                             currents and voltages for up to 1sec, but for phase powers is
                                                                             unlimited. This difference appears because the LPC2368 must
                                                                             execute in real time three tasks using the ping pong buffer
                                                                             method: continuously receiving data from HSDC, storing it into
                                                                             its USB memory, sending it to the PC. More time it takes the
                                                                             HSDC to transmit data, more time LPC2368 has to transmit
                                                                             data to the PC. As transmitting 6 phase currents and voltages at
                                                                             4MHz takes 103.25μsec, less than 125 μsec, but transmitting 9
                                                                             phase powers takes 133.25μsec, more than 125 μsec, the first
                                                                             quantities are transmitted by HSDC at 8KHz update rate and
                                                                             the second at 4KHz rate. This means the phase currents and
                                                                             voltages can be acquired only for up to 1sec before the LPC2368
              Figure 23. Peak management panel                               goes out of bandwidth and the powers can be acquired for an
                                                                             unlimited time.
CHECKSUM Register
This panel gives access to all ADE7878 registers that are used to
compute CHECKSUM[31:0] register (see Figure 26). The user
can read/write the value of these registers by clicking on
“Read”/”Write” buttons. LabView program estimates the value
of CHECKSUM[31:0] register and visualizes it whenever one of
the registers is changed. When “Read” button is pressed, aside
from reading the registers, CHECKSUM[31:0] is also read and
visualized. In this way, the user can compare the value of
CHECKSUM[31:0] estimated by LabView with the value read
from ADE7878. They should always be identical.
NOTES