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Tutorial 2023 - Ans

1. The document provides instructions for solving problems related to CMOS inverter circuits, including: calculating transition delays, designing an inverter to meet timing specifications, analyzing the operation of an NMOS inverter circuit, and determining output voltage swing and input voltage ranges. 2. It asks the reader to calculate high-to-low and low-to-high transition delays for a 1pF resistive-load inverter using the average current method, and then design an inverter with specified nMOS and pMOS sizes to meet a delay time specification. 3. Additional questions analyze the modes of operation for an NMOS inverter based on device voltages, derive an expression for its switching threshold, and determine

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62 views3 pages

Tutorial 2023 - Ans

1. The document provides instructions for solving problems related to CMOS inverter circuits, including: calculating transition delays, designing an inverter to meet timing specifications, analyzing the operation of an NMOS inverter circuit, and determining output voltage swing and input voltage ranges. 2. It asks the reader to calculate high-to-low and low-to-high transition delays for a 1pF resistive-load inverter using the average current method, and then design an inverter with specified nMOS and pMOS sizes to meet a delay time specification. 3. Additional questions analyze the modes of operation for an NMOS inverter based on device voltages, derive an expression for its switching threshold, and determine

Uploaded by

chetannp121
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Tutorial

1. Consider switching delays for 1 pF in a 10-k Ω resistive-load inverter circuit,


Where µnCox = 25 µA/V2, W/L= 10, VT0, = 1.0 V
a. Find τPHL (50% high-to-low transition delay) by using the average current
method. Assume that the input signal is an ideal rectangular pulse switching
between 0 and 5 V with zero rise/fall times. You will have to calculate VOL to
solve this problem.
b. By using an appropriate differential equation and the proper initial voltage
across the capacitor (when the input voltage is at VOH) which is VOL and not 0
V, calculate τPLH. Use the same input voltage as in part (a).

Answer: Attached separately

2. Design a CMOS inverter by determining the Wn and Wp of the nMOS and pMOS
transistors to meet the following speci cations
a) Vth = 2V for VDD = 5V
b) Delay time of 2ns for a Vout transition from 5V to 0V with Cload = 1pF

µnCox = 35 µA/V2, µpCox = 10 µA/V2, Ln = Lp = 1µm VT0n = 1.0 V, VT0p = -1.5V,


Wmin (limited by design rules) = 2µm

3. Consider the following NMOS inverter. Assume that the bulk terminals of all
NMOS devices are connected to GND. Assume that the input IN has a 0V to 2.5V
swing. φF = -0.3V, VT0 = 0.43V

a. Set up the equation(s) to compute the voltage on node x. Assume γ = 0.5.


b. What are the modes of operation of device M2? Assume γ = 0.
c. What is the value on the output node OUT for the case when IN = 0V?
Assume γ = 0.
d. Assuming γ = 0, derive an expression for the switching threshold (VM) of the
inverter. Assume that the device sizes for M1, M2 and M3 are (W/L)1, (W/L)2,
and (W/L)3 respectively. What are the limits on the switching threshold?
For this, consider two cases:
i) (W/L)1 >> (W/L)2
ii) (W/L)2 >> (W/L)1

Answer
a. VGD3 = 0, VGS3 = VDD - Vx, VSB3 = Vx
fi
If VDD - Vx < VT, M3 will be in cutoff otherwise in saturation.

Hence, VDD - Vx = VT = , Substitute VDD = 2.5, VT0 = 0.43V, φF


= -0.3V and VSB = Vx. Then solve for Vx

b. VGS2 = Vx – Vout, VGD2 = Vx – VDD, VSB2 = Vout


We know that VDD - Vx = VT = > Vx = VDD - VT
Hence VGD2 < VT.
VGS2 = Vx – Vout = VDD - VT - Vout
M2 will be in cutoff or saturation

c. VGS1 = Vin, VGD1 = Vin – Vout


When Vin = 0 => M1 is off Vout will be high. For the output capacitance to charge to high voltage M2
should be on => VGS2 = Vx – Vout = VDD - VT - Vout > VT. This means VDD - Vout > 2VT.
Vout(max) = VDD - 2Vout

4. What is the output voltage swing for this circuit?

5. Find the values of VOH, VOL and the input voltage range for Vout = VOH and Vout =
VOL. Assume VDD = 1.2V, and VTN = |VTP| = 0.2V.
Ans:

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