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Oled 55 C 6 P

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0% found this document useful (0 votes)

208 views125 pages

Oled 55 C 6 P

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Jm Tech

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Internal Use Only

OLED TV
SERVICE MANUAL
CHASSIS : EA62C

MODEL : OLED55C6P OLED55C6P-U

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL69465801 (1601-REV00) Printed in Korea

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CONTENTS

CONTENTS ............................................................................................... 2

SAFETY PRECAUTIONS ......................................................................... 3

SERVICING PRECAUTIONS..................................................................... 4

SPECIFICATION........................................................................................ 6

ADJUSTMENT INSTRUCTION............................................................... 13

BLOCK DIAGRAM .................................................................................. 24

EXPLODED VIEW ................................................................................... 30

ASSEMBLY / DISASSEMBLY...................................... ............................ 31

SCHEMATIC CIRCUIT DIAGRAM ............................................ APPENDIX

TROUBLESHOOTING.............................................................. APPENDIN

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SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

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SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo-
NOTE: If unforeseen circumstances create conflict between the sure of the assembly.
following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder ES
on page 3 of this publication, always follow the safety precautions. devices.
Remember: Safety First. 4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as “anti-static” can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board mod- 6. Do not remove a replacement ES device from its protective
ule or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug or (Most replacement ES devices are packaged with leads electri-
other electrical connection. cally shorted together by conductive foam, aluminum foil or
c. Connecting a test substitute in parallel with an electrolytic comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective material
installation of electrolytic capacitors may result in an explo- to the chassis or circuit assembly into which the device will be
sion hazard. installed.
2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or circuit,
high voltage meter or other voltage measuring device (DVM, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace-
Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the
3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity suf-
4. Unless specified otherwise in this service manual, clean ficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropriate
(by volume) isopropyl alcohol (90 % - 99 % strength) tip size and shape that will maintain tip temperature within the
CAUTION: This is a flammable mixture. range or 500 °F to 600 °F.
Unless specified otherwise in this service manual, lubrication of 2. Use an appropriate gauge of RMA resin-core solder composed
contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks are Do not use freon-propelled spray-on cleaners.
correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500 °F to 600 °F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500 °F to 600 °F)
Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand against
ily by static electricity. Such components commonly are called the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors component lead and the printed circuit foil, and hold it there
and semiconductor “chip” components. The following techniques only until the solder flows onto and around both the compo-
should be used to help reduce the incidence of component dam- nent lead and the foil.
age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush.
natively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent poten-
tial shock reasons prior to applying power to the unit under test.

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IC Remove/Replacement 3. Solder the connections.
Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced
which the IC leads are inserted and then bent flat against the cir- component and adjacent components and the circuit board to
cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures.
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique Circuit Board Foil Repair
as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
Removal board causing the foil to separate from or "lift-off" the board. The
1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed whenever
gently prying up on the lead with the soldering iron tip as the this condition is encountered.
solder melts.
2. Draw away the melted solder with an anti-static suction-type At IC Connections
solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the
the IC. following procedure to install a jumper wire on the copper pattern
Replacement side of the circuit board. (Use this technique only on IC connec-
1. Carefully insert the replacement IC in the circuit board. tions).
2. Carefully bend each IC lead against the circuit foil pad and
solder it. 1. Carefully remove the damaged copper pattern with a sharp
3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary).
(It is not necessary to reapply acrylic coating to the areas). 2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
"Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and
Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection.
1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper
as possible to the component body. pattern and let it overlap the previously scraped end of the
2. Bend into a "U" shape the end of each of three leads remaining good copper pattern. Solder the overlapped area and clip off
on the circuit board. any excess jumper wire.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding At Other Connections
leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern
long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the
each connection. installation of a jumper wire on the component side of the circuit
board.
Power Output, Transistor Device
Removal/Replacement 1. Remove the defective copper pattern with a sharp knife.
1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous
2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens.
3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern
board. break and locate the nearest component that is directly con-
4. Insert new transistor in the circuit board. nected to the affected copper pattern.
5. Solder each transistor lead, and clip off excess lead. 3. Connect insulated 20-gauge jumper wire from the lead of the
6. Replace heat sink. nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Diode Removal/Replacement Carefully crimp and solder the connections.
1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the
sible to diode body. it does not touch components or sharp edges.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.

Fuse and Conventional Resistor

Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.

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SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range
This spec sheet is applied OLED TV with EA62C chassis

2. Test condition
Each part is tested as below without special notice.

(1) Temperature : 25 ºC ± 5 ºC(77 ± 9 ºF) , CST : 40 ºC ± 5 ºC

(2) Relative Humidity: 65 % ± 10 %
(3) Power Voltage
Market Input voltage Frequency Remark
USA 120V 50/60Hz Standard Voltage of each
product is marked by
models

(4) Specification and performance of each parts are followed

each drawing and specification by part number in
accordance with BOM
(5) The receiver must be operated for about 20 minutes prior
to the adjustment

3. Test method
(1) Performance: LGE TV test method followed
(2) Demanded other specification
Safety : UL, CSA, CE, IEC specification
EMC: FCC, ICES, CE, IEC specification
Wireless : Wireless HD Specification (Option)

4. General Specification
No Item Specification Remark
1 Market USA
2 Receiving System ATSC / NTSC-M / 64 QAM / 256 QAM
3 Program coverage (1) VHF : 02~13
(2) UHF : 14~69
(3) DTV : 02-69
(4) CATV : 01~135
(5) CADTV : 01~135
4 Input Voltage AC 120 ~ 240V 50/60Hz USA (110~240V, 50/60Hz)

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5. 2D Mode
5.1. Component input(Y, CB/PB, CR/PR)
No. Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed
1 720*480i 15.73 59.94 13.500 SDTV, DVD 480I(525I)
2 720*480i 15.75 60.00 13.514 SDTV, DVD 480I(525I)
3 720*576i 15.625 50.00 13.500 SDTV, DVD 576I(625I) 50Hz
4 720*480p 31.47 59.94 27.000 SDTV 480P
5 720*480p 31.50 60.00 27.027 SDTV 480P
6 720*576p 31.25 50.00 27.000 SDTV 576P 50Hz
7 1280*720 44.96 59.94 74.176 HDTV 720P
8 1280*720 45.00 60.00 74.250 HDTV 720P
9 1280*720 37.50 50.00 74.250 HDTV 720P 50Hz
10 1920*1080 28.125 50.00 74.250 HDTV 1080I 50Hz,
11 1920*1080 33.72 59.94 74.176 HDTV 1080I
12 1920*1080 33.75 60.00 74.25 HDTV 1080I
13 1920*1080 56.25 50 148.5 HDTV 1080P
14 1920*1080 67.43 59.94 148.5 HDTV 1080P
15 1920*1080 67.50 60.00 148.5 HDTV 1080P

5.2. HDMI Input (PC)

No Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remarks
1 640*350 31.468 70.09 25.17 EGA
2 720*400 31.469 70.08 28.32 DOS
3 640*480 31.469 59.94 25.17 VESA(VGA)
4 800*600 37.879 60.31 40 VESA(SVGA)
5 1024*768 48.363 60.00 65 VESA(XGA)
6 1360*768 47.712 60.015 84.75 VESA(WXGA)
7 1152*864 54.348 60.053 80 VESA
8 1280*1024 63.981 60.020 109.00 SXGA Support to HDMI-PC
9 1920*1080 67.5 60 158.40 WUXGA(Reduced
Blanking)
10 3840*2160 54 24.00 297.00 UDTV 2160P
11 3840*2160 56.25 25.00 297.00 UDTV 2160P
12 3840*2160 67.5 30.00 297.00 UDTV 2160P
13 4096*2160 53.95 23.97 296.703 UDTV 2160P
14 4096*2160 54 24 297 UDTV 2160P

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5.3. HDMI Input (DTV)
No Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed
1 640*480 31.469 59.94 25.125 SDTV 480P
2 640*480 31.5 60.00 25.125 SDTV 480P
3 720*480 15.73 59.94 13.500 SDTV, DVD 480I(525I) Spec. out but display
4 720*480 15.75 60.00 13.514 SDTV, DVD 480I(525I)
5 720*576 15.625 50.00 13.500 SDTV, DVD 576I(625I) 50Hz
6 720*480 31.47 59.94 27 SDTV 480P
7 720*480 31.5 60.00 27.027 SDTV 480P
8 720*576 31.25 50.00 27 SDTV 576P
9 1280*720 44.96 59.94 74.176 HDTV 720P
10 1280*720 45 60.00 74.25 HDTV 720P
11 1280*720 37.5 50.00 74.25 HDTV 720P
12 1920*1080 28.125 50.00 74.25 HDTV 1080I
13 1920*1080 33.72 59.94 74.176 HDTV 1080I
14 1920*1080 33.75 60.00 74.25 HDTV 1080I
15 1920*1080 26.97 23.976 63.296 HDTV 1080P
16 1920*1080 27.00 24.000 63.36 HDTV 1080P
17 1920*1080 33.71 29.97 79.120 HDTV 1080P
18 1920*1080 33.75 30.00 79.20 HDTV 1080P
19 1920*1080 56.25 50.00 148.5 HDTV 1080P
20 1920*1080 67.432 59.94 148.350 HDTV 1080P
21 1920*1080 67.5 60.00 148.50 HDTV 1080P
22 3840*2160 53.95 23.98 296.703 UDTV 2160P
23 3840*2160 54 24.00 297.00 UDTV 2160P
24 3840*2160 56.25 25.00 297.00 UDTV 2160P
25 3840*2160 61.43 29.97 296.703 UDTV 2160P
26 3840*2160 67.5 30.00 297.00 UDTV 2160P
27 3840*2160 112.5 50.00 594 UDTV 2160P When HDMI1,2,3
UHD DEEP COLOUR ON
28 3840*2160 134.86 59.94 593.407 UDTV 2160P When HDMI1,2,3
UHD DEEP COLOUR ON
29 3840*2160 135 60.00 594 UDTV 2160P When HDMI1,2,3
UHD DEEP COLOUR ON
30 4096*2160 53.95 23.98 296.703 UDTV 2160P
31 4096*2160 54 24.00 297 UDTV 2160P
32 4096*2160 56.25 25.00 297 UDTV 2160P
33 4096*2160 61.43 29.97 296.703 UDTV 2160P
34 4096*2160 67.5 30.00 297 UDTV 2160P
35 4096*2160 112.5 50.00 594 UDTV 2160P When HDMI1,2,3
UHD DEEP COLOUR ON
36 4096*2160 134.86 59.94 593.407 UDTV 2160P When HDMI1,2,3
UHD DEEP COLOUR ON
37 4096*2160 135 60.00 594 UDTV 2160P When HDMI1,2,3
UHD DEEP COLOUR ON

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6. 3D Mode(3D supported mode manually)
6.1. RF Input
No Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remarks
1 1280*720 37.500 50 74.25 HDTV 720P 2D to 3D, Side by Side, Top & Bottom
2 1920*1080 28.125 50 74.25 HDTV 1080I 2D to 3D, Side by Side, Top & Bottom

6.2. HDMI Input

6.2.1. HDMI1.4/2.0 (3D supported mode manually)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock Proposed 3D input proposed mode
(MHz)
1 720*480 31.5 60 27.03 SDTV 480P 2D to 3D, Side by Side(Half), Top & Bottom
2 720*576 31.25 50 27 SDTV 576P
3 1280*720 45.00 60.00 74.25 HDTV 720P
37.500 50 74.25 HDTV 720P
4 1920*1080 33.75 60.00 74.25 HDTV 1080I
28.125 50.00 74.25 HDTV 1080I
5 1920*1080 27.00 24.00 74.25 HDTV 1080P
28.12 25 74.25 HDTV 1080P
33.75 30.00 74.25 HDTV 1080P
67.50 60.00 148.5 HDTV 1080P
56.250 50 148.5 HDTV 1080P
6 3840*2160 53.95 23.976 296.703 HDTV 2160P 2D to 3D,
4096*2160 Top & Bottom, Side by Side(half)
54 24.00 297.00 HDTV 2160P
56.25 25.00 297.00 HDTV 2160P
61.43 29.970 296.703 HDTV 2160P
67.5 30.00 297.00 HDTV 2160P
7 3840*2160 112.5 50 594 HDTV 2160P 2D to 3D, Top & Bottom(half), Side by
Side(half),
8 4096*2160 135 60 594 HDTV 2160P
When HDMI1,2,3
UHD DEEP COLOUR ON

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6.2.2. HDMI 1.4b (3D supported mode automatically)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) VIC 3D input proposed mode Proposed
1 640*480 31.469 / 31.5 59.94/ 60 25.125/25.2 1 Top-and-Bottom Secondary(SDTV 480P)
Side-by-side(half) Secondary(SDTV 480P)

62.938/63 59.94/ 60 50.35/50.4 1 Frame packing Secondary(SDTV 480P)

2 720*480 31.469 / 31.5 59.94 / 60 27.00/27.03 2,3 Top-and-Bottom Secondary(SDTV 480P)
Side-by-side(half) Secondary(SDTV 480P)
62.938/63 59.94 / 60 54/54.06 2,3 Frame packing Secondary(SDTV 480P)
3 1280*720 31.25 50 27 17,18 Top-and-Bottom Secondary(SDTV 576P)
Side-by-side(half)
62.5 50 54 17,18 Frame packing Secondary(SDTV 576P)
4 1920*1080 15.625 50 27 21 TFrame packing Secondary(SDTV 576I)
Top-and-Bottom Secondary(SDTV 576I)
Side-by-side(half) Secondary(SDTV 576I)
5 1920*1080 37.500 50 74.25 19 Top-and-Bottom Primary(HDTV 720P)
Side-by-side(half) Primary(HDTV 720P)
44.96 / 45 59.94 / 60 74.17/74.25 4 Top-and-Bottom Primary(HDTV 720P)
Side-by-side(half) Primary(HDTV 720P)
75 50 148.5 19 Frame packing Primary(HDTV 720P)
89.91/90 59.94 / 60 148.35/148.5 4 Side-by-side(Full) Primary(HDTV 720P)
6 1920*1080 28.125 50.00 74.25 20 Top-and-Bottom Secondary(HDTV 1080I)
Side-by-side(half) Primary(HDTV 1080I)
33.72 / 33.75 59.94 / 60 74.17/74.25 5 Top-and-Bottom Secondary(HDTV 1080I)
Side-by-side(half) Primary(HDTV 1080I)
56.25 50.00 148.5 20 Frame packing Primary(HDTV 1080I)
67.432/67.50 59.94 / 60 148.35/148.5 5 Frame packing Primary(HDTV 1080I)
7 1920*1080 26.97 / 27 23.97 / 24 74.17/74.25 32 Top-and-Bottom Primary(HDTV 1080P)
Side-by-side(half) Primary(HDTV 1080P)
28.125 25 74.25 33 Top-and-Bottom Secondary(HDTV 1080P)
Side-by-side(half) Secondary(HDTV 1080P)
33.716 / 29.976 / 74.18/74.25 34 Top-and-Bottom Primary(HDTV 1080P)
33.75 30.00 Side-by-side(half) Secondary(HDTV 1080P)
43.94/54 23.97 / 24 148.35/148.5 32 Frame packing Primary(HDTV 1080P)
56.25 25 148.5 33 Frame packing Secondary(HDTV 1080P)
67.432 / 67.5 29.976 / 30 148.35/148.5 34 Frame packing Primary(HDTV 1080P)
56.250 50 148.5 31 Top-and-Bottom Primary(HDTV 1080P)
Side-by-side(half) Secondary(HDTV 1080P)
67.43 / 67.5 59.94 / 60 148.35/148.50 16 Top-and-Bottom Primary(HDTV 1080P)
Side-by-side(half) Secondary(HDTV 1080P)

Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
Only for training and service purposes

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6.2.3. HDMI-PC Input (3D) (3D supported mode manually)
No Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remarks
1 1024*768 48.36 60 65 HDTV 768P 2D to 3D,
Side by Side(half), Top & Bottom
2 1920*1080 47.71 60 85.5 HDTV 1080P 2D to 3D,
Side by Side(half), Top & Bottom
3 3840*2160 67.500 60 148.50 HDTV 2160P 2D to 3D,
54 24.00 297.00 Side by Side(half), Top & Bottom

56.25 25.00 297.00

4 4096*2160 67.5 30.00 297.00 HDTV 2160P 2D to 3D,
Side by Side(half), Top & Bottom
5 4096*2160 54 24 297.00 2D to 3D,
Top & Bottom(half), Side by Side(half)

6 Others - - - 640*350 2D to 3D,

720*400 Side by Side(half), Top & Bottom
640*480
800*600
1152*864

6.2.4. Component Input ( 3D) (3D supported mode manually)

No Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remarks
1 1280*720 37.5 50 74.25 HDTV 720P 2D to 3D,
2 1280*720 45.00 60.00 74.25 HDTV 720P Side by Side(half), Top &
Bottom
3 1280*720 44.96 59.94 74.176 HDTV 720P
4 1920*1080 33.75 60.00 74.25 HDTV 1080I
5 1920*1080 33.72 59.94 74.176 HDTV 1080I
6 1920*1080 28.12 50 74.25 HDTV 1080I
7 1920*1080 67.500 60 148.50 HDTV 1080P
8 1920*1080 67.432 59.94 148.352 HDTV 1080P
9 1920*1080 27.000 24.000 74.25 HDTV 1080P
10 1920*1080 28.12 25 74.25 HDTV 1080P
11 1920*1080 56.25 50 74.25 HDTV 1080P
12 1920*1080 26.97 23.976 74.176 HDTV 1080P
13 1920*1080 33.75 30.000 74.25 HDTV 1080P
14 1920*1080 33.71 29.97 74.176 HDTV 1080P

Copyright © LG Electronics. Inc. All rights reserved. - 11 - LGE Internal Use Only
Only for training and service purposes

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6.2.5. USB – Movie (3D) (3D supported mode manually)
No Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode
1 Under 704x480 - - - 2D to 3D
2 Over 704x480 - - - 2D to 3D, Side by Side(Half), Top & Bottom
Under 1080P
interlaced
3 Over 704x480 - 50 / 60 - 2D to 3D, Side by Side(Half), Top & Bottom,
Under 1080P - others -
progressive
4 Over 2160P - 24/25/30 - 2D to 3D, Side by Side(Half), Top & Bottom

6.2.6. USB, DLNA -Photo (3D) (3D supported mode manually)

No Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode
1 Under 320x240 - - - 2D to 3D
2 Over 320x240 - - - 2D to 3D, Side by Side(Half), Top & Bottom

6.2.7. USB, DLNA (3D) (3D supported mode automatically)

No Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode
1 1080p 33.75 30 74.25 Side by Side(Half), Top & Bottom, Side by Side(Full), Frame
2 2160p 67.5 30 297 Sequential, MPO(Photo), JPS(Photo)

6.2.8. Miracast, Widi (3D supported mode manually)

No Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode
1 1024*768p - 30/60 - 2D to 3D
2 1280*720p - 30/60 -
3 1920*1080p - 30/60 -
4 Others - - - 2D to 3D

* Remark: 3D Input mode

No. Side by Side Top & Bottom Checkerboard Single Frame Frame Row Column
Sequential Packing Interleaving Interleaving
1

2D to 3D

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ADJUSTMENT INSTRUCTION
1. Application 4. Automatic Adjustment
This spec. sheet applies to EA62C Chassis applied OLED TV 4.1. ADC Calibration
all models manufactured in TV factory (1) Enter the ADC Calibration in ADJ Menu
(2) Check the ‘Internal’ at ADC Type and push Start button.
(3) Check ‘ OK ‘
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 ± 5 ºC of temperature and 65±10% of relative humidity if
there is no specific designation
(4) The input voltage of the receiver must keep 100~240V,
50/60Hz
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15 ºC
In case of keeping module is in the circumstance of 0°C, it
should be placed in the circumstance of above 15°C for 2
hours
In case of keeping module is in the circumstance of below 4.2. MAC address D/L , CI+ key D/L , Widevine
-20°C, it should be placed in the circumstance of above
15°C for 3 hours. key D/L, ESN D/L, HDCP20 D/L
Connect: USB port
※ Caution Communication Prot connection
When still image is displayed for a period of 20 minutes or ▪ Com 1,2,3,4 and 115200(Baudrate)
longer (especially where W/B scale is strong. Mode check: Online Only
Digital pattern 13ch and/or Cross hatch pattern 09ch), there ▪ check the test process
can some afterimage in the black level area DETECT -> MAC -> ESN -> Widevine -> CI -> HDCP20
▪ Play : Press Enter key
▪ Result: Ready, Test, OK or NG
▪ Printer Out (MAC Address Label)
3. Adjustment items
3.1. Main PCBA Adjustments
▪ MAC Address Download
▪ ADC adjustment : 480i Comp1, 1920*1080 Comp1
▪ EDID/DDC download

- A bove adjustment items can be also performed in Final

Assembly if needed. Adjustment items in both PCBA and
final assembly tages can be checked by using the INSTART
Menu -> 1.ADJUST CHECK

3.2. Final assembly adjustment

▪White Balance adjustment
▪ RS-232C functionality check
▪ PING Test
▪ Factory Option setting per destination
▪ Ship-out mode setting (In-Stop)
▪ GND and HI-POT test

3.3. Etc
▪ Ship-out mode
▪ Service Option Default
▪ USB Download(S/W Update, Option, Service only)
▪ ISP Download(Option)

Copyright © LG Electronics. Inc. All rights reserved. - 13 - LGE Internal Use Only
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4.3. LAN Inspection 4.4. LAN PORT INSPECTION(PING TEST)
4.3.1. Equipment & Condition Connect SET -> LAN port == PC -> LAN Port
▪ Each other connection to LAN Port of IP Hub and Jig
SET PC

4.4.1 Equipment setting

(1) Play the LAN Port Test PROGRAM.
(2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2

4.4.2. LAN PORT inspection (PING TEST)

4.3.2. LAN inspection solution (1) Play the LAN Port Test Program.
▪ LAN Port connection with PCB
(2) connect each other LAN Port Jack.
▪ Network setting at MENU Mode of TV
(3) Play Test (F9) button and confirm OK Message.
▪ setting automatic IP
(4) remove LAN CABLE
▪ Setting state confirmation
- If automatic setting is finished, you confirm IP and MAC
Address.

4.5. Model name & Serial number Download

4.5.1. Model name & Serial number D/L
4.3.3. WIDEVINE Key Inspection ▪ Press “P-ONLY” key of service remocon.(Baud rate : 115200
▪ WIDEVINE Key Inspection bps)
- Confirm Key input Data at the “IN START” MENU Mode ▪ Connect RS-232C Signal to USB Cable to USB.
▪ Write Serial number by use USB port.
▪ Must check the serial number at Instart menu.

4.5.2. Method & notice

(1) Serial number D/L is using of scan equipment.
(2) S etting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0

※ Manual Download (Model Name and Serial Number)

If the TV set is downloaded By OTA or Service man,
Sometimes model name or serial number is initialized.( Not
always)
There is impossible to download by bar code scan, so It need
Manual download.
a. Press the ‘instart’ key of ADJ remote controller.
b. Go to the menu ‘7.Model Number D/L’ like below photo.
c. Input the Factory model name or Serial number like photo.

d. C heck the model name Instart menu -> Factory name

displayed
e. Check the Diagnostics (DTV country only) -> Buyer model
displayed

Copyright © LG Electronics. Inc. All rights reserved. - 14 - LGE Internal Use Only
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4.6. WIFI MAC ADDRESS CHECK 5.2.4. EDID DATA
■ Using RS232 Command ▪ Reference
Command Set ACK - HDMI1 ~ HDMI3
- In the data of EDID, bellows may be different by Input mode
Transmission [A][l][][Set ID][][20][Cr] [O][K][x] or [N][G]
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D a b
■ check the menu on in-start 01 c 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
02 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
03 01 01 01 01 01 01 08 E8 00 30 F2 70 5A 80 B0 58
04 8A 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40
05 58 2C 45 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
06 3E 1E 88 3C 00 0A 20 20 20 20 20 20 d
07 d 01 e1
00 02 03 4E F1 58 61 60 10 1F 04 13 05 14 03 02 12
01 20 21 22 15 01 5D 5E 5F 65 66 f
02 f
03 f 02 03 04 01 40 FF F0 28 10 38 10 26 36
04 E3 05 C0 00 E5 0E 60 61 65 66 E3 06 07 01 01 1D
05 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
06 66 21 50 B0 51 00 1B 30 40 70 36 00 40 84 63 00
07 00 1E 00 00 00 00 00 00 00 00 00 00 00 00 00 e

ⓐ Product ID
ⓑ Serial No: Controlled on production line.
5. Manual Adjustment ⓒ Month, Year: Controlled on production line:
5.1. ADC adjustment is not needed ex) Monthly : ‘01’ -> ‘01’
because of OTP(Auto ADC adjustment) Year : ‘2015’ -> ‘19
ⓓ Model Name(Hex): LGTV
ⓔ Checksum(LG TV): Changeable by total EDID data.
5.2. EDID (The Extended Display ⓕ Vendor Specific(HDMI)
Identification Data) * DTS Checksum (HDMI 1/2/3/4)
/ DDC (Display Data Channel) download Input HDMI Deep Color On HDMI Deep Color Off
FFh (Checksum) FFh (Checksum)
5.2.1. Overview HDMI1 9F 65 9F C0
It is a VESA regulation. A PC or a MNT will display an optimal
resolution through information sharing without any necessity of HDMI2 9F 55 9F B0
user input. It is a realization of “Plug and Play”. HDMI3 9F 45 9F A0
HDMI4 9F 35 9F 90
5.2.2. Equipment (E6 only)
▪ Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.
▪ Adjust remocon

5.2.3. Download method

(1) Press Adj. key on the Adj. R/C, then select “12.EDID D/L”.
By pressing Enter key, enter EDID D/L menu.

(2) Select [Start] button by pressing Enter key, HDMI1 / HDMI2

/ HDMI3 are Writing and display OK or NG.

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# DTS
HDMI1 (C/S: 0x9F, 0x65) – HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x1E 0x6D 0x01 0x00 0x01 0x01 0x01 0x01
0x01 0x01 0x1A 0x01 0x03 0x80 0xA0 0x5A 0x78 0x0A 0xEE 0x91 0xA3 0x54 0x4C 0x99 0x26
0x02 0x0F 0x50 0x54 0xA1 0x08 0x00 0x31 0x40 0x45 0x40 0x61 0x40 0x71 0x40 0x81 0x80
0x03 0x01 0x01 0x01 0x01 0x01 0x01 0x08 0xE8 0x00 0x30 0xF2 0x70 0x5A 0x80 0xB0 0x58
0x04 0x8A 0x00 0x40 0x84 0x63 0x00 0x00 0x1E 0x02 0x3A 0x80 0x18 0x71 0x38 0x2D 0x40
0x05 0x58 0x2C 0x45 0x00 0x40 0x84 0x63 0x00 0x00 0x1E 0x00 0x00 0x00 0xFD 0x00 0x3A
0x06 0x3E 0x1E 0x88 0x3C 0x00 0x0A 0x20 0x20 0x20 0x20 0x20 0x20 0x00 0x00 0x00 0xFC
0x07 0x00 0x4C 0x47 0x20 0x54 0x56 0x0A 0x20 0x20 0x20 0x20 0x20 0x20 0x20 0x01 0x9F

EDID Block 1, Bytes 128-255

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 0x02 0x03 0x49 0xF1 0x50 0x61 0x10 0x04 0x05 0x03 0x02 0x20 0x22 0x01 0x5D 0x5E
0x01 0x5F 0x66 0x62 0x63 0x64 0x29 0x3D 0x06 0xC0 0x15 0x07 0x50 0x09 0x57 0x07 0x75
0x02 0x03 0x0C 0x00 0x10 0x00 0xB8 0x3C 0x20 0xC0 0x87 0x01 0x02 0x03 0x04 0x01 0x40
0x03 0x01 0xFC 0x18 0x10 0x16 0x67 0xD8 0x5D 0xC4 0x01 0x78 0x80 0x03 0xE3 0x05 0xC0
0x04 0x00 0xE3 0x0F 0x01 0x10 0xE3 0x06 0x07 0x01 0x01 0x1D 0x80 0x18 0x71 0x1C 0x16
0x05 0x20 0x58 0x2C 0x25 0x00 0x40 0x84 0x63 0x00 0x00 0x9E 0x66 0x21 0x50 0xB0 0x51
0x06 0x00 0x1B 0x30 0x40 0x70 0x36 0x00 0x40 0x84 0x63 0x00 0x00 0x1E 0x00 0x00 0x00
0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x65

HDMI2 (C/S: 0x9F, 0x55) – HDMI UHD Deep On Case

EDID Block 0, Bytes 0-127
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x1E 0x6D 0x01 0x00 0x01 0x01 0x01 0x01
0x01 0x01 0x1A 0x01 0x03 0x80 0xA0 0x5A 0x78 0x0A 0xEE 0x91 0xA3 0x54 0x4C 0x99 0x26
0x02 0x0F 0x50 0x54 0xA1 0x08 0x00 0x31 0x40 0x45 0x40 0x61 0x40 0x71 0x40 0x81 0x80
0x03 0x01 0x01 0x01 0x01 0x01 0x01 0x08 0xE8 0x00 0x30 0xF2 0x70 0x5A 0x80 0xB0 0x58
0x04 0x8A 0x00 0x40 0x84 0x63 0x00 0x00 0x1E 0x02 0x3A 0x80 0x18 0x71 0x38 0x2D 0x40
0x05 0x58 0x2C 0x45 0x00 0x40 0x84 0x63 0x00 0x00 0x1E 0x00 0x00 0x00 0xFD 0x00 0x3A
0x06 0x3E 0x1E 0x88 0x3C 0x00 0x0A 0x20 0x20 0x20 0x20 0x20 0x20 0x00 0x00 0x00 0xFC
0x07 0x00 0x4C 0x47 0x20 0x54 0x56 0x0A 0x20 0x20 0x20 0x20 0x20 0x20 0x20 0x01 0x9F

EDID Block 1, Bytes 128-255

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 0x02 0x03 0x49 0xF1 0x50 0x61 0x10 0x04 0x05 0x03 0x02 0x20 0x22 0x01 0x5D 0x5E
0x01 0x5F 0x66 0x62 0x63 0x64 0x29 0x3D 0x06 0xC0 0x15 0x07 0x50 0x09 0x57 0x07 0x75
0x02 0x03 0x0C 0x00 0x20 0x00 0xB8 0x3C 0x20 0xC0 0x87 0x01 0x02 0x03 0x04 0x01 0x40
0x03 0x01 0xFC 0x18 0x10 0x16 0x67 0xD8 0x5D 0xC4 0x01 0x78 0x80 0x03 0xE3 0x05 0xC0
0x04 0x00 0xE3 0x0F 0x01 0x10 0xE3 0x06 0x07 0x01 0x01 0x1D 0x80 0x18 0x71 0x1C 0x16
0x05 0x20 0x58 0x2C 0x25 0x00 0x40 0x84 0x63 0x00 0x00 0x9E 0x66 0x21 0x50 0xB0 0x51
0x06 0x00 0x1B 0x30 0x40 0x70 0x36 0x00 0x40 0x84 0x63 0x00 0x00 0x1E 0x00 0x00 0x00
0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x55

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HDMI3 (C/S: 0x9F, 0x45) – HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x1E 0x6D 0x01 0x00 0x01 0x01 0x01 0x01
0x01 0x01 0x1A 0x01 0x03 0x80 0xA0 0x5A 0x78 0x0A 0xEE 0x91 0xA3 0x54 0x4C 0x99 0x26
0x02 0x0F 0x50 0x54 0xA1 0x08 0x00 0x31 0x40 0x45 0x40 0x61 0x40 0x71 0x40 0x81 0x80
0x03 0x01 0x01 0x01 0x01 0x01 0x01 0x08 0xE8 0x00 0x30 0xF2 0x70 0x5A 0x80 0xB0 0x58
0x04 0x8A 0x00 0x40 0x84 0x63 0x00 0x00 0x1E 0x02 0x3A 0x80 0x18 0x71 0x38 0x2D 0x40
0x05 0x58 0x2C 0x45 0x00 0x40 0x84 0x63 0x00 0x00 0x1E 0x00 0x00 0x00 0xFD 0x00 0x3A
0x06 0x3E 0x1E 0x88 0x3C 0x00 0x0A 0x20 0x20 0x20 0x20 0x20 0x20 0x00 0x00 0x00 0xFC
0x07 0x00 0x4C 0x47 0x20 0x54 0x56 0x0A 0x20 0x20 0x20 0x20 0x20 0x20 0x20 0x01 0x9F

EDID Block 1, Bytes 128-255

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 0x02 0x03 0x49 0xF1 0x50 0x61 0x10 0x04 0x05 0x03 0x02 0x20 0x22 0x01 0x5D 0x5E
0x01 0x5F 0x66 0x62 0x63 0x64 0x29 0x3D 0x06 0xC0 0x15 0x07 0x50 0x09 0x57 0x07 0x75
0x02 0x03 0x0C 0x00 0x30 0x00 0xB8 0x3C 0x20 0xC0 0x87 0x01 0x02 0x03 0x04 0x01 0x40
0x03 0x01 0xFC 0x18 0x10 0x16 0x67 0xD8 0x5D 0xC4 0x01 0x78 0x80 0x03 0xE3 0x05 0xC0
0x04 0x00 0xE3 0x0F 0x01 0x10 0xE3 0x06 0x07 0x01 0x01 0x1D 0x80 0x18 0x71 0x1C 0x16
0x05 0x20 0x58 0x2C 0x25 0x00 0x40 0x84 0x63 0x00 0x00 0x9E 0x66 0x21 0x50 0xB0 0x51
0x06 0x00 0x1B 0x30 0x40 0x70 0x36 0x00 0x40 0x84 0x63 0x00 0x00 0x1E 0x00 0x00 0x00
0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x45

HDMI4 (C/S: 0x9F, 0x35) – HDMI UHD Deep On Case

EDID Block 1, Bytes 128-255

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 0x02 0x03 0x49 0xF1 0x50 0x61 0x10 0x04 0x05 0x03 0x02 0x20 0x22 0x01 0x5D 0x5E
0x01 0x5F 0x66 0x62 0x63 0x64 0x29 0x3D 0x06 0xC0 0x15 0x07 0x50 0x09 0x57 0x07 0x75
0x02 0x03 0x0C 0x00 0x40 0x00 0xB8 0x3C 0x20 0xC0 0x87 0x01 0x02 0x03 0x04 0x01 0x40
0x03 0x01 0xFC 0x18 0x10 0x16 0x67 0xD8 0x5D 0xC4 0x01 0x78 0x80 0x03 0xE3 0x05 0xC0
0x04 0x00 0xE3 0x0F 0x01 0x10 0xE3 0x06 0x07 0x01 0x01 0x1D 0x80 0x18 0x71 0x1C 0x16
0x05 0x20 0x58 0x2C 0x25 0x00 0x40 0x84 0x63 0x00 0x00 0x9E 0x66 0x21 0x50 0xB0 0x51
0x06 0x00 0x1B 0x30 0x40 0x70 0x36 0x00 0x40 0x84 0x63 0x00 0x00 0x1E 0x00 0x00 0x00
0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x35

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HDMI1 (C/S: 0x9F, 0xC0) – HDMI UHD Deep Off Case
EDID Block 0, Bytes 0-127
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x1E 0x6D 0x01 0x00 0x01 0x01 0x01 0x01
0x01 0x01 0x1A 0x01 0x03 0x80 0xA0 0x5A 0x78 0x0A 0xEE 0x91 0xA3 0x54 0x4C 0x99 0x26
0x02 0x0F 0x50 0x54 0xA1 0x08 0x00 0x31 0x40 0x45 0x40 0x61 0x40 0x71 0x40 0x81 0x80
0x03 0x01 0x01 0x01 0x01 0x01 0x01 0x08 0xE8 0x00 0x30 0xF2 0x70 0x5A 0x80 0xB0 0x58
0x04 0x8A 0x00 0x40 0x84 0x63 0x00 0x00 0x1E 0x02 0x3A 0x80 0x18 0x71 0x38 0x2D 0x40
0x05 0x58 0x2C 0x45 0x00 0x40 0x84 0x63 0x00 0x00 0x1E 0x00 0x00 0x00 0xFD 0x00 0x3A
0x06 0x3E 0x1E 0x88 0x3C 0x00 0x0A 0x20 0x20 0x20 0x20 0x20 0x20 0x00 0x00 0x00 0xFC
0x07 0x00 0x4C 0x47 0x20 0x54 0x56 0x0A 0x20 0x20 0x20 0x20 0x20 0x20 0x20 0x01 0x9F

EDID Block 1, Bytes 128-255

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 0x02 0x03 0x3D 0xF1 0x50 0x61 0x10 0x04 0x05 0x03 0x02 0x20 0x22 0x01 0x5D 0x5E
0x01 0x5F 0x66 0x62 0x63 0x64 0x29 0x3D 0x06 0xC0 0x15 0x07 0x50 0x09 0x57 0x07 0x75
0x02 0x03 0x0C 0x00 0x10 0x00 0xB8 0x3C 0x20 0xC0 0x87 0x01 0x02 0x03 0x04 0x01 0x40
0x03 0x01 0xFC 0x18 0x10 0x16 0xE3 0x0E 0x61 0x66 0xE3 0x06 0x07 0x01 0x01 0x1D 0x80
0x04 0x18 0x71 0x1C 0x16 0x20 0x58 0x2C 0x25 0x00 0x40 0x84 0x63 0x00 0x00 0x9E 0x66
0x05 0x21 0x50 0xB0 0x51 0x00 0x1B 0x30 0x40 0x70 0x36 0x00 0x40 0x84 0x63 0x00 0x00
0x06 0x1E 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xC0

HDMI2 (C/S: 0x9F, 0xB0) – HDMI UHD Deep Off Case

EDID Block 1, Bytes 128-255

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 0x02 0x03 0x3D 0xF1 0x50 0x61 0x10 0x04 0x05 0x03 0x02 0x20 0x22 0x01 0x5D 0x5E
0x01 0x5F 0x66 0x62 0x63 0x64 0x29 0x3D 0x06 0xC0 0x15 0x07 0x50 0x09 0x57 0x07 0x75
0x02 0x03 0x0C 0x00 0x20 0x00 0xB8 0x3C 0x20 0xC0 0x87 0x01 0x02 0x03 0x04 0x01 0x40
0x03 0x01 0xFC 0x18 0x10 0x16 0xE3 0x0E 0x61 0x66 0xE3 0x06 0x07 0x01 0x01 0x1D 0x80
0x04 0x18 0x71 0x1C 0x16 0x20 0x58 0x2C 0x25 0x00 0x40 0x84 0x63 0x00 0x00 0x9E 0x66
0x05 0x21 0x50 0xB0 0x51 0x00 0x1B 0x30 0x40 0x70 0x36 0x00 0x40 0x84 0x63 0x00 0x00
0x06 0x1E 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xB0

Copyright © LG Electronics. Inc. All rights reserved. - 18 - LGE Internal Use Only
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HDMI3 (C/S: 0x9F, 0xA0) – HDMI UHD Deep Off Case
EDID Block 0, Bytes 0-127
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x1E 0x6D 0x01 0x00 0x01 0x01 0x01 0x01
0x01 0x01 0x1A 0x01 0x03 0x80 0xA0 0x5A 0x78 0x0A 0xEE 0x91 0xA3 0x54 0x4C 0x99 0x26
0x02 0x0F 0x50 0x54 0xA1 0x08 0x00 0x31 0x40 0x45 0x40 0x61 0x40 0x71 0x40 0x81 0x80
0x03 0x01 0x01 0x01 0x01 0x01 0x01 0x08 0xE8 0x00 0x30 0xF2 0x70 0x5A 0x80 0xB0 0x58
0x04 0x8A 0x00 0x40 0x84 0x63 0x00 0x00 0x1E 0x02 0x3A 0x80 0x18 0x71 0x38 0x2D 0x40
0x05 0x58 0x2C 0x45 0x00 0x40 0x84 0x63 0x00 0x00 0x1E 0x00 0x00 0x00 0xFD 0x00 0x3A
0x06 0x3E 0x1E 0x88 0x3C 0x00 0x0A 0x20 0x20 0x20 0x20 0x20 0x20 0x00 0x00 0x00 0xFC
0x07 0x00 0x4C 0x47 0x20 0x54 0x56 0x0A 0x20 0x20 0x20 0x20 0x20 0x20 0x20 0x01 0x9F

EDID Block 1, Bytes 128-255

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 0x02 0x03 0x3D 0xF1 0x50 0x61 0x10 0x04 0x05 0x03 0x02 0x20 0x22 0x01 0x5D 0x5E
0x01 0x5F 0x66 0x62 0x63 0x64 0x29 0x3D 0x06 0xC0 0x15 0x07 0x50 0x09 0x57 0x07 0x75
0x02 0x03 0x0C 0x00 0x30 0x00 0xB8 0x3C 0x20 0xC0 0x87 0x01 0x02 0x03 0x04 0x01 0x40
0x03 0x01 0xFC 0x18 0x10 0x16 0xE3 0x0E 0x61 0x66 0xE3 0x06 0x07 0x01 0x01 0x1D 0x80
0x04 0x18 0x71 0x1C 0x16 0x20 0x58 0x2C 0x25 0x00 0x40 0x84 0x63 0x00 0x00 0x9E 0x66
0x05 0x21 0x50 0xB0 0x51 0x00 0x1B 0x30 0x40 0x70 0x36 0x00 0x40 0x84 0x63 0x00 0x00
0x06 0x1E 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xA0

HDMI4 (C/S: 0x9F, 0x90) – HDMI UHD Deep Off Case

EDID Block 1, Bytes 128-255

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 0x02 0x03 0x3D 0xF1 0x50 0x61 0x10 0x04 0x05 0x03 0x02 0x20 0x22 0x01 0x5D 0x5E
0x01 0x5F 0x66 0x62 0x63 0x64 0x29 0x3D 0x06 0xC0 0x15 0x07 0x50 0x09 0x57 0x07 0x75
0x02 0x03 0x0C 0x00 0x40 0x00 0xB8 0x3C 0x20 0xC0 0x87 0x01 0x02 0x03 0x04 0x01 0x40
0x03 0x01 0xFC 0x18 0x10 0x16 0xE3 0x0E 0x61 0x66 0xE3 0x06 0x07 0x01 0x01 0x1D 0x80
0x04 0x18 0x71 0x1C 0x16 0x20 0x58 0x2C 0x25 0x00 0x40 0x84 0x63 0x00 0x00 0x9E 0x66
0x05 0x21 0x50 0xB0 0x51 0x00 0x1B 0x30 0x40 0x70 0x36 0x00 0x40 0x84 0x63 0x00 0x00
0x06 0x1E 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x90

Copyright © LG Electronics. Inc. All rights reserved. - 19 - LGE Internal Use Only
Only for training and service purposes

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5.2.5. Green Eye Inspection Guide 5.3.3. Equipment
(Step 1) Turn on the TV set. (1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:
(Step 2) P ress “EYE” button on the Adjustment remote CH14 / OLED : CH : 17)
controller. (2) A dj. Computer (During auto adj., RS-232C protocol is
needed)
(3) Adjust Remocon
(4) V ideo Signal Generator MSPG-925F 720p/204-Gray
(Model: 217, Pattern: 49)
※ Color Analyzer Matrix should be calibrated using CS-1000

5.3.4. Equipment connection

Co lo r Analyzer
(Step 3) Block the Intelligent Sensor module on the front C/A RS -232C
Probe
about 6 seconds. When the “Sensor Data” is lower
Co m p ut er
than 20, you can see the “OK” message => If it
RS -232C
doesn’t show “OK” message, the Sensor Module is RS -232C

defected one. You have to replace that with a good Pat t ern Generat o r
one. Signal Source

* If TV internal pattern is used, not needed

5.3.5. Adjustment Command (Protocol)

(1) RS-232C Command used during auto-adj
RS-232C COMMAND
Explanation
CMD DATA ID
Wb 00 00 Begin White Balance adj.
(Step 4) After check the “OK” message come out, take out
your hand from the Sensor module. => Check Wb 00 ff End White Balance adj.
“Backlight” value change from “0” to “100” or not. If it (internal pattern disappears )
doesn’t change the value, the sensor is also defected
one. (2) Adjustment Map
Command Data Range
5.3. Manual White balance Adjustment Adj. item
(lower case (Hex.) Default
ASCII) (Decimal)
5.3.1. W/B adj. Objective & How-it-works
(1) Objective: To reduce each Panel’s W/B deviation CMD1 CMD2 MIN MAX
(2) How-it-works: When R/G/B gain in the OSD is at 192, it Cool R Gain j g 00 C0 TBD
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one of G Gain j h 00 C0 TBD
R/G/B is fixed at 192, and the other two is lowered to find B Gain j i 00 C0 TBD
the desired value.
R Cut TBD
(3) Adj. condition: normal temperature
1) Surrounding Temperature: 25 ± 5 ºC G Cut TBD
2) Warm-up time: About 5 Min B Cut TBD
3) Surrounding Humidity: 20% ~ 80%
4) Before White balance adjustment, Keep power on status, Medium R Gain j a 00 C0 TBD
don’t power off G Gain j b 00 C0 TBD
B Gain j c 00 C0 TBD
5.3.2. Adj. condition and cautionary items
(1) Lighting condition in surrounding area surrounding lighting R Cut TBD
should be lower 10 lux. Try to isolate adj. area into dark G Cut TBD
surrounding.
B Cut TBD
(2) Probe location: Color Analyzer (CA-210) probe should be
within 10cm and perpendicular of the module surface Warm R Gain j d 00 C0 TBD
(80°~ 100°) G Gain j e 00 C0 TBD
(3) Aging time
1) After Aging Start, Keep the Power ON status during 5 B Gain j f 00 C0 TBD
Minutes. R Cut TBD
2) In case of LCD, Back-light on should be checked using
G Cut TBD
no signal or Full-white pattern.

Copyright © LG Electronics. Inc. All rights reserved. - 20 - LGE Internal Use Only
Only for training and service purposes

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5.3.6. Adjustment method ▪ S tandard color coordinate and temperature using
5.3.6.1. Auto WB calibration CA-210(CH-17)
(1) Set TV in ADJ mode using P-ONLY key (or POWER ON Coordinate
key) Mode Temp △uv
(2) Place optical probe on the center of the display X Y
- It need to check probe condition of zero calibration before Cool 0.277±0.002 0.278±0.002 11000K -0.0030
adjustment. Medium 0.286±0.002 0.289±0.002 9300K 0.0000
(3) Connect RS-232C Cable
(4) Select mode in ADJ Program and begin a adjustment. Warm 0.313±0.002 0.329±0.002 6500K +0.0030
(5) When WB adjustment is completed with OK message,
check adjustment status of pre-set mode (Cool, Medium, 5.4. Tool Option setting & Inspection per
Warm)
(6) Remove probe and RS-232C cable.
countries
▪ W/B Adj. must begin as start command “wb 00 00” , and 5.4.1. Overview
finish as end command “wb 00 ff”, and Adj. offset if need (1) Tool option selection is only done for models in Non-USA
North America due to rating
5.3.6.2. OLED White balance table
(1) Cool Mode 5.4.2. Country Group selection
- P urpose : Especially B-gain fix adjust leads to the (1) Press ADJ key on the Adj. R/C, and then select Country
luminance enhancement. Adjust the color temperature to Group Menu
reduce the deviation of the module color temperature. (2) Depending on destination, select US, then on the lower
- P rinciple : To adjust the white balance without the Country option, select US, CA, MX.
saturation, Adjust the B gain more than 192 ( If R gain or G Selection is done using +, - KEY
gain is more than 255 , G gain can adjust less than 192 )
and change the others ( R/G Gain ).
- Adjustment mode : mode – Cool 5.5. Magic Motion remote controller Check
- Equipment : RF Remocon for test, IR-KEY-Code Remocon
(2) Medium for test
- P urpose : Adjust the color temperature to reduce the - You must confirm the battery power of RF-Remocon before
deviation of the module color temperature test
- P rinciple : To adjust the white balance without the (recommend that change the battery per every lot)
saturation, Fix the B gain to 192 (default data) and - Sequence (test)
decrease the others a) If you select the ‘start key(OK)’ on the controller, you can
- Adjustment mode : mode – Medium pairing with the TV SET.
b) You can check the cursor on the TV Screen, when select
(3) Warm the ‘OK Key’ on the controller
- P urpose : Adjust the color temperature to reduce the c) You must remove the pairing with the TV Set by select
deviation of the module color temperature. ‘Mute + OK Key’ on the controller
- P rinciple : To adjust the white balance without the
saturation, Fix the W gain to 192 (default data) and * Applied model
decrease the others. Chassis Model Name Magic RF receiver
- Adjustment mode : mode – Warm
EA62C OLED55/65E6-U Built-in
5.3.7. Reference (White Balance Adj. coordinate and
color temperature)
(1) Luminance: 204 Gray, 80IRE
(2) Standard color coordinate and temperature using CS-1000
(over 26 inch)

5.3.8. Reference (White Balance Adj. coordinate and

color temperature)
▪ Luminance: 204 Gray
▪ Standard color coordinate and temperature using CS-1000
(over 26 inch)
Coordinate
Mode Temp △uv
X Y
Cool 0.277 0.278 11,000K -0.0030
Medium 0.286 0.289 9300K 0.0000
Warm 0.313 0.329 6500K +0.0030

Copyright © LG Electronics. Inc. All rights reserved. - 21 - LGE Internal Use Only
Only for training and service purposes

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5.6. 3D pattern test 5.8. HDMI ARC Function Inspection
(Pattern Generator MSHG-600, MSPG-6100 [SUPPORT 5.8.1. Test equipment
HDMI1.4]) - Optic Receiver Speaker
* HDMI mode NO. 872 , pattern No.83 - MSHG-600 (SW: 1220 ↑)
- HDMI Cable (for 1.4 version)
(1) Please input 3D test pattern like below (HDMI mode NO.
872 , pattern No.83) 5.8.2. Test method
(1) Insert the HDMI Cable to the HDMI ARC port from the
master equipment (HDMI2)
(2) Check the sound from the TV Set

(2) When 3D OSD appear automatically , then select green

button.

(3) Check the Sound from the Speaker or using AV & Optic
TEST program (It’s connected to MSHG-600)

(3) Don’t wear a 3D Glasses, Check the picture like below

5.9. Tool Option Inspection
(1) Press Adj. key on the Adj. R/C, and then check Tool option

5.10. Ship-out mode check (In-stop)

▪ After final inspection, press In-Stop key of the Adj. R/C and
check that the unit goes to Stand-by mode

5.7. Option selection per country

5.7.1. Overview
▪ Option selection is only done for models in AJ/JA/IL

5.7.2. Method
(1) Press ADJ key on the Adj. R/C, then select Country Group
Meun
(2) Depending on destination, select Country Group Code or
Country Group then on the lower Country option, select
US, CA, MX. Selection is done using +, - or ►◄KEY

Copyright © LG Electronics. Inc. All rights reserved. - 22 - LGE Internal Use Only
Only for training and service purposes

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6. GND and Internal Pressure check 8. USB S/W Download
6.1. Method (optional, Service only)
(1) GND & Internal Pressure auto-check preparation (1) Put the USB Stick to the USB socket
- Check that Power Cord is fully inserted to the SET. (If (2) Automatically detecting update file in USB Stick
loose, re-insert) - If your downloaded program version in USB Stick is lower
(2) Perform GND & Internal Pressure auto-check than that of TV set, it didn’t work. Otherwise USB data is
- Unit fully inserted Power cord, Antenna cable and A/V automatically detected.
arrive to the auto-check process. (3) Show the message “Copying files from memory”
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process. (4) Updating is staring

6.2. Checkpoint
(1) Test voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
(2) TEST time: 1 second
(3) TEST POINT
- GND Test = POWER CORD GND and SIGNAL CABLE
GND.
- Hi-pot Test = POWER CORD GND and LIVE & (5) Updating Completed, The TV will restart automatically
NEUTRAL.
(4) LEAKAGE CURRENT: At 0.5mArms

7. AUDIO output check

No Item Min Typ Max Unit Remark
1 Audio practical 9 10 12 W EQ Off
max Output, L/R AVL Off
(Distortion=10% Clear Voice Off
6.07 8.10 10.8 Vrms (6) If your TV is turned on, check your updated version and
max Output)
Tool option.
2 Speaker 9 10 12 W EQ On * If downloading version is more high than your TV have, TV
(8Ω Impedance) AVL On can lost all channel data. In this case, you have to channel
Clear Voice On recover. If all channel data is cleared, you didn’t have a DTV/
ATV test on production line.
*Measurement condition:
(1) RF input: Mono, 1KHz sine wave signal, 100% Modulation * After downloading, TOOL OPTION setting is needed again.
(2) CVBS, Component: 1KHz sine wave signal (0.4Vrms) (1) Push "IN-START" key in service remote controller.
(2) Select "Tool Option 1" and Push “OK” button.
(3) Punch in the number. (Each model has their number.)

Copyright © LG Electronics. Inc. All rights reserved. - 23 - LGE Internal Use Only
Only for training and service purposes

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X_TAL DDR3 2133 X 16

Copyright ©
24MHz (512MB X 2EA)
Tuner
Tuner : I2C 5 IF (+/-)
Analog Demod DDR3 1866 X 16
LM GM (512MB X 2EA)
D-Demod : I2C 3 P_TS
R Digital Demod
E CVBS/SIF
A SYSTEM EEPROM
R I2C 4 (256Kb)

Only for training and service purposes

S USB1 (3.0) OCP 1.5A
(H)
1. M16 Block Diagram

I
D USB

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USB2 (2.0) OCP 1.5A
eMMC
E USB3 (2.0)
IC101 (4GB)
OCP 1.5A
M16
51P
VBY1 41P F16

LG Electronics. Inc. All rights reserved.

HDMI1 (2.0)
S
I HDMI PM
HDMI2 (2.0) EPI 50P
D (ARC) MUX IC
50P
E HDMI3 (1.4)
(Ext EDID) I2S Out Audio 2 AMP
I2C 0 (NTP7515)

- 24 -
UART RX/TX VS/SCLK/MOSI LOCAL DIMMING

H/P AMP
TI BLUTOOTH
USB_WIFI-BT
BLOCK DIAGRAM

AV CVBS/L/R
WIFI
R COMP YPbPr
SUB
E ASSY
A IR / KEY/EYE
R OPTIC SPDIF OUT
IR
LAN LAN I2C
ETHERNET
PHY KEY
X_TAL
25MHz I2C 1 Sub Micom
(RENESAS
R5F1000G)

X_TAL
32.768KHz

LGE Internal Use Only

IC101
0x54 +3.3V_NORMAL Device
M16 addres
2. M16 I2C Map

IC5600 100 Ω
NTP7515(AMP) s
33pF +3.3V_TU
3.3KΩ 0x10
0x56

Only for training and service purposes

IC6900 / IC7000
IC5900 I2C_SCL0: AJ13[SCL0] 33Ω
100 Ω LNB
NTP7515(AMP) I2C_SDA0: AH13[SDA0] 2.7KΩ

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33pF
0xC
A
I2C_SCL3: AK20[SCL3] 33Ω TUNER (Demod)
+3.3V_NORMAL I2C_SDA3: AJ20[SDA3]

LG Electronics. Inc. All rights reserved.

18pF

3.3KΩ
0x52 +3.3V_NORMAL

I2C_SCL1: AK11[SCL1]
IC3000
R5F100GEAFB(MICOM) I2C_SDA1: AJ11[SDA1]

- 25 -
3.3KΩ

EYE_I2C_SDA 3.3KΩ +3.5V_ST 0xA0

EYE_I2C_SCL 100Ω +3.3V_NORMAL I2C_SCL4: AK12[SCL4] IC102
33Ω
I2C_SDA4: AJ12[SDA4] NVRAM
IR / KEY/EYE
+3.3V_TU
3.3KΩ

I2C_SCL2: AH12[SCL2]
P8600 33 Ω
51PIN Wafer I2C_SDA2: AK20[SDA2] 1.8KΩ

0xC0
I2C_SCL5: AK21[SCL5]
33Ω
I2C_SDA5: AJ21[SDA5] Tuner

47pF

LGE Internal Use Only

AVDD09_PLL
AVDD09_USB

+0.9V_CPU 3.5A

+1.8V_IO 3.5A +0.9V_DDR 2A

AVDD09_C4TX
+1.8V_EMMC

Only for training and service purposes

AVDD09_VX1
AVDD18_HDMI
+0.9V_F16_CORE 10A F16_DVDD09_DDR
AVDD18_MIP
F16_AVDD09_PLL

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3. Power Block Diagram

AVDD18_C4TX
DVDD09_XTAL
AVDD18_PLL
DVDD33_XTAL AVDD18_AUAD
+1.5V_F16_DDR 3.5A F16_AVDD18_C4TX
AVDD33_VX1 F16_1.8V_IO
F16_AVDD18_PLL

LG Electronics. Inc. All rights reserved.

+3.3V_EMMC
DVDD33
AVDD33_AUDA
3.3V Normal 6A
AVDD33_HDMI
+3.3V_TU
DVDD33_XTAL
F16_3.3V_NORMAL
AVDD33_VX1

- 26 -
+5V_USB_1
5V Normal 6A +5V_USB_2
+5V_USB_3

VREF_M0_0
24V 5V Normal 6A VREF_M0_1
M0_0_VREFCA
M0_1_VREFCA
M0_0_VREFDQ
M0_1_VREFDQ
3.5V_ST +1.5V_DDR 3A
VREF_M1_0
VREF_M1_1
M1_0_VREFCA
+ 3.5V_WIFI M1_1_VREFCA
M1_0_VREFDQ
M1_1_VREFDQ
+3.5V_WOL

MICOM
IR
Wi- Fi/ BT
Ethernet
RS- 232C

LGE Internal Use Only

[+3.3V_LNA_TU] 1 SIC
M16
+3.3V_TUNER
4. Tuner Diagram

Only for training and service purposes

1.8KΩ

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[I2C_SCL5_TU] 4 I2C_SCL5 33 Ω AK21[SCL5]
[I2C_SDA5_TU] 5 I2C_SDA5 AJ21[SDA5]

LG Electronics. Inc. All rights reserved.

IF_P ADC_I_INP
[IF_P] 6 AL33 [DMD_ADC_INP]
FILTER
IF_N ADC_I_INN
[IF_N] 7 AL32 [DMD_ADC_INN]

- 27 -
IF_AGC
[IF_AGC_TU] 3 AK32[IF_AGC]

AAD_ADC_SIF
[TU_SIF] 8 AN32[AAD_ADC_SIF]

TU_CVBS_SOC
[TU_CVBS_TU] 9 AM29[CVBS_IN1]

LGE Internal Use Only

Only for training and service purposes

(8MB) FLASH_WP
5. F16 Block Diagram

[GPIO02]

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X_TAL [VBY1_TXBN[0]~[7]
[XTALI] [VBY1_TXBP[0]~[7] Vx1 8 Lane 41P
41P Wafer

24MHz [IXTALO]

IC3000 F16_RESET_MICOM

LG Electronics. Inc. All rights reserved.

[PORES_N] IC8200
MICOM (MICOM PORT #24)
F16

- 28 -
[VBY1_TXAN[0]~[7]
[VBY1_TXAP[0]~[7] Vx1 8 Lane 51P
[VBY1_TXN[0]~[7] [VBY1_RXN[0]~[7]
[VBY1_RXP[0~[7] 4K@60p Vx1 8 Lane Video
[VBY1_RXP[0]~[7]
IC101
[VBY1_TXN[8]~[9] [VBY1_RXN[8]~[9]
M16 [VBY1_RXP[8]~[9] 2K@30p Vx1 2 Lane OSD [VBY1_RXP[8]~[9] LOCKn_IN
51P Wafer

[TX_VBY1_TXLOCKN]

[GPIO30] DATA_FORMAT_0/1
[GPIO31]

SPI_CS
SPI_DO
SPI_DI
SPI_CK
Vx1_LOCKn_O/V
[SCL2] [V_Vx1_RXLOCKN]
[SDA2]
I2CS_SDA2/SCL2 [I2C_SCL_s]
[TX_LOCKN]
[I2C_SDA_S]

I2CS_SDA2/SCL2

LGE Internal Use Only

74.25 MHz
2112 MHz 99 MHz

Only for training and service purposes

DDR PLL 1/2 1056 MHz
198 MHz

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264 MHz
2400 MHz
GPU PLL 1/4 600 MHz 297 MHz
6. Clock source and frequency

LG Electronics. Inc. All rights reserved.

351 MHz
396 MHz
1584 MHz
CORE PLL 1/4 396 MHz
528 MHz
1/2 198 MHz

- 29 -
600 MHz
1/4 99 MHz
1008 MHz
1/3 528 MHz 1056 MHz
1/6 264 MHz

297 MHz
DISP PLL 297 MHz

1/4 74.25 MHz

351 MHz
PQE PLL 351 MHz

LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

710

410
400

900
522
521

570
540

571

120
531

121
530

820
LV2

800
LV1

500
810

700
AG1
A10
200

A22

Copyright © LG Electronics. Inc. All rights reserved. - 30 - LGE Internal Use Only
Only for training and service purposes

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ASSEMBLY / DISASSEMBLY
■ OLED55C6 Disassembly Guide
Disassemble of OLED55C6 is similar to the one 15 years Model 55EG96 / 55EG92,By changing the side assembly
method of the Back Cover with Holder type.so easier than 55EG96 / 55EG92,If 55EG96 / 55EG92 mastered the
disassemble method of can easily disassemble.

15" 55EG92->(Carry Over) 16" OLED55C6

(1) Repose on the curved Jig of the Set.

(2) Disassemble Rear Small Cover - Remove Rear Small Cover from bottom to up.

(3) Remove Stand Screw, Disassemble Stand

FAB30016122 (M4*20mm), 5EA

- Disassemble Stand after Remove Screw 5EA

Copyright © LG Electronics. Inc. All rights reserved. - 31 - LGE Internal Use Only
Only for training and service purposes

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(4) Remove Back Cover Screw (6) Disassemble Back Cover

Red FAB32418703 M3*5.5mm, Gray 7EA

Blue FAB31843211 M3*5.5mm, Black 3EA
Green FAB32838807 M6*10mm, VESA 4EA

(5) Disassemble PowerCord Bracket

- Disassemble Back Cover, lift from bottom to up

Back Cover.
- Lift the Power Cord, if the Bracket is removed to
separate the Power Board and Cord.

Copyright © LG Electronics. Inc. All rights reserved. - 32 - LGE Internal Use Only
Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

System Configuration
+3.3V_NORMAL
IC101
EAN63846302
PAGE 1
IC102-*1 LGE1312(M16)
BR24G256FJ-3

NVRAM A0 VCC
R126
10K B23 V33 USB2-0
+3.3V_NORMAL 1 8
OPT
XTAL_IN A24
XIN USB2_0_DP0
V32
USB2_DP0
XTAL_OUT XOUT USB2_0_DM0 USB2_DM0
V31 R143 200
A1 WP R127 USB2_0_TXRTUNE
2 7 AH18 1%
Clock for M16 SOC_RESET PORES_N
AM8 USB2-1
EAN61133501
22
AA8
USB2_1_DP0
AN8
WIFI_DP
A2 SCL BOOT_MODE_0
3 6 C106 USB2_1_DM0 WIFI_DM
IC102 0.1uF AB8
BOOT_MODE_1 USB2_1_TXRTUNE
AN7 R144 200
C104 16V AD7 1%
AT24C256C-SSHL-T GND SDA PLLSET0 USB3-0
EAW61645502 XTAL_IN 0.1uF 4 5 BOOT MODE AC7 N32
16V PLLSET1 USB3_0_DP0
P31
USB3_DP0
X101 USB3_0_DM0 USB3_DM0
R101 A0 VCC
- ’00 ’: eMMC AE6 P32 C107 0.1uF
1 8
X-TAL_1 GND_2 1M
AE7
OPM0 USB3_0_TX0P
C108 0.1uF
USB3_TXP0
1 4 - ’10 ’: NAND OPM1 USB3_0_TX0M
P33
USB3_TXM0
GND_1 X-TAL_2 R102 120 A1 WP
NVRAM_Rohm N31
2 3 XTAL_OUT 2 7 1/16W - ’X1 ’: NOR (TEST ONLY) USB3_0_RX0P USB3_RXP0
33 AC3 M32
C101 AR106 L/DIM0_VS L/DIM0_VS L_VSOUT_LD USB3_0_RX0M USB3_RXM0
A2 SCL AC6 M33 R145 200
5pF C102
50V 5pF
3 6
I2C_SCL4 L/DIM0_SCLK L/DIM0_SCLK AD6
DIM0_SCLK USB3_0_RESREF
1%
50V GND SDA TCK0 AC5
DIM1_SCLK
T32 USB2-2
4 5
I2C_SDA4 TDI0 AD5
DIM1_MOSI USB3_1_DP0
T31
USB3_DP1
L/DIM0_MOSI L/DIM0_MOSI DIM0_MOSI USB3_1_DM0
U32
USB3_DM1
USB3_1_TX0P
NVRAM_ATMEL AJ22 U33
MAIN Clock(24Mhz) VX1_MSE VX1_MSE AH22
SPI_CS0 USB3_1_TX0M
R32
VX1_AGP AJ23
SPI_SCLK0 USB3_1_RX0P
R33
VX1_AGP EPI_LOCK_MNT SPI_DO0 USB3_1_RX0M
AK23 U31 R146 200
EPI_LOCK_MNT SPI_DI0 USB3_1_RESREF
AH24 1%
A_SPI_CS_S AK24
SPI_CS1
U30
Write Protection SPI_SCLK_S SPI_SCLK1 HUB_PORT_OVER0 /USB_OCD1
+3.3V_NORMAL +3.3V_NORMAL SPI_MOSI_S
AH23
SPI_DO1 HUB_VBUS_CTRL0
U29
USB_CTL1
- Low : Normal Operation AJ24
SPI_MISO_S SPI_DI1
G28
- High : Write Protection FORCED_JTAG_0 EB_CS3 /USB_OCD2
R173 OPT 10K AB7 H28
EXT_INTR0 EB_CS2 USB_CTL2
+3.3V_TU R134 4.7K AC8
EXT_INTR1 EB_CS1
G29
/USB_OCD3
AD8 J28
AE8
EXT_INTR2 EB_CS0 USB_CTL3
EXT_INTR3
D28
AJ19
EB_WE_N
D29
EB_WE_N
SOC_RX AH19
UART0_RXD EB_OE_N
H29
EB_OE_N
TU_NON_JP_1.8K

TU_NON_JP_1.8K

SOC_TX
AR104

UART0_TXD EB_WAIT
3.3K

AH9 F28
R199-*1

R198-*1

UART1_RX UART1_RXD EB_BE_N1 EB_BE_N1

TU_NON_JP_1.2K TU_D_JP

AH8 E28
UART1_TX EB_BE_N0
2.7K

2.7K

R199
1.8K

R198
1.8K

UART1_TXD EB_BE_N0
I2C PULL UP
AH10 P29
CPU_VID[0] AJ10
UART1_RTS CAM_CD1_N
P30
CAM_CD1_N
CPU_VID[1] UART1_CTS CAM_CD2_N CAM_CD2_N
AR103

AR102

AR101
3.3K

3.3K

P28
R199-*2

R198-*2

1/16W AJ13
CAM_CE1_N
R30
/PCM_CE1
33 I2C_SCL0 SCL0 CAM_CE2_N /PCM_CE2
1.2K

1.2K

AR100 AH13 T29

I2C_SDA0 AK11
SDA0 CAM_IREQ_N
U28
CAM_IREQ_N
I2C_SDA0 I2C_SCL1 AJ11
SCL1 CAM_RESET
T28
PCM_RESET
I2C_SDA1 SDA1 CAM_INPACK_N CAM_INPACK_N
I2C_SCL0 I2C_SCL2
AH12
SCL2 CAM_VCCEN_N
R29
PCM_5V_CTL
AH11 R28
I2C_SDA1 I2C_SDA2 AK20
SDA2 CAM_WAIT_N
N29
CAM_WAIT_N
I2C_SCL3 SCL3 CAM_REG_N CAM_REG_N
I2C_SCL1 I2C_SDA3
AJ20
SDA3
AK12
I2C_SDA2 I2C_SCL4 AJ12
SCL4
A31 EB_ADDR[0]
I2C_SDA4 SDA4 EB_ADDR0
I2C_SCL2 I2C_SCL5
AK21
SCL5 EB_ADDR1
B31 EB_ADDR[1]
AJ21 A32 EB_ADDR[2]
I2C_SDA5 SDA5 EB_ADDR2
B32 EB_ADDR[3]
PWM2 EB_ADDR3
R139 33 Y7 B33 EB_ADDR[4]
I2C_SDA4 Designated GPIO
for OLED
PWM_DIM2 R140 33 AA6
PWM0 EB_ADDR4
C31 EB_ADDR[5]
PWM_DIM PWM1 EB_ADDR5
I2C_SCL4 OLED_3D_EN MODEL_OPT_12
AA5
PWM2 EB_ADDR6
C33 EB_ADDR[6]
R158 10K Y6 C32 EB_ADDR[7]
PWM_IN EB_ADDR7
E32 EB_ADDR[8]
EB_ADDR8
E33 EB_ADDR[9]
I2C_SDA5 L31
EB_ADDR9
F33 EB_ADDR[10]
EMMC_CLK EMMC_CLK EB_ADDR10
I2C_SCL5 EMMC_CMD
K32
EMMC_CMD EB_ADDR11
F31 EB_ADDR[11]
D31 EB_ADDR[12]
EB_ADDR12
EMMC_DATA[7] G31 D32 EB_ADDR[13]
EMMC_DATA7 EB_ADDR13
EMMC_DATA[6] J32 E31 EB_ADDR[14]
EMMC_DATA6 EB_ADDR14
EMMC_DATA[5] J33 F32
EMMC_DATA5 EB_ADDR15 F16_CONNECT_DET
EMMC_DATA[4] H33
EMMC_DATA4
EMMC_DATA[3] J31
EMMC_DATA3
EMMC_DATA[2] G32 C30 EB_DATA[0]
EMMC_DATA2 EB_DATA0
EMMC_DATA[1] H31
EMMC_DATA1 EB_DATA1
A30 EB_DATA[1] EB_ADDR[0-14]
EMMC_DATA[0] H32 B30 EB_DATA[2]
EMMC_DATA0 EB_DATA2
L32 C29 EB_DATA[3]
I2C EMMC_DATA[0-7]
OPT K31
L33
EMMC_CAL
EMMC_STRB
EB_DATA3
EB_DATA4
F29
F30
EB_DATA[4]
EB_DATA[5]
R188 33 EMMC_VCTRL EB_DATA5
E30 EB_DATA[6]
I2C-0 : AMP DEBUG EMMC EB_DATA6
EB_DATA7
E29 EB_DATA[7]
I2C-1 : MICOM SOC_EMMC_STRB R142
I2C-2 : T-CON,L/DIMING 10K
1%
EB_DATA[0-7]
I2C-3 : S/Demod,T2/Demod, LNB
I2C-4 : NVRAM
I2C-5 : TUNER_MOPLL(T/C,ATV)

JTAG-0 I/F
6602T12004J
+3.3V_NORMAL
P102
12505WS-10A00

OPT

L/DIM0_VS 1

TDI0 2

L/DIM0_MOSI 3

L/DIM0_SCLK 4

TCK0 5

SOC_RESET 6

FORCED_JTAG_0 7

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.02.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M16 Symbol A 1 26

EAN63846302 +3.3V_NORMAL
IC101

HDMI_EXT_EDID
FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_SYNC LGE1312(M16)

15Y_TUNER

DDR1.5GB
FE_DEMOD1_TS_VAL

BIT10_1
10K

10K

10K
BIT0_1

BIT1_1

BIT2_1

BIT3_1

BIT4_1

BIT5_1

BIT6_1

BIT7_1

BIT9_1
BIT8_1

RGBW
FE_DEMOD1_TS_ERROR

V16
AC27 AM10
AD27
TP_DVB_CLK GPIO0
AK17
BIT[10]

R225

R226

R227

R228

R229

R230

R231

R232

R241

R242

R243

R244

R245

R254

R276

R277
FE_DEMOD1_TS_DATA[0-7] AC29
TP_DVB_SOP GPIO1
AJ7
BIT[9]
AC28
TP_DVB_VAL GPIO2
AH16
BIT[8]
FE_DEMOD1_TS_DATA[7] AF29
TP_DVB_ERR GPIO3
AJ17
BIT[7] BIT[0]
TP_DVB_DATA7 GPIO4 BIT[6]
FE_DEMOD1_TS_DATA[6] AF28
TP_DVB_DATA6 GPIO5
AK9
BIT[5]
BIT[1]
FE_DEMOD1_TS_DATA[5] AG29 AH15
FE_DEMOD1_TS_DATA[4] AG28
TP_DVB_DATA5 GPIO6
AJ16
BIT[4]
TP_DVB_DATA4 GPIO7 BIT[3]
FE_DEMOD1_TS_DATA[3] AE28
TP_DVB_DATA3 GPIO8
AH21
BIT[2]
BIT[2]
FE_DEMOD1_TS_DATA[2] AE27 AH5
FE_DEMOD1_TS_DATA[1] AD29
TP_DVB_DATA2 GPIO9
AJ8
BIT[1] BIT[3]
FE_DEMOD1_TS_DATA[0] AD28
TP_DVB_DATA1 GPIO10
AJ18
OTP_WRITE
TP_DVB_DATA0 GPIO11
AK18
AV1_CVBS_DET
TPI_DATA[0-7] A27
GPIO12
AJ9
COMP2_DET BIT[4]
TPI_CLK TPI_CLK GPIO13 CORE_VID[1] Designated GPIO
TPI_SOP
C26
TPI_SOP GPIO14
AH6
BIT[0]
for OLED BIT[5]
B26 AH20
TPI_VAL C27
TPI_VAL GPIO15
AH7
MODEL_OPT_14 QSM_EN BIT[6]
TPI_DATA[0]
TPI_ERR B25
TPI_ERR GPIO16
AK6 DATA_FORMAT_1 ON_RF_DONE

TPI_ERR TP201 TPI_DATA[1] B27

TPI_DATA0 GPIO17
AA7
MODEL_OPT_11
TPI_DATA[2] C25
TPI_DATA1 LED_SCL GPIO18
AB6
RETENTION_DISABLE BIT[7]
TPO_ERR TP202 TPI_DATA2 LED_SDA GPIO19 INSTANT_BOOT
TPI_DATA[3] A25
TPI_DATA3 GPIO20
AJ6
DEBUG
BIT[8]
TPI_DATA[4] B29 AK5
TPI_DATA[5] C28
TPI_DATA4 GPIO21
AF7 R280 100 DATA_FORMAT_0 COMPENSATION_DONE

TPI_DATA[6] B28
TPI_DATA5 UART_RX GPIO22
AJ5 HP_OUT
HP_DET R274
100 Near AMP BIT[9]
TPI_DATA6 UART_TX GPIO23
TPI_DATA[7] A28 AJ15 1/16W C225 BIT[10]
2AMP

BT_RESET
2.4K
R273

TPI_DATA7 GPIO24
AJ14 5% 1000pF AMP_RESET_N
GPIO25 /TU_RESET2 50V
TPO_DATA[0-7] K28 AK15
TPO_CLK L28
TPIO_CLK GPIO26
AK14
/TU_RESET1
TPO_SOP TPIO_SOP GPIO27 TCON_I2C_EN
M28 AH14 MODEL_OPT_11
R273-*1

TPO_VAL L29
TPIO_VAL GPIO28
AK8
MODEL_OPT_13
TPO_ERR /RST_PHY
4.7K

TPIO_ERR GPIO29
MODEL_OPT_12
1AMP

TPO_DATA[0] N28 AH17

TPO_DATA[1] M29
TPIO_DATA0 GPIO30
AG7
MODEL_OPT_15 OLED_TCON_FW
TPIO_DATA1 GPIO31 CORE_VID[0]
TPO_DATA[2] M30
TPIO_DATA2
MODEL_OPT_13
TPO_DATA[3] L30 AN3
TPIO_DATA3 TX0N TXA_0P/VX1_0P_SOC
TPO_DATA[4] K29 AN4
TXA_0N/VX1_0N_SOC
MODEL_OPT_14

HDMI_INT_EDID
TPIO_DATA4 TX0P
TPO_DATA[5] J29 AM3
TPIO_DATA5 TX1N TXA_1P/VX1_1P_SOC
TPO_DATA[6] J30
TPIO_DATA6 TX1P
AM4
TXA_1N/VX1_1N_SOC
MODEL_OPT_15

DDR2GB
TPO_DATA[7] H30 AM1

16Y_TUNER
TPIO_DATA7 TX2N TXA_2P/VX1_2P_SOC
BIT10_0
AM2
BIT9_0
10K

10K

10K
BIT0_0

BIT1_0

BIT2_0

BIT3_0

BIT4_0

BIT5_0

BIT6_0

BIT7_0

BIT8_0

AJ31
TX2P
AL3
TXA_2N/VX1_2N_SOC

RGB

V15
FE_DEMOD2_TS_CLK FE_DEMOD2_TS_CLK AK30
STPI0_CLK TX3N
AL4
TXA_CLKP/VX1_3P_SOC
FE_DEMOD2_TS_SYNC FE_DEMOD2_TS_SYNC AH31
STPI0_SOP TX3P
AK3
TXA_CLKN/VX1_3N_SOC
R233

R234

R235

R236

R237

R238

R239

R240

R249

R250

R251

R252

R253

R246

R278

R279
FE_DEMOD2_TS_VAL FE_DEMOD2_TS_VAL AH30
STPI0_VAL TX4N
AK4
TXA_3P/VX1_4P_SOC
FE_DEMOD2_TS_ERROR FE_DEMOD2_TS_ERROR AK27
STPI0_ERR TX4P
AK1
TXA_3N/VX1_4N_SOC
FE_DEMOD2_TS_DATA FE_DEMOD2_TS_DATA AJ27
STPI0_DATA0 TX5N
AK2
TXA_4P/VX1_5P_SOC
FE_DEMOD2_TS_DATA[1] FE_DEMOD2_TS_DATA[1] AJ28
STPI0_DATA1 TX5P
AJ3
TXA_4N/VX1_5N_SOC
FE_DEMOD2_TS_DATA[2] FE_DEMOD2_TS_DATA[2] AH28
STPI0_DATA2 TX6N
AJ4
TXB_0P/VX1_6P_SOC
FE_DEMOD2_TS_DATA[3] FE_DEMOD2_TS_DATA[3] AK29
STPI0_DATA3 TX6P
AH3
TXB_0N/VX1_6N_SOC
FE_DEMOD2_TS_DATA[4] FE_DEMOD2_TS_DATA[4] AJ29
STPI0_DATA4 TX7N
AH4
TXB_1P/VX1_7P_SOC
FE_DEMOD2_TS_DATA[5] FE_DEMOD2_TS_DATA[5] AH29
STPI0_DATA5 TX7P
AH1
TXB_1N/VX1_7N_SOC
FE_DEMOD2_TS_DATA[6] FE_DEMOD2_TS_DATA[6] AJ30
STPI0_DATA6 TX8N
AH2
TXB_2P/VX1_8P_SOC
FE_DEMOD2_TS_DATA[7] FE_DEMOD2_TS_DATA[7] STPI0_DATA7 TX8P
AG3
TXB_2N/VX1_8N_SOC
AK26
TX9N
AG4
TXB_CLKP/VX1_9P_SOC
FE_DEMOD3_TS_CLK FE_DEMOD3_TS_CLK AH25
STPI1_CLK TX9P
AF3
TXB_CLKN/VX1_9N_SOC
FE_DEMOD3_TS_SYNC FE_DEMOD3_TS_SYNC AH26
STPI1_SOP TX10N
AF4
TXB_3P/VX1_10P_SOC TXB_3P/VX1_10P_SOC
FE_DEMOD3_TS_VAL FE_DEMOD3_TS_VAL AJ25
STPI1_VAL TX10P
AF1
TXB_3N/VX1_10N_SOC TXB_3N/VX1_10N_SOC
FE_DEMOD3_TS_ERROR FE_DEMOD3_TS_ERROR AJ26
STPI1_ERR TX11N
AF2
TXB_4P/VX1_11P_SOC TXB_4P/VX1_11P_SOC
FE_DEMOD3_TS_DATA FE_DEMOD3_TS_DATA STPI1_DATA TX11P TXB_4N/VX1_11N_SOC TXB_4N/VX1_11N_SOC
AD3 AE3
AD1
EPI_SOE TX_LOCKN Vx1_LOCK_N
EPI_MCLK EPI_MCLK AD4
EPI_MCLK
EPI_GCLK EPI_GCLK AD2
EPI_GCLK
EPI_EO EPI_EO AC4
EPI_EO
EPI_VST EPI_VST EPI_VST
BIT 2/3 : TUNER OPTION BIT 4/5/6 : BACK-END OPTION
BIT 0/1 : AREA OPTION
BIT[4/5/6] DISPLAY TYPE FHD/UHD TYPE COMMENT
BIT [0/1] DVB ATSC JP BIT(2/3) EU/CIS AJJA TW/COL CN/HK KR N.America BR JP
0 / 0 / 0 LCD UHD VBY1 M16+F16 / M16 VX1
0 / 0 TAIWAN/COLOM) N/AMERICA T2/C/S2 PIP T T2/C PIP ATSC+T2 ISDB PIP
0/0 EXT_ATV INT_ATV Default
EXT_ATV EXT_ATV EXT_ATV INT_ATV EXT_ATV 0 / 0 / 1 LCD UHD EPI M16 EPI
0 / 1 CHINA/HONGKONG KOREA JAPAN T2
0/1 T2/C/S2 T2/C/S2 INT_ATV ATSC+T2 EXT_ATV ISDB
EXT_ATV 0 / 1 / 0 RESERVED
1 / 0 EU/CIS S/AMERICA INT_ATV INT_ATV INT_ATV EXT_ATV
T2C/S2 T2/C/S2 T2 ATSC+T2 ISDB 0 / 1 / 1 RESERVED
1 / 1 ASIA/AFRICA Sri Lanka 1/0 INT_ATV
EXT_ATV EXT_ATV EXT_ATV INT_ATV
1 / 0 / 0 OLED UHD VBY1 -
T2
1/1
EXT_ATV 1 / 0 / 1 RESERVED
1 / 1 / 0 OLED FHD VBY1 -
1 / 1 / 1 RESERVED
BIT 7/8 : DDR Vender BIT 9/10 : FRC

UART 1 / 2 BIT(7/8) DDR vender BIT(9/10) FRC

00 HYNIX 00 M16 ONLY

+3.3V_NORMAL DEBUG_UART
01 SAMSUNG 01 M16+F16

10 MICRON 10
MODEL OPTION
P202 11 11 Low High
UART_RX_PULL_UP

12507WS-04L +3.3V_NORMAL
MODEL_OPT_11 HDMI HDMI_INT_EDID HDMI_EXT_EDID
EEPROM
+3.3V_NORMAL
R269
10K

1 MODEL_OPT_12 MLE_M+ RGB RGBW

UART_RX_PULL_UP MODEL_OPT_13 TUNER TYPE 16Y TUNER 15Y TUNER

3.3K
OPT
R270

R265 22
UART1_RX 2
MODEL_OPT_14 DDR SIZE DDR2GB DDR1.5GB

3 MODEL_OPT_15 MODULE V15 V16

LTST-C155KGJRKT DEBUG_LED
R210
22

R267 22 DEBUG
R206

UART1_TX 4
27K

DEBUG_LED

DEBUG_UART
GND JIG POINT (5pi)
1

5
For ISP
LD201
G
R
3

4
JP200

JP201

JP202

JP203

DEBUG_LED
R208
220

E Q201
MMBT3906(NXP)
Vx1_LOCK_N
B
DEBUG_LED C

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.11.23
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M16 Symbol B 2 99

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
Downloaded from
Only for training and www.Manualslib.com
service purposes manuals search engine
PLACE AT JACK SIDE IC101
PAGE 3
TU_CVBS_SOC
LGE1312(M16)
C301 0.047uF
AV1_CVBS_IN_SOC
AM29 D24
R324-*1 CVBS_IN1 NAND_REN SMARTCARD_CLK
JACK Side SOC Side CVBS_S2a_Apply
510K R379-*1 OPT
R379
AL29
4.7K AL30
CVBS_IN2 NAND_CLE
F25
F24
SMARTCARD_COMMAND
CVBS_S2a_Apply CVBS_IN3 NAND_ALE SMARTCARD_VCC
CVBS_S2a_NotApply E25
NAND_WEN SMARTCARD_PWR_SEL
R324 68 C331 0.047uF AM30 F26
CVBS_VCM NAND_D3
CVBS_S2a_NotApply E26
NAND_D2
AM31 E24
MNT_V_OUT_SOC BUF_OUT NAND_D1 SMARTCARD_DET
R304 D25
R301 100 MNT_V_OUT_SOC 10K NAND_D0 SMARTCARD_DATA
AN29 F22
AV_CVBS_IN AV1_CVBS_IN_SOC OPT AL28
SC1_SID NAND_D4
E22
SC1_FB NAND_D5
R305 D22
10K NAND_D6
OPT AN25 E23
SOY1_IN NAND_D7
AL24 F23
R303 100 C303 0.047uF Y1_IN NAND_CS0
AM23
TU_CVBS TU_CVBS_SOC AM24
PB1_IN
AM11
PR1_IN RGMII_REF_CLK
AM9
EPHY_REFCLK
RGMII_MDIO EPHY_MDIO
AM27 AL9
COMP2_SOG2_IN_SOC SOY2_IN RGMII_MDC EPHY_MDC
AM26 AL8
COMP2_Y_IN_SOC Y2_IN RGMII_RXCTL EPHY_CRS_DV
AN26 AM13
COMP2_Pb_IN_SOC PB2_IN RGMII_RX_CLK R343 33
AL27 AN14
COMP2_Pr_IN_SOC PR2_IN RGMII_RXD0 R344 33
EPHY_RXD0
AL13
RGMII_RXD1 EPHY_RXD1
R325 68 C328 0.047uF AN23 AM14
AVDD18_MIP R326 68 C329 0.047uF AM25
ADC1_COM
ADC2_COM
RGMII_RXD2
RGMII_RXD3
AN13
R327 68 C330 0.047uF AL25 AN10
ADC3_COM RGMII_TXCTL
AL12
EPHY_EN
L303 120-ohm RGMII_TX_CLK
AN22 AN11
L304 120-ohm AVDD18_AFE3CH_REF RGMII_TXD0 EPHY_TXD0
AM22 AL10
AVSS18_AFE3CH_REF RGMII_TXD1 EPHY_TXD1
AL11
RGMII_TXD2
R377 4.7K AM28 AM12
HSYNC RGMII_TXD3 5V_HDMI_1
R378 4.7K AN28
VSYNC

AM16 AB28
AN16
AUDA_SCART_OUTL HDMI2_0_SCL
AB27
DDC_SCL_1 R345
AUDA_SCART_OUTR HDMI2_0_SDA DDC_SDA_1 10
AA29
HDMI2_0_HPD HDMI_HPD_1
AN20 AJ32
AUAD_L_CH1_IN HDMI2_0_5V_IN
AM20 AA28
R307 33 C307 0.047uF AUAD_R_CH1_IN HDMI2_0_ARC_OUT SPDIF_OUT_ARC C336 R348
COMP2_Pb COMP2_Pb_IN_SOC AUAD_L_CH2_IN
AN19
AUAD_L_CH2_IN
1uF
5.1K
AM19 AG30 10V
R308 33
AUAD_R_CH2_IN AUAD_R_CH2_IN HDMI2_0_RX0N D0-_HDMI1
C308 0.047uF AM18 AG31
COMP2_Y COMP2_Y_IN_SOC AL18
AUAD_L_CH3_IN HDMI2_0_RX0P
AF30
D0+_HDMI1
AUAD_R_CH3_IN HDMI2_0_RX1N
AF31
D1-_HDMI1
C311 1000pF HDMI2_0_RX1P D1+_HDMI1
COMP2_SOG2_IN_SOC HDMI2_0_RX2N
AE30
D2-_HDMI1
HP_OUT AE31
R309 33 C309 0.047uF R362 200 AM17
HDMI2_0_RX2P
AH32
D2+_HDMI1
COMP2_Pr COMP2_Pr_IN_SOC AUDA_OUTL
R363 200 AN17
AUDA_OUTL HDMI2_0_RXCN
AH33
CK-_HDMI1
AUDA_OUTR AUDA_OUTR HDMI2_0_RXCP CK+_HDMI1
3300pF
3300pF

HP_OUT
5V_HDMI_2
R364

R365
C348

HP_OUT C349
HP_OUT 50V

HP_OUT 50V
22K

22K

AL21
AUAD_L_REF AUAD_L_REF
AM21 Y29
AUAD_R_REF AUAD_R_REF DDC_SCL_2
HP_OUT

HDMI2_1_SCL
C332 10uF 10V Y28
HDMI2_1_SDA DDC_SDA_2 R346
C333 2.2uF10V AL15 AA27 10
AUDA_VBG_EXT HDMI2_1_HPD
AJ33
HDMI_HPD_2
HDMI2_1_5V_IN
R330 33 AM15
MAIN I2S_I/F SPDIF_OUT IEC958OUT C337 R349
AD32 1uF
R331 HDMI2_1_RX0N D0-_HDMI2 10V
5.1K
100 AM6 AD33
AUD_MASTER_CLK AUD_MASTER_CLK R332 AUDCLK_OUT HDMI2_1_RX0P D0+_HDMI2
100 AM5 AC30
AUD_LRCH R333 DACLRCH HDMI2_1_RX1N D1-_HDMI2
100 AL7 AC31
AUD_LRCH_TW DACSLRCH HDMI2_1_RX1P D1+_HDMI2
AL5 AB30
FLASH_WP_F16 DACCLFCH HDMI2_1_RX2N D2-_HDMI2
R335 100 AL6 AB31
AUD_SCK DACSCK HDMI2_1_RX2P D2+_HDMI2
R336 100 AN5 AD30
AUD_LRCK DACLRCK HDMI2_1_RXCN CK-_HDMI2
AD31
C324 C323 C345 C325 C327 HDMI2_1_RXCP CK+_HDMI2
R361 0 OPT AF5
22pF 33pF 33pF 22pF 33pF I2S_AMP PCMI3LRCH 5V_HDMI_3
OPT OPT OPT OPT OPT AG6
PCMI3_LRCK PCMI3_LRCK PCMI3LRCK
AG5 W29
PCMI3_SCK PCMI3SCK HDMI2_2_SCL DDC_SCL_3
W28
PCMI3_SCK HDMI2_2_SDA DDC_SDA_3 R347
V28 10
AF6
HDMI2_2_HPD
V29
HDMI_HPD_3
TP300 FRC_LRSYNC HDMI2_2_5V_IN
V30
C346 0.1uF HDMI2_2_CD_SENSE C338 R350
AN32 R302 1uF
TU_SIF_TU AAD_ADC_SIF 10K 10V
5.1K
OPT 16V C334 0.1uF AM32 Y30
AAD_ADC_SIFM HDMI2_2_RX0N D0-_HDMI3
C320 AK32 Y31
1000pF IFAGC HDMI2_2_RX0P D0+_HDMI3
Y32
50V HDMI2_2_RX1N D1-_HDMI3
Y33
HDMI2_2_RX1P D1+_HDMI3
AN31 W31
TP301 DMD_SIF_OUT HDMI2_2_RX2N D2-_HDMI3
W32
TU_ALL_IntDemod HDMI2_2_RX2P D2+_HDMI3
AL33 AA30
R318 ADC_I_INP DMD_ADC_INP HDMI2_2_RXCN CK-_HDMI3
AL32 AA31
IF_AGC ADC_I_INN DMD_ADC_INN HDMI2_2_RXCP CK+_HDMI3
470 C335 0.1uF AM33
C321 DMD_ADC_INCOM
0.47uF
TU_ALL_IntDemod

R312 27K C314 4.7uF

COMP2/AV_L_IN AUAD_L_CH2_IN Close to IC101
1%
R316 10K
Placed as close as possible to IC101
1%
R313 27K C315 4.7uF
COMP2/AV_R_IN AUAD_R_CH2_IN
1% AVDD18_AUAD
R317 10K

1%
L302

R353 120-ohm
51K
1% C343
10uF
AUAD_L_REF 10V Tuner IF Filter
R354 C342
47K 4.7uF
1% 10V
TU_ALL_IntDemod TU_ALL_IntDemod
R351 C340
R355 ADC_I_INN 51 0.01uF
IF_N
51K
1%
C339 L301
AUAD_R_REF To ADC 22pF 60-ohm
TU_ALL_IntDemod
OPT
C344 R352 C341
R356
47K 4.7uF
10V
ADC_I_INP 51 0.01uF
IF_P
1%
TU_ALL_IntDemod TU_ALL_IntDemod
AVSS18_AUAD_REF

L305
120-ohm
Placed as close as possible to IC101

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.02.23
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M16 Symbol C 3 26

R415
1K 1%

1K 1%

A22 M0_1_VREFCA
M0_DDR_VREF_0
A2
M0_DDR_VREF_1 M0_0_VREFCA
EAN64028101
EAN64028101
E13
M0_DDR_A0 M0_DDR_A0
M0_DDR_A1
E9
M0_DDR_A1 IC401 IC402
1%

E15
M0_DDR_A2
R403

R416

M0_DDR_A2
E17
M0_DDR_A3 M0_DDR_A3 H5TQ4G63CFR-TEC H5TQ4G63CFR-TEC
D7
1K

M0_DDR_A4 M0_DDR_A4 M0_0_VREFDQ M0_1_VREFDQ

D16
M0_DDR_A5 M0_DDR_A5
E7 DDR3 DDR3
M0_DDR_A6 M0_DDR_A6
E16
M0_DDR_A7
N3
A0
4Gbit M8 N3
4Gbit M8
M0_DDR_A7 M0_DDR_A0 VREFCA M0_DDR_A0 A0 VREFCA
M0_DDR_A8
D8
M0_DDR_A8 M0_DDR_A1
P7
A1 (x16) M0_DDR_A1
P7
A1 (x16)
E14 P3 P3
M0_DDR_A9 M0_DDR_A9 M0_DDR_A2 A2 M0_DDR_A2 A2
D6 N2 H1 N2 H1
M0_DDR_A10 M0_DDR_A10 M0_DDR_A3 A3 VREFDQ M0_DDR_A3 A3 VREFDQ
D9 P8 P8
M0_DDR_A11 M0_DDR_A4 A4 M0_DDR_A4
M0_DDR_A11
D10 P2 +1.5V_DDR P2
A4 +1.5V_DDR
M0_DDR_A12 M0_DDR_A12 M0_DDR_A5 A5 R418 M0_DDR_A5 A5 R419
D14 R8 L8 R8 L8
M0_DDR_A13 M0_DDR_A13 M0_DDR_A6 A6 ZQ M0_DDR_A6 A6 ZQ
E8 R2 240 R2 240
M0_DDR_A14 M0_DDR_A14 M0_DDR_A7 A7 M0_DDR_A7 A7
E18 M0_D_CLK M0_U_CLK T8 1% T8 1%
M0_DDR_A15/M0_DDR_CS1 M0_DDR_A8 A8 M0_DDR_A8 A8
R3 B2 R3 B2
R405 M0_DDR_A9 A9 VDD_1 M0_DDR_A9 A9 VDD_1
D17 R410 L7 D9 L7 D9
M0_DDR_BA0 M0_DDR_BA0 100 M0_DDR_A10 A10/AP VDD_2 M0_DDR_A10 A10/AP VDD_2
E6 100 R7 G7 R7 G7
M0_DDR_BA1 M0_DDR_BA1 M0_DDR_A11 A11 VDD_3 M0_DDR_A11 A11 VDD_3
D13 N7 K2 N7 K2
M0_DDR_BA2 M0_DDR_BA2 M0_DDR_A12 A12/BC VDD_4 M0_DDR_A12 A12/BC VDD_4
M0_D_CLKN M0_U_CLKN T3
A13
K8 T3 K8
M0_DDR_A13 VDD_5 M0_DDR_A13 A13 VDD_5
C8 T7 N1 T7 N1
M0_DDR_U_CLKP M0_U_CLK M0_DDR_A14 A14 VDD_6 M0_DDR_A14 A14 VDD_6
B8 M7 N9 M7 N9
M0_DDR_U_CLKN M0_U_CLKN NC_5 VDD_7 NC_5 VDD_7
C17 R1 R1
M0_DDR_D_CLKP M0_D_CLK VDD_8 VDD_8
B17 M2 R9 M2 R9
M0_DDR_D_CLKN M0_D_CLKN M0_DDR_BA0 BA0 VDD_9 M0_DDR_BA0 BA0 VDD_9
E10 N8 N8
M0_DDR_CKE M0_DDR_CKE M0_DDR_BA1 BA1 M0_DDR_BA1 BA1
M3 M3
M0_DDR_BA2 BA2 M0_DDR_BA2 BA2
E19 A1 A1
M0_DDR_ODT M0_DDR_ODT VDDQ_1 VDDQ_1
D19 J7 A8 J7 A8
M0_DDR_RASN M0_DDR_RASN M0_D_CLK CK VDDQ_2 M0_U_CLK CK VDDQ_2
D18 K7 C1 K7 C1
M0_DDR_CASN M0_DDR_CASN M0_D_CLKN CK VDDQ_3 M0_U_CLKN CK VDDQ_3
M0_DDR_WEN
D11
M0_DDR_WEN
+1.5V_DDR M0_DDR_CKE
K9
CKE VDDQ_4
C9
M0_DDR_CKE
K9
CKE VDDQ_4
C9
D2 D2
D15
M0_DDR_RESET_N
+1.5V_DDR +1.5V_DDR M0_DDR_CS0
L2
VDDQ_5
E9
M0_DDR_CS0
L2
VDDQ_5
E9
M0_DDR_RESET_N CS VDDQ_6 CS VDDQ_6
K1 F1 K1 F1
M0_DDR_ODT ODT VDDQ_7 M0_DDR_ODT ODT VDDQ_7
B18 J3 H2 C413 0.1uF 16V J3 H2 C429 0.1uF 16V
M0_DDR_DQS0 M0_DDR_DQS0 M0_DDR_RASN RAS VDDQ_8 M0_DDR_RASN RAS VDDQ_8
C18 K3 H9 C414 0.1uF 16V K3 H9 C430 0.1uF 16V
M0_DDR_DQS_N0 M0_0_VREFCA M0_1_VREFCA M0_DDR_CASN M0_DDR_CASN
R421

1K 1%

M0_DDR_DQS_N0 CAS VDDQ_9 CAS VDDQ_9

B16 L3 L3
OPT

M0_DDR_DQS1 M0_DDR_DQS1 M0_DDR_WEN WE M0_DDR_WEN WE

A16 J1 J1
R411

2K 1%

M0_DDR_DQS_N1
R406

2K 1%

M0_DDR_DQS_N1 NC_1 NC_1

B9 T2 J9 T2 J9
M0_DDR_DQS2 M0_DDR_DQS2 M0_DDR_RESET_N RESET NC_2 M0_DDR_RESET_N RESET NC_2
C9 L1 L1
M0_DDR_DQS_N2 M0_DDR_DQS_N2 NC_3 NC_3
B7 L9 L9
M0_DDR_DQS3 M0_DDR_DQS3 NC_4 NC_4
A7 F3 F3
M0_DDR_DQS_N3 M0_DDR_DQS_N3 M0_DDR_DQS0 DQSL M0_DDR_DQS2 DQSL
G3 G3
1%

M0_DDR_DQS_N0 DQSL M0_DDR_DQS_N2 DQSL

A15
R407

R412

M0_DDR_DM0 M0_DDR_DM0
A18 C7 A9 C7 A9
M0_DDR_DM1 M0_DDR_DM1 M0_DDR_DQS1 DQSU VSS_1 M0_DDR_DQS3 DQSU VSS_1
2K

A6 B7 B3 B7 B3
M0_DDR_DM2 M0_DDR_DM2 M0_DDR_DQS_N1 DQSU VSS_2 M0_DDR_DQS_N3 DQSU VSS_2
A9 E1 E1
M0_DDR_DM3 M0_DDR_DM3 VSS_3 VSS_3
E7 G8 E7 G8
M0_DDR_DM0 DML VSS_4 M0_DDR_DM2 DML VSS_4
B20 D3 J2 D3 J2
M0_DDR_DQ0 M0_DDR_DQ0 M0_DDR_DM1 DMU VSS_5 M0_DDR_DM3 DMU VSS_5
B13 J8 J8
M0_DDR_DQ1 M0_DDR_DQ1 VSS_6 VSS_6
C21 E3 M1 E3 M1
M0_DDR_DQ2 M0_DDR_DQ2 M0_DDR_DQ0 DQL0 VSS_7 M0_DDR_DQ16 DQL0 VSS_7
C14 F7 M9 F7 M9
M0_DDR_DQ3 M0_DDR_DQ3 M0_DDR_DQ1 DQL1 VSS_8 M0_DDR_DQ17 DQL1 VSS_8
A21 F2 P1 F2 P1
M0_DDR_DQ4 M0_DDR_DQ4 M0_DDR_DQ2 DQL2 VSS_9 M0_DDR_DQ18 DQL2 VSS_9
A13 F8 P9 F8 P9
M0_DDR_DQ5 M0_DDR_DQ5 M0_DDR_DQ3 DQL3 VSS_10 M0_DDR_DQ19 DQL3 VSS_10
B21 H3 T1 H3 T1
M0_DDR_DQ6 M0_DDR_DQ6 M0_DDR_DQ4 DQL4 VSS_11 M0_DDR_DQ20 DQL4 VSS_11
C13 H8 T9 H8 T9
M0_DDR_DQ7 M0_DDR_DQ7 M0_DDR_DQ5 DQL5 VSS_12 M0_DDR_DQ21 DQL5 VSS_12
B14 G2 G2
M0_DDR_DQ8 M0_DDR_DQ8 M0_DDR_DQ6 DQL6 M0_DDR_DQ22 DQL6
B19 H7 H7
M0_DDR_DQ9 M0_DDR_DQ9 M0_DDR_DQ7 DQL7 M0_DDR_DQ23 DQL7
C15 B1 B1
M0_DDR_DQ10 M0_DDR_DQ10 VSSQ_1 VSSQ_1
C20 D7 B9 D7 B9
M0_DDR_DQ11 M0_DDR_DQ11 M0_DDR_DQ8 DQU0 VSSQ_2 M0_DDR_DQ24 DQU0 VSSQ_2
C16 C3 D1 C3 D1
M0_DDR_DQ12 M0_DDR_DQ12 M0_DDR_DQ9 DQU1 VSSQ_3 M0_DDR_DQ25 DQU1 VSSQ_3
A19 C8 D8 C8 D8
M0_DDR_DQ13
B15
M0_DDR_DQ13
M0_DDR_DQ14
+1.5V_DDR +1.5V_DDR M0_DDR_DQ10
M0_DDR_DQ11
C2
DQU2 VSSQ_4
E2
M0_DDR_DQ26
M0_DDR_DQ27
C2
DQU2 VSSQ_4
E2
M0_DDR_DQ14 DQU3 VSSQ_5 DQU3 VSSQ_5
C19 A7 E8 A7 E8
M0_DDR_DQ15 M0_DDR_DQ15 M0_DDR_DQ12 DQU4 VSSQ_6 M0_DDR_DQ28 DQU4 VSSQ_6
B11 A2 F9 A2 F9
M0_DDR_DQ16 M0_DDR_DQ16 M0_DDR_DQ13 DQU5 VSSQ_7 M0_DDR_DQ29 DQU5 VSSQ_7
C5 M0_1_VREFDQ B8 G1 B8 G1
M0_DDR_DQ17 M0_0_VREFDQ M0_DDR_DQ14 M0_DDR_DQ30
R408

R413
2K 1%

2K 1%

M0_DDR_DQ17 DQU6 VSSQ_8 DQU6 VSSQ_8

C12 A3 G9 A3 G9
M0_DDR_DQ18 M0_DDR_DQ18 M0_DDR_DQ15 DQU7 VSSQ_9 M0_DDR_DQ31 DQU7 VSSQ_9
B4
M0_DDR_DQ19 M0_DDR_DQ19
A12
M0_DDR_DQ20 M0_DDR_DQ20
A4
M0_DDR_DQ21 M0_DDR_DQ21
B12
M0_DDR_DQ22 M0_DDR_DQ22
C4
M0_DDR_DQ23 M0_DDR_DQ23 DDR_512MB_HYNIX_2133
1%

B5
M0_DDR_DQ24
DDR_512MB_HYNIX_2133
R409

R414

M0_DDR_DQ24 EAN64108201 EAN64129401 EAN64108201 EAN64129401

B10
M0_DDR_DQ25
C6
M0_DDR_DQ25 IC401-*1 IC401-*2 IC402-*1 IC402-*2
2K

K4B4G1646E-BCNB MT41K256M16LY-093:N K4B4G1646E-BCNB MT41K256M16LY-093:N

M0_DDR_DQ26 M0_DDR_DQ26
C11
M0_DDR_DQ27 M0_DDR_DQ27 N3 M8 N3 M8 N3 M8 N3 M8
C7 P7
A0 VREFCA
P7
A0 VREFCA
P7
A0 VREFCA
P7
A0 VREFCA

M0_DDR_DQ28 M0_DDR_DQ28 P3
A1
P3
A1
P3
A1
P3
A1
A10 N2
A2
H1 N2
A2
H1 N2
A2
H1 N2
A2
H1
M0_DDR_DQ29 M0_DDR_DQ29 P8
A3 VREFDQ
P8
A3 VREFDQ
P8
A3 VREFDQ
P8
A3 VREFDQ
B6 P2
A4
P2
A4
P2
A4
P2
A4

M0_DDR_DQ30 M0_DDR_DQ30 R8
A5
L8 R8
A5
L8 R8
A5
L8 R8
A5
L8
C10 R2
A6 ZQ
R2
A6 ZQ
R2
A6 ZQ
R2
A6 ZQ

M0_DDR_DQ31 M0_DDR_DQ31 T8
A7
T8
A7
T8
A7
T8
A7
A8 A8 A8 A8
R3 B2 R3 B2 R3 B2 R3 B2
A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1
L7 D9 L7 D9 L7 D9 L7 D9
A3 R401 240 R7
A10/AP VDD_2
G7 R7
A10/AP VDD_2
G7 R7
A10/AP VDD_2
G7 R7
A10/AP VDD_2
G7
M0_DDR_ZQCAL N7
A11 VDD_3
K2 N7
A11 VDD_3
K2 N7
A11 VDD_3
K2 N7
A11 VDD_3
K2
1% T3
A12/BC
A13
VDD_4
VDD_5
K8 T3
A12/BC
A13
VDD_4
VDD_5
K8 T3
A12/BC
A13
VDD_4
VDD_5
K8 T3
A12/BC
A13
VDD_4
VDD_5
K8
N1 N1 N1 N1
E11 M7
VDD_6
N9 M7
VDD_6
N9 M7
VDD_6
N9 M7
VDD_6
N9
M0_DDR_CS0 M0_DDR_CS0 NC_5 VDD_7
R1
NC_5 VDD_7
R1
NC_5 VDD_7
R1
NC_5 VDD_7
R1
D5 M2
VDD_8
R9 M2
VDD_8
R9 M2
VDD_8
R9 M2
VDD_8
R9
M0_RET DDR_RET N8
BA0 VDD_9
N8
BA0 VDD_9
N8
BA0 VDD_9
N8
BA0 VDD_9
BA1 BA1 BA1 BA1
M3 M3 M3 M3
BA2 BA2 BA2 BA2
A1 A1 A1 A1
VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1
J7 A8 J7 A8 J7 A8 J7 A8
CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2
K7 C1 K7 C1 K7 C1 K7 C1
CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3
K9 C9 K9 C9 K9 C9 K9 C9
CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4
D2 D2 D2 D2
VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5
L2 E9 L2 E9 L2 E9 L2 E9
CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6
K1 F1 K1 F1 K1 F1 K1 F1
ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7
J3 H2 J3 H2 J3 H2 J3 H2

+1.5V_DDR K3
L3
RAS
CAS
WE
VDDQ_8
VDDQ_9
H9 K3
L3
RAS
CAS
WE
VDDQ_8
VDDQ_9
H9 K3
L3
RAS
CAS
WE
VDDQ_8
VDDQ_9
H9 K3
L3
RAS
CAS
WE
VDDQ_8
VDDQ_9
H9

J1 J1 J1 J1
NC_1 NC_1 NC_1 NC_1
T2 J9 T2 J9 T2 J9 T2 J9
RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2

Add CS signal for 2T Mode & F3

DQSL
NC_3
NC_4
NC_6
L1
L9
T7 F3
LDQS
NC_3
NC_4
A14
L1
L9
T7 F3
DQSL
NC_3
NC_4
NC_6
L1
L9
T7 F3
LDQS
NC_3
NC_4
A14
L1
L9
T7

RET signal for Instant On G3

C7
DQSL

DQSU VSS_1
A9
G3

C7
LDQS

UDQS VSS_1
A9
G3

C7
DQSL

DQSU VSS_1
A9
G3

C7
LDQS

UDQS VSS_1
A9
B7 B3 B7 B3 B7 B3 B7 B3
DQSU VSS_2 UDQS VSS_2 DQSU VSS_2 UDQS VSS_2
E1 E1 E1 E1
VSS_3 VSS_3 VSS_3 VSS_3
R417

E7 G8 E7 G8 E7 G8 E7 G8
10K

DML VSS_4 LDM VSS_4 DML VSS_4 LDM VSS_4

INSTANT BOOT MODE D3
DMU VSS_5
VSS_6
J2
J8
D3
UDM VSS_5
VSS_6
J2
J8
D3
DMU VSS_5
VSS_6
J2
J8
D3
UDM VSS_5
VSS_6
J2
J8
E3 M1 E3 M1 E3 M1 E3 M1
DQL0 VSS_7 DQ0 VSS_7 DQL0 VSS_7 DQ0 VSS_7
F7 M9 F7 M9 F7 M9 F7 M9
DQL1 VSS_8 DQ1 VSS_8 DQL1 VSS_8 DQ1 VSS_8
F2 P1 F2 P1 F2 P1 F2 P1
R420 22 - ’0’ : Normal, Default DQL2 VSS_9 DQ2 VSS_9 DQL2 VSS_9 DQ2 VSS_9
DDR_RET F8
H3
DQL3
DQL4
VSS_10
VSS_11
P9
T1
F8
H3
DQ3
DQ4
VSS_10
VSS_11
P9
T1
F8
H3
DQL3
DQL4
VSS_10
VSS_11
P9
T1
F8
H3
DQ3
DQ4
VSS_10
VSS_11
P9
T1
5% (Internal Pull-down) H8
G2
DQL5 VSS_12
T9 H8
G2
DQ5 VSS_12
T9 H8
G2
DQL5 VSS_12
T9 H8
G2
DQ5 VSS_12
T9

DQL6 DQ6 DQL6 DQ6

R404 C
Q401
- ’1’: Instant Boot H7
DQL7
VSSQ_1
B1
H7
DQ7
VSSQ_1
B1
H7
DQL7
VSSQ_1
B1
H7
DQ7
VSSQ_1
B1
10K D7 B9 D7 B9 D7 B9 D7 B9
B MMBT3904(NXP)
DQU0 VSSQ_2 DQ8 VSSQ_2 DQU0 VSSQ_2 DQ8 VSSQ_2
INSTANT_BOOT C3
C8
DQU1
DQU2
VSSQ_3
VSSQ_4
D1
D8
C3
C8
DQ9
DQ10
VSSQ_3
VSSQ_4
D1
D8
C3
C8
DQU1
DQU2
VSSQ_3
VSSQ_4
D1
D8
C3
C8
DQ9
DQ10
VSSQ_3
VSSQ_4
D1
D8
C2 E2 C2 E2 C2 E2 C2 E2
DQU3 VSSQ_5 DQ11 VSSQ_5 DQU3 VSSQ_5 DQ11 VSSQ_5
A7 E8 A7 E8 A7 E8 A7 E8
DQU4 VSSQ_6 DQ12 VSSQ_6 DQU4 VSSQ_6 DQ12 VSSQ_6
E A2
DQU5 VSSQ_7
F9 A2
DQ13 VSSQ_7
F9 A2
DQU5 VSSQ_7
F9 A2
DQ13 VSSQ_7
F9
B8 G1 B8 G1 B8 G1 B8 G1
DQU6 VSSQ_8 DQ14 VSSQ_8 DQU6 VSSQ_8 DQ14 VSSQ_8
A3 G9 A3 G9 A3 G9 A3 G9
DQU7 VSSQ_9 DQ15 VSSQ_9 DQU7 VSSQ_9 DQ15 VSSQ_9

DDR_512MB_SS_2133 DDR_512MB_MICRON_2133 DDR_512MB_SS_2133 DDR_512MB_MICRON_2133

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.02.09
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M16 DDR3-M0 4 26

H5TQ4G63CFR-TEC H5TQ4G63CFR-TEC

N3 DDR3 M8 +1.5V_DDR N3 DDR3 M8 +1.5V_DDR

M1_DDR_A0 A0 VREFCA M1_DDR_A0 A0 VREFCA
M1_DDR_A1
P7
A1
4Gbit M1_DDR_A1
P7
A1
4Gbit
P3 P3
M1_DDR_A2 A2 M1_DDR_A2 A2
N2 H1 N2 H1
M1_DDR_A3 A3 VREFDQ M1_DDR_A3 A3 VREFDQ
P8 P8
M1_DDR_A4 A4 M1_DDR_A4 A4
P2 P2
M1_DDR_A5 A5 M1_DDR_A5 A5
R8 L8 R518 240 R8 L8 R519 240
M1_DDR_A6 A6 ZQ M1_DDR_A6 A6 ZQ
R2 R2
M1_DDR_A7 A7 M1_DDR_A7 A7
T8 T8
IC101 VREF_M1_0 +1.5V_DDR +1.5V_DDR
M1_DDR_A8
M1_DDR_A9
R3
L7
A8
A9 VDD_1
B2
D9
M1_DDR_A8
M1_DDR_A9
R3
L7
A8
A9 VDD_1
B2
D9
M1_DDR_A10 A10/AP VDD_2 M1_DDR_A10 A10/AP VDD_2
LGE1312(M16) VREF_M1_1 VREF_M1_0 VREF_M1_1
M1_DDR_A11
M1_DDR_A12
R7
N7
A11
A12/BC
VDD_3
VDD_4
G7
K2
M1_DDR_A11
M1_DDR_A12
R7
N7
A11
A12/BC
VDD_3
VDD_4
G7
K2
T3 K8 T3 K8
M1_DDR_A13 A13 VDD_5 M1_DDR_A13 A13 VDD_5
T7 N1 T7 N1
R508 R515 M1_DDR_A14 A14 VDD_6 M1_DDR_A14 A14 VDD_6
B1 1K 1K M7 N9 M7 N9
M1_DDR_VREF_0 NC_5 VDD_7 NC_5 VDD_7
AB1 1% 1% R1 R1
M1_DDR_VREF_1 VDD_8 VDD_8
M2 R9 M2 R9
M1_DDR_BA0 BA0 VDD_9 M1_DDR_BA0 BA0 VDD_9
M5 N8 N8
M1_DDR_A0 M1_DDR_A0 M1_DDR_BA1 BA1 M1_DDR_BA1 BA1
T5 M3 M3
M1_DDR_A1 M1_DDR_A1 M1_DDR_BA2 BA2 M1_DDR_BA2 BA2
K5 A1 A1
M1_DDR_A2 M1_DDR_A2 R509 R516 VDDQ_1 VDDQ_1
H5 1K 1K J7 A8 J7 A8
M1_DDR_A3 M1_DDR_A3 M1_D_CLK CK VDDQ_2 M1_U_CLK CK VDDQ_2
V4 1% 1% K7 C1 K7 C1
M1_DDR_A4 M1_DDR_A4 M1_D_CLKN CK VDDQ_3 M1_U_CLKN CK VDDQ_3
M1_DDR_A5
J4
M1_DDR_A5
+1.5V_DDR M1_DDR_CKE
K9
CKE VDDQ_4
C9
M1_DDR_CKE
K9
CKE VDDQ_4
C9
V5 D2 D2
M1_DDR_A6 M1_DDR_A6 VDDQ_5 VDDQ_5
J5 L2 E9 L2 E9
M1_DDR_A7 M1_DDR_A7 M1_DDR_CS0 CS VDDQ_6 M1_DDR_CS0 CS VDDQ_6
U4 K1 F1 K1 F1
M1_DDR_A8 M1_DDR_A8 M1_DDR_ODT ODT VDDQ_7 M1_DDR_ODT ODT VDDQ_7
L5 J3 H2 C524 0.1uF J3 H2 C540 0.1uF
M1_DDR_A9 M1_DDR_A9 M1_DDR_RASN RAS VDDQ_8 M1_DDR_RASN RAS VDDQ_8
W4 K3 H9 K3 H9
M1_DDR_A10 M1_DDR_CASN M1_DDR_CASN
R502

1K 1%

M1_DDR_A10 CAS VDDQ_9 C525 0.1uF CAS VDDQ_9 C541 0.1uF

T4 L3 L3
OPT

M1_DDR_A11 M1_DDR_A11 M1_DDR_WEN WE M1_DDR_WEN WE

R4 J1 J1
M1_DDR_A12 M1_DDR_A12 NC_1 NC_1
L4 T2 J9 T2 J9
M1_DDR_A13 M1_DDR_A13 M1_DDR_RESET_N RESET NC_2 M1_DDR_RESET_N RESET NC_2
U5 L1 L1
M1_DDR_A14 M1_DDR_A14 NC_3 NC_3
G5 L9 L9
M1_DDR_A15/M1_DDR_CS1 NC_4 NC_4
F3 F3
M1_DDR_DQS0 DQSL M1_DDR_DQS2 DQSL
H4 G3 G3
M1_DDR_BA0 M1_DDR_BA0 M1_DDR_DQS_N0 DQSL M1_DDR_DQS_N2 DQSL
W5
M1_DDR_BA1 M1_DDR_BA1
M4 C7 A9 C7 A9
M1_DDR_BA2 M1_DDR_BA2 M1_DDR_DQS1 DQSU VSS_1 M1_DDR_DQS3 DQSU VSS_1
B7 B3 B7 B3
M1_DDR_DQS_N1 DQSU VSS_2 M1_DDR_DQS_N3 DQSU VSS_2
U3 E1 E1
M1_DDR_U_CLKP M1_U_CLK VSS_3 VSS_3
U2 E7 G8 E7 G8
M1_DDR_U_CLKN M1_U_CLKN M1_D_CLK M1_U_CLK M1_DDR_DM0 DML VSS_4 M1_DDR_DM2 DML VSS_4
H3 D3 J2 D3 J2
M1_DDR_D_CLKP M1_D_CLK M1_DDR_DM1 DMU VSS_5 M1_DDR_DM3 DMU VSS_5
H2 J8 J8
M1_DDR_D_CLKN M1_D_CLKN R503 VSS_6 VSS_6
R5 R510 E3 M1 E3 M1
M1_DDR_CKE 100 M1_DDR_DQ0 M1_DDR_DQ16
M1_DDR_CKE 100 DQL0 VSS_7 DQL0 VSS_7
F7 M9 F7 M9
M1_DDR_DQ1 DQL1 VSS_8 M1_DDR_DQ17 DQL1 VSS_8
F5 F2 P1 F2 P1
M1_DDR_ODT M1_DDR_ODT M1_D_CLKN M1_U_CLKN M1_DDR_DQ2 DQL2 VSS_9 M1_DDR_DQ18 DQL2 VSS_9
F4 F8 P9 F8 P9
M1_DDR_RASN M1_DDR_RASN M1_DDR_DQ3 DQL3 VSS_10 M1_DDR_DQ19 DQL3 VSS_10
G4 H3 T1 H3 T1
M1_DDR_CASN M1_DDR_CASN M1_DDR_DQ4 DQL4 VSS_11 M1_DDR_DQ20 DQL4 VSS_11
P4 H8 T9 H8 T9
M1_DDR_WEN M1_DDR_WEN M1_DDR_DQ5 DQL5 VSS_12 M1_DDR_DQ21 DQL5 VSS_12
G2 G2
M1_DDR_DQ6 DQL6 M1_DDR_DQ22 DQL6
K4 H7 H7
M1_DDR_RESET_N M1_DDR_RESET_N M1_DDR_DQ7 DQL7 M1_DDR_DQ23 DQL7
B1 B1
VSSQ_1 VSSQ_1
G2 D7 B9 D7 B9
M1_DDR_DQS0 M1_DDR_DQS0 M1_DDR_DQ8 DQU0 VSSQ_2 M1_DDR_DQ24 DQU0 VSSQ_2
G3 C3 D1 C3 D1
M1_DDR_DQS_N0 M1_DDR_DQS_N0 M1_DDR_DQ9 DQU1 VSSQ_3 M1_DDR_DQ25 DQU1 VSSQ_3
J2 C8 D8 C8 D8
M1_DDR_DQS1 M1_DDR_DQS1 M1_DDR_DQ10 DQU2 VSSQ_4 M1_DDR_DQ26 DQU2 VSSQ_4
J1 C2 E2 C2 E2
M1_DDR_DQS_N1 M1_DDR_DQS_N1 M1_DDR_DQ11 DQU3 VSSQ_5 M1_DDR_DQ27 DQU3 VSSQ_5
T2 A7 E8 A7 E8
M1_DDR_DQS2 M1_DDR_DQS2 M1_DDR_DQ12 DQU4 VSSQ_6 M1_DDR_DQ28 DQU4 VSSQ_6
T3 A2 F9 A2 F9
M1_DDR_DQS_N2 M1_DDR_DQS_N2 M1_DDR_DQ13 DQU5 VSSQ_7 M1_DDR_DQ29 DQU5 VSSQ_7
V2 B8 G1 B8 G1
M1_DDR_DQS3 M1_DDR_DQS3 +1.5V_DDR +1.5V_DDR M1_DDR_DQ14 DQU6 VSSQ_8 M1_DDR_DQ30 DQU6 VSSQ_8
V1 A3 G9 A3 G9
M1_DDR_DQS_N3 M1_DDR_DQS_N3 M1_DDR_DQ15 DQU7 VSSQ_9 M1_DDR_DQ31 DQU7 VSSQ_9

K1 M1_0_VREFCA M1_1_VREFCA
M1_DDR_DM0 M1_DDR_DM0
G1 R511
M1_DDR_DM1 M1_DDR_DM1
W1 R504 2K
M1_DDR_DM2 M1_DDR_DM2
T1 2K 1%
M1_DDR_DM3 M1_DDR_DM3 1%
DDR_512MB_HYNIX_2133 DDR_512MB_HYNIX_2133
E2
M1_DDR_DQ0 M1_DDR_DQ0
M2
M1_DDR_DQ1 M1_DDR_DQ1
D3 R512
M1_DDR_DQ2 M1_DDR_DQ2 EAN64108201 EAN64086801 EAN64129301 EAN64108201 EAN64086801 EAN64129301
L3 R505 2K
M1_DDR_DQ3
D1
M1_DDR_DQ3
2K 1%
IC501-*1 IC501-*2 IC501-*3 IC502-*1 IC502-*2 IC502-*3
K4B4G1646E-BCNB H5TQ2G63GFR-TEC MT41J128M16JT-093:K K4B4G1646E-BCNB H5TQ2G63GFR-TEC MT41J128M16JT-093:K
M1_DDR_DQ4 M1_DDR_DQ4 1%
M1
M1_DDR_DQ5 M1_DDR_DQ5 N3 M8 N3 M8 N3 M8 N3 M8 N3 M8 N3 M8
D2 P7
A0 VREFCA
P7
A0 VREFCA
P7
A0 VREFCA
P7
A0 VREFCA
P7
A0 VREFCA
P7
A0 VREFCA

M1_DDR_DQ6 M1_DDR_DQ6 P3
A1
P3
A1
P3
A1
P3
A1
P3
A1
P3
A1
M3 N2
A2
H1 N2
A2
H1 N2
A2
H1 N2
A2
H1 N2
A2
H1 N2
A2
H1
M1_DDR_DQ7 M1_DDR_DQ7 P8
A3 VREFDQ
P8
A3 VREFDQ
P8
A3 VREFDQ
P8
A3 VREFDQ
P8
A3 VREFDQ
P8
A3 VREFDQ
L2 P2
A4
P2
A4
P2
A4
P2
A4
P2
A4
P2
A4

M1_DDR_DQ8 M1_DDR_DQ8 R8
A5
L8 R8
A5
L8 R8
A5
L8 R8
A5
L8 R8
A5
L8 R8
A5
L8
F2 R2
A6 ZQ
R2
A6 ZQ
R2
A6 ZQ
R2
A6 ZQ
R2
A6 ZQ
R2
A6 ZQ

M1_DDR_DQ9 M1_DDR_DQ9 T8
A7
T8
A7
T8
A7
T8
A7
T8
A7
T8
A7
K3 R3
A8
B2 R3
A8
B2 R3
A8
B2 R3
A8
B2 R3
A8
B2 R3
A8
B2
M1_DDR_DQ10 M1_DDR_DQ10 L7
A9 VDD_1
D9 L7
A9 VDD_1
D9 L7
A9 VDD_1
D9 L7
A9 VDD_1
D9 L7
A9 VDD_1
D9 L7
A9 VDD_1
D9
E3 R7
A10/AP VDD_2
G7 R7
A10/AP VDD_2
G7 R7
A10/AP VDD_2
G7 R7
A10/AP VDD_2
G7 R7
A10/AP VDD_2
G7 R7
A10/AP VDD_2
G7
M1_DDR_DQ11 M1_DDR_DQ11 N7
A11 VDD_3
K2 N7
A11 VDD_3
K2 N7
A11 VDD_3
K2 N7
A11 VDD_3
K2 N7
A11 VDD_3
K2 N7
A11 VDD_3
K2
J3 T3
A12/BC VDD_4
K8 T3
A12/BC VDD_4
K8 T3
A12/BC VDD_4
K8 T3
A12/BC VDD_4
K8 T3
A12/BC VDD_4
K8 T3
A12/BC VDD_4
K8
M1_DDR_DQ12 M1_DDR_DQ12 A13 VDD_5
N1 T7
A13 VDD_5
N1
A13 VDD_5
N1
A13 VDD_5
N1 T7
A13 VDD_5
N1
A13 VDD_5
N1
F1 M7
VDD_6
N9 M7
A14 VDD_6
N9 M7
VDD_6
N9 M7
VDD_6
N9 M7
A14 VDD_6
N9 M7
VDD_6
N9
M1_DDR_DQ13 M1_DDR_DQ13 NC_5 VDD_7
R1
NC_5 VDD_7
R1
NC_5 VDD_7
R1
NC_5 VDD_7
R1
NC_5 VDD_7
R1
NC_5 VDD_7
R1
K2 M2
VDD_8
R9 M2
VDD_8
R9 M2
VDD_8
R9 M2
VDD_8
R9 M2
VDD_8
R9 M2
VDD_8
R9
M1_DDR_DQ14 M1_DDR_DQ14 N8
BA0 VDD_9
N8
BA0 VDD_9
N8
BA0 VDD_9
N8
BA0 VDD_9
N8
BA0 VDD_9
N8
BA0 VDD_9
F3 M3
BA1
M3
BA1
M3
BA1
M3
BA1
M3
BA1
M3
BA1

M1_DDR_DQ15 M1_DDR_DQ15 BA2

A1
BA2
A1
BA2
A1
BA2
A1
BA2
A1
BA2
A1
P2 J7
VDDQ_1
A8 J7
VDDQ_1
A8 J7
VDDQ_1
A8 J7
VDDQ_1
A8 J7
VDDQ_1
A8 J7
VDDQ_1
A8
M1_DDR_DQ16 M1_DDR_DQ16 K7
CK VDDQ_2
C1 K7
CK VDDQ_2
C1 K7
CK VDDQ_2
C1 K7
CK VDDQ_2
C1 K7
CK VDDQ_2
C1 K7
CK VDDQ_2
C1
Y3 K9
CK VDDQ_3
C9 K9
CK VDDQ_3
C9 K9
CK VDDQ_3
C9 K9
CK VDDQ_3
C9 K9
CK VDDQ_3
C9 K9
CK VDDQ_3
C9
M1_DDR_DQ17 M1_DDR_DQ17 +1.5V_DDR +1.5V_DDR CKE VDDQ_4
D2
CKE VDDQ_4
D2
CKE VDDQ_4
D2
CKE VDDQ_4
D2
CKE VDDQ_4
D2
CKE VDDQ_4
D2
N3 L2
VDDQ_5
E9 L2
VDDQ_5
E9 L2
VDDQ_5
E9 L2
VDDQ_5
E9 L2
VDDQ_5
E9 L2
VDDQ_5
E9
M1_DDR_DQ18 M1_DDR_DQ18 K1
CS VDDQ_6
F1 K1
CS VDDQ_6
F1 K1
CS VDDQ_6
F1 K1
CS VDDQ_6
F1 K1
CS VDDQ_6
F1 K1
CS VDDQ_6
F1
AA2 J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2
M1_DDR_DQ19 M1_DDR_DQ19 K3
RAS VDDQ_8
H9 K3
RAS VDDQ_8
H9 K3
RAS VDDQ_8
H9 K3
RAS VDDQ_8
H9 K3
RAS VDDQ_8
H9 K3
RAS VDDQ_8
H9
N1 M1_1_VREFDQ L3
CAS VDDQ_9
L3
CAS VDDQ_9
L3
CAS VDDQ_9
L3
CAS VDDQ_9
L3
CAS VDDQ_9
L3
CAS VDDQ_9

M1_DDR_DQ20 M1_DDR_DQ20 M1_0_VREFDQ WE

J1
WE
J1
WE
J1
WE
J1
WE
J1
WE
J1
AA1 R513 T2
NC_1
J9 T2
NC_1
J9 T2
NC_1
J9 T2
NC_1
J9 T2
NC_1
J9 T2
NC_1
J9
M1_DDR_DQ21 M1_DDR_DQ21 R506 RESET NC_2
L1
RESET NC_2
L1
RESET NC_2
L1
RESET NC_2
L1
RESET NC_2
L1
RESET NC_2
L1
N2 2K
NC_3
L9
NC_3
L9
NC_3
L9
NC_3
L9
NC_3
L9
NC_3
L9
M1_DDR_DQ22 M1_DDR_DQ22 2K F3
NC_4
T7 F3
NC_4
F3
NC_4
T7 F3
NC_4
T7 F3
NC_4
F3
NC_4
T7
AA3 1% G3
DQSL NC_6
G3
DQSL
G3
LDQS NC_6
G3
DQSL NC_6
G3
DQSL
G3
LDQS NC_6

M1_DDR_DQ23 M1_DDR_DQ23 1% DQSL DQSL LDQS DQSL DQSL LDQS

Y2 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9
M1_DDR_DQ24 M1_DDR_DQ24 B7
DQSU VSS_1
B3 B7
DQSU VSS_1
B3 B7
UDQS VSS_1
B3 B7
DQSU VSS_1
B3 B7
DQSU VSS_1
B3 B7
UDQS VSS_1
B3
R2 DQSU VSS_2
E1
DQSU VSS_2
E1
UDQS VSS_2
E1
DQSU VSS_2
E1
DQSU VSS_2
E1
UDQS VSS_2
E1
M1_DDR_DQ25 M1_DDR_DQ25 E7
VSS_3
G8 E7
VSS_3
G8 E7
VSS_3
G8 E7
VSS_3
G8 E7
VSS_3
G8 E7
VSS_3
G8
W3 D3
DML VSS_4
J2 D3
DML VSS_4
J2 D3
LDM VSS_4
J2 D3
DML VSS_4
J2 D3
DML VSS_4
J2 D3
LDM VSS_4
J2
M1_DDR_DQ26 M1_DDR_DQ26 DMU VSS_5
J8
DMU VSS_5
J8
UDM VSS_5
J8
DMU VSS_5
J8
DMU VSS_5
J8
UDM VSS_5
J8
P3 E3
VSS_6
M1 E3
VSS_6
M1 E3
VSS_6
M1 E3
VSS_6
M1 E3
VSS_6
M1 E3
VSS_6
M1
M1_DDR_DQ27 M1_DDR_DQ27 R507 R514 F7
DQL0 VSS_7
M9 F7
DQL0 VSS_7
M9 F7
DQ0 VSS_7
M9 F7
DQL0 VSS_7
M9 F7
DQL0 VSS_7
M9 F7
DQ0 VSS_7
M9
V3 2K F2
DQL1 VSS_8
P1 F2
DQL1 VSS_8
P1 F2
DQ1 VSS_8
P1 F2
DQL1 VSS_8
P1 F2
DQL1 VSS_8
P1 F2
DQ1 VSS_8
P1
M1_DDR_DQ28 M1_DDR_DQ28 2K F8
DQL2 VSS_9
P9 F8
DQL2 VSS_9
P9 F8
DQ2 VSS_9
P9 F8
DQL2 VSS_9
P9 F8
DQL2 VSS_9
P9 F8
DQ2 VSS_9
P9
R1 1% 1% H3
DQL3 VSS_10
T1 H3
DQL3 VSS_10
T1 H3
DQ3 VSS_10
T1 H3
DQL3 VSS_10
T1 H3
DQL3 VSS_10
T1 H3
DQ3 VSS_10
T1
M1_DDR_DQ29 M1_DDR_DQ29 H8
DQL4 VSS_11
T9 H8
DQL4 VSS_11
T9 H8
DQ4 VSS_11
T9 H8
DQL4 VSS_11
T9 H8
DQL4 VSS_11
T9 H8
DQ4 VSS_11
T9
W2 G2
DQL5 VSS_12
G2
DQL5 VSS_12
G2
DQ5 VSS_12
G2
DQL5 VSS_12
G2
DQL5 VSS_12
G2
DQ5 VSS_12

M1_DDR_DQ30 M1_DDR_DQ30 H7
DQL6
H7
DQL6
H7
DQ6
H7
DQL6
H7
DQL6
H7
DQ6
R3 DQL7
B1
DQL7
B1
DQ7
B1
DQL7
B1
DQL7
B1
DQ7
B1
M1_DDR_DQ31 M1_DDR_DQ31 D7
VSSQ_1
B9 D7
VSSQ_1
B9 D7
VSSQ_1
B9 D7
VSSQ_1
B9 D7
VSSQ_1
B9 D7
VSSQ_1
B9
DQU0 VSSQ_2 DQU0 VSSQ_2 DQ8 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQ8 VSSQ_2
C3 D1 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1
DQU1 VSSQ_3 DQU1 VSSQ_3 DQ9 VSSQ_3 DQU1 VSSQ_3 DQU1 VSSQ_3 DQ9 VSSQ_3
C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8
C1 R501 240 C2
DQU2 VSSQ_4
E2 C2
DQU2 VSSQ_4
E2 C2
DQ10 VSSQ_4
E2 C2
DQU2 VSSQ_4
E2 C2
DQU2 VSSQ_4
E2 C2
DQ10 VSSQ_4
E2
M1_DDR_ZQCAL A7
DQU3 VSSQ_5
E8 A7
DQU3 VSSQ_5
E8 A7
DQ11 VSSQ_5
E8 A7
DQU3 VSSQ_5
E8 A7
DQU3 VSSQ_5
E8 A7
DQ11 VSSQ_5
E8
1% A2
DQU4 VSSQ_6
F9 A2
DQU4 VSSQ_6
F9 A2
DQ12 VSSQ_6
F9 A2
DQU4 VSSQ_6
F9 A2
DQU4 VSSQ_6
F9 A2
DQ12 VSSQ_6
F9
DQU5 VSSQ_7 DQU5 VSSQ_7 DQ13 VSSQ_7 DQU5 VSSQ_7 DQU5 VSSQ_7 DQ13 VSSQ_7
B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1
P5 DQU6 VSSQ_8 DQU6 VSSQ_8 DQ14 VSSQ_8 DQU6 VSSQ_8 DQU6 VSSQ_8 DQ14 VSSQ_8

M1_DDR_CS0 M1_DDR_CS0 A3
DQU7 VSSQ_9
G9 A3
DQU7 VSSQ_9
G9 A3
DQ15 VSSQ_9
G9 A3
DQU7 VSSQ_9
G9 A3
DQU7 VSSQ_9
G9 A3
DQ15 VSSQ_9
G9

Y4
M1_RET DDR_RET

DDR_512MB_SS_2133 DDR_256MB_HYNIX_2133 DDR_256MB_MICRON_2133 DDR_512MB_SS_2133 DDR_256MB_HYNIX_2133 DDR_256MB_MICRON_2133

Add CS signal for 2T Mode &

RET signal for Instant On

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2016.02.09
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M16 DDR3-M1 5 26

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
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PAGE 6
+0.9V AC Decoupling Cap IC101
DVDD09_DDR_C4TX
DVDD33 IC101 LGE1312(M16)
+0.9V_CORE
LGE1312(M16)
B3 R31
GND_1 GND_125
B22 T6
L21 V11 +0.9V_CORE B24
GND_2 GND_126
T8
DVDD33_IO_1 DVDD09_C4TX_1 GND_3 GND_127
L22 W11 C2 T11
DVDD33_IO_2 DVDD09_C4TX_2 GND_4 GND_128
L23 Y11 C601 C602 C605 C606 C607 C608 C22 T12
DVDD33_IO_3 DVDD09_C4TX_3 C609 C615 C616 GND_5 GND_129
W8 U11 4.7uF 4.7uF 4.7uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C23 T13
DVDD33_IO_4 DVDD09_C4TX_PLL 10V 10V 10V 16V 16V 16V 16V 16V 16V GND_6 GND_130
Y23 C24 T14
DVDD33_IO_5 GND_7 GND_131
AA23 N15 D20 T16
DVDD33_IO_6 DVDD09_CORE_1 GND_8 GND_132
AF13 N17 D21 T22
DVDD33_IO_7 DVDD09_CORE_2 GND_9 GND_133
AF14 N18 D27 T27
AVDD33_HDMI AF11
DVDD33_IO_8 DVDD09_CORE_3
P15 E4
GND_10 GND_134
U6
AVDD33_BTUSB DVDD09_CORE_4 GND_11 GND_135
AF19 P17 E20 U8
AVDD33_DMD_1 DVDD09_CORE_5 GND_12 GND_136
AF20 R15 E21 U12
AVDD33_DMD_2 DVDD09_CORE_6 GND_13 GND_137
AVDD33_AUDA
N23
AVDD33_USB DVDD09_CORE_7
R17
T15
DVDD09_DDR_C4TX E27
F6
GND_14 GND_138
U14
U16
DVDD09_CORE_8 GND_15 GND_139
R23 T17 F7 U18
T23
AVDD33_HDMI_1 DVDD09_CORE_9
U13 +0.9V_CPU +0.9V_DDR F8
GND_16 GND_140
U20
AVDD18_MIP AVDD33_HDMI_2 DVDD09_CORE_10
U15 F9
GND_17 GND_141
U22
DVDD09_CORE_11 GND_18 GND_142
AC17 U17 F10 U27
AVDD33_AUDA DVDD09_CORE_12 L601 GND_19 GND_143
U19 F11 V6
DVDD09_CORE_13 GND_20 GND_144
K26 U21 F13 V7
DVDD18_EMMC DVDD09_CORE_14 120-ohm GND_21 GND_145
AF21 V13 F14 V8
AVDD18_AFE3CH_1 DVDD09_CORE_15 C617 C619 C623 C626 C627 C628 C629 C681 GND_22 GND_146
AF22 V15 F15 V12
AVDD18_AFE3CH_2 DVDD09_CORE_16 4.7uF 4.7uF 0.1uF 0.1uF 4.7uF 0.1uF 0.1uF 1000pF GND_23 GND_147
V17 10V 10V 10V F16 V14
DVDD09_CORE_17 16V 16V 16V 16V 50V GND_24 GND_148
Y26 V19 F17 V16
AVDD18_APLL DVDD09_CORE_18 GND_25 GND_149
AF23 V21 F18 V18
AVDD18_PLL AF24
AVDD18_CVBS DVDD09_CORE_19
W13 F19
GND_26 GND_150
V20
AVDD18_DMD_1 DVDD09_CORE_20 GND_27 GND_151
AF25 W15 F20 V22
AVDD18_DMD_2 DVDD09_CORE_21 GND_28 GND_152
W17 F21 V23
DVDD09_CORE_22 GND_29 GND_153
L19 W19 F27 V26
AVDD18_AUAD H18
DVDD18_XTAL DVDD09_CORE_23
W21 G6
GND_30 GND_154
V27
AVDD18_CPUPLL DVDD09_CORE_24 GND_31 GND_155
M11 Y13 G7 W6
AVDD18_C4TX AVDD18_DDRPLL DVDD09_CORE_25
Y15 G17
GND_32 GND_156
W7
DVDD09_CORE_26 GND_33 GND_157
AC18
AVDD18_AUAD DVDD09_CORE_27
Y17
Y19
AVDD09_PLL DVDD09_USB AVDD09_MIP G18
G19
GND_34 GND_158
W12
W14
DVDD09_CORE_28 GND_35 GND_159
AC11 Y21 G20 W16
AVDD18_C4TX_1 DVDD09_CORE_29 GND_36 GND_160
AC12 AA13 G21 W18
AVDD18_HDMI AC13
AVDD18_C4TX_2 DVDD09_CORE_30
AA15 +0.9V_CORE +0.9V_CORE +0.9V_CORE G22
GND_37 GND_161
W20
AVDD18_C4TX_3 DVDD09_CORE_31 GND_38 GND_162
AB11 AA17 G23 W22
AVDD18_C4TX_PLL DVDD09_CORE_32 +0.9V_CPU L603 L604 L606 GND_39 GND_163
AA19 G24 W23
DVDD09_CORE_33 GND_40 GND_164
T26 AA21 G25 W26
AVDD18_HDMI_1 DVDD09_CORE_34 120-ohm 120-ohm 120-ohm GND_41 GND_165
U26 G26 W27
AVDD18_HDMI_2 C633 C634 C636 C638 C639 C640 GND_42 GND_166
P18 G27 Y5
DVDD09_CPU_1 4.7uF 0.1uF 0.1uF 0.1uF 0.1uF 4.7uF GND_43 GND_167
G8 P19 H6 Y8
DVDD15_M0_1 DVDD09_CPU_2 10V 16V 16V 16V 16V 10V GND_44 GND_168
G9 P20 H7 Y12
DVDD15_M0_2 DVDD09_CPU_3 GND_45 GND_169
G10 P21 H8 Y14
DVDD15_M0_3 DVDD09_CPU_4 GND_46 GND_170
G11 R18 H9 Y16
DVDD15_M0_4 DVDD09_CPU_5 GND_47 GND_171
+1.5V_DDR G12 R19 H10 Y18
DVDD15_M0_5 DVDD09_CPU_6 GND_48 GND_172
G13 R20 H11 Y20
DVDD15_M0_6 DVDD09_CPU_7 GND_49 GND_173
G14 R21 H12 Y22
DVDD15_M0_7 DVDD09_CPU_8 GND_50 GND_174
G15 T18 H13 Y27
G16
DVDD15_M0_8 DVDD09_CPU_9
T19 AVDD09_PLL H14
GND_51 GND_175
AA11
DVDD15_M0_9 DVDD09_CPU_10 GND_52 GND_176
J7 T20 H15 AA12
DVDD15_M1_1 DVDD09_CPU_11 GND_53 GND_177
K7 T21 H16 AA14
DVDD15_M1_2 DVDD09_CPU_12 DVDD09_DDR_C4TX GND_54 GND_178
L7 H17 AA16
DVDD15_M1_3 GND_55 GND_179
M7 L17 H19 AA18
+1.5V_DDR N7
DVDD15_M1_4 DVDD09_CPUPLL
L11 H20
GND_56 GND_180
AA20
+0.9V_CORE P7
DVDD15_M1_5 DVDD09_DDRPLL
L18 +3.3V AC Decoupling Cap H21
GND_57 GND_181
AA22
DVDD15_M1_6 DVDD09_XTAL GND_58 GND_182
R7 H22 AA26
DVDD09_USB T7
DVDD15_M1_7
N12 H24
GND_59 GND_183
AB3
AVDD09_HDMI U7
DVDD15_M1_8 DVDD09_DDR_1
N13 H25
GND_60 GND_184
AB4
DVDD15_M1_9 DVDD09_DDR_2 GND_61 GND_185
P13 H26 AB12
DVDD09_DDR_3 AVDD09_MIP GND_62 GND_186
P23 R13 H27 AB13
DVDD09_USB DVDD09_DDR_4 GND_63 GND_187
J6 AB14
GND_64 GND_188
J26
DVDD09_EMMC AVDD09_AFE3CH
AC20
AC22
DVDD33 AVDD33_AUDA J8
J27
GND_65 GND_189
AB15
AB16
AVDD09_APLL +1.8V_IO GND_66 GND_190
U23 AC21 K6 AB17
AVDD09_HDMI AVDD09_DMD
AC19 Q601
+3.3V_NORMAL +3.3V_NORMAL K8
GND_67 GND_191
AB18
AVDD09_LLPLL GND_68 GND_192
SSM3J332R K27 AB19
L607 GND_69
H23 L608 Close to SOC Side GND_193
D

BLM18PG121SN1D L6 AB20
S

SP_VQPS GND_70 GND_194

L8 AB21
BLM18PG121SN1D GND_71 GND_195
R602 L12 AB22
GND_72 GND_196
G

10K C641 C644 C645 C646 C647 C693 C694 C695 L13 AB23
R601 C692
4.7K 4.7uF 0.1uF 0.1uF 0.1uF 0.1uF 22uF 0.1uF 0.1uF 0.1uF GND_73 GND_197
R607 22 L14 AB26
10V 16V 16V 16V 16V 10V
+1.5V_DDR OTP_WRITE 16V 16V 16V L15
GND_74 GND_198
AC14
GND_75 GND_199
L16 AC15
GND_76 GND_200
L20 AC16
GND_77 GND_201
L26 AC23
GND_78 GND_202
L27 AC26
GND_79 GND_203
M6 AD26
C664 C665 C666 C667 C668 C669 C671 C673 C675 C676 C679 C680 C682 C684 C686 C688 C689 C690 C691 C699 C697 C698 GND_80 GND_204
M8 AE4
10uF 10uF 10uF 10uF 0.01uF 0.1uF 0.01uF 0.01uF 0.1uF 0.1uF 0.01uF 0.1uF 0.1uF 0.1uF 0.01uF 0.01uF 0.1uF 0.01uF 0.01uF 0.01uF 0.1uF 0.1uF GND_81 GND_205
M12 AE26
10V 10V 10V 10V 50V 16V 50V 50V 16V 16V 50V 16V 16V 16V 50V 50V 16V 50V 50V 50V 16V 16V GND_82 GND_206
M13 AF8
GND_83 GND_207
M14 AF9
GND_84 GND_208
M15 AF10
GND_85 GND_209
M16 AF12
GND_86 GND_210
M17 AF15
GND_87 GND_211
HDMI POWER CONTROL +1.5V +1.8V AC Decoupling Cap M18
GND_88 GND_212
AF16
M19 AF17

AVDD33_HDMI AC Decoupling Cap M20

GND_89 GND_213
AF18
GND_90 GND_214
M21 AF26
GND_91 GND_215
M22 AF27
+0.9V_CORE +3.3V_NORMAL M23
GND_92 GND_216
AG8
GND_93 GND_217
M26 AG9
GND_94 GND_218
AVDD18_MIP AVDD18_C4TX M27
GND_95 GND_219
AG10

AVDD09_HDMI +1.5V_DDR
M31
N8
GND_96 GND_220
AG11
AG12

Q604
+1.8V_IO +1.8V_IO N11
GND_97 GND_221
AG13
GND_98 GND_222
SSM3K324R L609 L610 N14 AG14
L613 L615 GND_99 GND_223
BLM18PG121SN1D BLM18PG121SN1D N16 AG15
D

PANEL_VCC GND_100 GND_224

N19 AG16
120-ohm 120-ohm GND_101 GND_225
N20 AG17
C661 C662 C663 C670 C635 C637 GND_102 GND_226
N21 AG18
G

C672 C683 C677 C685 4.7uF 4.7uF 4.7uF C649 C696 C652 C653 C654 C655 C656 C657
0.1uF 0.1uF 0.01uF GND_103 GND_227
R605

10uF 0.1uF 10uF 0.1uF 10V 10V 10V 4.7uF 10uF 0.1uF 0.1uF 0.1uF 4.7uF 0.1uF 1000pF N22 AG19
10K

16V 16V 50V GND_104 GND_228

10V 16V 10V 16V 10V 10V 16V 16V 16V 10V 16V 50V N26 AG20
GND_105 GND_229
N27 AG21
GND_106 GND_230
P6 AG22
GND_107 GND_231
P8 AG23
GND_108 GND_232
P11 AG24
GND_109 GND_233
+1.8V_IO P12
P14
GND_110 GND_234
AG25
AG26
GND_111 GND_235
P16 AG27
AVDD18_HDMI AVDD18_PLL AVDD18_AUAD P22
GND_112 GND_236
AH27
GND_113 GND_237
+1.5V_DDR P26
GND_114 GND_238
AL14

+1.8V_IO +1.8V_IO P27

R6
GND_115 GND_239
AL16
AL17
GND_116 GND_240
L614 L611 L612 R8 AL19
GND_117 GND_241
R11 AL22
GND_118 GND_242
120-ohm 120-ohm 120-ohm R12 AL23
GND_119 GND_243
R14 AL26
C630 C631 C632 C642 C643 C648 C650 GND_120 GND_244
C674 C687 C658 C659 C678 C660 R16 AL31
0.1uF 0.01uF 0.1uF 0.1uF 0.01uF 0.1uF 0.01uF
10uF 0.1uF 4.7uF 0.1uF 4.7uF 0.1uF GND_121 GND_245
16V 50V 16V 16V 50V 16V 50V R22 AM7
10V 16V 10V 16V 10V 16V GND_122 GND_246
R26
GND_123
R27 AL20
GND_124 AVSS18_AUAD_REF

AVSS18_AUAD_REF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.02.16
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. VCC & GND 6 27

CI_IN_TS_DATA[0-7] TPO_DATA[0-7]
AR706 33
CI_IN_TS_DATA[0] CI TPO_DATA[0]
CI_IN_TS_DATA[1] TPO_DATA[1]
CI_IN_TS_DATA[2] TPO_DATA[2]
CI_IN_TS_DATA[3] TPO_DATA[3]
C701 C702 C703
0.1uF 10uF 0.1uF CI_IN_TS_DATA[4] TPO_DATA[4]
16V 10V 16V CI_IN_TS_DATA[5] TPO_DATA[5]
CI_IN_TS_DATA[0-7] CI CI CI CI_DATA[0-7]
CI_IN_TS_DATA[6] TPO_DATA[6]
CI_IN_TS_DATA[7] TPO_DATA[7]
33
AR707 CI
/PCM_CE1
#.35. GND GND. #. 1
R704 100 CI CI_DATA[3]
/CI_CD1 /CI_CD1_JACK #.36 #. 2 CI_DATA[3] /PCM_OE
CI_DATA[4]
CI_TS_DATA[3] CI_TS_DATA[3] #.37 #. 3 CI_DATA[4]
CI_DATA[5]
CI_TS_DATA[4] CI_TS_DATA[4] #.38 #. 4 CI_DATA[5]
CI_DATA[6] CI_DATA[0-7] EB_DATA[0-7]
CI_TS_DATA[5] CI_TS_DATA[5] #.39 #. 5 CI_DATA[6]
CI_DATA[7]
CI_TS_DATA[6] CI_TS_DATA[6] #.40 #. 6 CI_DATA[7]
R709 33 CI AR708 33
CI_TS_DATA[7] CI_TS_DATA[7] #.41 #. 7 /PCM_CE1_JACK CI_DATA[0] CI EB_DATA[0]
/PCM_CE2 /PCM_CE2 #.42 #. 8 CI_ADDR[10] CI_ADDR[10] CI_DATA[1] EB_DATA[1]
#.43. NC #. 9 /PCM_OE +5V_CI_ON CI_DATA[2] EB_DATA[2]
/PCM_IORD /PCM_IORD #.44 #.10 CI_ADDR[11] CI_ADDR[11] CI_DATA[3] EB_DATA[3]
/PCM_IOWR /PCM_IOWR #.45 #.11 CI_ADDR[9] CI_ADDR[9] CI_DATA[4] EB_DATA[4]
CI_IN_TS_SYNC #.46 #.12 CI_ADDR[8] CI_ADDR[8] CI_DATA[5] EB_DATA[5]
CI_IN_TS_DATA[0] R711
CI_IN_TS_DATA[0] #.47 #.13 CI_ADDR[13] CI_ADDR[13] 10K CI_DATA[6] EB_DATA[6]
CI_IN_TS_DATA[1]
CI_IN_TS_DATA[1] #.48 #.14 CI_ADDR[14] CI_ADDR[14] CI CI_DATA[7] EB_DATA[7]
CI_IN_TS_DATA[2]
CI_IN_TS_DATA[2] #.49 #.15 /PCM_WE /PCM_WE 33
CI_IN_TS_DATA[3] R710 33 OPT AR709 CI
CI_IN_TS_DATA[3] #.50 #.16 /PCM_IRQA_JACK /PCM_IRQA
+5V_CI_ON
#.51. 5V_CI_ON 5V_CI_ON. #.17
C706
#.52. NC NC. #.18 0.1uF
CI_IN_TS_DATA[4]
CI_IN_TS_DATA[4] #.53 #.19 CI_IN_TS_VAL 16V
CI_IN_TS_DATA[5] CI
R703 CI_IN_TS_DATA[5] #.54 #.20 CI_IN_TS_CLK
10K CI_IN_TS_DATA[6]
CI_IN_TS_DATA[6] #.55 #.21 CI_ADDR[12] CI_ADDR[12]
CI CI_IN_TS_DATA[7]
CI_IN_TS_DATA[7] #.56 #.22 CI_ADDR[7] CI_ADDR[7]
CI_TS_CLK CI_TS_CLK #.57 #.23 CI_ADDR[6] CI_ADDR[6]
R700 33 CI AR700
PCM_RESET PCM_RESET_JACK #.58 #.24 CI_ADDR[5] CI_ADDR[5] 33 CI
R701 33 CI CI_IN_TS_CLK TPO_CLK
/PCM_WAIT /PCM_WAIT_JACK #.59 #.25 CI_ADDR[4] CI_ADDR[4]
R702 33 OPT +5V_NORMAL CI_IN_TS_SYNC TPO_SOP
PCM_INPACK PCM_INPACK_JACK #.60 #.26 CI_ADDR[3] CI_ADDR[3]
CI_IN_TS_VAL TPO_VAL
/PCM_REG /PCM_REG #.61 #.27 CI_ADDR[2] CI_ADDR[2]
CI_TS_VAL CI_TS_VAL #.62 #.28 CI_ADDR[1] CI_ADDR[1]
CI_TS_SYNC CI_TS_SYNC #.63 #.29 CI_ADDR[0] CI_ADDR[0]
CI_DATA[0] R712 R713
CI_TS_DATA[0] CI_TS_DATA[0] #.64 #.30 CI_DATA[0] 10K 10K
CI_DATA[1]
CI_TS_DATA[1] CI_TS_DATA[1] #.65 #.31 CI_DATA[1] AR701
CI_DATA[2] 100 CI
CI_TS_DATA[2] CI_TS_DATA[2] #.66 #.32 CI_DATA[2] /PCM_WAIT CAM_WAIT_N
R705 100 CI
/CI_CD2 /CI_CD2_JACK #.67 NC. #.33 /PCM_IRQA CAM_IREQ_N
#.68. GND GND. #.34 /CI_CD2 CAM_CD2_N
PCM_INPACK /CI_CD1 CAM_CD1_N
#.G2. GND #.69. GND GND. #.G1
/PCM_CE2 C707 C708
0.1uF 0.1uF
16V 16V AR702
CI CI 100 CI
PCM_INPACK CAM_INPACK_N
CI_IN_TS_VAL
CI_TS_CLK TPI_CLK
CI_IN_TS_CLK CI_TS_DATA[1] TPI_DATA[1]
CI_IN_TS_SYNC
CI_TS_SYNC TPI_SOP C709
12pF
50V
C705 OPT
12pF
50V AR703
OPT 100 CI
CI_TS_DATA[3] TPI_DATA[3]
CI_TS_DATA[0] TPI_DATA[0]
CI_TS_DATA[2] TPI_DATA[2]
CI_TS_VAL TPI_VAL

AR704
100 CI
CI_TS_DATA[7] TPI_DATA[7]
CI_TS_DATA[6] TPI_DATA[6]
CI_TS_DATA[5] TPI_DATA[5]
CI_TS_DATA[4] TPI_DATA[4]

AR710
33 CI
CI_ADDR[0] EB_ADDR[0]

CI POWER ENABLE CONTROL CI_ADDR[2]

CI_ADDR[1]
CI_ADDR[3]
EB_ADDR[2]
EB_ADDR[1]
EB_ADDR[3]

AR711
33 CI
CI_ADDR[4] EB_ADDR[4]
CI_ADDR[5] EB_ADDR[5]
CI_ADDR[6] EB_ADDR[6]
CI_ADDR[7] EB_ADDR[7]
IC701
EAN64130101
+5V_NORMAL AP2151AW +5V_CI_ON
AR712
33 CI
CI_ADDR[8] EB_ADDR[8]
CI_ADDR[9] EB_ADDR[9]
IN OUT CI_ADDR[11] EB_ADDR[11]
5 1
CI_ADDR[10] EB_ADDR[10]
C700 CI
0.1uF GND
16V 2
CI C704 R708
1uF 4.7K AR713
R707 100 EN FLG 25V CI 33 CI
PCM_5V_CTL 4 3
CI CI_ADDR[12] EB_ADDR[12]
CI
CI_ADDR[13] EB_ADDR[13]
R706 CI_ADDR[14] EB_ADDR[14]
10K /PCM_REG CAM_REG_N
CI

AR705
33 CI
/PCM_OE EB_OE_N
/PCM_WE EB_WE_N
/PCM_IORD EB_BE_N1
/PCM_IOWR EB_BE_N0

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
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PAGE 8

CI CAM
CI Slot
LONG : EAG63217207
SHORT : EAG63217208

CI_SLOT_FCI
CI_IN_TS_DATA[0-7] JK800 CI_DATA[0-7]
EAG63217207
10125901-015LF

35 1 /PCM_CE1_JACK
36 2 CI_DATA[3]
/CI_CD1_JACK /PCM_OE
37 3 CI_DATA[4]
CI_TS_DATA[3]
38 4 CI_DATA[5]
CI_TS_DATA[4]
39 5 CI_DATA[6]
CI_TS_DATA[5]
40 6 CI_DATA[7]
CI_TS_DATA[6]
CI_TS_DATA[7] 41 7
/PCM_CE2 42 8 CI_ADDR[10]
43 9
/PCM_IORD 44 10 CI_ADDR[11]
/PCM_IOWR 45 11 CI_ADDR[9]
46 12 CI_ADDR[8]
CI_IN_TS_DATA[0] 47 13 CI_ADDR[13]
CI_IN_TS_DATA[1] 48 14 CI_ADDR[14]
CI_IN_TS_DATA[2] 49 15 /PCM_WE
CI_IN_TS_DATA[3] 50 16 /PCM_IRQA_JACK
+5V_CI_ON 51 17 +5V_CI_ON
52 18
CI_IN_TS_DATA[4] 53 19
CI_IN_TS_DATA[5] 54 20
CI_IN_TS_DATA[6] 55 21 CI_ADDR[12]
CI_IN_TS_DATA[7] 56 22 CI_ADDR[7]
CI_TS_CLK 57 23 CI_ADDR[6]
PCM_RESET_JACK 58 24 CI_ADDR[5]
/PCM_WAIT_JACK 59 25 CI_ADDR[4]
PCM_INPACK_JACK 60 26 CI_ADDR[3]
/PCM_REG 61 27 CI_ADDR[2]
CI_TS_VAL 62 28 CI_ADDR[1]
CI_TS_SYNC 63 29 CI_ADDR[0]
64 30 CI_DATA[0]
CI_TS_DATA[0]
65 31 CI_DATA[1]
CI_TS_DATA[1]
66 32 CI_DATA[2]
CI_TS_DATA[2]
/CI_CD2_JACK 67 33
68 34

PCM_INPACK G2 69 G1

/PCM_CE2

CI_IN_TS_VAL
CI_IN_TS_CLK
CI_IN_TS_SYNC

CI_SLOT_DEV
JK800-*1
10125901-015LF

1 35
2 36
3 37
4 38
5 39
6 40
7 41
8 42
9 43
10 44
11 45
12 46
13 47
14 48
15 49
16 50
17 51
18 52
19 53
20 54
21 55
22 56
23 57
24 58
25 59
26 60
27 61
28 62
29 63
30 64
31 65
32 66
33 67
34 68

G1 69 G2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

L1005
UBW2012-121F

13V = 12V
PWM_DIM

A13V

L1003
P1000 UBW2012-121F
SMAW200-H24S5
+13V UBW2012-121F
PTVS13VS1UR

L1004
+3.5V_ST L1001 C1005 C1006C1007
UBW2012-121F
0.1uF 10uF 0.1uF
L1000 GND 1 2 GND 50V 35V 50V
D1000

23.2V

UBW2012-121F +3.5V_ST
UBW2012-121F C1002 24V 24V
L1002 3 4
0.1uF 24V 24V
5 6
50V
GND 12V_ON
ZD1000

ZD1001

ZD1002

ZD1003

C1000 ZD1004 7 8 R1010

0.1uF 5V 12V 9 10 GND 1K

16V 12V 12V R1007
11 12 100
12V 13 14 12V
GND GND PANEL_CTL
15 16
3.5V_DIODE

3.5V_DIODE

12V_ON, PANEL_CTL IS FOR OLED QSM

3.5V_DIODE

+3.3V_NORMAL 3.5V 3.5V

17 18
R1004 3.5V 19 20 GND
PWM_DIM 0 PDIM#1 PDIM#2 0 R1006
21 22
OLED_AC_DET
UHD_LCD PWR ON INV CTL
OPT
10K
R1001

23 24 PD_OLED_AC
PD_OLED_AC
R1009
25 100K
GND

1%
R1000
100
MMBT3906(NXP)
10K
R1011

+3.5V_ST +3.3V_NORMAL

R1008
1K
10K
R1003

JP-BLOCK-3POWER
1

3.5V

GND

12V

24V

R1002 R1005
INV_CTL
Q1001

RL_ON 10K 100

JP1007
2

+13V

C1001 C1003 C1004

10uF 10uF 10uF
16V 16V 16V

For Protecting flowing different current

Because of each Bead’s DCR

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
OWER WAFER OLED

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
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OLED_Power_DET

+3.5V_ST
+13V PD_12V/3.5V
+3.5V_ST
R1307
100K
PD_+12V PD_+3.5V EAN62945801
R1300 R1305 R1309
14K 0 IC1302 10K
1% 5% BD48K28G OPT
PD_12V/3.5V
VDD 3 2 VOUT POWER_DET
C1302 1
PD_+12V 0.1uF GND
R1301 16V
5.1K PD_12V/3.5V C1303
1% 0.1uF
16V

not to RESET
at 8kV ESD

PD_24V
A13V R1306
100K

PD_24V_ROHM
PD_24V IC1300
PD_UHD_24V
R1302-*1 R1302 BD48K28G
9.1K 8.2K
1% 1%
VDD 3 2 VOUT

PD_24V
1 24V-->3.48V
C1300
PD_UHD_24V
R1303-*1 R1303 0.1uF GND 20V-->3.51V
1.6K 1.5K 16V
1% 1%
PD_24V 12V-->3.58V
OLED_AC_DET
ST_3.5V-->3.5V
R1308
100K

IC1301
BD48K28G
R1304
100 VDD VOUT
OLED_AC_DET 3 2
1/16W 1
5%
C1301 GND
0.1uF
16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
M16
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
6
13
THE CRITICAL COMPONENTS IN THE
OLED Power_DET SYMBOL MARK OF THE SCHEMETIC.
15/06/01

+3.3V_NORMAL
L1400 IC1400
BLM18PG121SN1D
BD86106EFJ [EP]

L1401
PGND SW_2 2.2uH
1 8
THERMAL

PS064T-2R2MS
VIN SW_1
9

C1400 C1401 2 7
10uF C1404 C1405 C1406 C1407 ZD1400
25V 0.1uF 10uF 10uF 10uF 10uF 5V
50V 10V 10V 10V R1403
AGND EN R1402 10V
3 6 1.2K
1%
10K C1403 R1
R1404
FB
4 6A 5
COMP 0.1uF
16V 7.5K
1%
OPT

R1405
C1402 R1401 2.7K R2
1%
1500pF 10K
50V

Vout=0.8*(1+R1/R2)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
2015.06.02
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
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PAGE 15

+1.5V DDR
+3.5V_ST
R1500

POWER_ON/OFF2_4
10K

OPT
C1502
0.1uF
16V
+1.5V_DDR
C1503
0.1uF
[EP]FIN

BLM18PG121SN1D 16V
AVIN

BOOT

L1500
PGD
EN

VLS5045EXT-2R2N
L1501
16

2.2uH
PVIN_1 1 12 SW_3
THERMAL
PVIN_2 SW_2
ESD_READY

C1500 C1501 2 17 11
ZD1500

10uF 0.1uF EAN62870501 C1506 C1507 C1508 C1509

2.5V

PGND_1 3 IC1500 10 SW_1 10uF 10uF

10V 16V 10uF 10uF
BD9A300MUV C1504 10V 10V 10V 10V
PGND_2 4 9 SS

3A 0.01uF
5

+3.5V_ST
1%
1/16W

16K
R1503

50V

R1
AGND

ITH

MODE

R1502 R1505
330K

OPT
330K

R1501 C1505
8.2K 1% 2700pF
1%
1/16W

18K
R1504

Vout=0.8*(1+R1/R2)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.06.03
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M16 UHD-mid Power 15 100

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
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PAGE 16

+13V +5V_NORMAL
POWER_ON/OFF1
IC1600
BD86106EFJ [EP]

L1600 L1601
BLM18PG121SN1D PGND SW_2 4.7uH
1 8
THERMAL

ESD_READY
C1604 C1605 C1606 C1607 C1608 ZD1600
VIN SW_1
9

2 7 10uF 10uF 10uF 10uF 10uF 5V

10V 10V 10V
R1603

10V 10V
C1600 C1601
18K

R1601
1%

10uF 0.1uF
50V
AGND EN 10K R1
25V 3 6

C1603
FB COMP 0.0068uF
4 5

6A 50V
R1602

R2
3.3K
1%

C1602 R1600

1500pF 20K
50V

Vout=0.8*(1+R1/R2)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
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PAGE 18

+13V
+1.8V_IO
+1.8V_IO
L1800

IC1800
RT7295CG6F
C1803
VLS5045EXT-2R2N
0.47uF L1801
C1801 C1802 50V BOOT SW 2.2uH
10uF 1 6
25V 0.1uF
50V
ESD_READY

GND VIN
ZD1800

C1805 C1806 C1807 C1808 OPT

2 5
2.5V

10uF 10uF 10uF 10uF C1809

10K 10V 10V 10V 10V
33pF
FB EN R1800 50V
3 4

3.5A
1%
1/16W

20K
R1801

OPT POWER_ON/OFF1
C1804
0.1uF R1
16V
1%
1/16W

10K
R1802

Vout=0.6*(1+R1/R2)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
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+0.9V_CORE MAX 7A

R2-3

R2011
430K
POWER_ON/OFF2_3
1%
+3.3V_NORMAL
R2012
270K
5%
1/16W 1/16W

R2005 R2004

C2011
R1 1%
0

0.1uF
OPT
T2N7002AK

16V R2015
1%

39K

10K
Q2001

D
R2014
G
CORE_VID[1]
0
R2003

C2010 S
0.1uF R2017
1K

OPT
16V 10K
1%
1/16W

39K

+0.9V_CORE R2-2
R2006

R2
[EP]GND

REFIN2
REFIN

R2008
VREF

150K
EN

GSNS 1%
+3.3V_NORMAL
28

R2009
PGOOD_1 GSNS debugging point
1 23 180K
THERMAL R2007 1%
LP# 2 29 22 VSNS
OPT
T2N7002AK

0 R2013
MODE 3 21 SLEW 10K
Q2000

+0.9V_CORE IC2000 C2012 +5V_NORMAL

D
R2010
NC TRIP G
C2009 R2002 4
TPS51362RVER
20 0.01uF CORE_VID[0]
25V 4.7 50V 0
BST 5 19 GND
C2015 S
LPBN8050T-1R0N 5%
0.1uF SW_1 V5 2.2uF
L2000 6 18 R2016
1.0uH 10V
+13V 10K
SW_2 7 17 VIN_1
C2002 10uF 10V

C2003 10uF 10V

C2004 10uF 10V

C2005 10uF 10V

C2000 10uF 10V

C2001 10uF 10V

SW_3 8 16 VIN_2
ESD_READY

R2001

L2001
ZD2000

1/8W
2.5V

SW_4 VIN_3
3.3
OPT

9 15
5%

C2013 C2014
10

10uF 10uF
OPT 25V 25V
PGND_5

PGND_4

PGND_3

PGND_2

PGND_1

C2008
470pF
50V

R2000
GSNS
0
Vout=2*R2/(R1+R2)

R1:39K/R2:39K, V=1.0V(CORE_VID0=L,CORE_VID1=L) VHV_CORE

R1:39K/R2:39K//660K, V=0.9713V(CORE_VID0=L,CORE_VID1=H) VH_CORE
R1:39K/R2:39K//330K, V=0.9442V(CORE_VID0=H,CORE_VID1=L) MV_CORE
R1:39K/R2:37K//660K//330K, V=0.9185V(CORE_VID0=H,CORE_VID1=H) LV_CORE

CORE_VID TABLE

CORE_VID0 CORE_VID1 VOUT R2

L L 1.0V 39 kohm

L H 0.9713V 36.94 kohm

H L 0.9442V 34.87 kohm

H H 0.9185V 33.22 kohm

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES 020.sht

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 15/06/13
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M16_0.9V Core 19 73

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
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+0.9V_CPU MAX 2.7A

+13V

L2100
BLM18PG121SN1D

Placed on SMD-TOP
+0.9V_CPU
IC2100
RT7295CG6F
C2100 C2101 C2102
10uF 0.1uF VLS5045EXT-2R2N
0.47uF L2101
25V 25V 50V BOOT SW 2.2uH
1 6
ESD_READY

GND VIN
ZD2100

C2104 C2105 C2106 C2107 OPT

2 5
2.5V

10uF 10uF 10uF 10uF C2108

10K 10V 10V 10V 10V
33pF
FB EN R2104 50V
3 4

POWER_ON/OFF2_3 R2109
C2103 9.1K
0.1uF 1%
16V
3.5A R1
5%
1/16W

R2110

R2-2 R2-3
0

R2-1
R2102 R2107
0 30K
1%
1/16W

18K
R2111

5% 1%

+3.3V_NORMAL R2103 +3.3V_NORMAL R2108

120K 180K
1% 1%
T2N7002AK

R2100
T2N7002AK

R2105
10K 10K
Q2100

Q2101

D D
R2101 R2106
G G
CPU_VID[0] CPU_VID[1]
0 0
S S

Vout=0.6*(1+R1/R2)
R1:9.1K/R2:18K, V=0.9033V(CPU_VID0=L,CPU_VID1=L) LV_CPU
R1:9.1K/R2:18K//210K, V=0.9293V(CPU_VID0=L,CPU_VID1=H) MV_CPU
R1:9.1K/R2:18K//120K, V=0.9488V(CPU_VID0=H,CPU_VID1=L) LV_CPU
R1:9.1K/R2:18K//210K//120K, V=0.9748V(CPU_VID0=H,CPU_VID1=H) VHV_CPU

CPU_VID TABLE

CPU_VID0 CPU_VID1 VOUT R2

L L 0.9033V 18 kohm

L H 0.9293V 16.57 kohm

H L 0.9488V 15.65 kohm

H H 0.9743V 14.56 kohm

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES 021.sht

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
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+0.9V DDR & C4TX

POWER_ON/OFF2_3
IC2200
TJ2132GDP [EP]GND
R1
8.2K

+1.8V_IO +0.9V_DDR
1%

R2201

POK GND
1 8
THERMAL

EN FB
9

2 7 R2
C2202
1%

5.1K
R2202

R2200
L2200 0.01uF
+5V_NORMAL 10K IN
3 6
OUT 50V
ESD_READY
ZD2200
2.5V

BIAS SS C2204 C2205

4 5
2A 10uF
10V
0.1uF
16V
C2203
2700pF
50V
C2200 C2201
10uF 10uF
10V 10V

Vout=0.6*(1+R2/R1)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES 022.sht

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 15/09/24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR M16_0.9V DDR & C4TX 21 73
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

50V
18pF
C3003-*1
50V
15pF
C3004-*1
MICOM_XTAL_EPSON_LoadCap_OLED_E6
50V
18pF
C3003-*3
50V
15pF
C3004-*3
PAGE 11
MICOM_XTAL_KDS_LoadCap_Default
50V 50V MICOM_XTAL_KDS_LoadCap_OLED_E6
8pF 8pF
R3017 50V 50V
C3003 C3004

MICOM_DEBUG
1K

10pF 12pF
For Debug

MICOM_RESET
C3003-*2 C3004-*2
MICOM_XTAL_EPSON MICOM_XTAL_KDS
X3001-*1 X3001
R3023 33

LED_R
RETENTION_DISABLE
32.768KHz 32.768KHz +3.5V_ST
R3018

+3.5V_ST 4.7M
OPT

POWER_DET_1

10K
DEBUG_MICOM
T_CON_SYS_POWER_OFF
P3000

R3020
MICOM_RESET_SW
R3004 T_CON_SYS_POWER_OFF TP3003
DEBUG_MICOM

12507WS-04L SW3001
10K
R3014 10K

JTP-1127WEM
MODE_SELECT(PWM1) MODE_SELECT
1K

Don’t remove R3016, MODE_SELECT 2 1

R3021

270K
OPT
C3005
R3016

not making float P40

P124/XT2/EXCLKS

C3006
0.47uF

1 0.1uF
0.1uF

2.2uF 4 3
16V
R3019

10V
P122/X2/EXCLK

P41/TI07/TO07
MODE_SELECT
2
MICOM_DEBUG
C3002
C3001

+3.5V_ST
P137/INTP0

P120/ANI19
P40/TOOL0

3
P123/XT1
P121/X1

WIFI_EN
4
MICOM_RESET
RESET
REGC

5
VDD
VSS
48
47
46
45
44
43
42
41
40
39
38
37

P60/SCLA0 1 36 P140/PCLBUZ0/INTP6 RL_ON

I2C_SCL1
P61/SDAA0 2 35 P00/TI00/TXD1 R3022 33
I2C_SDA1 INSTANT_BOOT
P62 3 34 P01/TO00/RXD1
3D&L_DIM_EN POWER_ON/OFF2_4
P63 IC3000 P130
+3.5V_ST INV_CTL 4 33 POWER_ON/OFF2_1
M16/F16 Power SEQUENCE MODE_SELECT(PWM1)
P31/TI03/TO03/INTP4 5 EAN62632101 32 P20/ANI0/AVREFP
KEY2
P75/KR5/INTP9/SCK01/SCL01 6 R5F100GEAFB#30 31 P21/ANI1/AVREFM
IR KEY1
POWER_ON/OFF1 R3011
100 P74/KR4/INTP8/SI01/SDA01 7 30 P22/ANI2
HDMI_CEC MODEL1_OPT_0
P73/KR3/SO01 P23/ANI3
AR3001
3.3K
1/16W

POWER_ON/OFF2_2 8 29 MODEL1_OPT_1
POWER_ON/OFF2_3 P72/KR2/SO21 9 28 P24/ANI4
POWER_ON/OFF2_3 MODEL1_OPT_2
P71/KR1/SI21/SDA21 10 27 P25/ANI5
EYE_SDA MODEL1_OPT_3
P70/KR0/SCK21/SCL21 11 26 P26/ANI6
POWER_ON/OFF2_4 EYE_SCL SIDE_HP_MUTE
P30/INTP3/RTC1HZ/SCK11/SCL11 12 25 P27/ANI7
WOL/WIFI_POWER_ON BT_WAKEUP_ON/OFF
13
14
15
16
17
18
19
20
21
22
23
24

POWER_ON/OFF2_1 BT_WAKEUP_ON/OFF TP3002

P50/INTP1/SI11/SDA11
P51/INTP2/SO11
P17/TI02/TO02
P16/TI01/TO01/INTP5
P15/PCLBUZ1/SCK20/SCL20
P14/RXD2/SI20/SDA20
P13/TXD2/SO20
P12/SO00/TXD0/TOOLTXD
P11/SI00/RXD0/TOOLRXD/SDA00
P10/SCK00/SCL00
P146
P147/ANI18

POWER_ON/OFF2_3

SOC_RESET
BT_WAKEUP

MICOM MODEL OPTION

TP3001

MODEL_OPT_3
MODEL_OPT_0 MODEL_OPT_1 MODEL_OPT_2
WOL/ETH_POWER_ON

POWER_DET

POWER_ON/OFF1

BT_WAKEUP

WOL_CTL

SOC_RESET

SOC_TX

SOC_RX

AMP_MUTE

EDID_WP

F16_RESET_MICOM
PANEL_CTL

+3.5V_ST FHD UHD/8K

NON LOGO/LCD TV-NON EPI FHD M16 M16

00 (0.72V) R3003-*1 R3006-*1 R3008-*1 R3010-*1
R3002 R3005 R3007 R3009 2.7K 2.7K 2.7K 2.7K
10K 10K 10K 10K
MICOM_NON_LOGO_LCD MICOM_TV_NONEPI MICOM_FHD MICOM_M16

MODEL1_OPT_0
LOGO/LCD BOX - - RTK
MODEL1_OPT_1 01 (1.53V) R3003-*2 R3006-*2 R3008-*2 R3010-*2
8.2K 8.2K 8.2K 8.2K For HDMI CEC
MODEL1_OPT_2 MICOM_LOGO_LCD MICOM_BOX_EYE_Sensor NOT USE MICOM_RTK (Consumer Electronic Control)
MODEL1_OPT_3 +3.5V_ST
NON LOGO/OLED TV-EPI UHD A5LR H15
R3003 R3006 R3008 R3010 10 (2.27V) R3003-*3 R3006-*3 R3008-*3 R3010-*3
2.7K 2.7K 2.7K 2.7K 20K 20K 20K 20K
OPT OPT OPT OPT
MICOM_NONLOGO_OLED MICOM_TV_EPI MICOM_UD MICOM_H15/A5LR
R3033
27K
R3034
120K
LOGO/OLED BOX 8K M2 - D3000
G

BAT54_SUZHO
11 (3.0V) R3003-*4 R3006-*4 R3008-*4 R3010-*4
75K 75K 75K 75K
CEC_REMOTE HDMI_CEC
S
D

MICOM_LOGO_OLED MICOM_BOX_RGB_Sensor MICOM_8K MICOM_M2

Q3001
SSM3K56FS

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES 030.sht

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.06.27
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MICOM_NEC 30 99

BODY_SHIELD

GND BODY_SHIELD BODY_SHIELD

20 20 20
HP_DET HP_DET HP_DET
HDMI_HPD_3_JACK HDMI_HPD_2_JACK HDMI_HPD_1_JACK
19 19 19
5V 5V 5V
5V_HDMI_3 5V_HDMI_2 5V_HDMI_1
18 18 18
GND GND GND
17 17 17
DDC_DATA DDC_DATA DDC_DATA
DDC_SDA_3_JACK DDC_SDA_2_JACK DDC_SDA_1_JACK
16 16 16
DDC_CLK DDC_CLK DDC_CLK
15 DDC_SCL_3_JACK 15 DDC_SCL_2_JACK 15 DDC_SCL_1_JACK
NC ARC ARC
SPDIF_OUT_ARC_JACK
14 14 14
CE_REMOTE CE_REMOTE CE_REMOTE
CEC_REMOTE CEC_REMOTE CEC_REMOTE
13 13 13
CK- CK- CK-
CK-_HDMI3_JACK CK-_HDMI2_JACK CK-_HDMI1_JACK
12 12 12
CK_GND CK_GND CK_GND
EAG63530101

EAG63530101

11 11 11
CK+ CK+ CK+
10 CK+_HDMI3_JACK 10 CK+_HDMI2_JACK 10
CK+_HDMI1_JACK
D0- D0- D0-
9 D0-_HDMI3_JACK 9 D0-_HDMI2_JACK 9
D0-_HDMI1_JACK
D0_GND D0_GND D0_GND
8 8 8
D0+ D0+ D0+
7 D0+_HDMI3_JACK 7 D0+_HDMI2_JACK 7
D0+_HDMI1_JACK
D1- D1- D1-
6 D1-_HDMI3_JACK 6 D1-_HDMI2_JACK 6
D1-_HDMI1_JACK
D1_GND D1_GND D1_GND
5 5 5
D1+ D1+ D1+
4 D1+_HDMI3_JACK 4 D1+_HDMI2_JACK 4
D1+_HDMI1_JACK
D2- D2- D2-
3 D2-_HDMI3_JACK 3 D2-_HDMI2_JACK 3
D2-_HDMI1_JACK
D2_GND D2_GND D2_GND
2 2 2
D2+ D2+ D2+
1 D2+_HDMI3_JACK 1 D2+_HDMI2_JACK 1
D2+_HDMI1_JACK

DAADR019A JK3100 JK3102

JK3103 DAADR019A DAADR019A
JACK_HDMI_FOOSUNG JACK_HDMI_FOOSUNG JACK_HDMI_FOOSUNG

BODY_SHIELD BODY_SHIELD BODY_SHIELD

20 20 20

19 19 19
HOT_PLUG_DETECT HOT_PLUG_DETECT HOT_PLUG_DETECT
18 18 18
VDD[+5V] VDD[+5V] VDD[+5V]
17 17 17
DDC/CEC_GND DDC/CEC_GND DDC/CEC_GND
16 16 16
SDA SDA SDA
15 15 15
SCL SCL SCL
14 14 14
RESERVED RESERVED RESERVED
13 13 13
CEC CEC CEC
12 12 12
TMDS_CLK- TMDS_CLK- TMDS_CLK-
11 11 11
TMDS_CLK_SHIELD TMDS_CLK_SHIELD TMDS_CLK_SHIELD
10 10 10
TMDS_CLK+ TMDS_CLK+ TMDS_CLK+
9 9 9
TMDS_DATA0- TMDS_DATA0- TMDS_DATA0-
8 8 8
TMDS_DATA0_SHIELD TMDS_DATA0_SHIELD TMDS_DATA0_SHIELD
7 7 7
TMDS_DATA0+ TMDS_DATA0+ TMDS_DATA0+
6 6 6
TMDS_DATA1- TMDS_DATA1- TMDS_DATA1-
5 5 5
TMDS_DATA1_SHIELD TMDS_DATA1_SHIELD TMDS_DATA1_SHIELD
4 4 4
TMDS_DATA1+ TMDS_DATA1+ TMDS_DATA1+
3 3 3
TMDS_DATA2- TMDS_DATA2- TMDS_DATA2-
2 2 2
TMDS_DATA2_SHIELD TMDS_DATA2_SHIELD TMDS_DATA2_SHIELD
1 1 1
TMDS_DATA2+ TMDS_DATA2+ TMDS_DATA2+

05008WR_H19C 05008WR_H19C 05008WR_H19C

JK3103-*1 JK3100-*1 JK3102-*1
JACK_HDMI_DEV JACK_HDMI_DEV JACK_HDMI_DEV

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 15/06/13
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
HDMI SYMBOL 24 73
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
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PAGE 12
HDMI1 (2.0)

HDMI_HPD_100OHM
5V_HDMI_3 R3272-*1
100

HDMI_HPD_33OHM
R3261
33
HDMI_HPD_3
ESD_HDMI
VA3216 HDMI_DDC_100OHM
ESD_HDMI
VA3212

R3267
100K

AR3202-*1
100
External EDID
19 HDMI_HPD_3_JACK HDMI_DDC_33OHM

5V_HDMI_3
AR3202
33
5V_HDMI_1
18 DDC_SCL_3
DDC_SDA_3

DDC_SDA_3_JACK
VA3211

16
VA3210

C3201 +5V_NORMAL
ESD_HDMI

ESD_HDMI

0.1uF
DDC_SCL_3_JACK 16V
15 EAN63486001 0IMMRAL014E

A2
13 CEC_REMOTE CEC_REMOTE
IC3203-*1 IC3203 D3216 OPT
12 CK-_HDMI3_JACK AT24C02C-SSHM-T D3201
BR24G02FJ-3GTE2

C
HDMI_EXT_EDID BAT54_TSC
AR3203 30V
5.1
1/16W R3271
10 CK+_HDMI3_JACK A0 VCC A0 VCC 4.7K
CK-_HDMI3 1 8 1 8
9 D0-_HDMI3_JACK
CK+_HDMI3 A1 WP A1 WP HDMI_INT_EDID HDMI_EXT_EDID
+5V_NORMAL 2 7 2 7 AR3206 AR3206-*1
D0+_HDMI3_JACK 47K 10K
7
HDMI1_TMDS_5.1OHM D0-_HDMI3 A2 SCL A2 SCL R3258
6 D1-_HDMI3_JACK 3 6 3 6
33 HDMI_EXT_EDID
DDC_SCL_1
D0+_HDMI3
A1

AR3203-*1 GND SDA GND SDA R3259

6.2
4 D1+_HDMI3_JACK AR3207 1/16W D3203
4 5 4 5
HDMI_EXT_EDID
DDC_SDA_1
5.1 33
3
C

D2-_HDMI3_JACK 1/16W
D1-_HDMI3 C
DDC_BUFFER_SW
HDMI_EXT_EDID_Rohm HDMI_EXT_EDID_ATMEL
D1+_HDMI3 Q3203 B
D2+_HDMI3_JACK EDID_WP
AR3205

1 MMBT3904(NXP)
HDMI1_TMDS_6.2OHM
47K

HDMI_EXT_EDID E
HDMI1_TMDS_5.1OHM D2-_HDMI3

D2+_HDMI3
DDC_SCL_3
AR3207-*1
6.2 DDC_SDA_3 DDC_BUFFER_SW
1/16W

HDMI1_TMDS_6.2OHM

HDMI3 with Ext.EDID (1.4)

5V_HDMI_2 HDMI2 With ARC (2.0)
5V_HDMI_1

HDMI_EXT_EDID
Q3206
MMBT3904(NXP)
HDMI_HPD_100OHM R3268
C

R3250-*1
100 1K
HDMI_EXT_EDID
VA3215

HDMI_HPD_330HM HDMI_INT_EDID_100OHM
ESD_HDMI
VA3209

R3251-*1
R3250 R3269
ESD_HDMI

100
HDMI_HPD_2 1K
ESD_HDMI

33 HDMI_EXT_EDID
VA3208

R3251
R3265 HDMI_HPD_1
100K
ESD_HDMI

33
HDMI_DDC_100OHM DDC I2C Pull-up
VA3205

HDMI_INT_EDID_33OHM
R3266
100K

AR3201-*1 R3270
4.7K
100 HDMI_EXT_EDID DDC_BUFFER_SCL
19 HDMI_HPD_1_JACK DDC_BUFFER_SDA

HDMI_DDC_33OHM 5V_HDMI_1 HDMI_DDC_33OHM

19 HDMI_HPD_2_JACK AR3201 18 AR3200
R3201 0 HDMI_INT_EDID
DDC_SCL_2 DDC_SCL_1
18 5V_HDMI_2 33
DDC_SDA_2 +5V_NORMAL 16 DDC_SDA_1_JACK DDC_SDA_1
33
R3202 0 HDMI_INT_EDID
VA3204

15
VA3203

OPT DDC_SCL_1_JACK
ESD_HDMI

ARC
VA3206

VA3207
ESD_HDMI
ESD_HDMI

16 DDC_SDA_2_JACK HDMI_DDC_100OHM
ESD_HDMI

R3248
1K AR3200-*1
A1

15 DDC_SCL_2_JACK
CEC_REMOTE CEC_REMOTE
C3202
D3200
13 100
14 SPDIF_OUT_ARC_JACK SPDIF_OUT_ARC
1uF 10V 12 CK-_HDMI1_JACK
VA3213

13 CEC_REMOTE CEC_REMOTE
ESD_HDMI

R3249 C3226
12 CK-_HDMI2_JACK 0.1uF
3.9K
OPT
10 CK+_HDMI1_JACK
AR3210
AR3208 OPT
AR3204 5.1
5.1
47K
9 D0-_HDMI1_JACK 1/16W
CK+_HDMI2_JACK 1/16W
10 CK-_HDMI1
CK-_HDMI2
9 D0-_HDMI2_JACK DDC_SCL_2 7 D0+_HDMI1_JACK CK+_HDMI1
AR3210-*1
6.2
CK+_HDMI2 1/16W
DDC_SDA_2 6 D1-_HDMI1_JACK
7 D0+_HDMI2_JACK HDMI3_TMDS_5.1OHM
D0-_HDMI1
D0-_HDMI2
6 D1-_HDMI2_JACK 4
D0+_HDMI2 D1+_HDMI1_JACK D0+_HDMI1
3 D2-_HDMI1_JACK HDMI3_TMDS_6.2OHM
4 D1+_HDMI2_JACK AR3209 AR3211
5.1 5.1
3 D2-_HDMI2_JACK 1/16W 1/16W
D1-_HDMI2 1 D2+_HDMI1_JACK
D1-_HDMI1 AR3211-*1
6.2
D1+_HDMI2 D1+_HDMI1 1/16W
1 D2+_HDMI2_JACK

HDMI3_TMDS_5.1OHM
D2-_HDMI2 D2-_HDMI1

D2+_HDMI2 D2+_HDMI1
HDMI3_TMDS_6.2OHM

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.02.11
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI RX 12 73

+5V_NORMAL

5V_HDMI_1
A1

HDMI_EXT_EDID
HDMI_EXT_EDID
C3304 MMBD6100
0.1uF D3310
C

16V

DEV_PCA9517_EXTEDID
HDMI_EXT_EDID
AR3312
IC3302
47K PCA9517DGKR
1/16W

VCCA VCCB
1 8

R3301 0 SCLA SCLB R3303 0

HDMI_EXT_EDID 2 7
DDC_BUFFER_SCL DDC_SCL_1
HDMI_EXT_EDID
SDAA SDAB
DDC_BUFFER_SDA 3 6 DDC_SDA_1
FROM HDMI PORT R3300 0 HDMI_EXT_EDID R3302 0
GND EN HDMI_EXT_EDID
4 5 DDC_BUFFER_SW

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015-01-10
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 33
HDMI

L3402
BLM18PG121SN1D
COMP2/AV_L_IN
OPT
R3414 C3411 C3414
R3407 VA3408 330pF
470K 330pF
COMP2_Y 5.5V 50V 50V
0
C3404 C3407
VA3403 R3403 10pF 10pF
5.5V 75 50V 50V
3216 OPT OPT
+3.3V_NORMAL

JK3400 +3.3V_NORMAL
PEJ038-4G6
5 M5_GND
JK3402
PEJ038-4Y6 R3411
R3406 220K
4 M4 10K 5 M5_GND
R3408
3 M3_DETECT 1K
4 M4
COMP2_DET

1 M1 VA3404 3 M3_DETECT
5.5V AV1_CVBS_DET
R3415
6 M6 1 M1 VA3406 1K
5.5V C3408
EAG61030012 6 M6 0.1uF
R3404 50V
COMP2_Pb
0 L3401
EAG61030011 BLM18PG121SN1D
VA3401 C3402 C3405 COMP2/AV_R_IN
R3401 10pF
5.5V 10pF
75 50V 50V
3216 OPT R3413 OPT
OPT
470K C3410 C3412
VA3407 330pF 330pF
C3403 C3406 5.5V 50V 50V
VA3402 R3402 10pF 10pF
5.5V 75 50V 50V
3216 OPT OPT
R3405
COMP2_Pr
0

L3400
CM2012F1R0KT
R3417 0 AV_CVBS_IN

1uH
R3410
VA3405 C3409 C3413 75
5.5V 150pF 150pF 3216
50V 50V 1%

Solteam
JK3401-*1
JSTIB15

VIN A
Fiber Optic

VCC B

GND C
4
SHIELD

foxconn
JK3401
+3.3V_NORMAL 2F11TC1-EM52-4F

SPDIF OUT
VIN A
UART for Debug
Fiber Optic

VCC B

R3400
+3.5V_ST OPT EAG58732903
33 GND C
SPDIF_OUT
VA3400 C3401 4
P3400 P3401
C3400 5.5V 0.1uF
18pF 16V 12525HS-04A(1.2T) 12507WS-04L
SHIELD

50V OPT

ADUC 5S 02 0R5L 1 1

R3418 R3409
100 10K
SOC_RX 2 2

3 3

R3419
100
SOC_TX 4 4
JP-BLOCK-RS232C
VCC

GND

5
RX

TX
JP3410

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2014-09-06
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. JACK_COMMON_V 38 01
JACK_COMMON_V

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
Downloaded from www.Manualslib.com manuals search engine
Only for training and service purposes
PAGE 40

WIFI/BT CONNECTOR

P4001
12507WR-10L

+3.5V_ST
1
P4000 JP4008
12507WR-08L
2 KEY1_JACK
JP4009

1 3 KEY2_JACK
JP4001
JP4007

2 BT_RESET_JACK 4

3 3D_SYNC_RF_JACK 5
JP4002
JP4010

4 WOL/WIFI_POWER_ON_JACK 6
LED_R_JACK

5 7 IR_JACK
JP4000 JP4003

6 WIFI_DP_JACK 8
JP4004 JP4012

7 WIFI_DM_JACK 9 EYE_SCL_JACK
JP4005 +3.5V_WIFI JP4013

8 10 EYE_SDA_JACK

9 11

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES 040.sht

+3.5V_ST
WIFI/BT IR/EYE KEY

1. GND 1.GND 1.GND R4110 R4111

10K 10K

R4103 R4114
100 100
2. RESET BT_RESET_JACK BT_RESET 2.NC 2 KEY1_JACK KEY1
OPT

R4104
2K
R4118 R4113
0 100
3. 3D_SYNC 3D_SYNC_RF_JACK 3D_SYNC_RF 3.NC +3.5V_ST 3 KEY2_JACK KEY2
OPT

C4107 C4108
R4102 0.1uF 0.1uF
100 OPT OPT
4. WOL_ON WOL/WIFI_POWER_ON_JACK WOL/WIFI_POWER_ON 4. 3.5V_ST +3.5V_ST 4.GND
C4106
C4100 1000pF
0.1uF 50V
16V

5. GND

5. GND
R4106
2.2 +3.5V_ST
6. WIFI_DP WIFI_DP_JACK WIFI_DP
R4105
2.2
WIFI_DM_JACK WIFI_DM 6. LED_R LED_R_JACK R4120
C R4109
D4100 10K
RCLAMP0502BA B 1K OPT
C4102 C4103 Q4100 LED_R
7. WIFI_DM OPT 5pF 5pF MMBT3904(NXP)
50V 50V E C4109 R4121
OPT OPT 0.1uF 10K
16V
OPT
Place to P4000 side

Remove L due to +3.5V_WIFI

+3.5V_ST
voltage drop
8. 3.5V_WIFI +3.5V_WIFI R4112
10K R4122
C4101 C4104 C4105 100
0.1uF 10uF 10uF IR_JACK IR
16V 10V 10V 7. IR
C4110
100pF
GND

50V
IR

8. GND
JP-BLOCK-IR
JP4100
R4108
100
9. EYE_SCL EYE_SCL_JACK EYE_SCL

R4107
100
10. EYE_SDA EYE_SDA_JACK EYE_SDA

WIFI POWER ENABLE CONTROL

IR Reciever on Board : EV board Only +3.5V_ST +3.5V_WIFI

EAN64148901
EAV62055001
IC4101
TJ2242GSF6
IC4100 +3.5V_ST
AO-R123C7G-LG IN OUT
1 6
Discharge Resistor

C4111
DEBUG_IR R4100 1uF GND ILIMIT
G 330 2 5
25V R4117
DEBUG_IR R4116 3.3K
33 EN FLAG
V 3 4
10K
R4123
1%

WIFI_EN
R4101
47 R4115 C4112
O
IR 10K 0.1uF
DEBUG_IR OPT 16V
OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES 041.sht

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
Downloaded from
Only for training and www.Manualslib.com
service purposes manuals search engine
USB3.0 JK4200
EAG63374203

JK4200-*1
EAG63374205

MAX 1.5A 5205-56209 3AG009S-106N3R6003(1.2T PCB)

VBUS VBUS
+5V_USB_1 1 1

D- D-
USB3_DM0_JACK 2 2
JACK_USB3.0_CNPLUS

JACK_USB3.0_DEV

D+ D+
USB3_DP0_JACK 3 3

GND GND
4 4

STDA_SSRX- STDA_SSRX-
USB3_RXM0 5 5

STDA_SSRX+ STDA_SSRX+
USB3_RXP0 6 6

GND_DRAIN GND_DRAIN
7 7

STDA_SSTX- STDA_SSTX-
USB3_TXM0 8 8

STDA_SSTX+ STDA_SSTX+
USB3_TXP0 9 9

10 10

SHIELD SHIELD

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 15/06/13
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
JACK_USB1_3.0 73
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
Downloaded from
Only for training and www.Manualslib.com
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PAGE 43

+5V_USB_1

USB3.0 C4300 C4301

ZD4300

10uF 10uF
10V 10V
MAX 1.5A
OPT

OPT

EAH62135001
D4300 OCP USB3.0
IP4294CZ10-TBR +5V_USB_1
1 10 +3.3V_NORMAL
USB3_DM0 USB3_DM0_JACK
R4300
2.2
2 9 EAN62871401
+5V_USB_1
USB3_DP0 USB3_DP0_JACK
R4301
2.2
3 8 +5V_NORMAL IC4300
4 7 BD2242G
USB3_RXP0 USB3_RXP0
5 6 R4303 VIN
1 6
VOUT
USB3_RXM0 USB3_RXM0 4.7K
value change C4302 GND ILIM
1uF 2 5
10K(2.63V) --> 4.7K(2.97V) 25V
1 10
12K
R4304
1%

EN OC
USB3_TXM0 USB3_TXM0 /USB_OCD1 3 4

2 9 USB_CTL1
USB3_TXP0 USB3_TXP0
3 8 R4302
10K

4 7
5 6

D4301
IP4294CZ10-TBR
EAH62135001

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.11.23
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
USB1_3.0 43 99
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SPG15-UCS-0203
JACK_USB2.0_FREEPORT
EAG62571101

EAG62571104
1

+5V_USB_2
USB DOWN STREAM

USB DOWN STREAM

USB3_DM1_JACK
2

USB3_DP1_JACK
3

3
4

4
5

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 15/06/13
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
JACK_USB2_2.0 73
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
Downloaded from
Only for training and www.Manualslib.com
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PAGE 45
+5V_USB_2

Remove OPT Ce-cap(22uF USB2 (2.0)

MAX 1.5A
ESD_READY

C4500 C4504
ZD4500

10uF 10uF
5V

10V 10V
OPT

+5V_USB_2
R4507
2.2
USB3_DM1 USB3_DM1_JACK
R4508
2.2
USB3_DP1 USB3_DP1_JACK

EAH63274301
PJDLC05C-02TB JP4504
D4500 JP-BLOCK-USB
VBUS DM

GND DP

OCP USB2_2.0
+3.3V_NORMAL

EAN62871401
+5V_USB_2

+5V_NORMAL IC4501
BD2242G

R4502 VIN VOUT

4.7K 1 6

value change C4502 GND ILIM

1uF 2 5
10K(2.63V) --> 4.7K(2.97V) 25V
14K
R4503
1%

EN OC
3 4
/USB_OCD2

USB_CTL2
R4501
10K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.11.23
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
USB2_2.0 45 99
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SPG15-UCS-0203
JACK_USB2.0_FREEPORT
EAG62571101

EAG62571104
1

+5V_USB_3
USB DOWN STREAM

USB DOWN STREAM

USB2_DM0_JACK
2

USB2_DP0_JACK
3

3
4

4
5

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 15/06/13
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
JACK_USB3_2.0 73
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
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PAGE 47

+5V_USB_3

Remove OPT Ce-cap(22uF USB3 (2.0)

MAX 1.5A
ESD_READY

C4700 C4701
ZD4700

10uF 10uF
5V

10V 10V
OPT

+5V_USB_3
R4700
2.2
USB2_DM0 USB2_DM0_JACK
R4701
2.2
USB2_DP0 USB2_DP0_JACK

EAH63274301
PJDLC05C-02TB
D4700 JP4700
JP-BLOCK-USB
VBUS DM

GND DP

OCP USB3_2.0
+3.3V_NORMAL

EAN62871401
+5V_USB_3

+5V_NORMAL IC4700
BD2242G

R4703 VIN VOUT

4.7K 1 6

value change C4702 GND ILIM

1uF 2 5
10K(2.63V) --> 4.7K(2.97V) 25V
14K
R4704
1%

EN OC
/USB_OCD3 3 4

USB_CTL3
R4702
10K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.11.23
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
USB3_2.0 47 99
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
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Ethernet Block

LAN_JACK_POWER

C5001 C5002 C5003 C5004

FREEPORT_LAN 0.1uF 0.01uF 0.1uF 0.01uF
UDE_LAN
JK5001-*1 16V 50V 16V 50V
JK5001
26LM3L-3C100-02HF
BS-RSD0303

R1
R1 P1[CT]
R1

R2
R2 P2[TD+]
R2
EPHY_TDP
R3
R3 P3[TD-]
R3
EPHY_TDN
R4
R4 P4[RD+]
R4
EPHY_RDP
R5
R5 P5[RD-]
R5
EPHY_RDN
R6
R6 P6[CT]
R6 VA5001 VA5002 VA5003 VA5004
5.5V 5.5V 5.5V 5.5V
R7 LAN_ESD(MAIN)
LAN_ESD(MAIN) LAN_ESD(MAIN)
LAN_ESD(MAIN)
R7 P7
R7

R8
R8 P8
R8

R9
R9 9
R9 EMI

R10 R5001
ICVS0518150FR_

ICVS0518150FR_

R10 P10[GND] 0
LAN_ESD(SUB)

LAN_ESD(SUB)

R10
VA5001-*1

VA5002-*1

VA5003-*1

VA5004-*1

R11
R11 P11
R11

L1
L1 YL_C
P1

L2
L2 YL_A
P2

L3
L3 GN_C
P3

L4
L4 GN_A
P4

16
16

SHIELD
SHIELD

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

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PAGE 52
+3.5V_WOL
Place this cap. near IC
C5206-*1
3.9pF
50V
Ethernet_XTAL_LoadCap_OLED_E6
LAN_JACK_POWER C5208
0.1uF
+3.5V_WOL 16V
C5207-*1 R5215
7pF 3.3K
50V
Ethernet_XTAL_LoadCap_OLED_E6

ET_COL/SNI Ethernet_XTAL_LoadCap_Default ET_RXER EPHY_ACTIVITY

C5200 C5201 C5203
4.7uF 0.1uF 0.1uF ET_COL/SNI
IN/OUT_1
2 FLOAT_1

10V 16V 16V R5210 33 ET_RXER

C5206 EPHY_CRS_DV
5pF
R5217
50V EPHY_ACTIVITY
EAW62583503

3.3K
1M
1
X5200

+3.5V_WOL
OPT

R5218

Place 0.1uF close to each power pins

R5202
IN/OUT_2 3
4
FLOAT_2

Ethernet_XTAL_LoadCap_Default
LED1/PHYAD[1]

Place this cap. near IC C5207

CRS/CRS_DV
DVDD10OUT

RXER/FXEN

5pF
AVDD33_2

50V
CKXTAL2

CKXTAL1

R5212

R5219
R5205

3.3K

1.5K
[EP]

10K

C5205
COL

0.1uF Place this Res. near IC

16V
32

R5204 2.49K RSET LED0/PHYAD[0]/PMEB

1 24
1% THERMAL
WOL/ETH_POWER_ON
AVDD10OUT 2 33 23 MDIO
Route Single 50 Ohm, Differential 100 Ohm
EPHY_MDIO
MDI+[0] 3 22 MDC
EPHY_RDP EAN62219201 EPHY_MDC
MDI-[0] PHYRSTB
EPHY_RDN
MDI+[1]
4
IC5200 21
TXEN
(from
/RST_PHY SOC)

5 20
EPHY_TDP EPHY_EN
MDI-[1] RTL8201F-VB-CG TXD[3]
EPHY_TDN 6 19
AVDD33_1 7 18 TXD[2]

ETHERNET INTERFACE R5203 3.3K RXDV 8 17 TXD[1]

- CROSS CONNECTION EPHY_TXD1
10

(PATTERN ISSUE)
9
RXD[0]

RXD[1]

RXD[2]/INTB

RXD[3]/CLK_CTL

RXC

DVDD33

TXC

TXD[0]

EPHY_TXD0

C5211
0.1uF
C5209
R5200

16V
3.3K

R5209

EPHY_RXD0
33pF

EPHY_RXD1
C5202
3.3K

WOL POWER ENABLE CONTROL

Place near IC
5pF
R5208

EAN64130101

IC5201
+3.5V_ST AP2151AW
+3.5V_WOL
EPHY_REFCLK
Discharge Resistor

IN OUT
5 1
C5204
R5201
3.3K

0.1uF GND
2

R5223 33 EN FLG
WOL_CTL 4 3

OPT
R5222 C52001
10K 0.1uF
OPT 16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.11.04
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR 100
LAN 52
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
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NTP_AMP_Front

AMP_RESET_N
AUD_SCK
+3.3V_NORMAL

L5301
L5300 10.0uH
A13V +13V_AMP_FRONT BLM18PG121SN1D SPK_L+_FT
NRS6045T100MMGK
22000pF

+13V_AMP_FRONT
C5306

C5308
50V

R5304
10uF 3.3
35V 1/10W
L5305 C5318 C5320
0.47uF 0.1uF R5308
UBW2012-121F
C5324 C5302 C5312 50V 50V 4.7K
[EP]GND

390pF
10uF 0.1uF
VDD_IO
GND_IO

PGND1A

PVDD1A
PVDD1B

50V
10V 16V
CLK_I

RESET
BST1A

OUT1A

SPEAKER_L
C5313
AD

390pF
50V
C5321
0.1uF R5309
50V 4.7K
40
39
38
37
36
35
34
33
32
31

R5305
3.3
1/10W L5302
NC_1 1 30 OUT1B 10.0uH

NRS6045T100MMGK
SPK_L-_FT
C5303 VDD_PLL 2 29 PGND1B C5314
1uF 10V THERMAL 22000pF
NC_2 3 41 28 BST1B 50V

GND 4 EAN62886102 27 VDR1 C5310

1uF 10V
NC_3 5 IC5300 26 NC_5
C5304 DVDD 6 25 AGND
1uF 10V
SDATA
NTP7515 VDR2 C5311
AUD_LRCH 7 24
WCK 8 0x54 23 BST2A
1uF 10V

AUD_LRCK
NC_4 9 22 PGND2A C5315
22000pF
AR5300
50V L5303
100
SDA 10 21 OUT2A 10.0uH
I2C_SDA0 NRS6045T100MMGK
SPK_R+_FT
I2C_SCL0
11
12
13
14
15
16
17
18
19
20

1/16W R5306
3.3
C5300 C5301
1/10W C5319 C5322 R5310
33pF 33pF
50V 0.47uF 0.1uF 4.7K
50V
SCL
FAULT
MONITOR_0
MONITOR_1
MONITOR_2
BST2B
PGND2B
OUT2B
PVDD2B
PVDD2A

C5316 50V 50V

+13V_AMP_FRONT 390pF
+3.3V_NORMAL 50V

SPEAKER_R
C5317
R5301
390pF
10K
50V
R5303 C5323 R5311
0.1uF 4.7K
C 100 R5307 50V
C5307
R5300 22000pF C5309 3.3
B
AMP_MUTE 50V 10uF 1/10W L5304
10K Q5300 C5305 10.0uH
35V
E MMBT3904(NXP)
1000pF
50V NRS6045T100MMGK
SPK_R-_FT

OPT
R5302
POWER_DET
100

WOOFER_MUTE
I2S_AMP
WOOFER_MUTE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES 053.sht

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.02.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR NTP AMP
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 20 26

1. SDATA_TWEETER : Use the AMP for Tweeter

(EH92)

2. SDATA_WOOFER/CENTER :
Use this AMP for Center (upper 75inch model)
or Woofer STEREO (below 65 inch model)

+3.3V_NORMAL
+3.3V_NORMAL

AMP_RESET_N
L5400 L5401
10.0uH
BLM18PG121SN1D
A13V +13V_AMP_CENTER NRS6045T100MMGK
SPK_L+_CT
50V

AUD_SCK
4.7K R5400

+13V_AMP_CENTER
22000pF

R5401
C5405

3.3
1/10W R5405
L5405 C5419
UBW2012-121F C5404 0.1uF 4.7K
50V
[EP]GND

0.1uF C5413
C5407 390pF
VDD_IO
GND_IO

PGND1A

PVDD1A
PVDD1B

C5423 50V
16V 10uF
CLK_I

RESET
BST1A

OUT1A

10uF 35V
Close to IC5400 10V C5417
0.47uF
50V SPEAKER_L_CENTER
AD

C5414
390pF
50V C5420 R5406
R5402 0.1uF
3.3 50V 4.7K
40
39
38
37
36
35
34
33
32
31

1/10W

L5402
NC_1 1 30 OUT1B 10.0uH
SPK_L-_CT
NRS6045T100MMGK
VDD_PLL 2 29 PGND1B C5409
THERMAL 22000pF
NC_2 3 41 28 BST1B 50V
C5402
1uF
10V GND 4 27 VDR1
EAN62886102
NC_3 5 IC5400 26 NC_5
C5403
SDATA_TWEETER

AUD_LRCH_TW
R5411 0 1uF
10V
DVDD 6 NTP7515 25 AGND
SDATA_WOOFER/CENTER
AUD_LRCH
R5410 0 SDATA 7 24 VDR2
WCK 0x56 BST2A
C5411
1uF
C5412
1uF
AUD_LRCK 8 23 10V 10V

AR5400 NC_4 9 22 PGND2A C5410

100 22000pF
1/16W
I2C_SDA0
SDA 10 21 OUT2A 50V

I2C_SCL0
11
12
13
14
15
16
17
18
19
20

C5400 C5401
33pF 33pF L5403
50V 50V 10.0uH
SCL
FAULT
MONITOR_0
MONITOR_1
MONITOR_2
BST2B
PGND2B
OUT2B
PVDD2B
PVDD2A

SPK_R+_CT
NRS6045T100MMGK
+13V_AMP_CENTER

R5403
3.3
1/10W C5421 R5407
0.1uF 4.7K
C5415 C5418 50V
390pF
50V
0.47uF
50V
SPEAKER_R_CENTER
C5408
10uF C5416
390pF
35V 50V
C5422 R5408
C5406
R5404 0.1uF 4.7K
22000pF 3.3 50V
L5404
50V 1/10W 10.0uH
SPK_R-_CT
NRS6045T100MMGK
WOOFER_MUTE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

EAG61091602
SPK_WAFER_4PIN
P5900
250A1-WR-H04M

SPK_R-_FT 1 1

SPK_R+_FT 2 2

Front Speaker
SPK_L-_FT 3 3

SPK_L+_FT 4 4

SPK_R-_CT 5

SPK_R+_CT 6

Woofer Speaker (Stereo)

SPK_L-_CT 7

SPK_L+_CT 8

SPK_WAFER_8PIN
P5901
SMAW250-08
6602T25009G

059.sht
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.06.27
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR 59 99
SPEAKER WAFER
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

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HP OUT

+3.3V_NORMAL

R6200
10K
HP_OUT
HP_OUT
JK6200
PJ752-F04L3BE-A

HP_ROUT_JACK 3 3

HP_LOUT_JACK 2 2

HP_DET 4 4

1 1
VA6200
5.6V
HP_OUT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
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EARPHONE AMP PAGE 23

EARPHONE AMP
EAN62668301
IC6300
TPA6138A2

HP_OUT HP_OUT
+INR +INL
C6302 1 14 C6308
HP_OUT HP_OUT
C6300 HP_OUT HP_OUT 18pF HP_OUT C6310
AUDA_OUTR 2.2uF
10V
R6301
18pF
R6303
-INR -INL HP_OUT
R6305 R6307 2.2uF
HP_OUT 10K 43K HP_OUT 43K 10K 10V
HP_OUT
2 13
AUDA_OUTL
HP_OUT
R6302

HP_OUT
R6306

1% C6304 C6306 1%
43K

43K

10pF
1%

L6300 OUTR OUTL 10pF L6301

50V 3 12 50V
R6300 HP_OUT BLM18PG121SN1D BLM18PG121SN1D
HP_ROUT_JACK
150 HP_OUT R6308 150
HP_LOUT_JACK
HP_OUT C6301 GND_1 UVP C6311 HP_OUT
HP_OUT +3.3V_NORMAL HP_OUT
0.22uF 4 11 0.22uF
25V 25V
MUTE GND_2 +3.3V_NORMAL
4.7K
HP_OUT

5 10
R6304
SIDE_HP_MUTE VSS VDD
6 9
HP_OUT HP_OUT
HP_OUT
C6307 C6309
C6303 CN CP 1uF 0.1uF
1uF 7 8
10V 16V
10V

C6305
1uF
10V

HP_OUT

063.sht
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.02.09
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
HEADPHONE AMP 23 73
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
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PAGE 23

B-CAS (SMART CARD) INTERFACE

CLKDIV1 CLKDIV2 : F_CRD_CLK

-----------------------------
1 0 CLKIN

+3.3V_NORMAL INT CMDVCC : STATUS

---------------------------------
+3.3V_NORMAL HIGH HIGH CARD PRESENT
LOW HIGH CARD not PRESENT
EAN61006001
IC6400
TDA8024TT
2.7K

2.7K
JAPAN

JAPAN
R6401

R6403

1.2K

CLKDIV1 AUX2UC
1 28
JAPAN

JAPAN

JAPAN
OPT

OPT

CLKDIV2 AUX1UC
2 27
JAPAN

R6406

R6407

R6409

R6410

R6412

JAPAN
R6400 22 5V/3V I/OUC AR6400
3 26 33
SMARTCARD_PWR_SEL SMARTCARD_DATA
R6402

2.7K

JAPAN
R6404

PGND XTAL2
4 25 SMARTCARD_CLK
OPT

+5V_NORMAL S2 XTAL1
5 24 SMARTCARD_DET
JAPAN
L6400
VDDP OFF
6 23 SMARTCARD_COMMAND
JAPAN BLM18PG121SN1D JAPAN
JAPAN JAPAN
C6400 C6401 C6403 S1 GND R6405 22
0.1uF 0.1uF 7 22 SMARTCARD_VCC
10uF
16V 10V 16V
JAPAN JAPAN
VUP VDD L6401
8 21
JAPAN BLM18PG121SN1D
C6402 PRES RSTIN JAPAN_BCAS_OLD
0.1uF 9 20 JAPAN JAPAN EAG62011601
16V C6405 C6406
0.1uF B-CAS SLOT
PRES CMDVCC 0.1uF
10 19 16V 16V
P6400 JAPAN_BCAS_NEW
P6400-*1
10057542-1311FLF(B CAS Slot) 10057542-1311FLF..(B CAS Slot)
I/O PORADJ
11 18

AUX2 VCC JAPAN VCC

12 17 C1 C1
C6407
0.33uF
AUX1 RST 16V RST
13 16 C2 C2

CGND CLK Place CLK C3 far from C2,C7,C4 and C8 CLK

14 15 C3 C3

JAPAN
C6404 RESERVED_1
0.1uF C4 C4
16V
GND
C5 C5

VPP
C6 C6
JAPAN
R6411
75 I/O
C7 C7
75 ohm in I/O is for short circuit Protection
RESERVED
C8 C8

+3.3V_NORMAL SW1
S1 S1
10K
R6408
JAPAN

R6413 1K SW2
S2 S2
JAPAN

ZD6400 ZD6401
JAPAN

JAPAN

5V 5V

064.sht
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.02.09
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
JAPAN B-CAS 23 26
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

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FE_DEMOD1_TS_ERROR

FE_DEMOD2_TS_ERROR

FE_DEMOD3_TS_CLK
1. should be guarded by ground FE_DEMOD3_TS_SYNC
2. No via on both of them FE_DEMOD3_TS_VAL
3. Signal Width >= 12mils FE_DEMOD3_TS_ERROR
close to Tuner Signal to Signal Width = 12mils FE_DEMOD3_TS_DATA
+3.3V_TU Ground Width >= 24mils

R6500
0
1 +3.3V_LNA_TU
C6500
0.1uF

TU_ALL_IntDemod
R6508 1K
3 IF_AGC_TU IF_AGC
C6502 close to Tuner TU_ALL_IntDemod
0.1uF +3.3V_TU
16V
TU_ALL TU_W_BR/TW
TU_ALL_2178B

R6503 R6503-*1
R6515

33 200 TU_CVBS_1uF +3.3V_NORMAL

BLM18PG121SN1D
I2C_SCL5_TU I2C_SCL5
0

C6506 C6516-*1
I2C_SDA5 R6504-*1 +3.3V_TU
47pF
R6504 200 1uF

L6500
5 50V 33
I2C_SDA5_TU 10V 1608 perallel
C6504 TU_ALL TU_ALL TU_W_BR/TW
because of derating
47pF
50V
TU_ALL TU_CVBS_0.1uF TU_ALL_2178B
C6516 TU_ALL_2178B
0.1uF R6516 R6517 10V
R6501 200 200
10 16V 10uF
OPT C6517
6 IF_P_TU
TU_ALL_IntDemod C6509 IF_P 10uF
C6518
33pF TU_CVBS 10V
should be guarded by ground,Match GND VIA R6502
10 E
7 IF_N_TU OPT IF_N
TU_ALL_IntDemod C6510 TU_ALL_2178B
33pF
TU_ALL_2178B TU_SIF_TU B Q6500
8 TU_SIF MMBT3906(NXP)
R6510 0 C

9 TU_CVBS_TU TU_M/W/Q
+3.3V_TU
Global F/E Option Name R6511
0
1. TU 10 1/16W
2. Tuner Name = TDJ’H’,TDj’M’... C6512 5%
3. Country Name = KR,US,BR,EU ... 0.1uF
11 +3.3V_D_TU
TU_M/W/Q
Example of Option name
12 FE_DEMOD1_TS_ERROR close to Tuner
TU_ALL_IntDemod = All Tuner type for Internal demod
TU_M/W = apply TDSM&TDSW Type Tuner FE_DEMOD1_TS_ERROR
14 FE_DEMOD1_TS_CLK FE_DEMOD1_TS_CLK

14’ Tuner Type for Global

TDJ’H’-G101D : Half NIM for EU,AJJA 15 FE_DEMOD1_TS_SYNC FE_DEMOD1_TS_SYNC
TDJ’H’-H101F : Half NIM for US, KR
TDJ’K’-T101F : Half NIM for TW 16 FE_DEMOD1_TS_VAL FE_DEMOD1_TS_VAL
TDJ’M’-C301D,F : FULL NIM for China
TDJ’M’-B101F : Brazil NIM with Isolater Type
17 FE_DEMOD1_TS_DATA[0]
TDJ’M’-K101F : colombia NIM
TDJ’M’-G101D,G105D,G151D : EU Combo&Full NIM
18 FE_DEMOD1_TS_DATA[1] FE_DEMOD1_TS_DATA[0-7]
TDJ’M’-H101F,H151F : Korea PIP tuner
TDJ’W’-A151D : AJJA T2 PIP FE_DEMOD1_TS_DATA[0]
19 FE_DEMOD1_TS_DATA[2] FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]
20 FE_DEMOD1_TS_DATA[3]

FE_DEMOD1_TS_DATA[4]
21 FE_DEMOD1_TS_DATA[4]
FE_DEMOD1_TS_DATA[5]
FE_DEMOD1_TS_DATA[6]
+3.3V_TU
FE_DEMOD1_TS_DATA[5] FE_DEMOD1_TS_DATA[7]
22

23 FE_DEMOD1_TS_DATA[6]
TU_IIC3_2.7K

TU_IIC3_2.7K

24 FE_DEMOD1_TS_DATA[7]
TU_M/W/Q
R197
2.7K

R196
2.7K

R6506
TU_M/W/Q 100 /TU_RESET1 +3.3V_TU
25 /TU_RESET1_TU
C6507 TU_M/W/Q
16V R6512
TU_IIC3_1.2K

TU_IIC3_1.2K

0
R197-*1

R196-*1

0.1uF TU_M/W/Q
26 +3.3V_DEMOD_TU
1/16W
1.2K

1.2K

C6513
0.1uF 5%
27 I2C_SCL3_TU TU_M/W/Q
TU_M/W/Q
R6513
R6505 33
0 D_Demod_Core OPT
28 Demod_Core
C6515 I2C_SCL3
TU_M/W/Q 1/16W 18pF I2C_SDA3
LNB_TX1 LNB_TX1 C6508 50V R6514
5% OPT
0.1uF 33
29 C6514
TU_M/W/Q
18pF TU_W/Q_NON_JP 0 R6518
50V FE_DEMOD2_TS_CLK_1 FE_DEMOD2_TS_CLK
30 I2C_SDA3_TU TU_W/Q_NON_JP 0 R6519
FE_DEMOD2_TS_SYNC_1 FE_DEMOD2_TS_SYNC
LNB_OUT1 LNB_OUT1 TU_W/Q_NON_JP 0 R6520
C6501 C6503 FE_DEMOD2_TS_VAL_1 FE_DEMOD2_TS_VAL
TU_W/Q_NON_JP 0 R6521
31 0.1uF 18pF FE_DEMOD2_TS_DATA0_1 FE_DEMOD2_TS_DATA
LNB1 LNB1
+2.5V_NORMAL
TU_W_JP
R6509
0
38 +2.5V_DEMOD
1/16W
C6511
5%
0.1uF TU_W_JP/KR 0 R6522
39 FE_DEMOD2_TS_VAL FE_DEMOD2_TS_VAL
TU_W_JP FE_DEMOD2_TS_CLK_2
TU_W_JP/KR 0 R6523
FE_DEMOD2_TS_SYNC_2 0 R6524
TU_W_JP/KR
FE_DEMOD2_TS_VAL_2
TU_W_JP/KR 0 R6525
FE_DEMOD2_TS_DATA0_2
R6507
100 /TU_RESET2
45 /TU_RESET2_TU
C6505 TU_W/Q_JP/EU
16V
0.1uF
TU_W/Q_JP/EU

LNB_OUT2 LNB_OUT2
47
C6519 C6520
0.1uF 18pF
52 LNB_TX2 LNB_TX2 LNB2
LNB2

53 FE_DEMOD2_TS_DATA[7]

54 FE_DEMOD2_TS_DATA[6]

FE_DEMOD2_TS_DATA[5] FE_DEMOD2_TS_DATA[7]
55
FE_DEMOD2_TS_DATA[6]
FE_DEMOD2_TS_DATA[5]
56 FE_DEMOD2_TS_DATA[4]
FE_DEMOD2_TS_DATA[4]
FE_DEMOD2_TS_DATA[3]
57 FE_DEMOD2_TS_DATA[3]
FE_DEMOD2_TS_DATA[2]
FE_DEMOD2_TS_DATA[1]
58 FE_DEMOD2_TS_DATA[2]

59 FE_DEMOD2_TS_DATA[1]
FE_DEMOD2_TS_DATA[1-7]

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS TUNER 2015.04.20
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 65

TU6700 TU6701 TU6702 TU6703 TU6704 TU6705

TDJQ-G151D TDJW-J252F TDJM-G351D TDJM-H451F TDJK-T351F TDJH-H351F

+3.3V_LNA B1[+3.3V] B1[+3.3V] +3.3V B[3.3V] +3.3V

1 1 1 1 1 1 +3.3V_LNA_TU
NC_1 NC_1 NC_1 NC
2 2 2 2
NC_1 NC_2 AIF_AGC DIFAGC IF_AGC DIF_AGC
3 3 3 3 3 3 IF_AGC_TU
SCL_RF SCL_RF SCL_RF SCL_RF SCL SCL_RF
4 4 4 4 4 4 I2C_SCL5_TU
SDA_RF SDA_RF SDA_RF SDA_RF SDA SDA_RF
5 5 5 5 5 5 I2C_SDA5_TU
NC_2 NC_3 AIF[P] DIF[P] IF[P] DIF[P]
6 6 6 6 6 6 IF_P_TU
NC_3 NC_4 AIF[N] DIF[N] IF[N] DIF[N]
7 7 7 7 7 7 IF_N_TU
SIF NC_5 SIF SIF SIF SIF
8 8 8 8 8 8 TU_SIF
CVBS NC_6 CVBS CVBS CVBS CVBS
9 9 9 9 9 9 TU_CVBS_TU
NC_4 NC_7 NC_2 NC_2
10 10 10 10
+3.3V_RF B2[+3.3V] B2[+3.3V] +3.3V_RF A1 B1 A1 B1
11 11 11 11 A1 B1 A1 B1 +3.3V_D_TU

S_ERROR NC_8 ERROR ERROR 47 47

LNB2 12 12 12 12 FE_DEMOD1_TS_ERROR
TU_GND_A

LNB_OUT2 47 GND_1 GND_1 GROUND GND

TU_GND_A
TU_GND_B

13 13 13 13 SHIELD SHIELD

TU_GND_B
GND_3
48 S_MCLK MCKL MCLK
NC_5 14 14 14 FE_DEMOD1_TS_CLK
49 S_SYNC SYNC SYNC
NC_6 15 15 15 FE_DEMOD1_TS_SYNC
50 S_VALID VALID VALID
GND_4 16 16 16 FE_DEMOD1_TS_VAL
51 S_D0 DATA0 DATA
F22_M_DEMOD_2 17 17 17
FE_DEMOD1_TS_DATA[0]
LNB_TX2
52 S_D1 DATA1 NC_3
M_D7 18 18 18 FE_DEMOD1_TS_DATA[1]
FE_DEMOD2_TS_DATA[7]
53 S_D2 DATA2 NC_4
M_D6 19 19 19 FE_DEMOD1_TS_DATA[2]
FE_DEMOD2_TS_DATA[6]
54 S_D3 DATA3 NC_5
M_D5 20 20 20 FE_DEMOD1_TS_DATA[3]
FE_DEMOD2_TS_DATA[5]
55 S_D4 DATA4 NC_6
M_D4 21 21 21 FE_DEMOD1_TS_DATA[4]

FE_DEMOD2_TS_DATA[4]
56 S_D5 DATA5 NC_7
M_D3 22 22 22 FE_DEMOD1_TS_DATA[5]
FE_DEMOD2_TS_DATA[3]
57 S_D6 DATA6 NC_8
M_D2 23 23 23 FE_DEMOD1_TS_DATA[6]
FE_DEMOD2_TS_DATA[2]
58 S_D7 DATA7 NC_9
M_D1 24 24 24 FE_DEMOD1_TS_DATA[7]
FE_DEMOD2_TS_DATA[1]
59 RESET_S_DEMOD M_RESET_DEMOD RESET_DEMOD RESET_DEMOD
M_D0 25 25 25 25 /TU_RESET1_TU
FE_DEMOD2_TS_DATA0_1
60 +3.3V_DEMOD B3[+3.3V] B3[+3.3V] +3.3V_DEMOD
RESET_M_DEMOD 26 26 26 26 +3.3V_DEMOD_TU
/TU_RESET2_TU
61 SCL_DEMOD SCL_DEMOD SCL_DEMOD SCL_DEMOD.
M_ERROR 27 27 27 27 I2C_SCL3_TU
FE_DEMOD2_TS_ERROR
62 +1.2V_DEMOD B4[+1.2V] B4[+1.2V] +1.2V_DEMOD
M_MCLK 28 28 28 28 Demod_Core
FE_DEMOD2_TS_CLK_1 63 F22_S_DEMOD_1 NC_9 F22_OUTPUT NC_10
M_SYNC 29 29 29 29 LNB_TX1
FE_DEMOD2_TS_SYNC_1 64 SDA_DEMOD SDA_DEMOD SDA_DEMOD SDA_DEMOD
M_VALID 30 30 30 30 I2C_SDA3_TU
FE_DEMOD2_TS_VAL_1 65 LNB1 LNB LNB
31 31 31 LNB_OUT1

GND_2 GND_2 GND A1 B1

32 32 32 A1 B1
NC_10 47
33
A1 B1
TU_GND_B
TU_GND_A

A1 B1 M_ERROR A1 B1
34 FE_DEMOD2_TS_ERROR A1 B1 SHIELD
68
GND_3 47
TU_GND_A

TU_GND_B

35
TU_GND_B
TU_GND_A

SHIELD M_SYNC
36 FE_DEMOD2_TS_SYNC_2 SHIELD

37
M_MCLK
FE_DEMOD2_TS_CLK_2 EMS
B5[+2.5V]
38 +2.5V_DEMOD
M_VALID
39 FE_DEMOD2_TS_VAL_2 TU_GND_A TU_GND_B

M_DATA
40 FE_DEMOD2_TS_DATA0_2 NON_EU/KR/AJ/CN/US
SG300Q NON_EU/KR/AJ/CN/US
S_ERROR VA6701 C6701 C6702 C6704 R6700 C6706 C6708 C6710 C6711 SG300Q
41 FE_DEMOD3_TS_ERROR GDT_KR 0.022uF 1000pF 1000pF 0 1000pF 1000pF 0.022uF 1000pF VA6702
630V 630V 630V 630V 630V 630V 630V
S_SYNC TU_ALL_1000pF TU_NON_AJ TU_M_AJ_1000pF GDT NON_BR/CO/TW/MX
42 FE_DEMOD3_TS_SYNC TU_M/W_KR/AJ/BR/TW_22nF NON_EU/KR/BR/TW
TU_W_KR_22nF
TU_H_MX
S_MCLK
TU_M_CO TU_M_AJ/JA TU_M_CN 43 FE_DEMOD3_TS_CLK
TU6705-*1 C6702-*1 C6704-*1
TU6703-*3 TU6703-*2 TU6703-*1 0.022uF 0.022uF
TDJM-K351F TDJM-G355D TDJM-C451D S_VALID TDJH-H352F 630V 630V C6706-*1 C6708-*1 C6711-*1
0.022uF 0.022uF 0.022uF
B1[+3.3V]
44 FE_DEMOD3_TS_VAL
TU_M/W_KR/AJ_22nF TU_M_AJ_22nF
630V 630V 630V
B1[+3.3V] B1[+3.3V] 1
1 1
NC_1 TU_W_KR_22nF TU_W_KR_22nF TU_W_KR_22nF
2
NC_1 2
NC_2
S_RESET_DEMOD 1
+3.3V
3
NC_1
3
AIF_AGC 3
SCL_RF
45 /TU_RESET2_TU
4
SCL_RF
4
SCL_RF 4 NC TU_GND_A TU_GND_B
SDA_RF 2
5
SDA_RF
5
SDA_RF 5
NC_3
S_DATA
6
NC_2
6
AIF[P] 6
NC_4
46 FE_DEMOD3_TS_DATA 3
IF_AGC
NC_3 AIF[N] 7
7 7
SIF
8
SIF
8
SIF 8 SCL C6700 C6703 C6705 C6707 C6709 C6712
CVBS CVBS 9
CVBS 4 3300pF 3300pF 3300pF 0.022uF 0.022uF 0.022uF
9 9
NC_5
10
NC_4
10
NC_2 10 SDA 630V 630V 630V 630V 630V 630V
NC_6 5
11
NC_5
11
B2[+3.3V] 11
ERROR
A1 B1 TU_M/Q/W_AJ/EU/JP TU_M/Q/W_AJ/EU/JP TU_M/W_AJ/JP TU_W_KR_22nF TU_W_KR_22nF TU_W_KR_22nF
12
ERROR
12
ERROR 12
GROUND
A1 B1 6
IF[P]
GND GND 13
13 13
MCLK
14
MCLK
14
MCLK 14
SYNC
47 7
IF[N]
SYNC SYNC 15
15 15
VALID VALID 16
VALID
SIF C6705-*1 C6707-*1 C6709-*1 C6712-*1
TU_GND_A

TU_GND_B

16 16
DATA0 DATA0 17
DATA0 8 0.022uF 3300pF 3300pF 3300pF
17 17
DATA1
630V 630V 630V 630V
18
DATA1
18
DATA1 18
DATA2
SHIELD 9
CVBS
TU_M_AJ TU_Q_EU
19
DATA2
19
DATA2 19
TU_M_BR/TW_22nF TU_M_AJ
DATA3
DATA3 DATA3 20
20 20
DATA4
DATA4 DATA4 21
21 21
DATA5
22
DATA5
22
DATA5 22 A1 B1
DATA6 DATA6 23
DATA6 A1 B1
23 23
DATA7
24
DATA7
24
DATA7 24 47
RESET_DEMOD
RESET_DEMOD RESET_DEMOD 25
25 25
B2[+3.3V]
B2[+3.3V] B3[+3.3V] 26
26 26
SCL_DEMOD SCL_DEMOD 27
SCL_DEMOD SHIELD
27 27
B3[+1.2V]
B3[+1.2V] B4[+1.2V] 28
28 28
NC_7
NC_6 NC_3 29
29 29
SDA_DEMOD
SDA_DEMOD SDA_DEMOD 30
30 30

A1 B1
A1 B1 A1 B1 A1 B1
A1 B1 A1 B1
47
47 47

SHIELD
SHIELD SHIELD

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

JAPAN
1%
1/16W

R6801

POK GND
1 8 +2.5V_NORMAL
THERMAL

+3.3V_NORMAL R6800 EN FB
9

2 7 R2
JAPAN
26.1K

C6802
1%
1/16W

R6802

10K
0.01uF
+5V_NORMAL JAPAN IN
3 6
OUT 50V
JAPAN
BIAS SS C6804 C6805
ZD6800

4 5
2A
OPT

10uF
5V

0.1uF
10V 16V
C6803 JAPAN JAPAN
2700pF
50V
C6800 C6801 JAPAN
10uF 10uF
10V 10V
JAPAN JAPAN

Vout=0.6*(1+R2/R1)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES 068.sht

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.06.27
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
Tuner_2.5V 68 99
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

TU_N/D/M/W/Q_1.1V

D_Demod_Core
TU_N/D/M/W/Q
POWER_ON/OFF2_2 IC6900
TJ2132GDP [EP]GND
R6901-*1 R6902-*1

+3.3V_NORMAL 10K
10K

R1
18K

R6900 POK GND

1 8
TU_N/D/M/W/Q
THERMAL

10.5K

TU_N/D/M/W/Q_1.1V

EN FB R2
9

2 7
16K

L6900 C6904
BLM18PG121SN1D 0.01uF
IN OUT 50V
3 6
C6901 TU_N/D/M/W/Q
TU_N/D/M/W/Q C6900
10uF
0.1uF
10V +5V_NORMAL
BIAS
4 2A 5
SS

TU_N/D/M/W/Q TU_N/D/M/W/Q
C6903 C6905
2700pF 10uF
50V 10V
TU_N/D/M/W/Q TU_N/D/M/W/Q
C6902
1uF
10V
TU_N/D/M/W/Q

Vout=0.6*(1+R2/R1)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.06.27
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
+1.2V_DEMOD 99
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

(Option:LNB)

+13V (12V)

2A D7004-*1
Max 1.3A
40V
+13V

LNB_TSC LNB_SX34
D7002-*1 D7002
3.0A
SS23L LNB_SUZHOU D7004
3A
30V 40V 40V
LNB
LPH6050T-150M-R
15uH
L7000

LNB_SMAB34
C7009
10uF
C7003 C7005 C7006 C7007 25V
0.01uF 10uF 10uF 10uF LNB
50V 25V 25V 25V
LNB LNB LNB LNB
C7008 0.1uF

close to Boost pin(#1)

LNB_Allegro

A_GND A_GND

30V
[EP]GND

close to VIN pin(#15) Caution!! need isolated GND

BOOST

GNDLX

+13V

R7004
NC_3

NC_2

SS23L C7010 0
A_GND
LX

D7001-*1 0.1uF
LNB_TSC 50V
20

LNB
D7001 VCP 1 15 VIN
SS2040LL-LG THERMAL A_GND
LNB 2 14 GND
LNB_OUT1 21
40V EAN62653702 LNB
D7003 NC_1 3 13 VREG
LNB_SUZHOU C7004
0.1uF LNB_SMAB34 IC7000 R7003
C7000 C7001 R7000 TDI ISET 39K
2.2K LNB 50V 40V A8303SESTR-T(4M)
4 12
0.1uF 33pF
D7000 1W LNB_DMBT 1/16W
LNB LNB C7002 TDO 5 11 TCAP C7012
LNB LNB 0.22uF 1%
LNB 25V D7003-*1
10

LNB
LNB_SX34
6

0.1uF
40V
IRQ

SCL

SDA

ADD

TONECTRL

0.22uF

[EP]GND

BOOST

GNDLX

Close to Tuner A_GND

NC_3

NC_2

A_GND
Surge protectioin
LX
LNB

16
C7011

VCP 1 15 VIN
THERMAL
LNB 2 21 14 GND

NC_1 3 13 VREG
IC7000-*1
TDI 4 A8303SESTR-T
12 ISET

TDO 5 LNB_Allegro 11 TCAP

10
6

9
IRQ

SCL

SDA

ADD

TONECTRL
LNB
33
AR7000

LNB_NON_Tx
LNB_Tx
0
R7001

0
R7002
LNB_TX1

GND
LNB_TX1
I2C_SCL3
I2C_SDA3

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
LNB 2012.03.08
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
69
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
Downloaded from
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PAGE 72

RS-232C Control INTERFACE

EAN41348201
RS232C
+3.5V_ST

IC7200
MAX3232CDR

C1+ VCC
RS232C 1 16 RS232C
C7200 C7204
0.1uF V+ GND 0.1uF
RS232C 2 15 RS232C
C7201
0.1uF R7200
C1- DOUT1 100
3 14 DOUT1_JACK
RS232C
RS232C C2+ RIN1 R7201
4 13 100
C7202 RIN1_JACK
0.1uF C2- ROUT1
5 12
SOC_RX
OPT OPT
RS232C V- DIN1
VA7201
6 11
SOC_TX VA7200
C7203 20V 20V
0.1uF DOUT2 DIN2
7 10

RIN2 ROUT2
8 9

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
RS-232C I/F 72
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
Downloaded from
Only for training and www.Manualslib.com
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RIN1_JACK

RS232C DOUT1_JACK

RS232C
DOUT1_JACK
R 1
JP7300

JP7301

RIN1_JACK DETECT 3

L 4

GND 5
PEJ038-3B6
JP7302

JK7300

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

Vx1 LOCKAn/HTPDn
+3.3V_NORMAL
[41P Vx1
From TCON output wafer]
P7600
R7627 R7629 R7632
SP14-11592-01-51Pin 10K 10K 22
Lockn_LevelShifter Lockn_LevelShifter DEBUG_LED
A1[GN]
A2[RD]

+3.3V_NORMAL +1.8V_IO To F16

1 LOCKAn
C LD7600
2 C7601 0.1uF SAM2333
TXDAP7_L R7625 Q7603
10K B MMBT3904(NXP) DEBUG_LED
3 C7602 0.1uF Lockn_3.3V_Pullup P7601
C

TXDAN7_L Lockn_LevelShifter
R7626 SP14-11592-01-41Pin
4 E
1K
Lockn_1.8V_Pullup
5 C7603 0.1uF C
TXDAP6_L
Q7602
6 C7604 0.1uF R7624 10K B MMBT3904(NXP) 1 R7668 100 OPT
TXDAN6_L LOCKn_IN R7631 OLED_TCON_FW
Lockn_LevelShifter Lockn_LevelShifter
7 220 2 R7669 100
E 1% ON_RF_DONE
8 C7605 0.1uF DEBUG_LED 3 R7670 100
TXDAP5_L QSM_EN
E
9 C7606 0.1uF Q7604 4
TXDAN5_L R7628 100 MMBT3906(NXP)
LOCKAn
10 Lockn_Bypass B DEBUG_LED 5
C7607 0.1uF C
11 TXDAP4_L 6

12 C7608 0.1uF 7
TXDAN4_L
13 8

14 C7609 0.1uF 9
TXDAP3_L
15 C7610 0.1uF 10
TXDAN3_L
16 11

17 C7611 0.1uF +3.3V_NORMAL 12

TXDAP2_L
18 C7612 0.1uF L/D_EN(Pin30) 13
TXDAN2_L - T-Con L/D Function
19 HIGH : Enable 14
R7607 LOW or NC : Disable
C7613 0.1uF +3.3V_NORMAL
20 TXDAP1_L 10K 15
OPT
21 C7614 0.1uF R7609 0 16
TXDAN1_L R7605 3D&L_DIM_EN
10K OPT
22 OPT 17

23 C7615 0.1uF R7608 18 C7617 0.1uF

TXDAP0_L 10K +3.3V_NORMAL TXDBP7_L
24 C7616 0.1uF 19 C7618 0.1uF
TXDAN0_L R7606 TXDBN7_L
TCON_I2C_EN
10K
#25. GND 25 R7613 20
4.7K C7619 0.1uF
#26. LOCKN 26 LOCKn_IN OPT 21 TXDBP6_L
G

R7621
#27. HTPDAN 27 R7600 10K OPT *Pin27(HTPDAN) +3.3V_NORMAL 10K 22 C7620 0.1uF
R7619 0 TXDBN6_L
R7615 0
R7601 10K I2C_SCL2
S

#28. GND 28 23
D

Q7600 C7621 0.1uF

#29. AGP1 29 T2N7002AK R7617 24 TXDBP5_L
R7652
#30. AGP0 30 10K OPT +3.3V_NORMAL 33 OPT 25 C7622 0.1uF
TXDBN5_L
*Pin31(BIT_SEL) OPT
#31. Bit_Sel 31 R7602 10K OPT 26
HIGH or NC : 10Bit R7651
JP7600 LOW : 8Bit 100 *OLED_ELVDD_DET R7614 C7623 0.1uF
#32. EVDD_DET 32 POWER_DET_1 27 TXDBP4_L
4.7K
G

#33. 33 R7653 100 PANEL_I2C_LCD OPT 28 C7624 0.1uF

TXDBN4_L
R7620 0
#34. 34 R7654 100 PANEL_I2C_LCD R7616 0 29
I2C_SDA2
S

#35. 3D_EN 35 JP7604 R7604 100 30 C7625 0.1uF

OLED_3D_EN Q7601 TXDBP3_L
R7603 10K OPT T2N7002AK
R7618 C7626 0.1uF
#36. FORMAT1 36 31 TXDBN3_L
33 OPT
#37. FORMAT0 37 32

#38. SCL 38 R7655 100 PANEL_I2C_OLED 33 C7627 0.1uF

TXDBP2_L
#39. SDA 39 R7656 100 PANEL_I2C_OLED 34 C7628 0.1uF
TXDBN2_L
JP7603 R7657 100 *OLED_BDP_DET
#40. BDP 40 T_CON_SYS_POWER_OFF_from_MODULE 35

#41. EVDD_ON 41 R7658 100 36 C7629 0.1uF

INV_CTL TXDBP1_L
R7659 100 *OLED_Off-RS DONE C7630 0.1uF
#42. Off-RS DONE 42 COMPENSATION_DONE 37 TXDBN1_L
+3.3V_NORMAL
43 38
R7610
44 *UHD_Panel_Connection 10K 39 C7631 0.1uF
TXDBP0_L
R7665 C7650 OPT
45 R7661 R7662 R7663 R7664 10K 0.1uF 40 C7632 0.1uF
TXDBN0_L
10K 10K 10K 10K 16V
46 UHD_LED_PANEL R7612 100 Data Input Format[1:0] 41
UHD_LED_PANEL DATA_FORMAT_1_F16
UHD_LED_PANEL
47 UHD_LED_PANEL *Mode 3 (4 Division)
- Data Format 0(Pin37) = Low 42
48 R7611 Data Format 1(Pin36) = High
10K
49 *Mode 2 (2 Division)
- Data Format 0(Pin37) = High
50 Data Format 1(Pin36) = Low

51
+3.3V_NORMAL
52

R7622
10K
OPT
SW7600
JS2235S R7630 100
DATA_FORMAT_0_F16

OLED OPT
T_CON_SYS_POWER_OFF_from_MODULE 1 6 R7623
R7671 R7673 10K
0 0 R7681 0
OPT 2 5 OPT DATA_FORMAT_1 ON_RF_DONE
T_CON_SYS_POWER_OFF Not used LCD Net list
R7672 DEBUG_OLED_BDP R7674
0 0 R7682 0
OPT 3 4 OPT DATA_FORMAT_0 COMPENSATION_DONE
R7683 0
MODEL_OPT_12 OLED_3D_EN L/DIM0_VS_F16
R7675 R7684 0 L/DIM0_MOSI_F16
1K MODEL_OPT_14 QSM_EN
DEBUG_OLED_BDP L/DIM0_SCLK_F16
for OLED model R7685 0 MODE_SELECT
MODEL_OPT_15 OLED_TCON_FW
PWM_DIM2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS OLED 2015.4.28
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Output wafer

Ouput trace widths should be sized to conduct at least 2A

+13V(12V)

2A
Max 1.3A

D8502-*1 D8502
3.0A
LNB2_ONSEMI LNB2_SUZHOU D8504
LPH6050T-150M-R

30V 40V 40V

LNB2
15uH
L8500

LNB2
C8509
10uF
C8503 C8505 C8506 C8507 25V
0.01uF 10uF 10uF 10uF LNB2
50V 25V 25V 25V
LNB2 LNB2 LNB2 LNB2
C8508 0.1uF

close to Boost pin(#1) A_GND

A_GND
LNB2

[EP]GND

close to VIN pin(#15) Caution!! need isolated GND

BOOST

GNDLX

D8501-*1 R8504
NC_3

NC_2

C8510 0
A_GND
LX

0.1uF
30V 50V LNB2
LNB2_ONSEMI
20

LNB2
VCP 1 15 VIN
D8501
THERMAL A_GND
LNB 2 21 14 GND
LNB_OUT2
40V LNB2
D8503 NC_1 3 13 VREG
LNB2_SUZHOU C8504
0.1uF LNB2 IC8500 R8503
C8500 C8501 R8500 TDI ISET 39K
2.2K LNB2 50V 40V A8303SESTR-T(4M)
4 12
15pF 33pF
D8500 1W LNB2 1/16W
LNB2 LNB2 C8502 TDO 5 11 TCAP C8512
LNB2 LNB2 0.22uF 1%
LNB2 25V
10

LNB2
6

0.1uF
IRQ

SCL

SDA

ADD

TONECTRL

0.22uF

Close to Tuner A_GND

A_GND
Surge protectioin (12V)
LNB2

+13V
C8511
R8501
LNB2

9.1K
R8502
4.7K
LNB2
I2C_SCL3

I2C_SDA3

LNB_TX2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
LNA2 2014.04.29
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR 70
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

+1.8V_EMMC

EAN64106701

IC8800
R8801

R8802

EAN63508001 EAN63829501
10K
AR8803

10K
AR8804

10K

IC8800-*1 IC8800-*2
THGBMBG5D1KBAIL KLM4G1FEPD-B031
THGBMFG6C1LBAIL
EMMC_DATA[0-7] AR8801
22 A3 C7 A3 C7
DAT0 NC_22 DAT0 NC_22
A4 C8 A4 C8
EMMC_DATA[0] A3 C8 DAT1 NC_23 DAT1 NC_23
DAT0 NC_23 A5 C9 A5 C9
EMMC_DATA[1] A4 C9 DAT2 NC_24 DAT2 NC_24
DAT1 NC_24 B2 C10 B2 C10
EMMC_DATA[2] A5 C10 DAT3 NC_25 DAT3 NC_25
DAT2 NC_25 B3 C11 B3 C11
EMMC_DATA[3] B2 C11 DAT4 NC_26 DAT4 NC_26
DAT3 NC_26 B4 C12 B4 C12
EMMC_DATA[4] B3 C12 DAT5 NC_27 DAT5 NC_27
DAT4 NC_27 B5 C13 B5 C13
EMMC_DATA[5] B4 C13 DAT6 NC_28 DAT6 NC_28
DAT5 NC_28 B6 C14 B6 C14
EMMC_DATA[6] B5 C14 DAT7 NC_29 DAT7 NC_29
AR8802 DAT6 NC_29 D1 D1
EMMC_DATA[7] 22 B6 D1 NC_30 NC_30
DAT7 NC_30 DAT5 D2 D2
D2 NC_31 NC_31
NC_31 M6 D3 M6 D3
D3 CLK NC_32 CLK NC_32
NC_32 M5 D4 M5 D4
M6 D4 CMD NC_33 CMD NC_33
CLK NC_33 D12 D12
M5 D12 NC_34 NC_34
CMD NC_34 D13 D13
D13 NC_35 NC_35
NC_35 A7 D14 A7 D14
D14 RFU_2 NC_36 RFU_1 NC_36
NC_36 E5 E1 E5 E1
A6 E1 RFU_4 NC_37 RFU_2 NC_37
VSS_1 NC_37 E8 E2 G3 E2
A7 E2 RFU_5 NC_38 RFU_3 NC_38
RFU_2 NC_38 E3 K6 E3
C5 E3 NC_39 RFU_4 NC_39
NC_21 NC_39 G3 E12 K7 E12
E5 E12 RFU_9 NC_40 RFU_5 NC_40
RFU_4 NC_40 G10 E13 E8 E13
DAT3 E8 E13 RFU_10 NC_41 RFU_6 NC_41
RFU_5 NC_41 K6 E14 E9 E14
E9 E14 RFU_13 NC_42 RFU_7 NC_42
DAT4 VSF_1 NC_42 K7 F1 E10 F1
E10 F1 RFU_14 NC_43 RFU_8 NC_43
DAT6 K10 F2 F10 F2

EMMC5.0_4G_SAMSUNG
VSF_2 NC_43
DAT5 F10 F2
EMMC5.0_4G_TOSHIBA

RFU_15 NC_44 RFU_9 NC_44

VSF_3 NC_44 P7 F3 G10 F3
G3 F3 RFU_16 NC_45 RFU_10 NC_45
DAT6 P10 F12 K10 F12
EMMC5.1_8G_TOSHIBA

RFU_9 NC_45
G10 F12 RFU_17 NC_46 RFU_11 NC_46
RFU_10 NC_46 F13 P10 F13
DAT7 H5 F13 NC_47 RFU_13 NC_47
EMMC_STRB DS NC_47 H5 F14 H5 F14
J5 F14 DS NC_48 DS NC_48
VSS_5 NC_48 G1 G1
K6 G1 NC_49 NC_49
RFU_13 NC_49 E9 G2 G2
AR8800 K7 G2 VSF_1 NC_50 NC_50
RFU_14 NC_50 E10 G12 G12
K10 G12 VSF_2 NC_51 NC_51
EMMC_CLK RFU_15 NC_51 F10 G13 G13
P7 G13 VSF_3 NC_52 NC_52
EMMC_CMD RFU_16 NC_52 G14 G14
22 P10 G14 NC_53 NC_53
RFU_17 NC_53 H1 H1
H1 NC_54 NC_54
SOC_EMMC_STRB EMMC_STRB NC_54 EMMC_STRB K5 H2 K5 H2
H2 RSTN NC_55 RSTN NC_55
NC_55 H3 H3
K5 H3 NC_56 NC_56
RSTN NC_56 H12 H12
H12 NC_57 NC_57
C8812 R8800 NC_57 C6 H13 C6 H13
0.1uF H13 VCCQ_1 NC_58 VDD_1 NC_58
10K NC_58 M4 H14 M4 H14
16V C6 H14 VCCQ_2 NC_59 VDD_2 NC_59
VCCQ_1 NC_59 N4 J1 N4 J1
OPT +1.8V_EMMC M4 J1 VCCQ_3 NC_60 VDD_3 NC_60
VCCQ_2 NC_60 P3 J2 P3 J2
EMMC_CLK_BALL N4 J2 VCCQ_4 NC_61 VDD_4 NC_61
VCCQ_3 NC_61 P5 J3 P5 J3
P3 J3 VCCQ_5 NC_62 VDD_5 NC_62
VCCQ_4 NC_62 J12 J12
EMMC_CMD_BALL P5 J12 NC_63 NC_63
VCCQ_5 NC_63 J13 J13
J13 NC_64 NC_64
C8800 C8801 NC_64 E6 J14 E6 J14
EMMC_RESET_BALL 0.1uF 2.2uF J14 VCC_1 NC_65 VDDF_1 NC_65
NC_65 F5 K1 F5 K1
16V 10V E6 K1 VCC_2 NC_66 VDDF_2 NC_66
+3.3V_EMMC VCC_1 NC_66 EMMC_RESET_BALL J10 K2 J10 K2
F5 K2 VCC_3 NC_67 VDDF_3 NC_67
VCC_2 NC_67 K9 K3 K9 K3
J10 K3 VCC_4 NC_68 VDDF_4 NC_68
VCC_3 NC_68 K12 K12
K9 K12 NC_69 NC_69
VCC_4 NC_69 K13 K13
K13 NC_70 NC_70
NC_70 C2 K14 C2 K14
EMMC_VDDI K14 VDDI NC_71 VDDI NC_71
pattern 0.2mm NC_71 L1 L1
C2 L1 NC_72 NC_72
VDDI NC_72 L2 L2
C8804 C8805 L2 NC_73 NC_73
+1.8V / +3.3V - eMMC C8802 C8803
0.1uF
16V
2.2uF
10V E7
NC_73
NC_74
L3
L12
C4
N2
VSSQ_1
VSSQ_2
NC_74
NC_75
L3
L12
C4
N2
VSS_1
VSS_2
NC_74
NC_75
L3
L12
0.1uF 2.2uF N5 L13 N5 L13
VSS_2 NC_75
16V 10V G5 L13 VSSQ_3 NC_76 VSS_3 NC_76
VSS_3 NC_76 P4 L14 P4 L14
+3.3V_EMMC +1.8V_EMMC H10
VSS_4 NC_77
L14
P6
VSSQ_4 NC_77
M1 P6
VSS_4 NC_77
M1
K8 M1 VSSQ_5 NC_78 VSS_5 NC_78
VSS_6 NC_78 A6 M2 A6 M2
C4 M2 VSS_1 NC_79 VSS_6 NC_79
+3.3V_NORMAL +1.8V_IO N2
VSSQ_1 NC_79
M3
E7
VSS_2 NC_80
M3 E7
VSS_7 NC_80
M3
VSSQ_2 NC_80 G5 M7 G5 M7
N5 M7 VSS_3 NC_81 VSS_8 NC_81
P4
VSSQ_3 NC_81
M8
EMMC_CLK_BALL H10 M8 H10 M8
VSS_4 NC_82 VSS_9 NC_82
L8800 L8801 VSSQ_4 NC_82 J5 M9 J5 M9
BLM18PG121SN1D BLM18PG121SN1D P6 M9 VSS_5 NC_83 VSS_10 NC_83
VSSQ_5 NC_83 K8 M10 K8 M10
M10 VSS_6 NC_84 VSS_11 NC_84
NC_84 M11 M11
M11 NC_85 NC_85
NC_85 M12 M12
M12 NC_86 NC_86
C8809 C8810 C8811 NC_86 A1 M13 A1 M13
C8806 C8807 C8808 0.1uF 10uF A1 M13 NC_1 NC_87 NC_1 NC_87
0.1uF 10uF 10uF
10uF DAT3 NC_1 NC_87 A2 M14 A2 M14
16V 10V 10V A2 M14 NC_2 NC_88 NC_2 NC_88
16V 10V 10V DAT4 NC_2 NC_88 A8 N1 A8 N1
A8 N1 NC_3 NC_89 NC_3 NC_89
DAT7 NC_3 NC_89 A9 N3 A9 N3
A9 N3 NC_4 NC_90 NC_4 NC_90
NC_4 NC_90 A10 N6 A10 N6
A10 N6 NC_5 NC_91 NC_5 NC_91
NC_5 NC_91 EMMC_CMD_BALL A11 N7 A11 N7
A11 N7 NC_6 NC_92 NC_6 NC_92
NC_6 NC_92 A12 N8 A12 N8
A12 N8 NC_7 NC_93 NC_7 NC_93
NC_7 NC_93 A13 N9 A13 N9
A13 N9 NC_8 NC_94 NC_8 NC_94
NC_8 NC_94 A14 N10 A14 N10
A14 N10 NC_9 NC_95 NC_9 NC_95
NC_9 NC_95 B1 N11 B1 N11
B1 N11 NC_10 NC_96 NC_10 NC_96
NC_10 NC_96 B7 N12 B7 N12
B7 N12 NC_11 NC_97 NC_11 NC_97
NC_11 NC_97 B8 N13 B8 N13
B8 N13 NC_12 NC_98 NC_12 NC_98
NC_12 NC_98 B9 N14 B9 N14
B9 N14 NC_13 NC_99 NC_13 NC_99
NC_13 NC_99 B10 P1 B10 P1
B10 P1 NC_14 NC_100 NC_14 NC_100
NC_14 NC_100 B11 P2 B11 P2
B11 P2 NC_15 NC_101 NC_15 NC_101
NC_15 NC_101 B12 P8 B12 P7
EMMC_VDDI B12
NC_16 NC_102
P8
B13
NC_16 NC_102
P9 B13
NC_16 RFU_12
P8
Don’t Connect Power At VDDI B13
B14
NC_17
NC_18
NC_103
NC_104
P9
P11
B14
C1
NC_17
NC_18
NC_103
NC_104
P11
P12
B14
C1
NC_17
NC_18
NC_102
NC_103
P9
P11
C1 P12 NC_19 NC_105 NC_19 NC_104
NC_19 NC_105 C3 P13 C3 P12
(Just Interal LDO Capacitor) DAT5 C3
C7
NC_20 NC_106
P13
P14
C5
NC_20
NC_21
NC_106
NC_107
P14 C5
NC_20
NC_21
NC_105
NC_106
P13
NC_22 NC_107 P14
NC_107

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES 081.sht

IC9000
R9000
LGE1124(F16)
10K

IC9000 C7210 0.1uF C17 V30

TXA_0P/VX1_0P_SOC C7211 0.1uF C18
V_VX1_RX0N O_VX1_TX0N
V31
LGE1124(F16) TXA_0N/VX1_0N_SOC V_VX1_RX0P O_VX1_TX0P
C7212 0.1uF A17 W32
TXA_1P/VX1_1P_SOC C7213 0.1uF B17
V_VX1_RX1N O_VX1_TX1N
W33
TXA_1N/VX1_1N_SOC C7214 0.1uF C15
V_VX1_RX1P O_VX1_TX1P
W30
C28
HDMI2_0_RX0N HDMI2_1_RX0N
C32 TXA_2P/VX1_2P_SOC C7215 0.1uF C16
V_VX1_RX2N O_VX1_TX2N
W31
C27
HDMI2_0_RX0P HDMI2_1_RX0P
C31 TXA_2N/VX1_2N_SOC C7216 0.1uF A15
V_VX1_RX2P O_VX1_TX2P
Y30
VIDEO

B27 B31 TXA_CLKP/VX1_3P_SOC C7217

V_VX1_RX3N O_VX1_TX3N
A27
HDMI2_0_RX1N HDMI2_1_RX1N
A31
Vx1 Rx Vide TXA_CLKN/VX1_3N_SOC
0.1uF B15
V_VX1_RX3P O_VX1_TX3P
Y31
HDMI2_0_RX1P HDMI2_1_RX1P (8 lane) C7218 0.1uF C13
C26
HDMI2_0_RX2N HDMI2_1_RX2N
C30 TXA_3P/VX1_4P_SOC C7219 0.1uF C14
V_VX1_RX4N
Y29
C25 C29 From M16 TXA_3N/VX1_4N_SOC V_VX1_RX4P O_VX1_TXLOCKN
HDMI2_0_RX2P HDMI2_1_RX2P C7220 0.1uF A13 V29 R9012 10K
B29
HDMI2_0_RXCN HDMI2_1_RXCN
C33 TXA_4P/VX1_5P_SOC C7221 0.1uF B13
V_VX1_RX5N O_VX1_RMLVDS
A29
HDMI2_0_RXCP HDMI2_1_RXCP
B33 TXA_4N/VX1_5N_SOC C7222 0.1uF C11
V_VX1_RX5P
AA30
TXB_0P/VX1_6P_SOC C7223 0.1uF C12
V_VX1_RX6N TC_VX1_TX0N
AA31
TXDBP0_L
E29
HDMI2_0_SCL HDMI2_1_SCL
E30 TXB_0N/VX1_6N_SOC C7224 0.1uF A11
V_VX1_RX6P TC_VX1_TX0P
AB32
TXDBN0_L
D29
HDMI2_0_SDA HDMI2_1_SDA
D30 TXB_1P/VX1_7P_SOC C7225 0.1uF B11
V_VX1_RX7N TC_VX1_TX1N
AB33
TXB_1N/VX1_7N_SOC C7226 0.1uF C9
V_VX1_RX7P TC_VX1_TX1P
AB30
E28 D32 TXB_2P/VX1_8P_SOC C7227
V_VX1_RX8N TC_VX1_TX2N TXDBP1_L
Vx1 Rx OSD
OSD

HDMI2_0_5V_DET HDMI2_1_5V_DET 0.1uF C10 AB31

TXB_2N/VX1_8N_SOC C7228 0.1uF A9
V_VX1_RX8P TC_VX1_TX2P
AC30
TXDBN1_L
D28 D31 (2 lane) TXB_CLKP/VX1_9P_SOC V_VX1_RX9N TC_VX1_TX3N
HDMI2_0_HPD HDMI2_1_HPD C7229 0.1uF B9 AC31
From M16 TXB_CLKN/VX1_9N_SOC V_VX1_RX9P TC_VX1_TX3P
C7 AD32
D27 V_VX1_RX10N TC_VX1_TX4N TXDBP2_L
HDMI2_0_ARC M16+F16 C8 AD33
D26 V_VX1_RX10P TC_VX1_TX4P TXDBN2_L
HDMI2_0_CEC <M16 Vx1 Tx AC coupling cap> A7 AD30
V_VX1_RX11N TC_VX1_TX5N
B7 AD31
V_VX1_RX11P TC_VX1_TX5P
C6 AE30
V_VX1_RX12N TC_VX1_TX6N TXDBP3_L
D6 AE31
V_VX1_RX12P TC_VX1_TX6P TXDBN3_L
C5 AF32
V_VX1_RX13N TC_VX1_TX7N
D5 AF33
V_VX1_RX13P TC_VX1_TX7P
A5 AF30
V_VX1_RX14N TC_VX1_TX8N TXDBP4_L
B5 AF31
C4
V_VX1_RX14P TC_VX1_TX8P
AG30
TXDBN4_L Vx1 Tx
V_VX1_RX15N TC_VX1_TX9N
D4
V_VX1_RX15P TC_VX1_TX9P
AG31
AH32
41p
TC_VX1_TX10N TXDBP5_L
R9007 4.7K D12 AH33
VX1_GLOCKN_I TC_VX1_TX10P TXDBN5_L
D14 AH30
VX1_LOCKN_CH_I TC_VX1_TX11N
D13 AH31
VX1_LOCKN_CH_O TC_VX1_TX11P
R9008 10K D16 AJ30
V_VX1_RXHTPDN TC_VX1_TX12N TXDBP6_L
R9009 22 D15 AJ31
F16_VX1_LOCKN_V/O V_VX1_RXLOCKN TC_VX1_TX12P TXDBN6_L
R9010 20K G29 AK32
V_VX1_RMLVDS TC_VX1_TX13N
To M16 (3.3V Level) AK33
TC_VX1_TX13P
C3 AK30
O_VX1_RX0N TC_VX1_TX14N TXDBP7_L
D3 AK31
O_VX1_RX0P TC_VX1_TX14P TXDBN7_L
A3 AL30
O_VX1_RX1N TC_VX1_TX15N
B3 AL31
O_VX1_RX1P TC_VX1_TX15P
+1.8V_IO C2 AM33 R9013 33
M16 :1.8V Domain D2
O_VX1_RX2N TC_VX1_TXLOCKN
AA29
LOCKAn From TCON
R9014 20K
O_VX1_RX2P TC_VX1_RMLVDS
C1 F16_3.3V_NORMAL
O_VX1_RX3N
D1 U27
O_VX1_RX3P VDDIO_C4TX[1]
V27
VDDIO_C4TX[2]
R9006 10K D11
O_VX1_RXHTPDN
OPT D10
O_VX1_RXLOCKN
R9005
10K

+3.3V_NORMAL G30
V_VX1_TX0N
G31
Vx1_LOCK_N V_VX1_TX0P
H32
R9003
10K

R9004 C TXDAP0_L V_VX1_TX1N

Q9001 H33
10K B TXDAN0_L V_VX1_TX1P
MMBT3904(NXP) H30
R9001
10K

V_VX1_TX2N
H31
C E V_VX1_TX2P
R9002 J30
Q9000 TXDAP1_L V_VX1_TX3N
10K B J31
F16_VX1_LOCKN_V/O MMBT3904(NXP) TXDAN1_L V_VX1_TX3P
K32
V_VX1_TX4N
E K33
V_VX1_TX4P
K30
TXDAP2_L V_VX1_TX5N
K31
TXDAN2_L V_VX1_TX5P
L30
V_VX1_TX6N
L31
V_VX1_TX6P
M32
TXDAP3_L V_VX1_TX7N
M33
TXDAN3_L V_VX1_TX7P
M30
V_VX1_TX8N
M31
Vx1 Tx TXDAP4_L
N30
V_VX1_TX8P
V_VX1_TX9N
N31
51p TXDAN4_L
P32
V_VX1_TX9P
V_VX1_TX10N
P33
V_VX1_TX10P
P30
TXDAP5_L V_VX1_TX11N
P31
TXDAN5_L V_VX1_TX11P
R30
V_VX1_TX12N
R31
V_VX1_TX12P
T32
TXDAP6_L V_VX1_TX13N
T33
TXDAN6_L V_VX1_TX13P
T30
V_VX1_TX14N
T31
V_VX1_TX14P
U30
TXDAP7_L V_VX1_TX15N
U31
TXDAN7_L V_VX1_TX15P

R9015 33 N29
V_VX1_TXLOCKN

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 2015.4.27
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Vx1, HDMI IF

AJ14 AB5
DDR0_A[0] DDR0_A0 DDR1_A0 DDR1_A[0]
AJ18 AF5
DDR0_A[1] DDR0_A1 DDR1_A1 DDR1_A[1] DVDD15 DDR0_MVREFCA0 DVDD15 DDR0_MVREFCA1 DDR_SAMSUNG DDR_SAMSUNG
AJ12 Y5
DDR0_A[2] DDR0_A2 DDR1_A2 DDR1_A[2] IC9100 DDR0_MVREFCA0 DDR0_MVREFCA1
AJ10 V5 IC9102
DDR0_A[3]
AK20
DDR0_A3 DDR1_A3
AH4
DDR1_A[3] K4B1G1646G-BCNB DDR0_MVREFDQ0 K4B1G1646G-BCNB DDR0_MVREFDQ1
DDR0_A[4] DDR0_A4 DDR1_A4 DDR1_A[4]
AK11 W4 R9102 R9114
DDR0_A[5] DDR0_A5 DDR1_A5 DDR1_A[5] 1K 1K DDR3
AJ20 AH5 1%
DDR0_A[6] DDR0_A6 DDR1_A6 DDR1_A[6] 1% 1Gbit DDR3
N3 M8 N3 M8
AJ11 W5 DDR0_A[0] A0 (x16) VREFCA 1Gbit
DDR0_A[7] DDR0_A7 DDR1_A7 DDR1_A[7] DDR0_A[0] A0 VREFCA
P7 P7 (x16)
AK19 AG4 DDR0_A[1] A1
DDR0_A[8] DDR0_A8 DDR1_A8 DDR1_A[8] DDR0_A[1] A1
P3 DDR (A-0) P3
AJ13 AA5 DDR0_A[2] A2
DDR0_A[9] DDR0_A9 DDR1_A9 DDR1_A[9] DDR0_A[2] A2
R9115 N2 H1 N2 H1
AK21 AJ4 R9103 DDR0_A[3] A3 VREFDQ DDR (A-1)
DDR0_A[10] DDR0_A10 DDR1_A10 DDR1_A[10] 1K DDR0_A[3] A3 VREFDQ
1K P8 P8
AK18 AF4 1% DDR0_A[4] A4
DDR0_A[11] DDR0_A11 DDR1_A11 DDR1_A[11] 1% DDR0_A[4] A4
P2 P2
AK17 AE4 DDR0_A[5] A5
DDR0_A[12] DDR0_A12 DDR1_A12 DDR1_A[12] R9121 DVDD15 DDR0_A[5] A5
R8 L8 R8 L8 R9125 DVDD15
AK13 AA4 DDR0_A[6] A6 ZQ
DDR0_A[13] DDR0_A13 DDR1_A13 DDR1_A[13] 240 DDR0_A[6] A6 ZQ
R2 R2 240
AJ19 AG5 DDR0_A[7] A7 1% 1%
DDR0_A[14] DDR0_A14 DDR1_A14 DDR1_A[14] DDR0_A[7] A7
T8 T8
AJ9 U5 DDR0_A[8] A8
DDR0_A15 DDR1_A15 DDR0_A[8] A8
R3 B2 R3 B2
AK10 V4 DDR0_A[9] A9 VDD_1
DDR0_BA[0] DDR0_BA0 DDR1_BA0 DDR1_BA[0] DDR0_A[9] A9 VDD_1
DVDD15 DDR1_MVREFCA0 L7 D9 L7 D9
AJ21 AJ5 DDR0_A[10] A10/AP VDD_2
DDR0_BA[1] DDR0_BA1 DDR1_BA1 DDR1_BA[1] DDR0_A[10] A10/AP VDD_2
R7 G7 R7 G7
AK14 AB4 DDR0_A[11] A11 VDD_3
DDR0_BA[2] DDR0_BA2 DDR1_BA2 DDR1_BA[2] DDR0_A[11] A11 VDD_3
N7 K2 N7 K2
DDR0_A[12] A12/BC VDD_4 DDR0_A[12] A12/BC VDD_4
R9104 T3 K8 T3 K8
AK8 T4 DDR0_A[13] NC_6 VDD_5
DDR0_RASZ DDR0_RAS_N DDR1_RAS_N DDR1_RASZ 1K DDR0_A[13] NC_6 VDD_5
N1 N1
AK9 U4 1% VDD_6
DDR0_CASZ DDR0_CAS_N DDR1_CAS_N DDR1_CASZ M7 N9 VDD_6
AK16 AD4 M7 N9
NC_7 VDD_7 NC_7 VDD_7
DDR0_WEZ DDR0_WE_N DDR1_WE_N DDR1_WEZ R1 R1
AJ8 T5 VDD_8
DDR0_ODT DDR0_ODT DDR1_ODT DDR1_ODT M2 R9 VDD_8
AJ17 AE5 M2 R9
DDR0_BA[0] BA0 VDD_9 DDR0_BA[0] BA0 VDD_9
DDR0_CKE DDR0_CKE DDR1_CKE DDR1_CKE N8 N8
AK12 Y4 R9105 BA1
DDR0_RESET DDR1_RESET DDR0_BA[1] DDR0_BA[1] BA1
DDR0_RST_N DDR1_RST_N 1K M3 M3
AJ16 AD5 1% DDR0_BA[2] BA2
DDR0_CSB0 DDR0_CS0 DDR1_CS0 DDR1_CSB0 A1 DDR0_BA[2] BA2
A1
VDDQ_1 VDDQ_1
J7 A8 J7 A8
AN5 P2 DDR0_D_CKP CK VDDQ_2
DDR0_VREF0 DDR0_VREF0 DDR1_VREF0 DDR1_VREF0 R9120 DDR0_U_CKP R9124 CK VDDQ_2
100 K7 C1 K7 C1
AN24 AN2 DDR0_D_CKN CK VDDQ_3 100
DDR0_VREF1 DDR0_VREF1 DDR1_VREF1 DDR0_U_CKN CK VDDQ_3
K9 C9 K9 C9
R9100 240 AM24 P1 R9101 240
DDR0_CKE CKE VDDQ_4
DDR0_ZQ_CALIB DDR1_ZQ_CALIB D2 DDR0_CKE CKE VDDQ_4
1% 1% D2
VDDQ_5 VDDQ_5
DDR0_DQ[0-15] DDR1_DQ[0-15] DVDD15 DDR0_MVREFDQ0 DVDD15 DDR0_MVREFDQ1 L2 E9 L2 E9
DDR0_DQ[0] AM7 T2 DDR1_DQ[0]
DDR0_CSB0 CS VDDQ_6
DDR0_DQ0 DDR1_DQ0 K1 F1 DDR0_CSB0 CS VDDQ_6
DDR0_DQ[1] AM14 AC2 DDR1_DQ[1] K1 F1
DDR0_ODT ODT VDDQ_7 DDR0_ODT ODT VDDQ_7
DDR0_DQ1 DDR1_DQ1 J3 H2 J3 H2
DDR0_DQ[2] AL6 R3 DDR1_DQ[2]
DDR0_RASZ RAS VDDQ_8
DDR0_DQ2 DDR1_DQ2 K3 H9 DDR0_RASZ RAS VDDQ_8
DDR0_DQ[3] AL13 AB3 DDR1_DQ[3] R9106 R9116 K3 H9
DDR0_CASZ CAS VDDQ_9 DDR0_CASZ CAS VDDQ_9
DDR0_DQ3 DDR1_DQ3 1K 1K L3 L3
DDR0_DQ[4] AN6 R1 DDR1_DQ[4]
1% DDR0_WEZ WE C9144 C9145
DDR0_DQ4 DDR1_DQ4 1% 0.1uF 0.1uF DDR0_WEZ WE C9148 C9149
J1 J1 0.1uF 0.1uF
DDR0_DQ[5] AN14 AC1 DDR1_DQ[5]
NC_1
DDR0_DQ5 DDR1_DQ5 T2 J9 NC_1
DDR0_DQ[6] AM6 R2 DDR1_DQ[6] T2 J9
DDR0_RESET RESET NC_2 DDR0_RESET RESET NC_2
DDR0_DQ6 DDR1_DQ6 L1 L1
DDR0_DQ[7] AL14 AC3 DDR1_DQ[7]
NC_3
DDR0_DQ7 DDR1_DQ7 L9 NC_3
DDR0_DQ[8] AM13 AB2 DDR1_DQ[8] R9107 R9117 L9
NC_4 NC_4
DDR0_DQ8 DDR1_DQ8 1K 1K F3 T7 F3 T7
DDR0_DQ[9] AM8 U2 DDR1_DQ[9]
1% DDR0_DQS0 DQSL NC_5 DDR0_A[14]
DDR0_DQ9 DDR1_DQ9 1% DDR0_DQS2 DQSL NC_5 DDR0_A[14]
G3 G3
DDR0_DQ[10] AL12 AA3 DDR1_DQ[10]
DDR0_DQS0B DQSL
DDR0_DQ10 DDR1_DQ10 DDR0_DQS2B DQSL
DDR0_DQ[11] AL7 T3 DDR1_DQ[11]
DDR0_DQ11 DDR1_DQ11 C7 A9 DDR_MICRON C7 A9
DDR0_DQ[12] AL11 Y3 DDR1_DQ[12]
DDR0_DQS1 DQSU VSS_1 IC9100-*1
DDR_MICRON

DDR0_DQ12 DDR1_DQ12 B7 B3 MT41J64M16TW-093:J DDR0_DQS3 DQSU VSS_1 IC9102-*1

DDR0_DQ[13] AN8 U1 DDR1_DQ[13] B7 B3 MT41J64M16TW-093:J
DDR0_DQS1B DQSU VSS_2 DDR0_DQS3B DQSU VSS_2
DDR0_DQ13 DDR1_DQ13 E1 N3
A0 VREFCA
M8
E1 N3 M8
DDR0_DQ[14] AM12 AA2 DDR1_DQ[14]
VSS_3
P7
A1 P7
A0 VREFCA

DDR0_DQ14 DDR1_DQ14 DVDD15 DDR1_MVREFDQ0 E7 G8

P3
N2
A2
H1 VSS_3 P3
A1
A2
DDR0_DQ[15] AL8 U3 DDR1_DQ[15] P8
A3 VREFDQ
E7 G8 N2
A3 VREFDQ
H1

DDR0_DM0 DML VSS_4 P2

A4
DDR0_DM2 DML VSS_4
P8
A4
DDR0_DQ15 DDR1_DQ15 D3 J2 R8
A5
A6 ZQ
L8
D3 J2
P2
R8
A5
L8
AN12 AA1 DDR0_DM1 DMU VSS_5
R2
A7 R2
A6 ZQ

DDR0_DM0 DDR0_DM0 DDR1_DM0 DDR1_DM0 J8

T8
R3
A8
B2 DDR0_DM3 DMU VSS_5 T8
A7
A8

AN9 V1 L7
A9 VDD_1
D9 J8 R3
A9 VDD_1
B2

DDR0_DQ[0-15] VSS_6 R7
A10/AP VDD_2
G7
DDR0_DQ[16-31] VSS_6
L7
A10/AP VDD_2
D9

DDR0_DM1 DDR0_DM1 DDR1_DM1 DDR1_DM1 DDR0_DQ[0] E3 M1 N7

A11 VDD_3
K2
DDR0_DQ[16] E3 M1
R7
A11 VDD_3
G7

R9108 T3
A12/BC VDD_4
K8
N7
A12/BC VDD_4
K2

DQL0 VSS_7 NC_6 VDD_5

N1
DQL0 VSS_7
T3
NC_6 VDD_5
K8

1K DDR0_DQ[1] F7 M9 M7
NC_5
VDD_6
VDD_7
N9
DDR0_DQ[17] F7 M9 M7
VDD_6
N1
N9
AL10 W3 1% DQL1 VSS_8 VDD_8
R1 NC_5 VDD_7
R1

DDR0_D_CKP DDR0_D_CKP DDR1_D_CKP DDR1_D_CKP DDR0_DQ[2] F2 P1

M2
N8
BA0 VDD_9
R9
DQL1 VSS_8 M2
BA0
VDD_8
VDD_9
R9

AM10 W2 M3
BA1 DDR0_DQ[18] F2 P1 N8
BA1

DDR0_D_CKN DDR1_D_CKN DQL2 VSS_9 BA2

A1
DQL2 VSS_9
M3
BA2
DDR0_D_CKN DDR1_D_CKN DDR0_DQ[3] F8 P9 J7
CK
VDDQ_1
VDDQ_2
A8
DDR0_DQ[19] F8 P9 J7
VDDQ_1
A1
A8
AM9 V2 DQL3 VSS_10
K7
CK VDDQ_3
C1
K7
CK VDDQ_2
C1

DDR0_DQS0 DDR0_DQS0 DDR1_DQS0 DDR1_DQS0 DDR0_DQ[4] H3 T1

K9
CKE VDDQ_4
C9
D2 DQL3 VSS_10 K9
CK
CKE
VDDQ_3
VDDQ_4
C9

AL9 V3 L2
VDDQ_5
E9 DDR0_DQ[20] H3 T1 VDDQ_5
D2

DQL4 VSS_11 K1
CS VDDQ_6
F1
DQL4 VSS_11
L2
CS VDDQ_6
E9

DDR0_DQS0B DDR0_DQS_N0 DDR1_DQS_N0 DDR1_DQS0B DDR0_DQ[5] H8 T9 J3

ODT VDDQ_7
H2
DDR0_DQ[21] H8 T9
K1
ODT VDDQ_7
F1

AM11 Y2 R9109 K3
RAS VDDQ_8
H9
J3
RAS VDDQ_8
H2

DQL5 VSS_12 L3
CAS VDDQ_9
DQL5 VSS_12
K3
CAS VDDQ_9
H9

DDR0_DQS1 DDR0_DQS1 DDR1_DQS1 DDR1_DQS1 1K DDR0_DQ[6] G2 WE

NC_1
J1
DDR0_DQ[22] G2
L3
WE
J1
AN11 Y1 1% DQL6
T2
RESET NC_2
J9
T2
NC_1
J9

DDR0_DQS1B DDR0_DQS_N1 DDR1_DQS_N1 DDR1_DQS1B DDR0_DQ[7] H7 NC_3

L1
L9 DQL6 RESET NC_2
NC_3
L1

F3
NC_4
T7 DDR0_DQ[23] H7 NC_4
L9

DQL7 G3
DQSL NC_7
DQL7
F3
DQSL NC_7
T7

DDR0_DQ[16-31] B1 DQSL

B1
G3
DQSL
DDR0_DQ[16] AM16 AE2 VSSQ_1
C7
DQSU VSS_1
A9
C7 A9

DDR0_DQ16 DDR1_DQ16 DDR0_DQ[8] D7 B9

B7
DQSU VSS_2
B3
E1 VSSQ_1 B7
DQSU
DQSU
VSS_1
VSS_2
B3

DDR0_DQ[17] AL22 AL3 E7

VSS_3
G8 DDR0_DQ[24] D7 B9 VSS_3
E1

DQU0 VSSQ_2 D3
DML VSS_4
J2
DQU0 VSSQ_2
E7
DML VSS_4
G8

DDR0_DQ17 DDR1_DQ17 DDR0_DQ[9] C3 D1 DMU VSS_5

VSS_6
J8
DDR0_DQ[25] C3 D1
D3
DMU VSS_5
J2
J8
DDR0_DQ[18] AL15 AD3 DQU1 VSSQ_3
E3
DQ0 VSS_7
M1
E3
VSS_6
M1

DDR0_DQ18 DDR1_DQ18 DDR0_DQ[10] C8 D8

F7
F2
DQ1 VSS_8
M9
P1 DQU1 VSSQ_3 F7
DQ0
DQ1
VSS_7
VSS_8
M9

DDR0_DQ[19] AM23 AM2 F8

DQ2 VSS_9
P9 DDR0_DQ[26] C8 D8 F2
DQ2 VSS_9
P1

DQU2 VSSQ_4 H3
DQ3 VSS_10
T1
DQU2 VSSQ_4
F8
DQ3 VSS_10
P9

DDR0_DQ19 DDR1_DQ19 DVDD15 DDR0_VREF0 DVDD15 DDR0_VREF1 DDR0_DQ[11] C2 E2 H8

DQ4
DQ5
VSS_11
VSS_12
T9
DDR0_DQ[27] C2 E2
H3
H8
DQ4 VSS_11
T1
T9
DDR0_DQ[20] AN15 AD1 DQU3 VSSQ_5
G2
DQ6 G2
DQ5 VSS_12

DDR0_DQ20 DDR1_DQ20 DDR0_DQ[12] A7 E8

H7
DQ7
B1 DQU3 VSSQ_5 H7
DQ6
DQ7
DDR0_DQ[21] AN23 AM1 D7
VSSQ_1
B9 DDR0_DQ[28] A7 E8 VSSQ_1
B1

DQU4 VSSQ_6 C3
DQ8 VSSQ_2
D1
DQU4 VSSQ_6
D7
DQ8 VSSQ_2
B9

DDR0_DQ21 DDR1_DQ21 R9110 R9118 DDR0_DQ[13] A2 F9 C8

DQ9
DQ10
VSSQ_3
VSSQ_4
D8
DDR0_DQ[29] A2 F9
C3
C8
DQ9 VSSQ_3
D1
D8
DDR0_DQ[22] AM15 AD2 1K 1K DQU5 VSSQ_7
C2
DQ11 VSSQ_5
E2
C2
DQ10 VSSQ_4
E2

DDR0_DQ22 DDR1_DQ22 DDR0_DQ[14] B8 G1

A7
A2
DQ12 VSSQ_6
E8
F9 DQU5 VSSQ_7 A7
DQ11
DQ12
VSSQ_5
VSSQ_6
E8

DDR0_DQ[23] AL23 AM3 B8

DQ13 VSSQ_7
G1 DDR0_DQ[30] B8 G1 A2
DQ13 VSSQ_7
F9

1% 1% DQU6 VSSQ_8 A3
DQ14 VSSQ_8
G9
DQU6 VSSQ_8
B8
DQ14 VSSQ_8
G1

DDR0_DQ23 DDR1_DQ23 DDR0_DQ[15] A3 G9 DQ15 VSSQ_9

DDR0_DQ[31] A3 G9
A3
DQ15 VSSQ_9
G9

DDR0_DQ[24] AM22 AL2 DQU7 VSSQ_9

DDR0_DQ24 DDR1_DQ24 R9112 C9137 R9119 C9143 DQU7 VSSQ_9
DDR0_DQ[25] AM17 AF2
DDR0_DQ25 DDR1_DQ25 1K 0.1uF 1K 0.1uF
DDR0_DQ[26] AL21 AK3 1% OPT 1% OPT
DDR0_DQ26 DDR1_DQ26
DDR0_DQ[27] AL16 AE3
DDR0_DQ27 DDR1_DQ27
DDR0_DQ[28] AL20 AJ3
DDR0_DQ28 DDR1_DQ28
DDR0_DQ[29] AN17 AF1
DDR0_DQ29 DDR1_DQ29
DDR0_DQ[30] AM21 AK2
DDR0_DQ30 DDR1_DQ30
DDR0_DQ[31] AL17 AF3 DDR1_VREF0
DDR0_DQ31 DDR1_DQ31 DVDD15
AN21 AK1
DDR0_DM2 DDR0_DM2 DDR1_DM2
AN18 AG1 R9111
DDR0_DM3 DDR0_DM3 DDR1_DM3 1K
AL19 AH3 1%
DDR0_U_CKP DDR0_U_CKP DDR1_U_CKP
AM19 AH2 C9138
DDR0_U_CKN DDR0_U_CKN DDR1_U_CKN R9113
AM18 AG2 1K 0.1uF
DDR0_DQS2 DDR0_DQS2 DDR1_DQS2 1% OPT DDR_SAMSUNG
AL18 AG3
DDR0_DQS2B DDR0_DQS_N2 DDR1_DQS_N2 DDR1_MVREFCA0
AM20 AJ2 IC9101
DDR0_DQS3 DDR0_DQS3 DDR1_DQS3
AN20 AJ1 K4B1G1646G-BCNB DDR1_MVREFDQ0
DDR0_DQS3B DDR0_DQS_N3 DDR1_DQS_N3

N3 M8
DDR1_A[0] A0 DDR3 VREFCA
P7 1Gbit
DDR1_A[1] A1
P3 (x16)
DDR1_A[2] A2
N2 H1
DDR1_A[3] A3 VREFDQ
P8 DDR (B-0)
DDR1_A[4] A4
P2
DDR1_A[5] A5
R8 L8 R9123 DVDD15
DDR1_A[6] A6 ZQ 240
R2 1%
DDR1_A[7] A7
T8
DDR1_A[8] A8
R3 B2
DDR1_A[9] A9 VDD_1
L7 D9
DDR1_A[10] A10/AP VDD_2
R7 G7
DDR1_A[11] A11 VDD_3
N7 K2
DDR1_A[12] A12/BC VDD_4
T3 K8
DDR1_A[13] NC_6 VDD_5
N1
VDD_6
M7 N9
NC_7 VDD_7
R1
VDD_8
M2 R9
DDR1_BA[0] BA0 VDD_9
N8
DDR1_BA[1] BA1
M3
DDR1_BA[2] BA2
A1
VDDQ_1
J7 A8
DDR1_D_CKP R9122 CK VDDQ_2
100 K7 C1
DVDD15 DDR1_D_CKN CK VDDQ_3
K9 C9
Close to DDR Power pin DDR1_CKE CKE VDDQ_4
D2
VDDQ_5
L2 E9
DDR1_CSB0 CS VDDQ_6
K1 F1
DDR1_ODT ODT VDDQ_7
C9101 C9103 C9109 C9111 C9113 C9115 C9117 C9119 C9122 C9124 C9126 C9128 C9130 C9132 C9134 J3 H2
DDR1_RASZ RAS VDDQ_8
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF 0.1uF 0.1uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF 10pF K3 H9
DDR1_CASZ CAS VDDQ_9
16V 16V 16V 16V 16V 16V 10V 16V 16V 10V 16V 16V 16V 16V 50V L3
C9146 C9147
DDR1_WEZ WE 0.1uF 0.1uF
J1
NC_1
T2 J9
DDR1_RESET RESET NC_2
L1
NC_3
L9
NC_4
F3 T7
DDR1_DQS0 DQSL NC_5 DDR1_A[14]
G3
DDR1_DQS0B DQSL
DVDD15
Close to DDR Power pin DDR_MICRON
IC9101-*1
C7 A9 MT41J64M16TW-093:J
DDR1_DQS1 DQSU VSS_1
B7 B3 N3
A0 VREFCA
M8

DDR1_DQS1B DQSU VSS_2 P7

P3
A1

E1 N2
A2
H1

C9102 C9104 C9106 C9108 C9110 C9112 C9114 C9116 C9118 C9133 E7
VSS_3
G8
P8
P2
R8
A3
A4
A5
VREFDQ

0.1uF 0.1uF 1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF 0.1uF 10pF DDR1_DM0
D3
DML VSS_4
J2
R2
T8
R3
A6
A7
A8
ZQ

16V 16V 10V 16V 16V 16V 16V 10V 16V 50V DDR1_DM1 DMU VSS_5
J8
L7
R7
N7
A9
A10/AP
A11
VDD_1
VDD_2
VDD_3
D9
G7
K2
A12/BC VDD_4
DDR1_DQ[0-15] VSS_6 T3
NC_6 VDD_5
K8
N1
DDR1_DQ[0] E3 M1 M7
NC_5
VDD_6
VDD_7
N9

DQL0 VSS_7 M2
VDD_8
R1
R9
DDR1_DQ[1] F7 M9 N8
BA0
BA1
VDD_9

4th layer DQL1 VSS_8 M3

BA2
A1
DDR1_DQ[2] F2 P1 J7
CK
VDDQ_1
VDDQ_2
A8

DQL2 VSS_9 K7
K9
CK VDDQ_3
C1
C9
DDR1_DQ[3] F8 P9 CKE VDDQ_4
VDDQ_5
D2

DQL3 VSS_10 L2
K1
CS VDDQ_6
E9
F1
DDR1_DQ[4] H3 T1 J3
ODT
RAS
VDDQ_7
VDDQ_8
H2

DQL4 VSS_11 K3
L3
CAS VDDQ_9
H9

DDR1_DQ[5] H8 T9 WE
NC_1
J1

DVDD15 DQL5 VSS_12 T2

RESET NC_2
J9
L1
DDR1_DQ[6] G2 NC_3
NC_4
L9

DQL6 F3
G3
DQSL NC_7
T7

DVDD15
DDR1_DQ[7] H7 DQSL

DQL7 C7
B7
DQSU VSS_1
A9
B3
B1 DQSU VSS_2
VSS_3
E1

VSSQ_1 E7
D3
DML VSS_4
G8
J2
DDR1_DQ[8] D7 B9 DMU VSS_5
VSS_6
J8

DQU0 VSSQ_2 E3
F7
DQ0 VSS_7
M1
M9
DDR1_DQ[9] C3 D1 F2
DQ1
DQ2
VSS_8
VSS_9
P1

C9105 C9107 C9120 C9125 C9129 C9135 DQU1 VSSQ_3 F8

DQ3 VSS_10
P9

C9121 DDR1_DQ[10] C8 D8
H3
H8
DQ4
DQ5
VSS_11
VSS_12
T1
T9

0.1uF 0.1uF 0.1uF 10uF 4.7uF 4.7uF DQU2 VSSQ_4 G2

DQ6

1uF DDR1_DQ[11] C2 E2
H7
DQ7
VSSQ_1
B1

16V 16V 16V 10V 10V 10V DQU3 VSSQ_5 D7

DQ8 VSSQ_2
B9

10V DDR1_DQ[12] A7 E8
C3
C8
DQ9
DQ10
VSSQ_3
VSSQ_4
D1
D8

DQU4 VSSQ_6 C2
A7
DQ11 VSSQ_5
E2
E8
DDR1_DQ[13] A2 F9 A2
DQ12
DQ13
VSSQ_6
VSSQ_7
F9

DQU5 VSSQ_7 B8
A3
DQ14 VSSQ_8
G1
G9
DDR1_DQ[14] B8 G1 DQ15 VSSQ_9

DQU6 VSSQ_8
DDR1_DQ[15] A3 G9
DQU7 VSSQ_9

DVDD15

C9123 C9127 C9131

1uF 10uF 4.7uF
10V 10V 10V

4th layer

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

F16 4K EPI 2015.4.28

DDR

8pF
JTP-1127WEM
GND_1

C9200
F16_XTAL_LoadCap_Default
XIN_F16

1 2
LGE1124(F16)
2

R9200

F16_RESET_MICOM
24MHz
X9200

F16_RESET_SW

F16_RESET_SW
1M

1N4148W
D9200

3 4
3

R9212 C9204
X-TAL_2

GND_2

8pF R9269 33 270K 10uF

XO_F16
C9201
OPT
F16_XTAL_LoadCap_Default Move to x-tal side
(TSMC Recommend) L2 AH28
TDI_0
TDI0 FRC_LRSYNC
System Clock for Analog block(24MHz) M1 AK29
TDO_0
TDO0 L_VSIN_LD
C9200-*1 6.8pF
M2 AH29 R9234 33
TMS_0 L/DIM0_VS_F16
F16_XTAL_LoadCap_OLED_E6 TMS0 L_VSOUT_LD L/D_F16
L1 AJ29
TCK_0
TCK0 L_VSOUT_LD1
C9201-*1 6.8pF
M3 AF28 R9235 33
TRST_0 L/DIM0_MOSI_F16
F16_XTAL_LoadCap_OLED_E6 TRSTN0 DIM0_MOSI L/D_F16
AG28 R9236 33 L/DIM0_SCLK_F16
DIM0_SCLK L/D_F16
J2 AD28
TDI_1
EAN63765801 TDI1 DIM1_MOSI
+3.3V_NORMAL SERIAL_FLASH_SPANSION K1 AE28
IC9200-*1 TDO_1
S25FL164K0XMFI010 TDO1 DIM1_SCLK
EAN63146601 K2 AJ28
SPI Flash TMS_1
TMS1 DIM2_MOSI
IC9200 CS
1 8
VCC
J1 AJ27
MX25L6435EM2I-10G TCK_1
TCK1 DIM2_SCLK
SO/IO1 HOLD/IO3
R9206
10K
2 7 K3 AJ26
TRST_1
OPT WP/IO2 SCK
TRSTN1 DIM3_MOSI
CS#
1 8
VCC 3 6 AJ25
MSPI_CS_M SERIAL_FLASH_MX DIM3_SCLK
VSS SI/IO0
4 5 G1 AG29
UART_RX_0 3D_SYNC_RF
SO/SIO1
2 7
HOLD#/SIO3 R9213 UART0_RXD PWM0
MSPI_MISO_M
10K
H1 AE29
UART_TX_0
C9205
0.1uF UART0_TXD PWM1 TP9207

R9205 1K WP#/SIO2
3 6
SCLK 16V G2 AF29
FLASH_WP_F16 MSPI_SCLK_M UART_RX_1
UART1_RXD PWM2
R9207
H2
UART_TX_1
10K GND
4 5
SI/SIO0 UART1_TXD
MSPI_MOSI_M AD29 R9242 10K
PWM_IN
AM29 AL28
F16_EPI_EO F16_EPI_EO
I2C_SCL_M1 EPI_EO
* MX25L6435EM2I-10G : IWP (Individual Write Protect) supported
To TCON AN29 AK27
F16_EPI_GCLK F16_EPI_GCLK
(Not used)
I2C_SDA_M1 EPI_GCLK
(PCB Bottom) AL26 AL29 FOR EPI control
AR9201 F16_EPI_MCLK F16_EPI_MCLK
33 I2C_SCL_M2 EPI_MCLK
AK26 AK28
F16_EPI_GST F16_EPI_GST
I2C_SDA_M2 EPI_VST
F23
I2C_SCL2 AR9203
To M16/H15 33 I2C_SCL_S
F24 AM25
UART0 For system UART1 For FRC I2C_SDA2
I2C_SDA_S XTALI XIN_F16

DEBUG_F16_UART DEBUG_F16_UART
AN25
XO_F16
P9200
+3.3V_NORMAL
P9201
+3.3V_NORMAL
XTALO
12507WS-04L 12507WS-04L
R9222 33 D24 R9230 33
A_SPI_CS_S SPI_DL_MODE SPI_DL_MODE
SPI_CS_S R9231 33
1
R9201
1
R9208 R9223 33 E23 AM26 C9207 0.01uF
F16_RESET_MICOM
SPI_MOSI_S
4.7K 4.7K SPI_MOSI_S PORES_N
2
R9202
33
2
R9209
33
To M16/H15
R9224 33 E24 AG24
SPI_MISO_S
DEBUG_F16_UART
UART_RX_0
DEBUG_F16_UART
UART_RX_1
SPI_MISO_S TMODE0
3
R9203
3
R9210 R9225 33 D23 AG25 TMODE
SPI_SCLK_S
4.7K DEBUG_F16_UART 4.7K DEBUG_F16_UART SPI_SCK_S TMODE1
4
R9204
33
4
R9211
33 AH24 Normal Operation : 1
(Default)
DEBUG_F16_UART
UART_TX_0
DEBUG_F16_UART
UART_TX_1
TMODE2 (Internal Pull Up)
5 DEBUG_F16_UART 5 DEBUG_F16_UART R9226 33 B25 AH25
MSPI_CS_M
C9202 C9203 MSPI_CS_M TMODE3
0.1uF
16V
0.1uF
16V R9227 33 B24 AK24
MSPI_MOSI_M
MSPI_MOSI_M CID0
To S-Flash memory
R9228 33 A24 AJ24 Chip ID
MSPI_MISO_M
MSPI_MISO_M CID1
R9229 33 A25 AH27 0 0 : 4K (Default)
MSPI_SCLK_M
MSPI_SCK_M TRIGGER
AK25 R9232 10K
BOOT_MODE
AM27 AH26 BOOT MODE
- 0 : Default
TSPI_CS_M SYNC_ALIGN - 1 : Not Used
AM28
TSPI_MOSI_M
+3.3V_NORMAL
JTAG for F16 AN28 E25
F16_BIT0
TSPI_MISO_M GPIO00
AN27 F25
F16 Option JTAG0 for SYSTEM JTAG1 for FRC
TSPI_SCK_M GPIO01
F16_BIT10_1

F16_BIT11_1

F16_BIT12_1

F16_BIT13_1
F16_BIT0_1

F16_BIT1_1

F16_BIT2_1

F16_BIT3_1

F16_BIT4_1

F16_BIT6_1

F16_BIT7_1

F16_BIT8_1

F16_BIT9_1

F16_BIT14_1

+3.3V_NORMAL +3.3V_NORMAL
C24
R9243 10K

R9245 10K

R9247 10K

R9249 10K

R9251 10K

R9253 10K

R9255 10K

R9257 10K

R9259 10K

R9261 10K

R9263 10K

R9265 10K

R9267 10K

R9237 10K

R9239 10K

F16_BIT13
OPT

GPIO02
R9270 10K

Low High

BIT0 Main SoC M16 H15

A19 C23
F16_BIT1
F16_BIT0 SSPI_CS0_M GPIO03
BIT1 Display LCD OLED
F16_BIT1 B19 E21
F16_BIT2
BIT2 Resolution 4K 8K
F16_BIT2
TP9210 TP9200
SSPI_CS1_M GPIO04
BIT5 Reserved
F16_BIT3
C19 F21
F16_BIT3
BIT6 Tx Frame Rate 120Hz 60Hz
TP9211 TDI_0 TP9201 TDI_1
SSPI_CS2_M GPIO05
F16_BIT4
D19 E20
F16_BIT4
F16_BIT5 TP9212 TMS_0 TP9202 TMS_1
SSPI_MOSI_M GPIO06
F16_BIT6 C20 F20
F16_BIT5
TP9213 TCK_0 TP9203 TCK_1
SSPI_SCK_M GPIO07
BIT(3/4) Display Type BIT(7/8) DIVISION Type
E19
F16_BIT7 F16_BIT6
00 Vx1 DE 00 NON DIVISION TP9214 TDO_0 TP9204 TDO_1
GPIO08
01 Vx1 Sync 01 2 DIVISION
F16_BIT8 D20 F19
F16_BIT7
10 EPI 49" 10 4 DIVISION
TP9215 TRST_0 TP9205 TRST_1
SSPI0_CS_S GPIO09
11 EPI 55" 11 5 DIVISION
A21 D18
F16_BIT8
SSPI0_MOSI_S GPIO10
F16_BIT9
B21 E18
Low High TP9216 TP9206
SSPI0_SCK_S GPIO11 F16_BIT9
BIT9 DDR Vendor SS Micron F16_BIT10 F18
F16_BIT10
BIT10 AV_BOX Non_AV_BOX AV_BOX GPIO12
C21 D17
F16_BIT11
BIT(11/12) Module Maker
F16_BIT11 SSPI1_CS_S GPIO13
00 LGD D21 E17
F16_BIT12 F16_BIT12
01 INNORUX SSPI1_MOSI_S GPIO14
10 BOE
C22 F17 R9233
33
F16_CONNECT_DET F16_CONNECT_DET
SSPI1_SCK_S GPIO15
11 LGD (75"~)
F16_BIT13 E1
DATA_FORMAT_0_F16 DATA_FORMAT_0_F16
GPIO16
Low High F16_BIT14
SPI/I2C Live Boot Test SPI/I2C Serial Flash Boot Test
D22 E2
DATA_FORMAT_1_F16 DATA_FORMAT_1_F16
BIT13 Vx1 OSD input Blended OSD Separate OSD F16_BIT15 SSPI2_CS_S GPIO17
* This option operates when BIT6 is 60Hz
A23 F1
LOCKn_IN LOCKn_IN
If BIT6 is 120Hz, Vx1 OSD type is separate OSD. SSPI2_MOSI_S GPIO18
B23 F2
F16_BIT10_0

F16_BIT11_0

F16_BIT12_0

F16_BIT13_0
F16_BIT0_0

F16_BIT1_0

F16_BIT2_0

F16_BIT3_0

F16_BIT4_0

F16_BIT6_0

F16_BIT7_0

F16_BIT8_0

F16_BIT9_0

Low High
F16_BIT14_0

PMIC_RESET PMIC_RESET
SSPI2_SCK_S GPIO19
R9244 10K

R9246 10K

R9248 10K

R9250 10K

R9252 10K

R9254 10K

R9256 10K

R9258 10K

R9260 10K

R9262 10K

R9264 10K

R9266 10K

R9268 10K

R9238 10K

Tx 8lane,
R9240 10K

BIT14 Vx1 Lane Tx 16lane

E3
R927110K

Video 8lane
OPT

Vx1 Tx OFF F16_BIT14 LOCKAn_MONITOR

BIT15
Pre-emphasis
50%
(Default) GPIO20
* BIT14 option is for Vx1 Eye improvement in case of over 1M cable. AN31 E4
F16_BIT15
In case of over 1M cable, select Low, Others select High.
OSPI_MOSI_M GPIO21
AM31 F3
LOCKAn_MONITOR
OSPI_SCLK_M GPIO22
AM30 F4
F16_BIT16
OSPI_SCLK_S GPIO23
+3.3V_NORMAL AN30 G3
F16_BIT17
Low High
OSPI_MOSI_S GPIO24
BIT16 Reserved
G4
GPIO25
BIT17 Reserved AG27 J3
R9215 10K

R9217 10K

DELOCK GPIO26
AG26 J4
HSLOCK GPIO27
F16_BIT16 K4
F16_BIT17 GPIO28
L3
R9216 10K

R9218 10K

GPIO29 GPIO used only for SIC

OPT

L4
GPIO30 TP9208

M4
GPIO31 TP9209

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
Downloaded from www.Manualslib.com manuals search engine
Only for training and service purposes
+0.9V F16 Core
POWER_ON/OFF2_3

R1
1%
1/16W 1/16W

13K
R9305 R9304

C9310
0.1uF
16V
1%

30K
R9303

C9309
0.1uF
1K

OPT
16V
+0.9V_VDD
1%
1/16W

39K
R9306

R2
[EP]GND

REFIN2
REFIN
VREF
EN

GSNS_1
28

PGOOD_1 1 23 GSNS debugging point

THERMAL R9307
LP# 2 29 22 VSNS
0
MODE 3 21 SLEW
+0.9V_VDD NC IC9300 TRIP
C9311 +5V_NORMAL
C9308 R9302 4 20 0.01uF
25V 4.7
TPS51362RVER 50V
BST 5 19 GND
LPBN8050T-1R0N C9314
0.1uF 5% SW_1 V5 2.2uF
L9300 6 18
1.0uH 10V
SW_2 7 17 VIN_1 +13V
C9302 10uF 10V

C9303 10uF 10V

C9304 10uF 10V

C9305 10uF 10V

C9306 10uF 10V

C9307 10uF 10V

C9300 10uF 10V

C9301 10uF 10V

SW_3 8 16 VIN_2
ZD9300

R9301

L9301
2.5V

1/8W

SW_4 VIN_3
3.3
OPT

9 15
5%

C9312 C9313
OPT

10uF 10uF
OPT 25V 25V
PGND_5

PGND_4

PGND_3

PGND_2

PGND_1

R9308
470pF
50V

R9300
GSNS_1
0

Vout=2*(R2/(R1+R2))

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS F16 2015.6.10
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
F16_0.9V Core 93 100
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

L9400
BLM18PG121SN1D

DVDD15
Placed on SMD-TOP

IC9400
RT7295CG6F
C9400 C9401 C9402
10uF 0.1uF VLS5045EXT-2R2N
0.47uF L9401
25V 25V 50V BOOT SW 2.2uH
1 6

GND VIN C9408

ZD9400

C9404 C9405 C9406 C9407

2 5
2.5V

10uF 10uF 10uF 10uF 100pF

10K 10V 10V 10V 10V 50V
OPT

FB EN R9400
3 4

OPT POWER_ON/OFF2_1 R9401

C9403 16K
0.1uF 1%
16V
3.5A R1

R2
1%
1/16W

11K
R9402

Vout=0.6*(1+R1/R2)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS F16 2015.6.10
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. F16 1.5V_DDR 94 100

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
Downloaded from
Only for training and www.Manualslib.com
service purposes manuals search engine
IC9000
LGE1124(F16) @optio
D7 R23
GND[1] GND[156]
D8 R27
GND[2] GND[157]
D9 R28
GND[3] GND[158]
D25 R29
GND[4] GND[159]
D33 T6
GND[5] GND[160]
E5 T8
GND[6] GND[161]
E6 T12
GND[7] GND[162]
E7 T13
GND[8] GND[163]
E8 T14
GND[9] GND[164]
E9 T15
GND[10] GND[165]
E10 T16
GND[11] GND[166]
E11 T17
GND[12] GND[167]
E12 T18
GND[13] GND[168]
E13 T20
GND[14] GND[169]
E14 T21
GND[15] GND[170]
E15 T27
GND[16] GND[171]
E16 T28
GND[17] GND[172]
E26 T29
GND[18] GND[173]
E27 U6
GND[19] GND[174]
E31 U8
GND[20] GND[175]
E32 U12
GND[21] GND[176]
E33 U13
GND[22] GND[177]
F5 U14
IC9000 GND[23] GND[178]
F6 U20
LGE1124(F16) +0.9V_VDD GND[24] GND[179]
F7 U21
GND[25] GND[180]
AVDD09_C4TX F16_AVDD18_C4TX F8 U28
GND[26] GND[181]
F9 U29
T22 T23 GND[27] GND[182]
AVDD09_C4TX[1] AVDD18_C4TX[1] F10 V6
U22 U23 GND[28] GND[183]
AVDD09_C4TX[2] AVDD18_C4TX[2] F11 V8
V22 V23 C9507 C9508 C9509 C9511 C9512 C9513 C9514 GND[29] GND[184]
AVDD09_C4TX[3] AVDD18_C4TX[3] F12 V12
W22 W23 10uF 10uF 10uF 1uF 0.1uF 0.1uF 0.1uF GND[30] GND[185]
AVDD09_C4TX[4] AVDD18_C4TX[4] F13 V13
Y22 Y23 10V 10V 10V 10V 16V 16V 16V GND[31] GND[186]
AVDD09_C4TX[5] AVDD18_C4TX[5] F14 V15
AA22 AA23 GND[32] GND[187]
AVDD09_C4TX[6] AVDD18_C4TX[6] F15 V16
GND[33] GND[188]
F16 V17
F16_AVDD09_PLL
4th Layer GND[34] GND[189]
F16_AVDD18_PLL F26 V18
GND[35] GND[190]
F27 V20
AA20 Y27 GND[36] GND[191]
AVDD09_PLL[1] AVDD18_PLL[1] F28 V21
AB20 AA27 GND[37] GND[192]
AVDD09_PLL[2] AVDD18_PLL[2] F29 V28
Y12 AB27 GND[38] GND[193]
AVDD09_PLL_2[1] AVDD18_PLL[3] F30 W6
AB17 W12 GND[39] GND[194]
+0.9V_VDD AVDD09_PLL_2[2] AVDD18_PLL_2[1] F31 W8
AF20 GND[40] GND[195]
AVDD18_PLL_2[2] +1.8V_IO +3.3V_NORMAL G5 W13
N23 F16_3.3V_NORMAL GND[41] GND[196]
AVDD09_HDMI[1] G6 W20
P23 M22 GND[42] GND[197]
AVDD09_VX1 AVDD09_HDMI[2] AVDD18_HDMI[1] L9505
G7 W21
M23 GND[43] GND[198]
BLM18PG121SN1D G8 W27
AVDD18_HDMI[2]
M14 GND[44] GND[199]
AVDD09_VRX[1] AVDD33_VX1 G9 W28
M15 GND[45] GND[200]
AVDD09_VRX[2] G10 W29
M16 H13 GND[46] GND[201]
AVDD09_VRX[3] AVDD33_VRX[1] C9533 C9503 C9504 C9505 G11 Y6
M17 H14 10uF 0.1uF 0.1uF 0.1uF
GND[47] GND[202]
AVDD09_VRX[4] AVDD33_VRX[2] G12 Y8
M18 H15 AVDD09_VX1 25V 25V 25V GND[48] GND[203]
+0.9V_VDD 10V G13 Y13
AVDD09_VRX[5] AVDD33_VRX[3]
H16 GND[49] GND[204]
AVDD33_VRX[4] L9501
G14 Y16
N19 H17 BLM18PG121SN1D GND[50] GND[205]
DVDD09[1] AVDD33_VRX[5] F16_3.3V_NORMAL G15 Y18
N20 GND[51] GND[206]
DVDD09[2] G16 Y19
P14 K27 GND[52] GND[207]
DVDD09[3] AVDD33_HDMI[1] G17 Y20
P15 L27 C9518 C9522 C9530 DVDD33_XTAL GND[53] GND[208]
DVDD09[4] AVDD33_HDMI[2] G18 Y21
P16 0.1uF 0.1uF 10uF GND[54] GND[209]
DVDD09[5] F16_3.3V_NORMAL G19 Y28
P17 16V 16V 10V L9506
GND[55] GND[210]
BLM18PG121SN1D G20 AA6
DVDD09[6]
P18 H19 GND[56] GND[211]
DVDD09[7] DVDD33[1] G21 AA8
R15 H20 GND[57] GND[212]
DVDD09[8] DVDD33[2] G22 AA12
R16 H21 4th Layer GND[58] GND[213]
DVDD09[9] DVDD33[3] C9541 C9550 G23 AA13
R17 N8 0.1uF 1uF GND[59] GND[214]
DVDD09[10] DVDD33[4] G24 AA14
R18 P27 16V 10V GND[60] GND[215]
DVDD09[11] DVDD33[5] G25 AA15
R19 R8 GND[61] GND[216]
DVDD09[12] DVDD33[6] G26 AA16
T19 AE8 GND[62] GND[217]
DVDD09[13] DVDD33[7] G27 AA17
U15 AF18 4th Layer GND[63] GND[218]
DVDD09[14] DVDD33[8] G28 AA18
U16 AF19 GND[64] GND[219]
DVDD09[15] DVDD33[9] H3 AA19
U17 C9519 C9523 C9531 AVDD33_VX1 GND[65] GND[220]
DVDD09[16] DVDD33_XTAL H4 AA21
U18 0.1uF 0.1uF 10uF GND[66] GND[221]
DVDD09[17] H5 AA28
U19 AF17 16V 16V 10V L9507
GND[67] GND[222]
BLM18PG121SN1D H6 AB6
DVDD09[18] DVDD33_XTAL
V19 DVDD15 GND[68] GND[223]
DVDD09[19] H7 AB8
W15 GND[69] GND[224]
DVDD09[20] H8 AB12
W16 AG8 4th Layer GND[70] GND[225]
DVDD09[21] DVDD15_DDR0[1] C9542 C9545 C9547 C9551 C9553 H9 AB13
W17 AG9 10uF 10uF 1uF 0.1uF 0.1uF GND[71] GND[226]
DVDD09[22] DVDD15_DDR0[2] H10 AB14
W18 AG10 F16_AVDD09_PLL GND[72] GND[227]
10V 10V 10V 16V 16V H11 AB15
DVDD09[23] DVDD15_DDR0[3]
W19 AG11 GND[73] GND[228]
DVDD09[24] DVDD15_DDR0[4] L9503
H12 AB18
Y17 AG12 BLM18PG121SN1D GND[74] GND[229]
DVDD09[25] DVDD15_DDR0[5] H18 AB19
AG13 GND[75] GND[230]
DVDD15_DDR0[6] 4th Layer 4th Layer H22 AB21
AG14 GND[76] GND[231]
DVDD15_DDR0[7] H23 AB22
AG15 C9520 C9524 C9532 GND[77] GND[232]
DVDD15_DDR0[8] H24 AB23
AG16 DVDD15 0.1uF 0.1uF 10uF GND[78] GND[233]
DVDD15_DDR0[9] H25 AB28
16V 16V 10V GND[79] GND[234]
H26 AB29
T7 GND[80] GND[235]
DVDD15_DDR1[1] H27 AC6
U7 GND[81] GND[236]
DVDD15_DDR1[2] H28 AC8
V7 4th Layer GND[82] GND[237]
+0.9V_VDD DVDD15_DDR1[3] H29 AC27
W7 GND[83] GND[238]
DVDD15_DDR1[4] J5 AC28
V14 Y7 F16_AVDD18_C4TX GND[84] GND[239]
DVDD09_DDR[1] DVDD15_DDR1[5] +1.8V_IO J6 AC29
W14 AA7 GND[85] GND[240]
DVDD09_DDR[2] DVDD15_DDR1[6] J7 AD6
Y14 AB7 L9509 GND[86] GND[241]
DVDD09_DDR[3] DVDD15_DDR1[7] BLM18PG121SN1D J8 AD8
Y15 AC7 GND[87] GND[242]
DVDD09_DDR[4] DVDD15_DDR1[8] J27 AD27
DVDD09_XTAL AD7 GND[88] GND[243]
DVDD15_DDR1[9] J28 AE6
GND[89] GND[244]
C9534 C9535 C9536 C9539 C9543 J29 AE7
AB16 10uF 10uF 10uF 1uF 0.1uF GND[90] GND[245]
DVDD09_XTAL K5 AE27
10V 10V 10V 10V 16V GND[91] GND[246]
K6 AF6
GND[92] GND[247]
K7 AF7
GND[93] GND[248]
K8 AF8
DVDD09_XTAL GND[94] GND[249]
4th Layer K28 AF9
GND[95] GND[250]
L9504
K29 AF10
BLM18PG121SN1D F16_AVDD18_PLL GND[96] GND[251]
C9500 C9502 L5 AF11
GND[97] GND[252]
0.1uF 10uF L6 AF12
L9510 GND[98] GND[253]
16V 10V BLM18PG121SN1D L7 AF13
GND[99] GND[254]
L8 AF14
GND[100] GND[255]
L28 AF15
GND[101] GND[256]
C9537 C9540 C9549 L29 AF16
4th Layer GND[102] GND[257]
0.1uF 0.1uF 10uF M5 AF21
16V 16V 10V GND[103] GND[258]
M6 AF22
GND[104] GND[259]
M7 AF23
GND[105] GND[260]
M8 AF24
4th Layer GND[106] GND[261]
M12 AF25
GND[107] GND[262]
M13 AF26
GND[108] GND[263]
M19 AF27
GND[109] GND[264]
M20 AG6
GND[110] GND[265]
M21 AG7
GND[111] GND[266]
M27 AG17
GND[112] GND[267]
M28 AG18
GND[113] GND[268]
M29 AG19
GND[114] GND[269]
N2
2. Power Off Sequence N3
GND[115]
GND[116]
GND[270]
GND[271]
AG20
AG21
N4 AG22
1.5V -> 0.9V -> 1.8V -> 3.3V N5
GND[117]
GND[118]
GND[272]
GND[273]
AG23
N6 AH6
GND[119] GND[274]
N7 AH7
GND[120] GND[275]
N12 AH8
GND[121] GND[276]
N13 AH9
GND[122] GND[277]
N14 AH10
GND[123] GND[278]
N15 AH11
GND[124] GND[279]
N16 AH12
GND[125] GND[280]
N17 AH13
GND[126] GND[281]
N18 AH14
GND[127] GND[282]
N21 AH15
GND[128] GND[283]
N22 AH16
GND[129] GND[284]
N27 AH17
GND[130] GND[285]
N28 AH18
GND[131] GND[286]
Power Tree P3 AH19
GND[132] GND[287]
P4 AH20
GND[133] GND[288]
+3.3V_NORMAL P5 AH21
- (AVDD33_HDMI) GND[134] GND[289]
P6 AH22
- (AVDD33_VX1) GND[135] GND[290]
P7 AH23
- (AVDD33_XTAL) P8
GND[136] GND[291]
AJ6
GND[137] GND[292]
P12 AJ7
AVDD18 GND[138] GND[293]
- (AVDD18_C4TX) P13 AJ22
GND[139] GND[294]
- (AVDD18_PLL) P19 AJ23
GND[140] GND[295]
- (AVDD18_HDMI) P20 AK4
GND[141] GND[296]
P21 AK5
DVDD15 GND[142] GND[297]
P22 AK6
GND[143] GND[298]
P28 AK7
DVDD09 GND[144] GND[299]
P29 AK22
- (AVDD09_C4TX) GND[145] GND[300]
- (AVDD09_VX1) R4 AK23
GND[146] GND[301]
- (AVDD09_DDR) R5 AL4
GND[147] GND[302]
- (AVDD09_HDMI) R6 AL5
GND[148] GND[303]
- (AVDD09_PLL) R7 AL24
- (AVDD09_XTAL) GND[149] GND[304]
R12 AL25
GND[150] GND[305]
R13 AL27
GND[151] GND[306]
R14 AM4
GND[152] GND[307]
R20 AM5
GND[153] GND[308]
R21 AN3
GND[154] GND[309]
R22 AN4
GND[155] GND[310]

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS F16 2015.6.13
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. F16 Power 95 100

Vx1 : 96_00
EPI : 96_01

+0.9V_VDD AVDD09_C4TX

L9500
BLM18PG121SN1D

C9517 C9521 C9529

0.1uF 0.1uF 10uF
16V 16V 10V

4th Layer

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16 2015.09.22
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR F16 AVDD09_C4TX
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
Downloaded from
Only for training and www.Manualslib.com
service purposes manuals search engine
GASKET_6.0X8.0X5.5H GASKET_6.0X8.0X5.5H GASKET_6.0X8.0X5.5H GASKET_6.0X8.0X5.5H GASKET_6.0X8.0X5.5H GASKET_6.0X8.0X5.5H
M10007 EMI_SMD_7 M10008 EMI_SMD_8 M10009 EMI_SMD_9 M10010 EMI_SMD_10 M10011 EMI_SMD_11 M10012 EMI_SMD_12
MDS62110235 MDS62110235 MDS62110235 MDS62110235 MDS62110235 MDS62110235

USB / HDMI Bottom Gasket

GASKET_8.0X6.0X13.5H GASKET_8.0X6.0X13.5H GASKET_8.0X6.0X13.5H GASKET_8.0X6.0X13.5H GASKET_8.0X6.0X13.5H GASKET_8.0X6.0X13.5H

M10013 EMI_SMD_13 M10014 EMI_SMD_14 M10015 EMI_SMD_15 M10016 EMI_SMD_16 M10017 EMI_SMD_17 M10018 EMI_SMD_18
MDS62110221 MDS62110221 MDS62110221 MDS62110221 MDS62110221 MDS62110221

bottom gasket

CLIP Top Side for Covershield

M10000 EMI_SMD_1
MDS62110215

M10002 EMI_SMD_2
MDS62110215

M10003 EMI_SMD_3
MDS62110215

EAG64250901 EAG64250901 EAG64250901

M10004 EMI_SMD_4 M10019 CLIP M10020 CLIP M10021 CLIP
MDS62110215

M10005 EMI_SMD_5
MDS62110215

M10006 EMI_SMD_6
MDS62110215

CLIP 1 - PUSH TYPE

top gasket_7.5T

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M16
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 100

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Contents of Standard Repair Process
No. Error symptom (High category) Error symptom (Mid category) Page Remarks

1 No video/Normal audio 1

2 No video/No audio 2

3 A. Video error Picture broken/ Freezing 3

4 Color error 4

Vertical/Horizontal bar, residual image,

5 5
light spot, external device color error
6 No power 6
B. Power error Off when on, off while viewing, power
7 7
auto on/off
8 No audio/Normal video 8
C. Audio error
9 Wrecked audio/discontinuation/noise 9

10 Remote control & Local switch checking 10

11 MR15R operating checking 11

D. Function error
12 Wifi operating checking 12
13 External device recognition error 13

14 E. Noise Circuit noise, mechanical noise 14

15 F. Exterior error Exterior defect 15

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Standard Repair Process
Established
Error A. Video error date
OLED TV symptom
No video/ Normal audio Revised date 1/16

First of all, Check whether all of cables between board is inserted properly or not.
(Main B/D↔ Power B/D, LVDS Cable, Speaker Cable, IR B/D Cable,,,)

☞A1 ☞A9
No video Normal Y Check Back Light Y Check Power Normal Y Replace T-con/Main
Normal audio On Board or module
audio On with naked eye Board voltage
24V, 12V,3.5V etc. And Adjust VCOM
N N N
Move to No
☞A9 Check Power Board 24V output Repair Power
video/No audio Board or parts

Replace Inverter
Normal Y
or module
voltage

End
N
Repair Power
Board or parts

※Precaution ☞A4 & A2

Always check & record S/W Version and White
Replace Main Board Re-enter White Balance value
Balance value before replacing the Main Board

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Standard Repair Process

Established
Error A. Video error date
OLED TV symptom
No video/ No audio Revised date 2/16

☞A9
Check various Check and
Normal Y
No Video/ voltages of Power replace
No audio Board ( 3.5V,12V,20V voltage?
MAIN B/D
or 24V…)
N End

Replace Power
Board and repair
parts

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Standard Repair Process

Established
Error A. Video error date
OLED TV symptom
Picture broken/ Freezing Revised date 3/16

. By using Digital signal level meter

☞ A3
. By using Diagnostics menu on OSD
Check RF Signal level ( All Settings→ Channels → Channel Tuning → Manual Tuning → Check the Signal )
- Signal strength (Normal : over 50%)
- Signal Quality (Normal: over 50%)

Y Check whether other equipments have problem or not.

Normal
(By connecting RF Cable at other equipment)
Signal?
→ DVD Player ,Set-Top-Box, Different maker TV etc`

N
☞ A4
Check RF Cable Y
Normal Y Check SVC N Check
Connection Close
1. Reconnection Picture? S/W Version Bulletin? Tuner soldering
2. Install Booster N
Y
N
S/W Upgrade
N Contact with signal distributor
Normal
Picture? or broadcaster (Cable or Air)
Normal N
Y Picture? Replace
Main B/D
Y
Close
Close

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Standard Repair Process

Established
Error A. Video error date
OLED TV symptom
Color error Revised date 4/16

☞A6 ☞ A7
※ Check
Check color by input
and replace
-External Input Y Y Y
Color Link Cable Color Color
-COMPONENT Replace Main B/D Replace module
error? (V by one) error? error?
-AV
and contact
-HDMI N N N
condition

Check error End

color input
mode

Check
External Input/ External device Y
external
Component /Cable Replace Main/T-con B/D
device and
error normal
cable
N

Request repair
for external
device/cable

Check external External device Y

HDMI device and /Cable Replace Main/T-con B/D
error cable normal

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Standard Repair Process

A. Video error Established

Error date
OLED TV symptom Vertical / Horizontal bar, residual image,
light spot, external device color error Revised date 5/16

Vertical/Horizontal bar, residual image, light spot Replace

Module
☞A6
☞ A7 N
Check color condition by input Check external
Check and
-External Input Screen Y device Y Screen N Screen
-Component Normal? replace Link Replace Main/T-con B/D
normal? connection normal? (adjust VCOM) normal?
-HDMI Cable
condition
N N For LGD panel Y
Y
Replace Main B/D
Replace Request repair End End
module for external
device
For other panel

External device screen error-Color error

Check screen
condition by input
-External Input External
Check S/W Version Check N
-Component Input Connect other external N
version
-HDMI/DVI error device and cable Screen Replace
(Check normal operation of normal? Main/T-con
Y External Input, Component, B/D
Component RGB and HDMI/DVI by
error Y
S/W Upgrade connecting Jig, pattern
Generator ,Set-top Box etc.
Request repair for
external device

Y
Connect other external
Normal N HDMI/
device and cable N
screen? DVI Screen Replace
(Check normal operation of
External Input, Component, normal? Main /T-con
Y RGB and HDMI/DVI by B/D
connecting Jig, pattern
Generator ,Set-top Box etc.
End
5
Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes

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Standard Repair Process

Established
Error B. Power error date
OLED TV symptom
No power Revised date 6/16

☞A8 ☞A9
DC Power on Replace
Check Power LED Y Normal N Check Power Y
by pressing Power Key OK? Power
Logo LED On? operation? On ‘”High”
On Remote control B/D
. Stand-By: Red or Turn On
N Y
. Operating: Turn Off
Check Power cord Replace Main B/D
was inserted properly
☞A9
N Measure voltage of each output of Power B/D
Normal?

Y
Y Y
※ Normal
voltage?
Replace Main B/D
Close Normal
Check ST-BY 3.5V
Y
voltage? N
☞A9 Replace Power B/D
N

Replace Power
B/D

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Standard Repair Process

Established
Error B. Power error date
OLED TV symptom
Off when on, off while viewing, power auto on/off Revised date 7/16

Check outlet

☞A10
N Y
Check A/C cord Error? Check Power Off CPU Normal? End
Replace Main B/D
Mode Abnormal

N
Check for all 3- phase
power out Y Abnormal Replace Power B/D
1

Fix A/C cord & Outlet ☞A9

and check each 3
(If Power Off mode
phase out
is not displayed) Normal Y
Replace Main B/D
Check Power B/D voltage?
voltage
N
※ Caution
Check and fix exterior Replace Power B/D
of Power B/D Part

* Please refer to the all cases which Status Power off List Explanation
"POWER_OFF_BY_REMOTE_KEY" Power off by REMOTE CONTROL
can be displayed on power off mode.
"POWER_OFF_BY_OFF_TIMER" Power off by OFF TIMER
"POWER_OFF_BY_SLEEP_TIMER" Power off by SLEEP TIMER
"POWER_OFF_BY_INSTOP" Power off by INSTOP KEY
"POWER_OFF_BY_AUTO_OFF" Power off by AUTO OFF
Normal "POWER_OFF_BY_ON_TIMER" Power off by ON TIMER
"POWER_OFF_BY_RS232C" Power off by RS232C
"POWER_OFF_BY_RESREC" Power off by Reservated Record
"POWER_OFF_BY_RECEND" Power off by End of Recording
"POWER_OFF_BY_SW_DW" Power off by S/W Download
"POWER_OFF_BY_UNKNOWN" Power off by unknown status except listed case
Abnormal "POWER_OFF_BY_CPU_ABN" Power off by CPU Abnormal

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Standard Repair Process

Established
Error C. Audio error date
OLED TV symptom
No audio/ Normal video Revised date 8/16

☞A11 ☞A12+A9
Check user N Check audio B+ Y
No audio Normal
menu > Off 24V of Power
Screen normal voltage
Speaker off Board
Y N

Cancel OFF Replace Power Board and repair parts

Check N
Disconnection Replace MAIN Board End
Speaker
disconnection
Y

Replace Speaker

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Standard Repair Process

Established
Error C. Audio error date
OLED TV symptom
Wrecked audio/ discontinuation/noise Revised date 9/16

→ abnormal audio/discontinuation/noise is same after “Check input signal” compared to No audio

Wrecked audio/
☞A12+A9
Check and replace
Discontinuation/ Check audio
speaker and
Noise for B+ Voltage (24V)
connector
Check input all audio
signal Y Y
Signal
-RF
normal? Wrecked audio/
-External Input Normal
signal Discontinuation/
N Replace Main B/D voltage?
Noise only
for D-TV
N
Wrecked audio/
Discontinuation/
Replace Power B/D
Noise only
for Analog
(When RF signal is not
received)
Request repair to external Wrecked audio/ Replace Main B/D End
cable/ANT provider Discontinuation/
Noise only
for External Input
(In case of N
External Input Connect and check Normal
signal error) other external audio?
Check and fix device
external device Y

Check and fix external device

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Standard Repair Process

D. Function error Established

Error date
OLED TV symptom
Remote control & Local switch checking Revised date 10/16

1. Remote control(R/C) operating error Replace

Main B/D
☞A13 ☞A13 ☞A13
Check & Repair N Check B+ Y Y
Check R/C itself Normal Y Normal Normal Check IR Normal
operating? Cable connection operating? 3.5V Voltage? Signal?
Operation Output signal
Connector solder On Main B/D
N Y N N
☞A9
Check R/C Operating Check & Replace Check 3.5v on Power B/D Repair/Replace
Close
When turn off light Baterry of R/C Replace Power B/D or IR B/D
in room Replace Main B/D
(Power B/D don’t have problem)
If R/C operate, Normal Y
operating? Close
Explain the customer
cause is interference
from light in room. N

Replace R/C

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Standard Repair Process

D. Function error Established

Error date
OLED TV symptom
MR15R operating checking Revised date 11/15

2. MR15R (Magic Remocon) operating error

☞A4
Check the N Check MR15R
RF Receiver ver Normal Y Press the Is show ok N Turn off/on the
INSTART menu is “00.00”? itself Operation operating? set and press
wheel message?
the wheel
N
Y
Y
☞A14
Check & Replace
Check & Repair Battery of MR15R Close
RF assy
connection

Normal Y
☞A4 operating? Close
Is show ok N Press the back
RF Receiver ver N message? key about 5sec
Close N
is “00.00”?
Y
Replace
MR15R
Y
Close
Down load the Firmware

* INSTART MENU12.RF •If you conduct the loop at 3times,

Remocon Test3. Firmware change the MR15R.
download

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Standard Repair Process

D. Function error Established

Error date
OLED TV symptom
Wifi operating checking Revised date 12/16

3.Wifi operating error

☞A4 ☞A15
Check the Wi-Fi Mac value N Check the Wifi wafer Normal N Replace
INSTART menu is “NG”? Voltage?
1pin Main B/D

Y
☞A15 Y

Check & Repair Close

Wifi cable
connection

☞A4
Wi-Fi Mac value N
is “NG”? Close

Change the Wifi

assy

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Standard Repair Process

Established
Error D. Function error date
OLED TV symptom
External device recognition error Revised date 14/16

Y Check technical
Check External Input and
Signal information Technical N
input Component Replace Main B/D
input? - Fix information information?
Recognition error
signal
- S/W Version
N Y

HDMI/
Check and fix DVI, Optical
Fix in Replace Main B/D
external device/cable Recognition error
accordance
with technical
information

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Standard Repair Process

Established
Error E. Noise date
OLED TV symptom
Circuit noise, mechanical noise Revised date 15/16

Identify Check
Circuit
nose location of Replace PSU
noise
type noise

Mechanical Check location of

noise noise

※ When the nose is severe, replace the module

※ Mechanical noise is a natural (For models with fix information, upgrade the
phenomenon, and apply the 1st level S/W or provide the description)
description. When the customer does not OR
agree, apply the process by stage. ※ If there is a “Tak Tak” noise from the
※ Describe the basis of the description cabinet, refer to the KMS fix information and
in “Part related to nose” in the Owner’s then proceed as shown in the solution manual
Manual. (For models without any fix information,
provide the description)

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Standard Repair Process

Established
Error F. Exterior defect date
OLED TV symptom
Exterior defect Revised date 16/16

Zoom part with Module

Replace module
exterior damage damage

Cabinet
Replace cabinet
damage

Remote
controller Replace remote controller
damage

Stand
Replace stand
dent

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Contents of Standard Repair Process Detail Technical Manual

No. Error symptom Content Page Remarks

1 A. Video error_ No video/Normal Check Vx1 lock LED light with naked eye A1
2 audio Check White Balance value A2

TUNER input signal strength checking

3 A3
method
A. Video error_ video error /Video
4 lag/stop Version checking method A4
5 Tuner Checking Part A5
A. Video error _Vertical/Horizontal bar,
6 Connection diagram A6
residual image, light spot
Check Link Cable (EPI) reconnection
7 A. Video error_ Color error A7
condition
<Appendix> Exchange Module (1) A-1/2
8 Defected Type caused by T-Con/
Inverter/ Module Exchange Module (2) A-2/2

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Contents of Standard Repair Process Detail Technical Manual

No. Error symptom Content Page Remarks

9 Check front display Logo A8
B. Power error_ No power
10 Check power input Voltage & ST-BY 3.5V A9
B. Power error_Off when on, off
11 POWER OFF MODE checking method A10
while viewing
Checking method in menu when there is
12 A11
C. Audio error_ No audio/Normal no audio
video Voltage and speaker checking method
13 A12
when there is no audio
Remote controller operation checking
14 A13
method
D. Function error Motion Remote operation checking
15 A14
method
16 Wifi operation checking method A15
17 E. Etc Tool option changing method A16

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Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_No video/Normal audio date
2014.12.31
LCD TV Revised
Content Check Vx1 lock LED light with naked eye A1
date

After Remove the Rear Cover, turning on the power and check with the naked eye,
Whetehr you can see light from locations.
A1
Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes

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Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_No video/Normal audio date
OLED TV
Revised
Content Check White Balance value A2
date

Entry method

1. Press the ADJ button on the remote controller for adjustment.

2. Enter into White Balance of item 12.

3. After recording the R, G, B (GAIN, Cut) value of Color Temp

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Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_Video error, video lag/stop date
OLED TV
TUNER input signal strength checking method Revised
Content date A3

All Settings  Channels Channel Tuning

When the signal is strong, use the

attenuator (-10dB, -15dB, -20dB etc.)

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Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_Video error, video lag/stop date
OLED TV
Version checking method Revised
Content date A4

1. Checking method for remote controller for adjustment

Version

Press the IN-START with the remote

controller for adjustment

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Standard Repair Process Detail Technical Manual
Error Established
symptom
A. Video error_Video error, video lag/stop
OLED TV date
Revised
Content TUNER checking part A5
date

Checking method:
1. Check the signal strength or check whether the screen is normal when the external device is connected.
2. After measuring each voltage from power supply, finally replace the MAIN BOARD.

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Standard Repair Process Detail Technical Manual
Error A. Video error _Vertical/Horizontal bar, Established
OLED TV symptom residual image, light spot date
Revised
Content Connection diagram date A6

As the part connecting to the external input, check

the screen condition by signal

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Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_Color error date
OLED TV
Revised
Content Check Link Cable (EPI) reconnection condition date A7

Check the contact condition of the Link Cable, especially dust or mis insertion.

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Appendix : Exchange the Module (1)

Vertical abnormal display Brightness difference Line Dim

Crosstalk Press damage Crosstalk

Un-repairable Cases
In this case please exchange the module.

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Appendix : Exchange the Module (2)

Angle view Color difference Brightness dot noise Half dead

Brightness difference
Green Noise on power on/off time Line Defect

Un-repairable Cases
In this case please exchange the module.

Mura

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Standard Repair Process Detail Technical Manual
Error Established
symptom B. Power error _No power date
OLED TV
Revised
Content Check front display Logo date A8

ST-BY condition: On or Off

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Standard Repair Process Detail Technical Manual
Error Established
symptom
B. Power error _No power
OLED TV date
Revised
Content Check power input voltage and ST-BY 3.5V A9
date

Check the DC 24V, 12V, 3.5V.

24Pin(Power Board ↔ Main Board)

1 PWR ON 2 INV CTL
3 DPC 4 PDIM#2
5 3.5V 6 GND
7 3.5V 8 3.5V
9 GND 10 GND
11 12V 12 12V
13 12V 14 12V
15 12V 16 GND
17 GND 18 12V_ON
19 24V 20 24V
21 24V 22 24V
23 GND 24 GND

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Standard Repair Process Detail Technical Manual
Error
symptom B. Power error _Off when on, off whiling viewing Established
date
OLED TV
Revised
Content POWER OFF MODE checking method date A10

Entry method

1. Press the IN-START button of the remote controller for adjustment

2. Check the entry into adjustment item 3(power On/Off Status)

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Standard Repair Process Detail Technical Manual
Error Established
symptom C. Audio error_No audio/Normal video
OLED TV date
Revised
Content Checking method in menu when there is no audio date A11

Checking method
1. Press the Setting button on the remote controller
2. Select the Sound function of the Menu
3. Select the Sound Out
4. Select TV Speaker

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Standard Repair Process Detail Technical Manual
Error Established
symptom C. Audio error_No audio/Normal video date
OLED TV
Voltage and speaker checking method Revised
Content date A12
when there is no audio

24Pin(Power Board ↔ Main Board)

1 GND 2 GND
3 24V 4 24V ①
5 24V 6 24V
② 7 GND 8 12V_ON
② 9 12V 10 GND
11 12V 12 12V ③
13 12V 14 12V
15 GND 16 GND
17 3.5V 18 3.5V
19 3.5V 20 GND
21 PDIM#1 22 PDIM#2
23 PWR ON 24 INV CTL 1 SPK_R-_FT 2 SPK_R+_FT
3 SPK_L-_FT 4 SPK_L+_FT

5 SPK_R-_CT 6 SPK_R+_CT
Checking order when there is no audio
7 SPK_L-_CT 8 SPK_L+_CT

① Check the contact condition of or 24V connector of Main Board

② Measure the 24V input voltage supplied from Power Board

(If there is no input voltage, remove and check the connector)

③ Connect the tester RX1 to the speaker terminal and if you hear the Chik Chik sound when you touch the
GND and output terminal, the speaker is normal.
A12
Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes

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Standard Repair Process Detail Technical Manual
Error Established
symptom D. Function error date
OLED TV
Revised
Content Remote controller operation checking method date A13

③ P4001
1 GND
2 KEY1
3 KEY2
4 3.5V_ST
5 GND
6 LOGO_LIGHT
7 IR
8 GND
9 EYE_SCL
10 EYE_SDA

① ②

Checking order
1, 2. Check IR cable condition between IR & Main board.
3. Check the st-by 3.5V on the terminal 4

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Standard Repair Process Detail Technical Manual
Error Established
symptom D. Function error date
OLED TV
Revised
Content Motion Remote operation checking method date A14

P4001
1 GND
2 KEY1
③ 3 KEY2
4 3.5V_ST
5 GND
6 LOGO_LIGHT
7 IR
8 GND
9 EYE_SCL
10 EYE_SDA
① ② P4000
1 GND
2 BT_RESET
3 3D_SYNC_RF
4 WOL/WIFI_POWER_ON
5 GND
③ 6 WIFI_DP
7 WIFI_DM
8 3.5V_WIFI
Checking order
1. Check IR cable condition between IR & Main board.
2. Check WIFI Combo cable condition between WIFI Combo Assy & Main board.
3. Check the st-by 3.5V P001 on the terminal 4
4. Check the 3.5V_WIFI P4000 on the terminal 8
A14
Copyright 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes

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Standard Repair Process Detail Technical Manual
Error Established
symptom D. Function error date
OLED TV
Revised
Content Wifi operation checking method date A15

P4000
1 GND
2 M_RFModule_RESET
3 NOT USE
4 WOL/WIFI_POWER_ON
5 GND
6 WIFI_DP

① ③ 7 WIFI_DM
8 3.5V_WIFI

Checking order
1, 2. Check Wifi cable condition between Wifi assy & Main board.
3. Check the 3.3V on the terminal 8.

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