Institute of Technology and Management: Question Bank Analog Electronics Circuits (21eel37) Iii Semester
Institute of Technology and Management: Question Bank Analog Electronics Circuits (21eel37) Iii Semester
Institute of Technology and Management: Question Bank Analog Electronics Circuits (21eel37) Iii Semester
DEPARTMENT
OF
ELECTRICAL AND ELECTRONICS ENGINEERING
Question Bank
ANALOG ELECTRONICS CIRCUITS (21EEL37)
III SEMESTER
Name: …………………………………………………
USN: …………………………………………………..
Semester: ………………………………………………
Course Instructor
b. Clamper Circuits:
12. With the help of circuit diagram and waveforms analyse the working of a Positive clamper
using ideal diode analysis.
13. With the help of circuit diagram and waveforms analyse the working of a Negative clamper
using ideal diode analysis.
14. With the help of circuit diagram and waveforms analyse the working of a Positive clamper
using practical diode analysis.
14. With the help of circuit diagram and waveforms analyse the working of a Negative clamper
using practical diode analysis.
15. With the help of circuit diagram and waveforms analyse the working of a Biased Positive
clamper using practical diode analysis.
16. With the help of circuit diagram and waveforms analyse the working of a Biased Negative
clamper using practical diode analysis.
Note: Instead of a straightforward question, you may be given with the circuit diagram and
asked plot/find the output (such problems will be solved in the class).
Section B:
Transistor Biasing:
17. Explain the concept of operating point with the help of load line.
18. Analyse the working of Emitter Biasing circuit (Determine IBQ, ICQ and VCEQ). Also construct
the load line.
19. Analyse the working of Collector to Base bias circuit (Determine IBQ, ICQ and VCEQ). Also
construct the load line.
20. Analyse the working of Voltage divider bias circuit (Determine IBQ, ICQ and VCEQ). Also
construct the load line.
21. Explain the concept of stability and factors affecting the transistor stability.
22. Derive a general expression for transistor stability SICO.
23. Determine the stability factors SVBE and S for a voltage divider bias circuit.
Note: Solved problems and related problems from old question paper related to bias point
calculation, stability factors for a voltage divider bias circuit can be given.
Module2:
1. From the two port network topology, obtain the hybrid model for a BJT in Common Emitter
mode.
2. Using re model approach, Determine the i) Input impedance ii) output impedance iii) Voltage
gain and iv) current gain of a Emitter Bias based ac amplifier with a bypass capacitor.
3. Using re model approach, Determine the i) Input impedance ii) output impedance iii) Voltage
gain and iv) current gain of a Emitter Bias based ac amplifier without a bypass capacitor.
4. Using re model approach, Determine the i) Input impedance ii) output impedance iii) Voltage
gain and iv) current gain of a Voltage divider Bias based ac amplifier with a bypass capacitor.
5. Using re model approach, Determine the i) Input impedance ii) output impedance iii) Voltage
gain and iv) current gain of a Voltage divider Bias based ac amplifier without a bypass capacitor.
6. Using approximate hybrid model approach, Determine the i) Input impedance ii) output
impedance iii) Voltage gain and iv) current gain of a Emitter Bias based ac amplifier with a
bypass capacitor.
7. Using approximate hybrid model approach, Determine the i) Input impedance ii) output
impedance iii) Voltage gain and iv) current gain of a Emitter Bias based ac amplifier without a
bypass capacitor.
8. Using approximate hybrid model approach, Determine the i) Input impedance ii) output
impedance iii) Voltage gain and iv) current gain of a Voltage divider Bias based ac amplifier
with a bypass capacitor.
9. Using approximate hybrid model approach, Determine the i) Input impedance ii) output
impedance iii) Voltage gain and iv) current gain of a Voltage divider Bias based ac amplifier
without a bypass capacitor.
10. Using approximate hybrid model approach, Determine the i) Input impedance ii) output
impedance iii) Voltage gain of a single stage emitter follower circuit.
11. Using re model approach, Determine the i) Input impedance ii) output impedance iii) Voltage
gain of a single stage emitter follower circuit.
12. Using approximate hybrid model approach, Determine the i) Input impedance ii) output
impedance iii) Voltage gain of a Darlington emitter follower circuit.
13. Using approximate hybrid model approach, Determine the i) Input impedance ii) output
impedance iii) Voltage gain of a Darlington emitter follower circuit.
Note: Solved problems and related problems from old question paper related to finding Zi, Zo,
Av, Ai for a voltage divider bias and Emitter bias based amplifier can be given.
Module3:
b. Feedback Amplifier
14. With the help of a block diagram, explain the concept of feedback in feedback amplifiers.
Also derive an expression for Overall voltage gain with feedback.
15. Explain detailed block diagram of a feedback amplifier.
16. List out the advantages of negative feedback.
17. Obtain an expression for Miller input and output capacitance.
18. Analyse the frequency response curve of a single stage RC coupled amplifier.
19. Draw the block diagram of a feedback amplifier and explain the various parts of it.
20. Classify the basic amplifiers used in feedback amplifiers.
21. What are mixer circuits? Explain them.
22. What are sampler circuits? Explain them.
23. Obtain an expression for Gain with negative feedback.
24. Obtain an expression for Zi and Zo with feedback for the following configurations:
a. Voltage Series feedback amplifier
b. Voltage Shunt feedback amplifier
c. Current Series feedback amplifier
d. Current Shunt feedback amplifier
25. Simple problems on finding overall gain, bandwidth with feedback.
Module4:
A. Power Amplifiers:
1. Mention the classification of Power Amplifier circuits.
2. Analyse the operation of a Class A series fed power amplifier. Obtain an expression for (a)
Conversion efficiency and (b) maximum conversion efficiency.
3. Analyse the operation of a Class A transformer coupled power amplifier. Obtain an expression
for (a) Conversion efficiency and (b) maximum conversion efficiency.
4. Analyse the operation of a Class B transformer coupled power amplifier. Obtain an expression
for (a) Conversion efficiency and (b) maximum conversion efficiency.
5. Analyse the operation of a Class B complementary symmetry power amplifier. Obtain an
expression for (a) Conversion efficiency and (b) maximum conversion efficiency.
6. Explain the concept of cross-over distortion applicable to class B power amplifier.
7. Problems based on Class A operation series fed power amplifier.
NO HARMONIC DISTORTION ANALYSIS
Part B: Oscillators
8. Explain the concept of Barkhausen criteria applicable to oscillators.
9. Explain the operation of RC phase shift oscillator circuit. Write an expression for frequency of
oscillation.
10. Explain the operation of Wein Bridge oscillator circuit. Write an expression for frequency of
oscillation.
11. Explain the operation of Hartley oscillator circuit. Write an expression for frequency of
oscillation.
12. Explain the operation of Collpit’s oscillator circuit. Write an expression for frequency of
oscillation.
13. Explain the operation of Crystal oscillator circuit in series resonance mode. Write an
expression for frequency of oscillation.
14. Explain the operation of Crystal oscillator circuit in parallel resonance mode. Write an
expression for frequency of oscillation.
15. Simple problems on calculation of frequency of oscillation for above oscillator circuits.
NO FREQUENCY DERIVATION
Module 5:
A. JFETS
1. Derive an expression for transconductance (gm)
2. Comparison of BJTs and FETs.
3. Define the following FET parameters: transconductance, Input resistance and capacitance,
Drain to source resistance, Amplification factor, Power dissipation.
4. Comparison between JFET and MOSFET
5. Comparison between BJT and MOSFET
6. FET biasing using Voltage divider bias circuit in common source configuration only. Derive
an expression for VG, VGS, VDS, IDQ and VDSQ
7. Simple problems based on FET biasing in Voltage divider bias.
8. Depletion MOSFET biasing using Voltage divider bias circuit in common source
configuration only. Derive an expression for VG, VGS, VDS, ID
9. Enhancement MOSFET biasing using Voltage divider bias circuit in common source
configuration only. Derive an expression for VG, VGS, VDS, ID
10. Obtain the small signal model for a FET.
11. For a JFET amplifier with Voltage divider configuration with a bypass capacitor, obtain
Input impedance, Output impedance and Voltage gain expression.( Only common sourse
configuration)
12. Obtain small signal model for a Depletion type MOSFET.