B2 Mini Documentation $1
B2 Mini Documentation $1
B2 Mini Documentation $1
On
Submitted by,
C NIRNITHA 19J41A0265
G LIKHITHA 19J41A0276
of
BACHELOR OF TECHNOLOGY
in
DR K PRASADA RAO
BONAFIDE CERTIFICATE
SIGNATURE SIGNATURE
Dr K Prasada Rao Dr M Kondalu Rao
SUPERVISOR HOD
PROFESSOR, EEE PROFESSOR, EEE
Malla Reddy Engineering College Malla Reddy Engineering College
Secunderabad, 500 100 Secunderabad, 500 100
i
MALLA REDDY ENGINEERING COLLEGE
Maisammaguda, Secunderabad, Telangana, India 500100
ACKNOWLEDGEMENT
We express our sincere thanks to our Principal, Dr. A. Ramaswami Reddy, who
took keen interest and encouraged us in every effort during the project work.
Electrical and Electronics Engineering, for his kind attention and valuable
We are extremely thankful to our Project Guide Dr. K. Prasada Rao, Professor,
for his constant guidance and support to complete the minor project. We also
thank all the teaching and non-teaching staff of Department for their cooperation
ii
ABSTRACT
iii
TABLE OF CONTENTS
NO. NO.
ABSTRACT iii
LIST OF FIGURES vi
1 INTRODUCTION
1.1 INTRODUCTION 1
1.2 TECHNICAL SPECIFICATION
1.2.1 HARDWARE 2
1.2.1 SOFTWARE 2
1.3 BLOCK DIAGRAM
1.3.1 TRANSMISSION SECTION 3
1.3.2 RECEIVER SECTION 3
1.3.3 POWER SUPPLY DIAGRAM 4
2 EMBEDDED SYSTEM WITH AT89C51
2.1 INTRODUCTION 5
2.2 TYPES OF PROCESSORS 6
2.3 MEMORY OF ARCHITECTURE 9
2.4 AT89C51 MICROCONTROLLER 12
3 COMPONENTS
3.1.1 INTRODUCTION 22
3.1.2 VOLTAGE LEVELS 22
iv
3.1.3 PIN DIAGRAM 23
v
LIST OF FIGURES
vi
LIST OF TABLES
vii
CHAPTER – 1
INTRODUCTION
1.1 INTRODUCTION
1
1.2 TECHNICAL SPECIFICATIONS
1.2.1 HARDWARE
ADC : ADC0804
LCD : HD44780
Relays
Fire sensor
XBEE transceivers
Coolant fan
Pumping motor
Power supply
Filter : 1000uf/25V
1.2.2 SOFTWARE
proteus
UC flash
2
1.3 BLOCK DIAGRAM
Power
Max232
Supply 8
Fire sensor
5 ZIG-BEE
TRANSCIVER
1
Temp sensor ADC LCD
DISPLAY
Power 8
Relay
Supply
0
Coolant fan
Max232
5
Relay
1
ZIG-BEE Water
TRANSCIVER sprinkler
3
1.3.3 POWER SUPPLY BLOCK DIAGRAM
Step down
Bridge Filter Regulator Output
Transformer
Rectifier
4
CHAPTER 2
EMBEDDED SYSTEMS
2.1 INTRODUCTION:
Software deals with the languages like ALP, C, and VB etc., and Hardware deals with
Processors, Peripherals, and Memory.
5
Embedded
System
Software Hardware
ALP Processor
C Peripherals
VB memory
Etc.,
Construction industry
Transport
Buildings and premises
Domestic service
Communications
Office systems and mobile equipment
Banking, finance and commercial
Medical diagnostics, monitoring and life support
Testing, monitoring and diagnostic systems
6
Micro Processor (µp):
A silicon chip that contains a CPU. In the world of personal computers, the terms
microprocessor and CPU are used interchangeably. At the heart of all personal computers
and most workstations sits a microprocessor. Microprocessors also control the logic of
almost all digital devices, from clock radios to fuel-injection systems for automobiles.
Instruction set: The set of instructions that the microprocessor can execute.
Bandwidth : The number of bits processed in a single instruction.
Clock speed : Given in megahertz (MHz), the clock speed determines how many
instructions per second the processor can execute.
In both cases, the higher the value, the more powerful the CPU. For example, a 32-bit
microprocessor that runs at 50MHz is more powerful than a 16-bit microprocessor that
runs at 25MHz. In addition to bandwidth and clock speed, microprocessors are classified
as being either RISC (reduced instruction set computer) or CISC (complex instruction set
computer).
7
applications, in contrast to the microprocessors used in personal computers or other
general purpose applications.
ALU
CU
8
Analog circuits to provide clocks and interface to the real world which is analog
in nature
Computer Instruction Set
2.3 Memory Architecture:
Harvard Architecture
Von-Neumann Architecture
Harvard Architecture:
Computers have separate memory areas for program instructions and data. There are two
or more internal data buses, which allow simultaneous access to both instructions and
data. The CPU fetches program instructions on the program memory bus.
The Harvard architecture is a computer architecture with physically separate storage and
signal pathways for instructions and data. The term originated from the Harvard Mark I
relay-based computer, which stored instructions on punched tape (24 bits wide) and data
in electro-mechanical counters. These early machines had limited data storage, entirely
contained within the central processing unit, and provided no access to the instruction
storage as data. Programs needed to be loaded by an operator, the processor could not
boot itself.
The principal advantage of the pure Harvard architecture - simultaneous access to more
than one memory system - has been reduced by modified Harvard processors using
9
modern CPU cache systems. Relatively pure Harvard architecture machines are used
mostly in applications where tradeoffs, such as the cost and power savings from omitting
caches, outweigh the programming penalties from having distinct code and data address
spaces.
Digital signal processors (DSPs) generally execute small, highly-optimized
audio or video processing algorithms. They avoid caches because their
behavior must be extremely reproducible. The difficulties of coping with
multiple address spaces are of secondary concern to speed of execution. As a
result, some DSPs have multiple data memories in distinct address spaces to
facilitate SIMD and VLIW processing. Texas Instruments TMS320 C55x
processors, as one example, have multiple parallel data busses (two write,
three read) and one instruction bus.
Microcontrollers are characterized by having small amounts of program (flash
memory) and data (SRAM) memory, with no cache, and take advantage of the
Harvard architecture to speed processing by concurrent instruction and data
access. The separate storage means the program and data memories can have
different bit depths, for example using 16-bit wide instructions and 8-bit wide
data. They also mean that instruction pre-fetch can be performed in parallel
with other activities. Examples include, the AVR by Atmel Corp, the PIC by
Microchip Technology, Inc. and the ARM Cortex-M3 processor (not all ARM
chips have Harvard architecture).
Even in these cases, it is common to have special instructions to access program memory
as data for read-only tables, or for reprogramming.
Von-Neumann Architecture
A computer has a single, common memory space in which both program instructions and
data are stored. There is a single internal data bus that fetches both instructions and data.
They cannot be performed at the same time
The von Neumann architecture is a design model for a stored-program digital computer
that uses a central processing unit (CPU) and a single separate storage structure
("memory") to hold both instructions and data. It is named after the mathematician and
early computer scientist John von Neumann. Such computers implement a universal
Turing machine and have a sequential architecture.
10
A stored-program digital computer is one that keeps its programmed instructions, as well
as its data, in read-write, random-access memory (RAM). Stored-program computers
were advancement over the program-controlled computers of the 1940s, such as the
Colossus and the ENIAC, which were programmed by setting switches and inserting
patch leads to route data and to control signals between various functional units. In the
vast majority of modern computers, the same memory is used for both data and program
instructions. The mechanisms for transferring the data and instructions between the CPU
and memory are, however, considerably more complex than the original von Neumann
architecture.
The terms "von Neumann architecture" and "stored-program computer" are generally
used interchangeably, and that usage is followed in this article.
The primary difference between Harvard architecture and the Von Neumann
architecture is in the Von Neumann architecture data and programs are stored in
the same memory and managed by the same information handling system.
Whereas the Harvard architecture stores data and programs in separate memory
devices and they are handled by different subsystems.
In a computer using the Von-Neumann architecture without cache; the central
processing unit (CPU) can either be reading and instruction or writing/reading
data to/from the memory. Both of these operations cannot occur simultaneously as
the data and instructions use the same system bus.
In a computer using the Harvard architecture the CPU can both read an instruction
and access data memory at the same time without cache. This means that a
11
computer with Harvard architecture can potentially be faster for a given circuit
complexity because data access and instruction fetches do not contend for use of a
single memory pathway.
FEATURES
12
2.5 PIN CONFIGURATION:
13
2.6 AT89C51 BLOCK DIAGRAM:
14
2.7 PIN DESCRIPTION:
GND - Ground
Port 0
Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink
eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high
impedance inputs.
Port 0 can also be configured to be the multiplexed low order address/data bus
during access to external program and data memory. In this mode, P 0 has internal pull-
ups. Port 0 also receives the code bytes during Flash programming and outputs the code
bytes during program verification. External pull-ups are required during program
verification.
Port 1
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The port 1output
buffers can sink/source four TTL inputs. When 1s are written to port 1 pins, they are
pulled high by the internal pull-ups can be used as inputs. As inputs, Port 1 pins that are
externally being pulled low will source current (1) because of the internal pull-ups.
Port 2
Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The port 2 output
buffers can sink/source four TTL inputs. When 1s are written to port 2 pins, they are
pulled high by the internal pull-ups can be used as inputs. As inputs, Port 2 pins that are
externally being pulled low will source current because of the internal pull-ups.
Port 2 emits the high-order address byte during fetches from external program
memory and during access to DPTR. In this application Port 2 uses strong internal pull-
ups when emitting 1s. During accesses to external data memory that use 8-bit data
address (MOVX@R1), Port 2 emits the contents of the P2 Special Function Register.
15
Port 2 also receives the high-order address bits and some control signals during Flash
programming and verification.
Port 3
Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The port 3 output
buffers can sink/source four TTL inputs. When 1s are written to port 3 pins, they are
pulled high by the internal pull-ups can be used as inputs. As inputs, Port 3 pins that are
externally being pulled low will source current because of the internal pull-ups.
Port 3 also receives some control signals for Flash Programming and verification.
RST
Rest input A on this pin for two machine cycles while the oscillator is running resets the
device.
ALE/PROG:
16
Address Latch Enable is an output pulse for latching the low byte of the address
during access to external memory. This pin is also the program pulse input (PROG)
during Flash programming.
In normal operation ALE is emitted at a constant rate of 1/16 the oscillator frequency and
may be used for external timing or clocking purpose. Note, however, that one ALE pulse
is skipped during each access to external Data memory.
PSEN
Program Store Enable is the read strobe to external program memory when the
AT89c51 is executing code from external program memory PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access to
external data memory.
EA /VPP
External Access Enable (EA) must be strapped to GND in order to enable the
device to fetch code from external program memory locations starting at 0000h up to
FFFFH. Note, however, that if lock bit 1 is programmed EA will be internally latched on
reset. EA should be strapped to Vcc for internal program executions. This pin also
receives the 12-volt programming enable voltage (Vpp) during Flash programming when
12-volt programming is selected.
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL 2
OPERATING DESCRIPTION
17
The AT89C51 has separate address spaces for program and data memory. The
program and data memory can be up to 64K bytes long. The lower 4K program memory
can reside on-chip. The AT89C51 has 128 bytes of on-chip RAM.
The lower 128 bytes can be accessed either by direct addressing or by indirect
addressing. The lower 128 bytes of RAM can be divided into 3 segments as listed below
1. Register Banks 0-3: locations 00H through 1FH (32 bytes). The device after reset
defaults to register bank 0. To use the other register banks, the user must select them in
software. Each register bank contains eight 1-byte registers R0-R7. Reset initializes the
stack point to location 07H, and is incremented once to start from 08H, which is the first
register of the second register bank.
2. Bit Addressable Area: 16 bytes have been assigned for this segment 20H-2FH. Each
one of the 128 bits of this segment can be directly addressed (0-7FH). Each of the 16
bytes in this segment can also be addressed as a byte.
3. Scratch Pad Area: 30H-7FH are available to the user as data RAM. However, if the
data pointer has been initialized to this area, enough bytes should be left aside to prevent
SP data destruction.
Accumulator (ACC)
B Register (B)
The B register is used during multiply and divide operations. For other instructions it can
be treated as another scratch pad register.
The Stack Pointer Register is eight bits wide. It is incremented before data is stored
during PUSH and CALL executions. While the stack may reside anywhere in on chip
RAM, the Stack Pointer is initialized to 07H after a reset. This causes the stack to begin
at location 08H.
18
Data Pointer (DPTR)
The Data Pointer consists of a high byte (DPH) and a low byte (DPL). Its function is to
hold a 16-bit address. It may be manipulated as a 16-bit register or as two independent 8-
bit registers.
The Serial Data Buffer is actually two separate registers, a transmit buffer and a receive
buffer register. When data is moved to SBUF, it goes to the transmit buffer, where it is
held for serial transmission. (Moving a byte to SBUF initiates the transmission.) When
data is moved from SBUF, it comes from the receive buffer.
Timer Registers
Register pairs (TH0, TL0) and (TH1, TL1) are the 16-bit Counter registers for
Timer/Counters 0 and 1, respectively.
Control Registers
Special Function Registers IP, IE, TMOD, TCON, SCON, and PCON contain control and
status bits for the interrupt system, the Timer/Counters, and the serial port.
INTERRUPT SYSTEM
Baud Rate
The baud rate in Mode 0 is fixed as shown in the following equation. Mode 0
Baud Rate = Oscillator Frequency /12 the baud rate in Mode 2 depends on the value of
19
the SMOD bit in Special Function Register PCON. If SMOD = 0 the baud rate is 1/64 of
the oscillator frequency. If SMOD = 1, the baud rate is 1/32 of the oscillator frequency.
In the IS89C51, the Timer 1 overflow rate determines the baud rates in Modes 1 and 3.
There are basically five interrupts available to the user. Reset is also considered as
an interrupt. There are two interrupts for timer, two interrupts for external hardware
interrupt and one interrupt for serial communication.
0000H Reset
Lower the vector, higher the priority. The External Interrupts INT0 and INT1 can
each be either level-activated or transition-activated, depending on bits IT0 and IT1 in
Register TCON. The flags that actually generate these interrupts are the IE0 and IE1 bits
in TCON. When the service routine is vectored, hardware clears the flag that generated
an external interrupt only if the interrupt was transition-activated.
The Timer 0 and Timer 1 Interrupts are generated by TF0and TF1, which are set
by a rollover in their respective Timer/Counter registers (except for Timer 0 in Mode
20
3).When a timer interrupt is generated, the on-chip hardware clears the flag that is
generated.
Block diagram:
Circuit Diagram:
21
Fig 2.4 Power supply Circuit Diagram
CHAPTER – 3
COMPONENTS
3.1 MAX232:
3.1.1 INTRODUCTION:
Max 232 is a communications device used mainly for serial commands to and from
a flash ROM. The MAX232 is an integrated circuit that converts signals from an RS-232
serial port to signals suitable for use in TTL compatible digital logic circuits. The
MAX232 is a dual driver/receiver and typically converts the RX, TX, CTS and RTS
signals.
The drivers provide RS-232 voltage level outputs (approx. ± 7.5 V) from a single + 5 V
supply via on-chip charge pumps and external capacitors. This makes it useful for
implementing RS-232 in devices that otherwise do not need any voltages outside the 0 V
to + 5 V range, as power supply design does not need to be made more complicated just
for driving the RS-232 in this case. The receivers reduce RS-232 inputs (which may be as
high as ± 25 V), to standard 5 V TTL levels. These receivers have a typical threshold of
1.3 V, and a typical hysteresis of 0.5 V.
22
at a certain logic state are opposite from the RS232 Control Line voltages at the same
logic state. To clarify the matter, see the table below.
23
Figure 3.1 MAX 232 Pin Diagram
3.2.1 INTRODUCTION :
The fire sensor circuit is too sensitive and can detect a rise in temperature of 10
degree or more in its vicinity. Ordinary signal diodes like IN 34 and OA 71 exhibits this
property and the internal resistance of these devices will decrease when temperature rises.
In the reverse biased mode, this effect will be more significant. Typically, the diode can
generate around 600 milli volts at 5 degree centigrade. For each degree rise in
temperature; the diode generates 2 mV output voltage. That is at 5 degree it is 10 mV and
when the temperature rises to 50 degrees, the diode will give 100 milli volts. This voltage
is used to trigger the remaining circuit. Transistor T1 is a temperature-controlled switch
and its base voltage depends on the voltage from the diode and from VR and R1.
Normally T1 conducts (due to the voltage set by VR) and LED glows. This indicates
normal temperature.
24
Figure 3.3 Fire Sensor Circuit Diagram
3.3.1 INTRODUCTION:
Temperature Sensor which converts temperature value into electrical signals. We used
IC called LM 35 as a temperature sensor. LM35 series sensors are precision integrated-
circuit temperature sensors whose output voltage is linearly proportional to the Celsius
temperature. The LM35 requires no external calibration since it is internally calibrated. .
The LM35 does not require any external calibration or trimming to provide typical
accuracies of ±1⁄4°C at room temperature and ±3⁄4°C over a full −55 to +150°C
temperature range.
The LM35’s low output impedance, linear output, and precise inherent calibration make
interfacing to readout or control circuitry especially easy. It can be used with single
power supplies, or with plus and minus supplies. As it draws only 60 μA from its supply,
it has very low self-heating, less than 0.1°C in still air.
3.3.2 FEATURES:
25
Calibrated directly in ° Celsius (Centigrade)
Linear + 10.0 mV/°C scale factor
0.5°C accuracy guaranteed (at +25°C)
Rated for full −55° to +150°C range
Suitable for remote applications
Low cost due to wafer-level trimming
Operates from 4 to 30 volts
Less than 60 μA current drain
Low self-heating, 0.08°C in still air
Nonlinearity only ±1⁄4°C typical
Low impedance output, 0.1 W for 1 mA load
3.3.3 LM35
The LM35 thus has an advantage over linear temperature sensors calibrated
in° Kelvin, as the user is not required to subtract a large constant voltage from
its output to obtain convenient Centigrade scaling. The LM35 does not require
any external calibration or trimming to provide typical accuracies of ±1⁄4°C at
room temperature and ±3⁄4°C over a full −55 to +150°C temperature range
26
It can be used with single power supplies, or with plus and minus supplies.
As it draws only 60 μA from its supply, it has very low self-heating, less than
0.1°C in still air.
3.4.1 INRODUCTION:
Analog to digital converters are among the most widely used devices for data
acquisition. Digital computers use binary values, but in physical world everything is
analog. Temperature, pressure, humidity, is a few examples of physical quantities that we
deal with everyday. A physical quantity is converted to electrical signals using a device
called a transducer. Transducers are also referred to as sensors. Sensors for temperature,
velocity, pressure, light, and many other natural quantities produce an output that is
voltage (or current). Therefore, we need an analog to digital converter to translate analog
signals to digital numbers so that microcontroller can read and process them. An ADC
has n-bit resolution where n can be 8,10,12,16 or even 24 bits. The higher resolution
ADC provides smaller step size, where step size is the smallest change that can be
discerned by an ADC. In addition to resolution, converter time is another major factor in
judging an ADC. Conversion time is defined as the time it takes the ADC to convert the
analog input to digital number. Commonly used ADC device – ADC804
27
Figure 3.5 Pin Diagram of ADC
3.5.1 INTRODUCTION :
A liquid crystal display (LCD) is a thin, flat display device made up of any number
of colour or monochrome pixels arrayed in front of a light source or reflector. Each pixel
consists of a column of liquid crystal molecules suspended between two transparent
electrodes, and two polarizing filters, the axes of polarity of which are perpendicular to
each other. Without the liquid crystals between them, light passing through one would be
blocked by the other. The liquid crystal twists the polarization of light entering one filter
to allow it to pass through the other.
28
Figure 3.6 Pin Description of LCD
Most LCDs with 1 controller has 14 Pins and LCDs with 2 controller has 16 Pins (two
pins are extra in both for back-light LED connections) control lines
RS: Line is the "Register Select" line. When RS is low (0), the data is to be treated as a
command or special instruction (such as clear screen, position cursor, etc.). When RS is
high (1), the data being sent is text data which should be displayed on the screen.
RW: Line is the "Read/Write" control line. When RW is low (0), the information on the
data bus is being written to the LCD. When RW is high (1), the program is effectively
querying (or reading) the LCD.
3.6 ZIG-BEE
3.6.1 OVERVIEW
ZigBee builds upon the physical layer and medium access control defined in
IEEE standard 802.15.4 (2003 version) for low-rate WPAN's. The specification goes on
to complete the standard by adding four main components: network layer, application
layer, ZigBee device objects (ZDO's) and manufacturer-defined application objects which
allow for customization and favor total integration.
Besides adding two high-level network layers to the underlying structure, the
most significant improvement is the introduction of ZDO's. These are responsible for a
number of tasks, which include keeping of device roles, management of requests to join a
network, device discovery and security.
At its core, ZigBee is a mesh network architecture. Its network layer natively
supports three types of topologies: both star and tree typical networks and generic mesh
networks. Every network must have one coordinator device, tasked with its creation, the
control of its parameters and basic maintenance. Within star networks, the coordinator
must be the central node.
29
3.2 APPLICATIONS
CHAPTER 4
SOFTWARE REQUIREMENTS
What is µVision3?
µVision3 is an IDE (Integrated Development Environment) that helps you write, compile,
and debug embedded programs. It encapsulates the following components:
A project manager.
A make facility.
Tool configuration.
Editor.
A powerful debugger.
To help you get started, several example programs (located in the \C51\Examples, \
C251\Examples, \C166\Examples, and \ARM\...\Examples) are provided.
30
HELLO is a simple program that prints the string "Hello World" using the Serial
Interface.
TRAFFIC is a traffic light controller with the RTX Tiny operating system.
It is used by developers to create firmware for micro controllers and other embedded
devices. This software is an Integrated Development Environment allows developers to
write, test, and debug code for embedded systems. It allows us to code in c, c++ .
Installing the Keil software on a Windows PC
On most computers, the CD will “auto run”, and you will see the Keil installation
menu. If the menu does not appear, manually double click on the Setup icon, in the root
directory: you will then see the Keil menu.
On the Keil menu, please select “Install Evaluation Software”. (You will not require a
license number to install this software).
4.2 Proteus:
Proteus is a software tool for simulating and prototyping electronic circuits. Proteus
includes a library of components, including microcontrollers, sensors, and connectors,
that can be used to build and test a wide range of electronic circuits. it also includes tools
for simulating the behaviour of circuits and predicting how they will perform in different
scenarios.
Features of Proteus
31
There are 2 main parts of proteus first is used to design and draw different circuits
and the second is for designing of PCB layout.
First is ISIS that used to design and simulate circuits. And second is ARES that
used for designing of a printed circuit board.
It also provides features related to the three-dimensional view of design in PCB.
CHAPTER 5
WORKING
32
Figure 6.1 Schematic Diagram
5.2 CONNECTIONS:
The Schematic diagram shows of the proposed Zigbee-based smart power meter and
outage recording system. The full system can be divided into two parts transmitter section
and receiver section. In transmitter section Firstly, the power supply is connected to the
microcontroller, the voltage and current wave forms of loads are acquired by data
acquisition module and the energy meter is connected to the output coupler and these are
connected to the microcontroller. Microcontroller is connected to Max 232 and the Max
232 is connected zig-bee communication in receiver section the power supply is
connected the microcontroller and the read button is also connected the microcontroller
and the microcontroller is connected LCD display and Max232.
5.3 WORKING:
The wireless communication between the remote areas can be achieved by using
ZIGBEE communication. The working is designed in such a way that we will interface a
temperature sensor and a fire sensor to an 8-bit microcontroller 8051, on the transmitter
side. The temperature sensor will be interfaced to the controller through an ADC to
convert the analogy value sensed into the digital value. The status of these sensors will be
transmitted through the ZIGBEE transceiver which is interfaced to the controller. So, the
same data will be received by another ZIGBEE transceiver which is interfaced to the
controller, on the receiver side.
So now the controller will perform the predefined tasks by monitoring the received data.
It turns ON the coolant fan, if the sensed temperature crosses the set temperature value,
and the water sprinkler will be turned ON and OFF based on the water level of the boiler.
This coolant fan and water sprinkler are interfaced to the controller through relays. An
LCD will also be provided on the transmitter side to display the status of the sensors.
This project uses regulated 5V, 500mA power supply. 7805 three terminal voltage
regulator is used for voltage regulation. Full wave bridge rectifier is used to rectify the ac
output of secondary of 230/12V step down transformer.
33
CHAPTER 6
CONCLUSION
Therefore, the results obtained can be concluded that the aim of this work has been
practically and theoretically achieved.
34
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[13]Arockia Nancy D., Anbumani P. and Balamurugan P.S., “Channel Aware and
qweDynamic Source Routing in MANETs with Route Handoff”, International Journal
of qweeeScientific and Engineering Research, pp. 1-6 , Vol. 3, Issue 5, May 2012.
[14] Balamurugan P.S. and Dr. Thanushkodi K., “Effective P-Hit Methodologies for
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36
qweEffective Method for Transient Faculty Nodes of Wireless Sensor Networks”, pp.
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37
CHAPTER 7
APPENDIX
SOURCE CODE
TRANSMISSION CODE
#include<reg51.h>
#define lcd_data P2
38
}
void lcdcmd(unsigned char value) // LCD COMMAND
{
lcd_data=value&(0xf0); //send msb 4 bits
lcd_rs=0; //select command register
lcd_en=1; //enable the lcd to execute command
delay(3);
lcd_en=0;
lcd_data=((value<<4)&(0xf0)); //send lsb 4 bits
lcd_rs=0; //select command register
lcd_en=1; //enable the lcd to execute command
delay(3);
lcd_en=0;
}
void lcd_init(void)
{
lcdcmd(0x02);
lcdcmd(0x28); //intialise the lcd in 4 bit mode*/
lcdcmd(0x0e); //cursor blinking
lcdcmd(0x06); //move the cursor to right side
lcdcmd(0x01); //clear the lcd
}
void lcddata(unsigned char value)
{
lcd_data=value&(0xf0); //send msb 4 bits
lcd_rs=1; //select data register
lcd_en=1; //enable the lcd to execute data
delay(3);
lcd_en=0;
lcd_data=((value<<4)&(0xf0)); //send lsb 4 bits
lcd_rs=1; //select data register
lcd_en=1; //enable the lcd to execute data
delay(3);
lcd_en=0;
delay(3);
}
void msgdisplay(unsigned char b[]) // send string to lcd
{
unsigned char s,count1=0;
for(s=0;b[s]!='\0';s++)
{
count1++;
if(s==16)
lcdcmd(0xc0);
if(s==32)
{
lcdcmd(1);
count1=0;
}
lcddata(b[s]);
39
}
}
unsigned convert(unsigned int value)
{
unsigned char a,b,c,d;
a=value/100;
b=value%100;
c=b/10;
d=b%10;
a=a|0x30;
c=c|0x30;
d=d|0x30;
lcdcmd(0x85);
lcddata(a);
lcddata(c);
lcddata(d);
}
void tx(unsigned char *tx)
{
for(;*tx != '\0';tx++)
{
SBUF=*tx;
while(TI == 0);
TI=0;
}
}
void sertx(unsigned char tx)
{
SBUF=tx;
while(TI == 0);
TI=0;
}
unsigned char receive()
{
unsigned char rx;
while(RI == 0);
rx=SBUF;
RI=0;
return rx;
}
void main()
{
unsigned int a;
P1=0xFF; //rf data
fire=1;
lcd_init();
lcdcmd(0x80);
msgdisplay("INSTRL PARMS MNTRNG AND CNTRLNG");
delay(200);
40
lcdcmd(0x01);
msgdisplay("TEMP:"); //0x85
lcdcmd(0xc0);
msgdisplay("FIRE:"); //0xc5
lcdcmd(0xc5);
msgdisplay("OFF"); //0xc5
TMOD=0x20;
TH1=0xFD;
SCON=0x50;
TR1=1;
intr=1;
rd=1;
wr=1;
while(1)
{
wr=0;
wr=1;
while(intr==1);
rd=0;
a=P0; //adc port 0
rd=1;
convert(a);
if(a >=30)
{
sertx('1');
}
if(a < 30)
{
sertx('2');
}
if(fire==0)
{
sertx('3');
lcdcmd(0xc5);
msgdisplay("ON "); //0xc5
}
if(fire==1)
{
sertx('4');
lcdcmd(0xc5);
msgdisplay("OFF"); //0xc5
}
}
}
RECIEVER CODE:
41
#include <REGX51.H>
sbit r1=P1^0;
sbit r2=P1^1;
void delay(unsigned int t)
{
unsigned int i,j;
for(i=0;i<t;i++)
for(j=0;j<1275;j++);
}
void tx(unsigned char *tx)
{
for(;*tx != '\0';tx++)
{
SBUF=*tx;
while(TI == 0);
TI=0;
}
}
void sertx(unsigned char tx)
{
SBUF=tx;
while(TI == 0);
TI=0;
}
void tx1(unsigned char tx)
{
SBUF=tx;
while(TI == 0);
TI=0;
}
unsigned char receive()
{
unsigned char rx;
while(RI == 0);
rx=SBUF;
RI=0;
return rx;
}
void main()
{
unsigned char rcv;
TMOD=0x20;
TH1=0xFD;
SCON=0x50;
TR1=1;
r1=r2=0;
while(1)
{
rcv=receive();
sertx(rcv);
42
if(rcv == '1')
{
r1=1;
tx(" LOAD 1 ON\r\n");
}
if(rcv == '2')
{
r1=0;
tx(" LOAD 1 OFF\r\n");
}
if(rcv == '3')
{
r2=1;
tx(" LOAD 2 ON\r\n");
}
if(rcv == '4')
{
r2=0;
tx(" LOAD 2 OFF\r\n");
}
}
}
43