A B C D E

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COMPAL CONFIDENTIAL
MODEL NAME : NCL00 NCL10(ATG)
1 1

PCB NO : LA-5471P ( DA80000G710)

ϮZŽƚŚƐĐŚŝůĚhD
2
ƌW'ƌƌĂŶĚĂůĞн 2

&'W,/yW<ͲD

ϮϬϭϬͲϭͲϮϬ
REV : 1.0(A00)
Λ͗EŽƉŽƉŽŵƉŽŶĞŶƚ
3 3
WD/ džƉƌĞƐƐ dD dWD d'
DdLJƉĞ KDWͬE KDKE&/'
ϭΛ ϮΛ t;ϯΛͿ tͬK;ϰΛͿ t;ϱΛͿ tͬK;ϲΛͿ ϳΛ ϴΛ ϵΛ
WD/ZE͕dWDE͕dD/^ ϰϯϭϳϳϵϯϭ>ϭϭ * * * ϭΛ͕ϰΛ͕ϱΛ
yWZ^^ZE͕dWDE͕dD/^ ϰϯϭϳϳϵϯϭ>ϭϰ * * * ϮΛ͕ϰΛ͕ϱΛ
WD/ZE͕dDE͕dWD/^ ϰϯϭϳϳϵϯϭ>ϭϮ * * * ϭΛ͕ϯΛ͕ϲΛ
yWZ^^ZE͕dDE͕dWD/^ ϰϯϭϳϳϵϯϭ>ϭϱ * * * ϮΛ͕ϯΛ͕ϲΛ
WD/ZE͕>>dWD/^> ϰϯϭϳϳϵϯϭ>ϭϯ * * * ϭΛ͕ϰΛ͕ϲΛ
yWZ^^ZE͕>>dWD/^> ϰϯϭϳϳϵϯϭ>ϭϲ * * * ϮΛ͕ϰΛ͕ϲΛ
WD/ZE͕dWDE͕dD/^ ϰϯϭϳϳϵϯϭ>Ϭϭ * * * * ϭΛ͕ϰΛ͕ϱΛ͕ϵΛ
WD/ZE͕dDE͕dWD/^ ϰϯϭϳϳϵϯϭ>ϬϮ * * * * ϭΛ͕ϯΛ͕ϲΛ͕ϵΛ
WD/ZE͕>>dWD/^> ϰϯϭϳϳϵϯϭ>Ϭϯ * * * * ϭΛ͕ϰΛ͕ϲΛ͕ϵΛ
4 4

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
MB PCB PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
Part Number Description BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Cover Sheet
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
DA80000G700 PCB 0AY LA-5471P REV0 M/B UMA PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
A B
WWW.AliSaler.ComC D
Date: Wednesday, January 20, 2010
E
Sheet 1 of 57
 A B C D E

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Block Diagram dŚĞƌŵĂů WhͬW,/dWWŽƌƚ ůŽĐŬ'ĞŶĞƌĂƚŽƌ
'hZ/E/// ^>'ϴ^Wϱϴϱ
Compal confidential нϭ͘ϬϱsͺZhEͺsdd
ƉĂŐĞϴ нϯ͘ϯsͺZhE
DϰϬϬϮ нϯ͘ϯsͺ>tͺW, нϭ͘ϬϱsͺZhE ƉĂŐĞϲ
Model : NCL00 ƌƌĂŶĚĂůĞ нϯ͘ϯsͺD ƉĂŐĞϮϯ

ĞWKEE ϰD;^ŽĐŬĞƚ'ϭͿ
1
нWtZͺ^Z W'Wh DĞŵŽƌLJh^ 1
нϯ͘ϯsͺ>t
нϯ͘ϯsͺZhE ƉĂŐĞϮϰ ϵϴϵƉŝŶƐ Z///Ͳ/DDyϮ
нsͺKZ
нsͺ'&yKZ
;ZϯͿ нϭ͘ϱsͺDDϭϬϲϲDŚnj E<Ϭ͕ϭ͕Ϯ͕ϯ͕ϰ͕ϱ͕ϲ͕ϳ͕ϴ
нϭ͘ϴsͺZhE ƉĂŐĞϭϯ͕ϭϰ
нϭ͘ϱsͺWhͺsY
ZdKEE нϭ͘ϬϱsͺZhEͺsdd ƉĂŐĞϳͲϭϮ нϭ͘ϱsͺDD
нsͺZͺZ&
нϱsͺZhE ƉĂŐĞϮϳ sŝĚĞŽ^ǁŝƚĐŚ
W/ϯsϳϭϮͲ>y FDI DMI
s' Lane x 8 Lane x 4
нϯ͘ϯsͺZhE ƉĂŐĞϮϴ dDKh>
s' нϯ͘ϯsͺZhE ƉĂŐĞϰϭ dƌŽƵŐŚdĂďůĞ
/Ed>
W h^΀ϭϭ΁
W^ǁŝƚĐŚ ĂŵĞƌĂ
W/ϯsWϴϮϬϬy W /yW<ͲD ^dZĞƉĞĂƚĞƌ нϯ͘ϯsͺZhE ƉĂŐĞϮϰ dƌŽƵŐŚĞWĂďůĞ
нϯ͘ϯsͺZhE ƉĂŐĞϮϲ
^dϰ ^Eϳϱ>sWϰϭϮ
нϱsͺ>tͺW, ϭϬϲϬƉŝŶ' Ͳ^d
нϯ͘ϯsͺ>tͺW, нϯ͘ϯsͺZhE ƉĂŐĞϯϳ
нϯ͘ϯsͺD
нϯ͘ϯsͺZhE ϰϴD,nj
WKEE нϭ͘ϴsͺZhE h^΀Ϯ͕ϯ΁ >^/ h^WŽƌƚƐyϮ h^Ϯ͗>ĞĨƚƐŝĚĞƉĂŝƌƚŽƉ
нϭ͘ϬϱsͺD
нϭ͘ϬϱsͺZhE нϱsͺ>t ƉĂŐĞϯϳ h^ϯZĞĂƌZŝŐŚƚƉĂŝƌďŽƚƚŽŵ
2
K</E'WKZd нϯ͘ϯsͺZhE ƉĂŐĞϮϲ нϭ͘ϬϱsͺZhEͺsdd ƉĂŐĞϭϱͲϮϮ 2

нK<ͺWtZͺZ
нEK<ͺͺ/Eͺ^^ /ϭϯϵϰ h^Ϭ͗ZŝŐŚƚƐŝĚĞƉĂŝƌƚŽƉ
н>KDͺsd page 33 h^΀Ϭ͕ϭ΁ Z^/
нϯ͘ϯsͺ>t ƉĂŐĞϯϴ
WD/^>Kd h^WŽƌƚƐyϮ h^ϭ͗ZŝŐŚƚƐŝĚĞƉĂŝƌďŽƚƚŽŵ
нϱsͺ>t ƉĂŐĞϯϰ
KŶ/Kͬ
/ нϯ͘ϯsͺZhE page 33
ĂƌĚƵƐ W/ͬ^Dh^ нϭ͘ϬϱsͺZhEͬϭϬϬD,nj
USB[8,9] ZϱhϮϰϮ W/ϯ
SATA5 ^ͬDD ,ƵĚŝŽ/ͬ&
нϯ͘ϯsͺZhE
K<>Wh^ KEE нϯ͘ϯsͺZhEͺZ ƉĂŐĞϯϯͲϯϰ
нϯ͘ϯsͺZhE ƉĂŐĞϯϯ
нϭ͘ϬϱsͺZhEͬϭϬϬD,nj W/džƉƌĞƐƐh^ ^ͲdϬͬϭͬϰͬϱϯ'ͬƐ /ŶƚĞů,ĂŶŬƐǀŝůůĞ
^W/
Option ^dϭ ^dϬ ϴϮϱϳϳ>D
W/ϱ W/Ϯ W/ϭ нϯ͘ϯsͺ>E
yWZ^^ DŝŶŝĂƌĚϯ DŝŶŝĂƌĚϮ DŝŶŝĂƌĚϭ dD tϮϱYϲϰs^^/' ^dZĞƉĞĂƚĞƌ
нϭ͘Ϭsͺ>E ƉĂŐĞϯϬ
ĂƌĚ <d&>^, t>E ttE ^^yϯϱ ^Eϳϱ>sWϰϭϮ
нϯ͘ϯsͺD ƉĂŐĞϭϱ
нϯ͘ϯsͺZhE ƉĂŐĞϮϴ
нϯ͘ϯsͺZhE нϯ͘ϯsͺZhE ƉĂŐĞϯϮ ϲϰDϰ<ƐĞĐƚŽƌ
нϯ͘ϯsͺ^h^ нϯ͘ϯsͺW/ͺ<d нϯ͘ϯsͺt>E нϯ͘ϯsͺW/ͺ^dͺtE
>Wh^ >E^t/d,
нϭ͘ϱsͺZhEƉĂŐĞϯϰ нϭ͘ϱsͺZhE ƉĂŐĞϯϲ нϭ͘ϱsͺZhE ƉĂŐĞϯϲ нϭ͘ϱsͺZhE ƉĂŐĞϯϲ
нϯsͺZhE /Ed͘^ƉĞĂŬĞƌ W/ϯ>ϳϮϬ,
3
h^΀ϳ΁ h^΀ϭϯ΁ h^΀ϰ΁ h^΀ϱ΁ h^,dWDϭ͘Ϯ ϯϯD,nj
tϮϱYϯϮs^^/' njĂůŝĂŽĚĞĐ нϯ͘ϯsͺ>E ƉĂŐĞϯϬ 3

ƉĂŐĞϮϵ
DϱϴϴϮ нϯ͘ϯsͺD ƉĂŐĞϭϱ
ͲDŽĚƵůĞ ^Ͳ, ϵϮ,ϴϭϭ
нϯ͘ϯsͺZhE
нϯ͘ϯsͺ>t нsͺϱϴϴϮ 0.VHFWRU нϱsͺ,
^ŵĂƌƚĂƌĚ dϴϬϯϰ,E нϮ͘ϱsͺ>tͺs нϱsͺZhE ƉĂŐĞϮϵ
,ĞĂĚWŚŽŶĞΘ
н^ͺs ƉĂŐĞϯϭ нϱsͺ>t нϭ͘Ϯsͺ>tͺs нϱsͺDK нϯ͘ϯsͺ,
нϯ͘ϯsͺ>t ƉĂŐĞϯϭ нϭ͘Ϯsͺ>tͺW>> ƉĂŐĞϯϭͲϯϮ ƉĂŐĞϮϴ ƉĂŐĞϮϴ Z:ϰϱ
D/:ĂĐŬ
Z&/ USB[10] ^D^< K<>Wh^ нsZ&Khd
ƉĂŐĞϯϭ
h^, tŝ&ŝKEͬK&&
DϱϬϰϱ
^Dh^ нZdͺ>> h^ KŶ/Kͬ
нϯ͘ϯsͺ>t ƉĂŐĞϰϬ ^D^^/K D / K<
dƌŽƵŐŚĂďůĞ d/d>sϯϮϬ/ϯϬϬϰ
нsͺ'&yKZ h^ ϱϬϮϴ нϯ͘ϯsͺ>tͺW,
ƉĂŐĞϯϳ
нϯ͘ϯsͺZhE
нϭ͘ϴsͺZhE ƉĂŐĞϮϵ
ƉĂŐĞϱϮ ƉĂŐĞϰϬ нϯ͘ϯsͺ>t ƉĂŐĞϯϵ KŶ/Kͬ
dŽƵĐŚWĂĚ ϭϬϳϳ
ŝŽŵĞƚƌŝĐ нϱsͺ>t ^ƚŝĐŬ
нϱsͺZhE нϯ͘ϯsͺ>t ƉĂŐĞϰϭ
Ϭ͘ϳϱs +3.3V_RUN ƉĂŐĞϯϳ нϯ͘ϯsͺ>t ƉĂŐĞϰϭ
Z:ϭϭ ŝŐ͘D/
4
ƉĂŐĞϰϳ 4
/Ŷƚ͘<Θ dƌŽƵŐŚĂďůĞ dƌŽƵŐŚĞWĂďůĞ
sKZ;/DsWͲϲͿ ϯsͬϱs WtZ^>d ^ƚŝĐŬ
ϭ͘Ϭϱs DELL CONFIDENTIAL/PROPRIETARY
ƉĂŐĞϰϵ ƉĂŐĞϰϱ ƉĂŐĞϱϰ ƉĂŐĞϱϬ
Compal Electronics, Inc.
Title

,Z'Z ϭ͘ϱs /EΘdd/E WŽǁĞƌKŶͬKĨĨ ͬ/ŶƚĞƌĨĂĐĞ Block Diagram

ƉĂŐĞϱϭ ƉĂŐĞϰϲ ƉĂŐĞϰϲ
^tΘ> ƉĂŐĞϰϯ ƉĂŐĞϰϰ
Size Document Number
LA-5471P
Rev
1.0

A B
WWW.AliSaler.Com C D
Date: Wednesday, January 20, 2010
E
Sheet 2 of 57
 5 4 3 2 1

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POWER STATES USB PORT# DESTINATION
Signal SLP SLP SLP S4 SLP ALWAYS M SUS RUN CLOCKS
State S3# S4# S5# STATE# M# PLANE PLANE PLANE PLANE 0 JUSB1 (Ext Right Side Top)

D
S0 (Full ON) / M0 HIGH HIGH HIGH HIGH HIGH ON ON ON ON ON 1 JUSB1 (Ext Right Side Bottom) D

S3 (Suspend to RAM) / M1 LOW HIGH HIGH HIGH HIGH ON ON ON OFF OFF 2 JESA1 (Ext Left Side Top)

S4 (Suspend to DISK) / M1 LOW LOW HIGH LOW HIGH ON ON OFF OFF OFF 3 JESA1 (Ext Left Side Bottom)

S5 (SOFT OFF) / M1 LOW LOW LOW LOW HIGH ON ON OFF OFF OFF 4 WLAN
PCH
S3 (Suspend to RAM) / M-OFF LOW HIGH HIGH HIGH LOW ON OFF ON OFF OFF 5 WWAN

S4 (Suspend to DISK) / M-OFF LOW LOW HIGH LOW LOW ON OFF OFF OFF OFF 6 Bluetooth

S5 (SOFT OFF) / M-OFF LOW LOW LOW LOW LOW ON OFF OFF OFF OFF 7 USH->BIO

8 DOCKING

C
PM TABLE 9 DOCKING C

+15V_ALW +3.3V_SUS +5V_RUN +3.3V_M +3.3V_M

10 Express card
+5V_ALW +1.5V_MEM +3.3V_RUN +1.05V_M +1.05V_M
+3.3V_ALW_PCH +1.8V_RUN (M-OFF)
power 11 Camera
plane +3.3V_RTC_LDO +1.5V_RUN
+0.75V_DDR_VTT
12 none
+VCC_CORE
+1.05V_RUN_VTT
13 JMINI3(PCIE/BKT CARD)
+1.05V_RUN
State

S0 ON ON ON ON
ON PCI EXPRESS DESTINATION
S3 ON ON OFF ON OFF
Lane 1 MINI CARD-1 WWAN
S5 S4/AC ON OFF OFF ON OFF
B Lane 2 MINI CARD-2 WLAN B

S5 S4/AC don't exist OFF OFF OFF OFF OFF

Lane 3 PCMCIA

Lane 4 EXPRESS CARD

Lane 5 MINI CARD-3 PCIE/BKT

Lane 6 10/100/1G LAN

Lane 7 None

Lane 8 None

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Index and Config.
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 3 of 57
 5 4 3 2 1

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MODC_EN
HDDC_EN
EN_INVPWR FDC654P
+BL_PWR_SRC
Q17

ADAPTER
D
GFX_VR_ON MAX17028 SI3456BDV SI3456BDV D
+VCC_GFXCORE
(PU801) (Q32) (Q29)

+PWR_SRC
BATTERY +5V_HDD +5V_MOD

ALWON

+15V_ALW
MAX17020
CHARGER +5V_ALW RUN_ON
(PU19)

C C

FDS8878
+3.3V_ALW (Q55)

AUX_EN_WOWL

PCH_ALW_ON

AUX_ON
+5V_RUN

SUS_ON

RUN_ON

M_ON
MAX17030 VT356 TPS51100 ISL8014 NCP5222
(PU20) (PU4) (PU5) (PU301) (PU10) SI3456BDV SI3456BDV S13456 SI3456 NTMS4107 SI3456BDV
(Q47) (Q54) (Q60) (Q2) (Q61) (Q66)
CPU_VTT_ON
0.75V_VR_EN
IMVP_VR_ON

M_ON
DDR_ON

RUN_ON

Pop option
B B

+3.3V_WLAN +3.3V_ALW_PCH +3.3V_SUS +3.3V_LAN +3.3V_RUN +3.3V_M

+VCC_CORE +1.5V_MEM +0.75V_DDR_VTT +1.8V_RUN +1.05V_RUN_VTT +1.05V_M

REGCTL_PNP10
Pop option
RUN_ON

CPU1.5V_S3_GATE RUN_ON

+3.3V_M
DCP69
AO4430 S1S406 FDS8878 (Q45)
(Q200) (Q151) (Q183)
Pop option
+1.05V_M
A A

Pop option
+1.0V_LAN
+1.05V_RUN DELL CONFIDENTIAL/PROPRIETARY
+1.5V_CPU_VDDQ +1.5V_RUN
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Power Rail
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
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Date: Wednesday, January 20, 2010
1
Sheet 4 of 57
 5 4 3 2 1

WWW.AliSaler.Com 2.2K

2.2K
+3.3V_ALW_PCH
H14 MEM_SMBCLK 202

C8 MEM_SMBDATA 200 DIMMA SMBUS Address [TBD]

2.2K
202
PCH
+3.3V_LAN 200 DIMMB
D
2.2K SMBUS Address [TBD] D

C6 LAN_SMBCLK 28
LAN_SMBDATA 31 LOM SMBUS Address [C8]
G8
G12 E10 53
51 XDP1 SMBUS Address [TBD]
2.2K
SML1_SMBDATA
+3.3V_ALW_PCH 2.2K
SML1_SMBCLK 2.2K 53
51 XDP2 2.2K
A5 B6 2.2K +3.3V_ALW SMBUS Address [TBD]

3A 3A B4 127 2.2K
+3.3V_RUN
1A DOCK_SMB_CLK
129 DOCKING 2N7002
A3 DOCK_SMB_DAT 14
1A G Sensor
2.2K SMBUS Address [TBD] 2N7002 13 SMBUS Address [TBD]

2.2K +LCD_VDD

B5 LCD_SMBCLK 17
1B LCD
C A4 18 C
LCD_SMDATA SMBUS Address [TBD]
1B (JeDP1)
2.2K

+3.3V_ALW
2.2K
100 ohm 7
1C A56 PBAT_SMBCLK
6 BATTERY SMBUS Address [TBD]
1C B59 PBAT_SMBDAT 100 ohm
KBC 2.2K
CONN

+3.3V_ALW
2.2K
1E A50 USH_SMBCLK M9
1E B53 USH_SMBDAT L9 USH SMBUS Address [TBD]

2.2K

+3.3V_ALW
B
2.2K B
7
2B A49 CARD_SMBCLK
8 Express card SMBUS Address [TBD]
2B B52 CARD_SMBDAT

MEC 5045 2.2K

+3.3V_ALW
2.2K
B50 CHARGER_SMBCLK 10
1G
A47 CHARGER_SMBDAT 9 Charger
1G SMBUS Address [TBD]

2.2K
+3.3V_RUN 0 ohm 0 ohm
2.2K
B7 CKG_FFS_SMBDAT 31
2D
A7 32 CLK GEN SMBUS Address [TBD]
CKG_FFS_SMBCLK
2D

2.2K
+3.3V_RUN
A 2.2K A
B49 DAI_GPU_R3P_SMBCLK
2A 8
B48 DAI_GPU_R3P_SMBDAT 9
A/D,D/A SMBUS Address [TBD]
2A
converter

Compal Electronics, Inc.

Title
SMBUS TOPOLOGY
Size Document Number Rev
1.0
LA-5471P
5 4
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Date: Wednesday, January 20, 2010
1
Sheet 5 of 57
 5 4 3 2 1

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+3.3V_RUN

+3.3V_RUN +CK_VDD_MAIN +CLK_VDD_IO

H_STP_CPU# 1 2
D L89 D
R92 10K_0402_5%~D
1 2 +1.05V_RUN 1 2
BLM18AG601SN1D_0603~D L2

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
1 1 1 1 1 1 BLM18AG601SN1D_0603~D CLKREF
1 1 1

C2

C3

C4

C5

C6

C7
1

C8

C10

C9
2 2 2 2 2 2 @C1707
@C1707
2 2 2 10P_0402_50V8J~D
2

EMI

+CLK_VDD_IO CAN BE CHANGE FROM 1.05V TO 3V

+CK_VDD_MAIN

+CLK_VDD_IO
U1

1 VDD_DOT CPU_0 23
5 VDD_27
CPU_0# 22
C C
15 VDDSRC_IO
18 VDDCPU_IO
20 BUF_BCLK 1 2 CLK_BUF_BCLK
CPU_1 CLK_BUF_BCLK <16>
17 R11 0_0402_5%~D
VDDSRC_3.3 BUF_BCLK# CLK_BUF_BCLK#
24 19 1 2 CLK_BUF_BCLK# <16>
VDDCPU_3.3 CPU_1# R13 0_0402_5%~D
29 VDDREF_3.3
10 BUF_CKSSCD 1 2 CLK_BUF_CKSSCD CLK_BUF_CKSSCD <16>
SRC_1/SATA R1181 0_0402_5%~D
11 BUF_CKSSCD# 1 2 CLK_BUF_CKSSCD# CLK_BUF_CKSSCD# <16>
SRC_1/SATA# R1180 0_0402_5%~D

31 13 BUF_DMI 1 2 CLK_BUF_DMI CLK_BUF_DMI <16>

<40> CKG_FFS_SMBDAT SDA SRC_2 R49 0_0402_5%~D
32 14 BUF_DMI# 1 2 CLK_BUF_DMI# CLK_BUF_DMI# <16>
<40> CKG_FFS_SMBCLK SCL SRC_2# R52 0_0402_5%~D

3 DOT96 1 2 CLK_BUF_DOT96
DOT_96 CLK_BUF_DOT96 <16>
H_STP_CPU# 16 R37 0_0402_5%~D
CPU_STOP# DOT96# CLK_BUF_DOT96#
DOT_96# 4 1 2 CLK_BUF_DOT96# <16>
R38 0_0402_5%~D
+3.3V_RUN
CLK_PWRGD 25
X1 CKPWRGD/PD#
27MHz 6

1
2 1 14.31MHZ_16PF_X5H01431AFG1HX~D
C16 7 R132
27MHz_SS
1

27P_0402_50V8J~D 1K_0402_5%~D

C17 CLK_XTAL_IN 28

2
27P_0402_50V8J~D XTAL_IN
2

2 1 R17 1 2 0_0402_5%~D CLK_XTAL_OUT 27 XTAL_OUT CLK_PWRGD

1 2
B 2 R369 100_0402_5%~D B
VSS_DOT
VSS_27 8

1
D
VSS_SATA 9
CLK_PCH_14M R33 1 2 CLKREF 30 12 2 Q136
<16> CLK_PCH_14M REF_0/CPU_SEL VSS_SRC <49,52> CLK_EN#
33_0402_5%~D 21 G SSM3K7002FU_SC70-3~D
VSS_CPU
26 S

3
VSS_REF
EP 33

SLG8SP585VTR_QFN32_5X5~D

change PN to Spectra Linear SL28748ELCT SA00002Y33L +3.3V_RUN

+1.05V_RUN

1
1

@ U23
@U23
@ R41
@R41 @ C1392 NC7SZ04P5X_NL_SC70-5~D
4.7K_0402_5%~D 0.1U_0402_16V4Z~D

1
5
2 @ R372
REF_O/CPU_SEL 0_0402_5%~D

NC
P
2

2 4 1 2
CLKREF A Y
PIN 30 CPU0 CPU1

G
1(0.7~1.5v) 100MHz 100MHz

3
1

R23 0 (DEFULT) 133MHz 133MHz

10K_0402_5%~D
2

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Clock Generator
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 6 of 57
 5 4 3 2 1

WWW.AliSaler.Com
JCPUI

JCPUA K27
PEG_IRCOMP_R R1084 VSS161
B26 1 2 49.9_0402_1%~D K9
PEG_ICOMPI VSS162
PEG_ICOMPO A26 K6 VSS163
DMI_CRX_PTX_N0 A24 B27 K3
<17> DMI_CRX_PTX_N0 DMI_RX#[0] PEG_RCOMPO VSS164
DMI_CRX_PTX_N1 C23 A25 EXP_RBIAS R1129 1 2 750_0402_1%~D J32
<17> DMI_CRX_PTX_N1 DMI_RX#[1] PEG_RBIAS VSS165
DMI_CRX_PTX_N2 B22 trace width 20mil J30
D <17> DMI_CRX_PTX_N2 DMI_RX#[2] VSS166 D
DMI_CRX_PTX_N3 A21 K35 J21
<17> DMI_CRX_PTX_N3 DMI_RX#[3] PEG_RX#[0] VSS167
PEG_RX#[1] J34 J19 VSS168
DMI_CRX_PTX_P0 B24 J33 H35
<17> DMI_CRX_PTX_P0 DMI_RX[0] PEG_RX#[2] VSS169
DMI_CRX_PTX_P1 D23 G35 H32
<17> DMI_CRX_PTX_P1 DMI_RX[1] PEG_RX#[3] VSS170

DMI
DMI_CRX_PTX_P2 B23 G32 H28
<17> DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 DMI_RX[2] PEG_RX#[4] VSS171
<17> DMI_CRX_PTX_P3 A22 DMI_RX[3] PEG_RX#[5] F34 H26 VSS172
PEG_RX#[6] F31 H24 VSS173
<17> DMI_CTX_PRX_N0 DMI_CTX_PRX_N0 D24 D35 H22
DMI_CTX_PRX_N1 DMI_TX#[0] PEG_RX#[7] VSS174
<17> DMI_CTX_PRX_N1 G24 DMI_TX#[1] PEG_RX#[8] E33 H18 VSS175
<17> DMI_CTX_PRX_N2 DMI_CTX_PRX_N2 F23 C33 H15
DMI_CTX_PRX_N3 DMI_TX#[2] PEG_RX#[9] VSS176
<17> DMI_CTX_PRX_N3 H23 DMI_TX#[3] PEG_RX#[10] D32 H13 VSS177
PEG_RX#[11] B32 H11 VSS178
<17> DMI_CTX_PRX_P0 DMI_CTX_PRX_P0 D25 C31 H8
DMI_CTX_PRX_P1 DMI_TX[0] PEG_RX#[12] VSS179
<17> DMI_CTX_PRX_P1 F24 DMI_TX[1] PEG_RX#[13] B28 EDP_CPU_AUX# <24> H5 VSS180
<17> DMI_CTX_PRX_P2 DMI_CTX_PRX_P2 E23 B30 H2
DMI_CTX_PRX_P3 DMI_TX[2] PEG_RX#[14] VSS181
<17> DMI_CTX_PRX_P3 G23 DMI_TX[3] PEG_RX#[15] A31 G34 VSS182
G31 VSS183
PEG_RX[0] J35 G20 VSS184
PEG_RX[1] H34 G9 VSS185
PEG_RX[2] H33 G6 VSS186
<17> FDI_CTX_PRX_N0 FDI_CTX_PRX_N0 E22 F35 G3
FDI_CTX_PRX_N1 FDI_TX#[0] PEG_RX[3] VSS187
<17> FDI_CTX_PRX_N1 D21 FDI_TX#[1] PEG_RX[4] G33 F30 VSS188
<17> FDI_CTX_PRX_N2 FDI_CTX_PRX_N2 D19 E34 F27
FDI_CTX_PRX_N3 FDI_TX#[2] PEG_RX[5] VSS189
<17> FDI_CTX_PRX_N3 D18 FDI_TX#[3] PEG_RX[6] F32 F25 VSS190
<17> FDI_CTX_PRX_N4 FDI_CTX_PRX_N4 G21 D34 F22
FDI_CTX_PRX_N5 FDI_TX#[4] PEG_RX[7] VSS191
<17> FDI_CTX_PRX_N5 E19 FDI_TX#[5] PEG_RX[8] F33 F19 VSS192
<17> FDI_CTX_PRX_N6 FDI_CTX_PRX_N6 F21 PCI EXPRESS -- GRAPHICS B33 F16
FDI_TX#[6] PEG_RX[9] VSS193
Intel(R) FDI
<17> FDI_CTX_PRX_N7 FDI_CTX_PRX_N7 G18 D31 E35
FDI_TX#[7] PEG_RX[10] VSS194
A32 E32

<17> FDI_CTX_PRX_P0 FDI_CTX_PRX_P0 D22 FDI_TX[0]

PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
C30
A28
EDP_HPD# <24>
EDP_CPU_AUX <24>
E29
E24
VSS195
VSS196
VSS197
VSS
<17> FDI_CTX_PRX_P1 FDI_CTX_PRX_P1 C21 B29 E21
C FDI_CTX_PRX_P2 FDI_TX[1] PEG_RX[14] VSS198 C
<17> FDI_CTX_PRX_P2 D20 FDI_TX[2] PEG_RX[15] A30 E18 VSS199
<17> FDI_CTX_PRX_P3 FDI_CTX_PRX_P3 C18 E13
FDI_CTX_PRX_P4 FDI_TX[3] VSS200
<17> FDI_CTX_PRX_P4 G22 FDI_TX[4] PEG_TX#[0] L33 E11 VSS201
<17> FDI_CTX_PRX_P5 FDI_CTX_PRX_P5 E20 M35 E8
FDI_CTX_PRX_P6 FDI_TX[5] PEG_TX#[1] VSS202
<17> FDI_CTX_PRX_P6 F20 FDI_TX[6] PEG_TX#[2] M33 E5 VSS203
<17> FDI_CTX_PRX_P7 FDI_CTX_PRX_P7 G19 M30 E2 AT35
FDI_TX[7] PEG_TX#[3] VSS204 VSS_NCTF1
PEG_TX#[4] L31 D33 VSS205 VSS_NCTF2 AT1
FDI_FSYNC0 F17 K32 D30 AR34
<17> FDI_FSYNC0 FDI_FSYNC[0] PEG_TX#[5] VSS206 VSS_NCTF3
FDI_FSYNC1 E17 M29 D26 B34
<17> FDI_FSYNC1 FDI_FSYNC[1] PEG_TX#[6] VSS207 VSS_NCTF4
J31 D9 B2

NCTF
FDI_INT PEG_TX#[7] VSS208 VSS_NCTF5
<17> FDI_INT C17 FDI_INT PEG_TX#[8] K29 D6 VSS209 VSS_NCTF6 B1
PEG_TX#[9] H30 D3 VSS210 VSS_NCTF7 A35
FDI_LSYNC0 F18 H29 C34
<17> FDI_LSYNC0 FDI_LSYNC[0] PEG_TX#[10] VSS211
FDI_LSYNC1 D17 F29 C32
<17> FDI_LSYNC1 FDI_LSYNC[1] PEG_TX#[11] VSS212
PEG_TX#[12] E28 C29 VSS213
PEG_TX#[13] D29 C28 VSS214
PEG_TX#[14] D27 C24 VSS215
EDP_CPU_LANE_N1 <24>
PEG_TX#[15] C26 C22 VSS216
EDP_CPU_LANE_N0 <24>
C20 VSS217
PEG_TX[0] L34 C19 VSS218
PEG_TX[1] M34 C16 VSS219
PEG_TX[2] M32 B31 VSS220
PEG_TX[3] L30 B25 VSS221
PEG_TX[4] M31 B21 VSS222
PEG_TX[5] K31 B18 VSS223
PEG_TX[6] M28 B17 VSS224
PEG_TX[7] H31 B13 VSS225
PEG_TX[8] K28 B11 VSS226
PEG_TX[9] G30 B8 VSS227
PEG_TX[10] G29 B6 VSS228
PEG_TX[11] F28 B4 VSS229
PEG_TX[12] E27 A29 VSS230
B D28 A27 B
PEG_TX[13] VSS231
PEG_TX[14] C27 EDP_CPU_LANE_P1 <24> A23 VSS232
PEG_TX[15] C25 A9 VSS233
EDP_CPU_LANE_P0 <24>

REV1.0
TYCO_CALPELLA_AUBURNDALE

REV1.0
TYCO_CALPELLA_AUBURNDALE

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Arrandale (1/6)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 7 of 57
 5 4 3 2 1

WWW.AliSaler.Com
1.5V_PWRGD <42> +1.05V_RUN_VTT +1.05V_RUN_VTT
+1.05V_RUN_VTT
+3.3V_ALW
+3.3V_ALW2 @JXDP1
@ JXDP1

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
C1879 1 GND0 GND1 2
1 1 XDP_PREQ# 3 4 CFG8
OBSFN_A0 OBSFN_C0 CFG8 <10>

@ C19

@ C20
+3.3V_ALW2 1 2 XDP_PRDY# 5 6 CFG9
OBSFN_A1 OBSFN_C1 CFG9 <10>
R1505 7 8
10K_0402_5%~D XDP_OBS0 GND2 GND3 CFG0
0.1U_0402_16V4Z~D 9 OBSDATA_A0 OBSDATA_C0 10 CFG0 <10>
2 2 XDP_OBS1 11 12 CFG1
OBSDATA_A1 OBSDATA_C1 CFG1 <10>

1
13 14

2
D R1503 U141 XDP_OBS2 GND4 GND5 CFG2 D
15 OBSDATA_A2 OBSDATA_C2 16 CFG2 <10>

5
+1.5V_CPU_VDDQ 100K_0402_5%~D 1.5V_PWRGD 74AHC1G08GW_SOT353-5~D XDP_OBS3 17 18 CFG3
OBSDATA_A3 OBSDATA_C3 CFG3 <10>
1 19 20

P
IN1 GND6 GND7 CFG10
4 Place near JXDP1 21 22

2
O OBSFN_B0 OBSFN_D0 CFG10 <10>
1

1
D CFG11
2 IN2 23 OBSFN_B1 OBSFN_D1 24 CFG11 <10>

G
R1504 1.5V_CPU_VDDQ_PWRGD# 2 Q207 25 26
GND8 GND9

1
1K_0402_5%~D G BSS138_SOT23~D XDP_OBS4 27 28 CFG4

3
OBSDATA_B0 OBSDATA_D0 CFG4 <10>
S R879 XDP_OBS5 29 30 CFG5

3
OBSDATA_B1 OBSDATA_D1 CFG5 <10>
1.5K_0402_1%~D 31 32
R1507
2

GND10 GND11

1
C +1.5V_CPU_VDDQ XDP_OBS6 33 34 CFG6
OBSDATA_B2 OBSDATA_D2 CFG6 <10>
1.5V_CPU_VDDQ_PWRGD 1 2 1.5V_CPU_VDDQ_PWRGD_R 2 Q205 @R9
@ R9 @ R6
@R6 XDP_OBS7 35 36 CFG7

2
B OBSDATA_B3 OBSDATA_D3 CFG7 <10>
PMST3904_SOT323-3~D 1.1K_0402_1%~D 1K_0402_5%~D 37 38
E GND12 GND13
2 1.8K_0402_5%~D 1 2 PM_DRAM_PWRGD_R H_CPUPWRGD 1 2 H_CPUPWRGD_XDP 39 40 CLK_CPU_ITP

3
CFD_PWRBTN#_XDP PWRGOOD/HOOK0 ITPCLK/HOOK4 CLK_CPU_ITP# @ R7
<15,17> SIO_PWRBTN#_R 1 2 41 42
C1880 @R68
@ R68 0_0402_5%~D HOOK1 ITPCLK#/HOOK5 1K_0402_5%~D
43 VCC_OBS_AB VCC_OBS_CD 44

1
0.22U_0402_10V6K~D H_PWRGD_XDP 1 2 PWRGD_XDP_R 45 46 XDP_RST#_R 2 1 H_CPURST#
1 R880 @R19
@ R19 0_0402_5%~D HOOK2 RESET#/HOOK6 XDP_DBRESET#
47 HOOK3 DBR#/HOOK7 48
750_0402_1%~D @R1551
@ R1551 0_0402_5%~D 49 50
GND14 GND15
<13,14,15,16,28> MEM_SMBDATA 1 2 MEM_SMBDATA_XDP 51 52 XDP_TDO
SDA TD0
1 2 MEM_SMBCLK_XDP 53 54 XDP_TRST#

2
<13,14,15,16,28> MEM_SMBCLK SCL TRST#
@R1552
@ R1552 0_0402_5%~D 55 56 XDP_TDI
XDP_TCLK TCK1 TDI XDP_TMS
57 TCK0 TMS 58
59 GND16 GND17 60
Keep R1132, R1133, R1136-R119
SAMTE_BSH-030-01-L-D-A
JCPUB for slew rate control.
H_COMP3 AT23 COMP3 CPU_BCLK R1132 1
A16 2 0_0402_5%~D CLK_CPU_BCLK <19>
BCLK

MISC
H_COMP2 AT24 B16 CPU_BCLK# R1133 1 2 0_0402_5%~D
COMP2 BCLK# CLK_CPU_BCLK# <19>
H_COMP1 CLK_CPU_ITP

CLOCKS
G16 COMP1 BCLK_ITP AR30
AT30 CLK_CPU_ITP#
C H_COMP0 BCLK_ITP# +1.05V_RUN_VTT C
AT26 COMP0
E16 CPU_DMI R1136 1 2 0_0402_5%~D
PEG_CLK CLK_CPU_DMI <16>
D16 CPU_DMI# R1137 1 2 0_0402_5%~D +3.3V_RUN
PEG_CLK# CLK_CPU_DMI# <16>
AH24 1 2 H_THERMTRIP#
<40> CPU_DETECT# SKTOCC# CPU_DPLL
A18 R1138 1 2 0_0402_5%~D R1285 56_0402_5%~D
DPLL_REF_SSCLK CLK_CPU_DPLL <16>
A17 CPU_DPLL# R1139 1 2 0_0402_5%~D 1 2 H_CATERR# XDP_DBRESET# R60 2 1 1K_0402_5%~D
DPLL_REF_SSCLK# CLK_CPU_DPLL# <16>
H_CATERR# AK14 R1232 49.9_0402_1%~D
<39> H_CATERR# CATERR#
THERMAL
1 2 H_PROCHOT#
R1233 68_0402_1%~D
F6 DDR3_DRAMRST#_CPU 1 2 H_CPURST#_R
H_PECI SM_DRAMRST# @ R1234 68_0402_1%~D
<19> H_PECI AT15 PECI
AL1 SM_RCOMP0
SM_RCOMP[0] SM_RCOMP1
SM_RCOMP[1] AM1
AN1 SM_RCOMP2 +1.05V_RUN_VTT
H_PROCHOT# SM_RCOMP[2]
<49> H_PROCHOT# AN26 PROCHOT#
AN15 PM_EXTTS# XDP_TMS @R64
@ R64 2 1 51_0402_1%~D
PM_EXT_TS#[0]
AP15 1 2
DDR3
MISC

PM_EXT_TS#[1] @R1469
@ R1469 0_0402_5%~D XDP_TDI_R @
@R65
R65 2 1 51_0402_1%~D
1 2 H_THERMTRIP#_R AK15
<23> H_THERMTRIP# THERMTRIP#
R1286 XDP_PREQ# @
@R1149
R1149 2 1 51_0402_1%~D

D
0_0402_5%~D DDR3_DRAMRST#_CPU 3 1 DDR3_DRAMRST# <13,14>
AT28 XDP_PRDY# XDP_TDO @R3
@ R3 2 1 51_0402_1%~D
place R1286 near CPU PRDY#
AP27 XDP_PREQ# Q199 BSS138_SOT23~D
PREQ#

G
2
1
AN28 XDP_TCLK
TCK DDR_HVREF_RST_GATE <40>
H_CPURST# 1 2 H_CPURST#_R AP26 AP28 XDP_TMS R1525 XDP_TCLK 2 1
<49> H_CPURST# RESET_OBS# TMS
PWR MANAGEMENT

R1088 0_0402_5%~D AT27 XDP_TRST# 100K_0402_5%~D 1 @R67

@ R67 51_0402_1%~D
TRST#
JTAG & BPM

H_PM_SYNC AL15 AT29 XDP_TDI_R C1890

2
<17> H_PM_SYNC PM_SYNC TDI XDP_TDO_R
<39,49,52> IMVP_PWRGD 1 2 AR27 0.1U_0402_10V7K~D
@R12
@ R12 0_0402_5%~D TDO XDP_TDI_M 2
TDI_M AR29
1 2 VCCPWRGOOD_1_R AN14 AP29 XDP_TDO_M
B R1290 0_0402_5%~D VCCPWRGOOD_1 TDO_M B
AN25 XDP_DBRESET#_R 1 2 XDP_DBRESET# <15,17>
DBR#
<19> H_CPUPWRGD 1 2 VCCPWRGOOD_0_R AN27 @R1241
@ R1241 0_0402_5%~D
R1087 0_0402_5%~D VCCPWRGOOD_0
AJ22 XDP_OBS0_R @ R780
@R780 1 2 0_0402_5%~D XDP_OBS0
1 2 PM_DRAM_PWRGD_R AK13
BPM#[0]
AK22 XDP_OBS1_R @R781
@ R781 1 2 0_0402_5%~D XDP_OBS1
JTAG MAPPING
<17> PM_DRAM_PWRGD SM_DRAMPWROK BPM#[1]
R878 0_0402_5%~D AK24 XDP_OBS2_R @R782
@ R782 1 2 0_0402_5%~D XDP_OBS2
BPM#[2] XDP_OBS3_R @R783
@ R783 0_0402_5%~D XDP_OBS3 XDP_TDI_R XDP_TDI XDP_TRST#
AJ24 1 2 1 2 2 1
H_VTTPWRGD BPM#[3] XDP_OBS4_R @R784
@ R784 0_0402_5%~D XDP_OBS4 @ R1153 0_0402_5%~D @ R66 51_0402_1%~D
<48> H_VTTPWRGD AM15 AJ25 1 2
VTTPWRGOOD BPM#[4] XDP_OBS5_R @R785
@ R785 0_0402_5%~D XDP_OBS5
BPM#[5] AH22 1 2
AK23 XDP_OBS6_R @R22
@ R22 1 2 0_0402_5%~D XDP_OBS6
H_PWRGD_XDP BPM#[6] XDP_OBS7_R @R24
@ R24 0_0402_5%~D XDP_OBS7 XDP_TDO_M XDP_TDO
AM26 AH23 1 2 1 2
TAPPWRGOOD BPM#[7] @R1154
@ R1154 0_0402_5%~D

1 2 PCH_PLTRST#_R AL14
For ESD concern, please put near CPU
<18,32,34,36,39,40> PCH_PLTRST#_EC RSTIN#

1
R1144 1.5K_0402_1%~D
@ R1157
@R1157 Scan Chain Stuff -> R1153,R1156,R1157
REV1.0
2

0_0402_5%~D
R1143 TYCO_CALPELLA_AUBURNDALE (Default) No stuff -> R1154,R1155
Refer to CRB 1.51 750_0402_1%~D

2
+1.05V_RUN_VTT
CPU Only Stuff -> R1153,R1154
1

XDP_TDI_M 1 2
@R1155
@ R1155 0_0402_5%~D No stuff -> R1154,R1155,R1157
1

R25
10K_0402_5%~D XDP_TDO_R 1 2 PCH Only Stuff -> R1155,R1156
@ R1156 0_0402_5%~D
No stuff -> R1153,R1154,R1157
2

PM_EXTTS# <23>
H_COMP0 SM_RCOMP2
A H_COMP1 SM_RCOMP1 A
1

H_COMP2 SM_RCOMP0
H_COMP3 @R1145
@ R1145
100_0402_1%~D

130_0402_1%~D

12.4K_0402_1%~D
24.9_0402_1%~D

DELL CONFIDENTIAL/PROPRIETARY
1

1
20_0402_1%~D

20_0402_1%~D

49.9_0402_1%~D

49.9_0402_1%~D
1

R1140

R1141

R1142

2
R1235

R1093

R1094

R1095

Compal Electronics, Inc.

2

Title
2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Arrandale (2/6)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 8 of 57
 5 4 3 2 1

WWW.AliSaler.Com

JCPUC JCPUD

AA6 M_CLK_DDR0 W8 M_CLK_DDR2

D SA_CK[0] M_CLK_DDR0 <13> <14> DDR_B_D[0..63] SB_CK[0] M_CLK_DDR2 <14> D
AA7 M_CLK_DDR#0 W9 M_CLK_DDR#2
<13> DDR_A_D[0..63] SA_CK#[0] M_CLK_DDR#0 <13> SB_CK#[0] M_CLK_DDR#2 <14>
P7 DDR_CKE0_DIMMA DDR_B_D0 B5 M3 DDR_CKE2_DIMMB
DDR_A_D0 SA_CKE[0] DDR_CKE0_DIMMA <13> DDR_B_D1 SB_DQ[0] SB_CKE[0] DDR_CKE2_DIMMB <14>
A10 SA_DQ[0] A5 SB_DQ[1]
DDR_A_D1 C10 DDR_B_D2 C3
DDR_A_D2 SA_DQ[1] DDR_B_D3 SB_DQ[2] M_CLK_DDR3
C7 SA_DQ[2] B3 SB_DQ[3] SB_CK[1] V7 M_CLK_DDR3 <14>
DDR_A_D3 A7 Y6 M_CLK_DDR1 DDR_B_D4 E4 V6 M_CLK_DDR#3
SA_DQ[3] SA_CK[1] M_CLK_DDR1 <13> SB_DQ[4] SB_CK#[1] M_CLK_DDR#3 <14>
DDR_A_D4 B10 Y5 M_CLK_DDR#1 DDR_B_D5 A6 M2 DDR_CKE3_DIMMB
SA_DQ[4] SA_CK#[1] M_CLK_DDR#1 <13> SB_DQ[5] SB_CKE[1] DDR_CKE3_DIMMB <14>
DDR_A_D5 D10 P6 DDR_CKE1_DIMMA DDR_B_D6 A4
DDR_A_D6 SA_DQ[5] SA_CKE[1] DDR_CKE1_DIMMA <13> DDR_B_D7 SB_DQ[6]
E10 SA_DQ[6] C4 SB_DQ[7]
DDR_A_D7 A8 DDR_B_D8 D1
DDR_A_D8 SA_DQ[7] DDR_B_D9 SB_DQ[8]
D8 SA_DQ[8] D2 SB_DQ[9]
DDR_A_D9 F10 AE2 DDR_CS0_DIMMA# DDR_B_D10 F2 AB8 DDR_CS2_DIMMB#
SA_DQ[9] SA_CS#[0] DDR_CS0_DIMMA# <13> SB_DQ[10] SB_CS#[0] DDR_CS2_DIMMB# <14>
DDR_A_D10 E6 AE8 DDR_CS1_DIMMA# DDR_B_D11 F1 AD6 DDR_CS3_DIMMB#
SA_DQ[10] SA_CS#[1] DDR_CS1_DIMMA# <13> SB_DQ[11] SB_CS#[1] DDR_CS3_DIMMB# <14>
DDR_A_D11 F7 DDR_B_D12 C2
DDR_A_D12 SA_DQ[11] DDR_B_D13 SB_DQ[12]
E9 SA_DQ[12] F5 SB_DQ[13]
DDR_A_D13 B7 DDR_B_D14 F3
DDR_A_D14 SA_DQ[13] M_ODT0 DDR_B_D15 SB_DQ[14] M_ODT2
E7 SA_DQ[14] SA_ODT[0] AD8 M_ODT0 <13> G4 SB_DQ[15] SB_ODT[0] AC7 M_ODT2 <14>
DDR_A_D15 C6 AF9 M_ODT1 DDR_B_D16 H6 AD1 M_ODT3
SA_DQ[15] SA_ODT[1] M_ODT1 <13> SB_DQ[16] SB_ODT[1] M_ODT3 <14>
DDR_A_D16 H10 DDR_B_D17 G2
DDR_A_D17 SA_DQ[16] DDR_B_D18 SB_DQ[17]
G8 SA_DQ[17] J6 SB_DQ[18]
DDR_A_D18 K7 DDR_B_D19 J3
SA_DQ[18] SB_DQ[19] DDR_B_DM[0..7] <14>
DDR_A_D19 J8 DDR_B_D20 G1
DDR_A_D20 SA_DQ[19] DDR_B_D21 SB_DQ[20] DDR_B_DM0
G7 SA_DQ[20] DDR_A_DM[0..7] <13> G5 SB_DQ[21] SB_DM[0] D4
DDR_A_D21 G10 DDR_B_D22 J2 E1 DDR_B_DM1
DDR_A_D22 SA_DQ[21] DDR_A_DM0 DDR_B_D23 SB_DQ[22] SB_DM[1] DDR_B_DM2
J7 SA_DQ[22] SA_DM[0] B9 J1 SB_DQ[23] SB_DM[2] H3
DDR_A_D23 J10 D7 DDR_A_DM1 DDR_B_D24 J5 K1 DDR_B_DM3
DDR_A_D24 SA_DQ[23] SA_DM[1] DDR_A_DM2 DDR_B_D25 SB_DQ[24] SB_DM[3] DDR_B_DM4
L7 SA_DQ[24] SA_DM[2] H7 K2 SB_DQ[25] SB_DM[4] AH1
DDR_A_D25 M6 M7 DDR_A_DM3 DDR_B_D26 L3 AL2 DDR_B_DM5
DDR_A_D26 SA_DQ[25] SA_DM[3] DDR_A_DM4 DDR_B_D27 SB_DQ[26] SB_DM[5] DDR_B_DM6
M8 SA_DQ[26] SA_DM[4] AG6 M1 SB_DQ[27] SB_DM[6] AR4
DDR_A_D27 L9 AM7 DDR_A_DM5 DDR_B_D28 K5 AT8 DDR_B_DM7
DDR_A_D28 SA_DQ[27] SA_DM[5] DDR_A_DM6 DDR_B_D29 SB_DQ[28] SB_DM[7]
L6 SA_DQ[28] SA_DM[6] AN10 K4 SB_DQ[29]
DDR_A_D29 K8 AN13 DDR_A_DM7 DDR_B_D30 M4
C DDR_A_D30 SA_DQ[29] SA_DM[7] DDR_B_D31 SB_DQ[30] C
N8 SA_DQ[30] N5 SB_DQ[31]
DDR_A_D31 P9 DDR_B_D32 AF3
DDR_A_D32 SA_DQ[31] DDR_B_D33 SB_DQ[32]
AH5 SA_DQ[32] AG1 SB_DQ[33] DDR_B_DQS#[0..7] <14>
DDR_A_D33 AF5 DDR_B_D34 AJ3 D5 DDR_B_DQS#0
DDR_A_D34 SA_DQ[33] DDR_A_DQS#0 DDR_A_DQS#[0..7] <13> DDR_B_D35 SB_DQ[34] SB_DQS#[0] DDR_B_DQS#1
AK6 SA_DQ[34] SA_DQS#[0] C9 AK1 SB_DQ[35] SB_DQS#[1] F4
DDR_A_D35 DDR_A_DQS#1 DDR_B_D36 DDR_B_DQS#2
DDR SYSTEM MEMORY A

AK7 SA_DQ[35] SA_DQS#[1] F8 AG4 SB_DQ[36] SB_DQS#[2] J4

DDR_A_D36 AF6 J9 DDR_A_DQS#2 DDR_B_D37 AG3 L4 DDR_B_DQS#3
DDR_A_D37 SA_DQ[36] SA_DQS#[2] DDR_A_DQS#3 DDR_B_D38 SB_DQ[37] SB_DQS#[3] DDR_B_DQS#4
AG5 SA_DQ[37] SA_DQS#[3] N9 AJ4 SB_DQ[38] SB_DQS#[4] AH2
DDR_A_D38 AJ7 AH7 DDR_A_DQS#4 DDR_B_D39 AH4 AL4 DDR_B_DQS#5

DDR SYSTEM MEMORY - B

DDR_A_D39 SA_DQ[38] SA_DQS#[4] DDR_A_DQS#5 DDR_B_D40 SB_DQ[39] SB_DQS#[5] DDR_B_DQS#6
AJ6 SA_DQ[39] SA_DQS#[5] AK9 AK3 SB_DQ[40] SB_DQS#[6] AR5
DDR_A_D40 AJ10 AP11 DDR_A_DQS#6 DDR_B_D41 AK4 AR8 DDR_B_DQS#7
DDR_A_D41 SA_DQ[40] SA_DQS#[6] DDR_A_DQS#7 DDR_B_D42 SB_DQ[41] SB_DQS#[7]
AJ9 SA_DQ[41] SA_DQS#[7] AT13 AM6 SB_DQ[42]
DDR_A_D42 AL10 DDR_B_D43 AN2
DDR_A_D43 SA_DQ[42] DDR_B_D44 SB_DQ[43]
AK12 SA_DQ[43] AK5 SB_DQ[44]
DDR_A_D44 AK8 DDR_B_D45 AK2
DDR_A_D45 SA_DQ[44] DDR_B_D46 SB_DQ[45]
AL7 SA_DQ[45] DDR_A_DQS[0..7] <13> AM4 SB_DQ[46]
DDR_A_D46 AK11 C8 DDR_A_DQS0 DDR_B_D47 AM3
SA_DQ[46] SA_DQS[0] SB_DQ[47] DDR_B_DQS[0..7] <14>
DDR_A_D47 AL8 F9 DDR_A_DQS1 DDR_B_D48 AP3 C5 DDR_B_DQS0
DDR_A_D48 SA_DQ[47] SA_DQS[1] DDR_A_DQS2 DDR_B_D49 SB_DQ[48] SB_DQS[0] DDR_B_DQS1
AN8 SA_DQ[48] SA_DQS[2] H9 AN5 SB_DQ[49] SB_DQS[1] E3
DDR_A_D49 AM10 M9 DDR_A_DQS3 DDR_B_D50 AT4 H4 DDR_B_DQS2
DDR_A_D50 SA_DQ[49] SA_DQS[3] DDR_A_DQS4 DDR_B_D51 SB_DQ[50] SB_DQS[2] DDR_B_DQS3
AR11 SA_DQ[50] SA_DQS[4] AH8 AN6 SB_DQ[51] SB_DQS[3] M5
DDR_A_D51 AL11 AK10 DDR_A_DQS5 DDR_B_D52 AN4 AG2 DDR_B_DQS4
DDR_A_D52 SA_DQ[51] SA_DQS[5] DDR_A_DQS6 DDR_B_D53 SB_DQ[52] SB_DQS[4] DDR_B_DQS5
AM9 SA_DQ[52] SA_DQS[6] AN11 AN3 SB_DQ[53] SB_DQS[5] AL5
DDR_A_D53 AN9 AR13 DDR_A_DQS7 DDR_B_D54 AT5 AP5 DDR_B_DQS6
DDR_A_D54 SA_DQ[53] SA_DQS[7] DDR_B_D55 SB_DQ[54] SB_DQS[6] DDR_B_DQS7
AT11 SA_DQ[54] AT6 SB_DQ[55] SB_DQS[7] AR7
DDR_A_D55 AP12 DDR_B_D56 AN7
DDR_A_D56 SA_DQ[55] DDR_B_D57 SB_DQ[56]
AM12 SA_DQ[56] DDR_A_MA[0..15] <13> AP6 SB_DQ[57]
DDR_A_D57 AN12 DDR_B_D58 AP8
DDR_A_D58 SA_DQ[57] DDR_A_MA0 DDR_B_D59 SB_DQ[58]
AM13 SA_DQ[58] SA_MA[0] Y3 AT9 SB_DQ[59]
DDR_A_D59 AT14 W1 DDR_A_MA1 DDR_B_D60 AT7
DDR_A_D60 SA_DQ[59] SA_MA[1] DDR_A_MA2 DDR_B_D61 SB_DQ[60]
AT12 SA_DQ[60] SA_MA[2] AA8 AP9 SB_DQ[61] DDR_B_MA[0..15] <14>
DDR_A_D61 AL13 AA3 DDR_A_MA3 DDR_B_D62 AR10
B DDR_A_D62 SA_DQ[61] SA_MA[3] DDR_A_MA4 DDR_B_D63 SB_DQ[62] DDR_B_MA0 B
AR14 SA_DQ[62] SA_MA[4] V1 AT10 SB_DQ[63] SB_MA[0] U5
DDR_A_D63 AP14 AA9 DDR_A_MA5 V2 DDR_B_MA1
SA_DQ[63] SA_MA[5] DDR_A_MA6 SB_MA[1] DDR_B_MA2
SA_MA[6] V8 SB_MA[2] T5
T1 DDR_A_MA7 V3 DDR_B_MA3
SA_MA[7] DDR_A_MA8 SB_MA[3] DDR_B_MA4
SA_MA[8] Y9 SB_MA[4] R1
DDR_A_BS0 AC3 U6 DDR_A_MA9 DDR_B_BS0 AB1 T8 DDR_B_MA5
<13> DDR_A_BS0 SA_BS[0] SA_MA[9] <14> DDR_B_BS0 SB_BS[0] SB_MA[5]
DDR_A_BS1 AB2 AD4 DDR_A_MA10 DDR_B_BS1 W5 R2 DDR_B_MA6
<13> DDR_A_BS1 SA_BS[1] SA_MA[10] <14> DDR_B_BS1 SB_BS[1] SB_MA[6]
DDR_A_BS2 U7 T2 DDR_A_MA11 DDR_B_BS2 R7 R6 DDR_B_MA7
<13> DDR_A_BS2 SA_BS[2] SA_MA[11] <14> DDR_B_BS2 SB_BS[2] SB_MA[7]
U3 DDR_A_MA12 R4 DDR_B_MA8
SA_MA[12] DDR_A_MA13 SB_MA[8] DDR_B_MA9
SA_MA[13] AG8 SB_MA[9] R5
T3 DDR_A_MA14 DDR_B_CAS# AC5 AB5 DDR_B_MA10
SA_MA[14] <14> DDR_B_CAS# SB_CAS# SB_MA[10]
DDR_A_CAS# AE1 V9 DDR_A_MA15 DDR_B_RAS# Y7 P3 DDR_B_MA11
<13> DDR_A_CAS# SA_CAS# SA_MA[15] <14> DDR_B_RAS# SB_RAS# SB_MA[11]
DDR_A_RAS# AB3 DDR_B_WE# AC6 R3 DDR_B_MA12
<13> DDR_A_RAS# DDR_A_WE# SA_RAS# <14> DDR_B_WE# SB_WE# SB_MA[12] DDR_B_MA13
<13> DDR_A_WE# AE9 SA_WE# SB_MA[13] AF7
P5 DDR_B_MA14
SB_MA[14] DDR_B_MA15
SB_MA[15] N1

REV1.0
TYCO_CALPELLA_AUBURNDALE

REV1.0
TYCO_CALPELLA_AUBURNDALE

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Arrandale (3/6)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 9 of 57
 5 4 3 2 1

WWW.AliSaler.Com
JCPUE

AJ13 @ T186
@T186 PAD~D
RSVD32 @T187
@ T187 PAD~D
AJ12
RSVD33
Populate R84,R85 for Intel DDR3 AP25 RSVD1
AL25 AH25
VREFDQ multiple methods M3 AL24
RSVD2 RSVD34
AK26 @T188
@ T188 PAD~D
RSVD3 RSVD35
AL22 RSVD4
AJ33 AL26 @T189
@ T189 PAD~D
RSVD5 RSVD36
AG9 RSVD6 RSVD_NCTF_37 AR2
M27 CFG0
D RSVD7 D
L28 RSVD8 RSVD38 AJ26

1
@T184PAD~D
@ T184PAD~D DIMM0_VREF_R J17 AJ27
@ T185PAD~D
@T185PAD~D DIMM1_VREF_R SA_DIMM_VREF RSVD39 @R1107
@ R1107
H17 SB_DIMM_VREF
G25 3.01K_0402_1%~D
RSVD11
G17 RSVD12
E31 AP1

2
RSVD13 RSVD_NCTF_40 @T190
@ T190 PAD~D
E30 RSVD14 RSVD_NCTF_41 AT2

RSVD_NCTF_42 AT3
RSVD_NCTF_43 AR1

RSVD45 AL28
CFG0 AM30 AL29 PCI-Express Configuration Select
<8> CFG0 CFG[0] RSVD46
CFG1 AM28 AP30
<8> CFG1 CFG[1] RSVD47
CFG2 AP31 AP32
<8> CFG2 CFG[2] RSVD48
CFG3 AL32 AL27 1 : Single PEG
<8> CFG3 CFG[3] RSVD49
CFG4 AL30 AT31 CFG0
<8> CFG4 CFG[4] RSVD50
CFG5 AM31 AT32 0 : Bifurcation enable
<8> CFG5 CFG[5] RSVD51
CFG6 AN29 AP33
<8> CFG6 CFG[6] RSVD52
CFG7 AM32 AR33
<8> CFG7 CFG[7] RSVD53
CFG8 AK32 AT33
<8> CFG8 CFG[8] RSVD_NCTF_54
CFG9 AK31 AT34

RESERVED
<8> CFG9 CFG[9] RSVD_NCTF_55
CFG10 AK28 AP35
<8> CFG10 CFG[10] RSVD_NCTF_56
CFG11 AJ28 AR35
<8> CFG11 CFG[11] RSVD_NCTF_57
@T18
@ T18 PAD~D CFG12 AN30 AR32
@T19
@ T19 PAD~D CFG13 CFG[12] RSVD58
AN32 CFG[13]
@T20
@ T20 PAD~D CFG14 AJ32
@T21
@ T21 PAD~D CFG15 CFG[14] CFG3
AJ29 CFG[15] RSVD_TP_59 E15
@T22
@ T22 PAD~D CFG16 AJ30 F15
CFG[16] RSVD_TP_60

1
@T23
@ T23 PAD~D CFG17 AK30 A2
C @T24
@ T24 PAD~D CFG18 CFG[17] KEY @ R1108 C
H16 RSVD_TP_86 RSVD62 D15
C15 3.01K_0402_1%~D
RSVD63
RSVD64 AJ15
AH15

2
RSVD65
B19 RSVD15
A19 RSVD16
H_RSVD17 A20
H_RSVD18 RSVD17
B20 RSVD18
RSVD_TP_66 AA5 PCI-Express Static Lane Reversal
0_0402_5%~D

0_0402_5%~D

U9 RSVD19 RSVD_TP_67 AA4

1

T9 RSVD20 RSVD_TP_68 R8
@ R830

@ R831

RSVD_TP_69 AD3 1 : Normal Operation

AC9 RSVD21 RSVD_TP_70 AD2 CFG3
AB9 RSVD22 RSVD_TP_71 AA2 0 : Lane Number Reversed
AA1
2

RSVD_TP_72
RSVD_TP_73 R9 15->0, 14->1 ...
RSVD_TP_74 AG7
C1 RSVD_NCTF_23 RSVD_TP_75 AE3
A3 RSVD_NCTF_24

RSVD_TP_76 V4
RSVD_TP_77 V5
RSVD_TP_78 N2
J29 RSVD26 RSVD_TP_79 AD5
J28 RSVD27 RSVD_TP_80 AD7
RSVD_TP_81 W3
A34 W2 CFG4
RSVD_NCTF_28 RSVD_TP_82
A33 RSVD_NCTF_29 RSVD_TP_83 N3

1
RSVD_TP_84 AE5
C35 AD9 R1109
B RSVD_NCTF_30 RSVD_TP_85 3.3K_0402_1%~D B
B35 RSVD_NCTF_31
AP34

2
VSS

REV1.0
TYCO_CALPELLA_AUBURNDALE

Display Port Presence

1 : Disabled; No Physical Display Port

CFG4 attached to Embedded Display Port

0 : Enabled; An external Display Port device is

connected to the Embedded Display Port

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Arrandale (4/6)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 10 of 57
 5 4 3 2 1

WWW.AliSaler.Com JCPUF

+VCC_CORE
+VCC_CORE
+1.05V_RUN_VTT
18A
1 1 1 1 1 48AAG35 AH14
C24 C25 C26 C27 C28 VCC1 VTT0_1
AG34 VCC2 VTT0_2 AH12 1 1 1 1 1
22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D AG33 AH11
2 2 2 2 2 VCC3 VTT0_3 C1196 C1204 C1197 C1198 C1199
AG32 VCC4 VTT0_4 AH10
AG31 J14 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D
VCC5 VTT0_5 2 2 2 2 2
AG30 VCC6 VTT0_6 J13
AG29 VCC7 VTT0_7 H14
D D
AG28 VCC8 VTT0_8 H12
1 1 1 1 1 AG27 VCC9 VTT0_9 G14
AG26 VCC10 VTT0_10 G13 1
C29 C30 C31 C34 C35 AF35 G12
22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D VCC11 VTT0_11 C1200
AF34 VCC12 VTT0_12 G11
2 2 2 2 2 AF33 F14 10U_0805_4VAM~D
VCC13 VTT0_13 2
AF32 VCC14 VTT0_14 F13
AF31 VCC15 VTT0_15 F12
AF30 VCC16 VTT0_16 F11
AF29 VCC17 VTT0_17 E14
1 1 AF28 VCC18 VTT0_18 E12
AF27 VCC19 VTT0_19 D14

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D
C36 C37 AF26 D13
22U_0805_6.3VAM~D VCC20 VTT0_20

1.1V RAIL POWER

22U_0805_6.3VAM~D AD35 D12 1 1 1
2 2 VCC21 VTT0_21
AD34 VCC22 VTT0_22 D11

C1087

C1085

C1103
AD33 VCC23 VTT0_23 C14
AD32 VCC24 VTT0_24 C13
AD31 C12 2 2 2
VCC25 VTT0_25
AD30 VCC26 VTT0_26 C11
AD29 VCC27 VTT0_27 B14
AD28 VCC28 VTT0_28 B12
AD27 VCC29 VTT0_29 A14
AD26 VCC30 VTT0_30 A13
AC35 VCC31 VTT0_31 A12
AC34 VCC32 VTT0_32 A11
AC33 VCC33
AC32 +1.05V_RUN_VTT
VCC34
AC31 VCC35
AC30 VCC36 VTT0_33 AF10
AC29 VCC37 VTT0_34 AE10
+VCC_CORE

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D
AC28 VCC38 VTT0_35 AC10 1 1

CPU CORE SUPPLY

C1082

C1083
AC27 VCC39 VTT0_36 AB10
C C
AC26 VCC40 VTT0_37 Y10
AA35 VCC41 VTT0_38 W10
AA34 U10 2 2
1 1 1 1 1 1 VCC42 VTT0_39
AA33 VCC43 VTT0_40 T10
C44 C45 C46 C47 C48 C59 AA32 J12
10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D VCC44 VTT0_41
AA31 VCC45 VTT0_42 J11
2 2 2 2 2 2
AA30 VCC46 VTT0_43 J16
AA29 VCC47 VTT0_44 J15
AA28 VCC48
AA27 VCC49
AA26 VCC50
Y35 VCC51
Y34 VCC52
1 1 1 1 1 1 Y33 VCC53
Y32 VCC54
C50 C51 C52 @ C53 @ C54 C49 Y31
10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D VCC55
Y30 VCC56
2 2 2 2 2 2 Y29 VCC57
Y28 VCC58
Y27 VCC59
Y26 VCC60
V35 AN33 H_PSI# H_PSI# <49>
VCC61 PSI#
V34 VCC62

POWER
1 1 1 1 V33 VCC63
V32 AK35 VID0
VCC64 VID[0] VID0 <49>
C56 C57 C55 C58 V31 AK33 VID1
10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D VCC65 VID[1] VID2 VID1 <49>
10U_0805_4VAM~D V30 AK34
2 2 2 2 VCC66 VID[2] VID2 <49>
V29 AL35 VID3
VCC67 VID[3] VID3 <49>

CPU VIDS
V28 AL33 VID4
VCC68 VID[4] VID5 VID4 <49>
V27 VCC69 VID[5] AM33 VID5 <49>
V26 AM35 VID6
VCC70 VID[6] VID6 <49>
U35 AM34 H_DPRSLPVR_R 1 2 H_DPRSLPVR <49>
B VCC71 PROC_DPRSLPVR R1115 0_0402_5%~D B
U34 VCC72
U33 VCC73
U32 VCC74
VTT_SELECT = low, 1.1V
U31 VCC75 VTT_SELECT G15
U30 VCC76
VTT_SELECT = high, 1.05V
U29 VCC77
U28 VCC78
U27 VCC79
U26 +VCC_CORE
VCC80
R35 VCC81
R34 VCC82

1
R33 VCC83
R32 AN35 IMVP_IMON R1116
VCC84 ISENSE IMVP_IMON <23,49>
R31 VCC85 100_0402_1%~D
R30 VCC86
R29 Place R1116 and R1236 near CPU

2
VCC87 VCCSENSE
SENSE LINES

R28 VCC88 VCC_SENSE AJ34 VCCSENSE <49>

R27 AJ35 VSSSENSE Route VCCSENSE and VSSSENSE trace at
VCC89 VSS_SENSE VSSSENSE <49>
R26 VCC90
P35 27.4 ohms, 7 mils spacing
VCC91

1
+VCC_CORE P34 B15 VTT_SENSE
VCC92 VTT_SENSE VTT_SENSE <48>
P33 A15 R1236
VCC93 VSS_SENSE_VTT
P32 VCC94 100_0402_1%~D
P31 VCC95
1 1 1 1 1 P30

2
VCC96
P29 VCC97
+ @C60 + C61 + C62 + C63 + C64 P28
270U_D_2VM_R4.5M~D 270U_D_2VM_R4.5M~D 270U_D_2VM_R4.5M~D 270U_D_2VM_R4.5M~D 270U_D_2VM_R4.5M~D VCC98
P27 VCC99
P26 VCC100
2 3 2 3 2 3 2 3 2 3

A A

REV1.0 DELL CONFIDENTIAL/PROPRIETARY

TYCO_CALPELLA_AUBURNDALE

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Arrandale (5/6)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 11 of 57
 5 4 3 2 1

WWW.AliSaler.Com
+VCC_GFXCORE JCPUG
22A AT21
VAXG1 VCC_AXG_SENSE
AT19 AR22 VCC_AXG_SENSE <52>
VAXG2 VAXG_SENSE

@
VSS_AXG_SENSE

SENSE
LINES
AT18 VAXG3 VSSAXG_SENSE AT22 VSS_AXG_SENSE <52>

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

10U_0805_4VAM~D

10U_0805_4VAM~D
1 1 1 1 1 1 1 1 AT16 VAXG4

C1088

C1089

C1090

C1091

C1092

C1093

C1094

C1095
AR21 VAXG5
AR19 JCPUH
VAXG6
AR18 VAXG7
2 2 2 2 2 2 2 2 AR16 AM22 GFX_VID0 AT20 AE34
VAXG8 GFX_VID[0] GFX_VID0 <52> VSS1 VSS81
AP21 AP22 GFX_VID1 GFX_VID1 <52> AT17 AE33
VAXG9 GFX_VID[1] VSS2 VSS82

GRAPHICS VIDs
D GFX_VID2 D
AP19 VAXG10 GFX_VID[2] AN22 GFX_VID2 <52> AR31 VSS3 VSS83 AE32
AP18 AP23 GFX_VID3 GFX_VID3 <52> AR28 AE31
VAXG11 GFX_VID[3] GFX_VID4 VSS4 VSS84
AP16 VAXG12 GFX_VID[4] AM23 GFX_VID4 <52> AR26 VSS5 VSS85 AE30
AN21 AP24 GFX_VID5 GFX_VID5 <52> AR24 AE29
VAXG13 GFX_VID[5] VSS6 VSS86

GRAPHICS
AN19 AN24 GFX_VID6 GFX_VID6 <52> AR23 AE28
VAXG14 GFX_VID[6] VSS7 VSS87
AN18 VAXG15 AR20 VSS8 VSS88 AE27
AN16 VAXG16 AR17 VSS9 VSS89 AE26
AM21 AR25 GFX_VR_ON_R R1120 1 2 0_0402_5%~D GFX_VR_ON <52> AR15 AE6
VAXG17 GFX_VR_EN GFX_DPRSLPVR_R 1 VSS10 VSS90
AM19 AT25 2 GFX_DPRSLPVR <52> AR12 AD10
VAXG18 GFX_DPRSLPVR GFX_IMON R1119 0_0402_5%~D VSS11 VSS91
AM18 VAXG19 GFX_IMON AM24 AR9 VSS12 VSS92 AC8
AM16 VAXG20 GFX_IMON <52> AR6 VSS13 VSS93 AC4
AL21 VAXG21 AR3 VSS14 VSS94 AC2
AL19 VAXG22 AP20 VSS15 VSS95 AB35
AL18 VAXG23 AP17 VSS16 VSS96 AB34
AL16 AP13 AB33
AK21
VAXG24
AJ1
3A +1.5V_CPU_VDDQ AP10
VSS17 VSS97
AB32
VAXG25 VDDQ1 VSS18 VSS98
AK19 VAXG26 VDDQ2 AF1 AP7 VSS19 VSS99 AB31

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D
- 1.5V RAILS
AK18 VAXG27 VDDQ3 AE7 AP4 VSS20 VSS100 AB30
AK16 VAXG28 VDDQ4 AE4 1 1 1 1 1 1 AP2 VSS21 VSS101 AB29
AJ21 VAXG29 VDDQ5 AC1 AN34 VSS22 VSS102 AB28

C1096

C1097

C1098

C1099

C1100
AJ19 AB7 + C1165 AN31 AB27
VAXG30 VDDQ6 330U_D2_2VM_R6M~D VSS23 VSS103
AJ18 VAXG31 VDDQ7 AB4 AN23 VSS24 VSS104 AB26
2 2 2 2 2
AJ16 VAXG32 VDDQ8 Y1 AN20 VSS25 VSS105 AB6
AH21 W7 2 AN17 AA10
VAXG33 VDDQ9 VSS26 VSS106
AH19 W4 AM29 Y8

POWER
VAXG34 VDDQ10 VSS27 VSS107
AH18 VAXG35 VDDQ11 U1 AM27 VSS28 VSS108 Y4
AH16 VAXG36 VDDQ12 T7 AM25 VSS29 VSS109 Y2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D
VDDQ13 T4 AM20 VSS30 VSS110 W35

C1101

C1102
VDDQ14 P1 1 1 AM17 VSS31 VSS111 W34
VDDQ15 N7 AM14 VSS32 VSS112 W33
+1.05V_RUN_VTT N4 AM11 W32
VDDQ16 VSS33 VSS113

DDR3
VDDQ17 L1 AM8 VSS34 VSS114 W31
C 2 2 C
J24 VTT1_45 VDDQ18 H1 AM5 VSS35 VSS115 W30

FDI
J23 VTT1_46 AM2 VSS36 VSS116 W29
H25 AL34 W28
VTT1_47
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
VTT0_59 P10 +1.05V_RUN_VTT AL20 VSS40 VSS120 W6

10U_0805_4VAM~D

10U_0805_4VAM~D
VTT0_60 N10 AL17 VSS41 VSS121 V10
VTT0_61 L10 1 1 AL12 VSS42 VSS122 U8

C1107

C1108
VTT0_62 K10 AL9 VSS43 VSS123 U4
AL6 VSS44 VSS124 U2
AL3 VSS45 VSS125 T35
2 2
AK29 VSS46 VSS126 T34
AK27 VSS47 VSS127 T33

1.1V
VTT1_63 J22 AK25 VSS48 VSS128 T32
+1.05V_RUN_VTT K26 VTT1_48 VTT1_64 J20 AK20 VSS49 VSS129 T31
J27 VTT1_49 VTT1_65 J18 +1.05V_RUN_VTT AK17 VSS50 VSS130 T30
PEG & DMI

J26 VTT1_50 VTT1_66 H21 AJ31 VSS51 VSS131 T29

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D
J25 VTT1_51 VTT1_67 H20 AJ23 VSS52 VSS132 T28

C1111

C1112
H27 VTT1_52 VTT1_68 H19 1 1 AJ20 VSS53 VSS133 T27
G28 VTT1_53 AJ17 VSS54 VSS134 T26
G27 VTT1_54 AJ14 VSS55 VSS135 T6
G26 VTT1_55 AJ11 VSS56 VSS136 R10
F26 2 2 AJ8 P8
E26
VTT1_56
L26
600mA AJ5
VSS57 VSS137
P4
VTT1_57 VCCPLL1 VSS58 VSS138
1.8V
E25 VTT1_58 VCCPLL2 L27 AJ2 VSS59 VSS139 P2
VCCPLL3 M26 +1.8V_RUN AH35 VSS60 VSS140 N35
AH34 VSS61 VSS141 N34

22U_0805_6.3V6M~D
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2.2U_0603_6.3V6K~D

4.7U_0603_6.3V6M~D
1 1 1 1 1 AH33 VSS62 VSS142 N33

C1117
AH32 VSS63 VSS143 N32

C1115

C1116

C67

C65
AH31 VSS64 VSS144 N31
AH30 VSS65 VSS145 N30
2 2 2 2 2
AH29 N29
B REV1.0 AH28
VSS66
VSS67
VSS146
VSS147 N28 B
TYCO_CALPELLA_AUBURNDALE AH27 N27
VSS68 VSS148
AH26 VSS69 VSS149 N26
AH20 VSS70 VSS150 N6
AH17 VSS71 VSS151 M10
+1.5V_CPU_VDDQ Source AH13
AH9
VSS72 VSS152 L35
L32
VSS73 VSS153
AH6 VSS74 VSS154 L29
+1.5V_MEM Q200 +1.5V_CPU_VDDQ C1881 2 1 0.1U_0402_10V7K~D AH3 L8
+3.3V_ALW2 +15V_ALW AO4728L 1N_SOIC-8~D VSS75 VSS155
AG10 VSS76 VSS156 L5
8 1 AF8 L2
VSS77 VSS157
10U_0805_10V4Z~D

7 2 C1882 2 1 0.1U_0402_10V7K~D AF4 K34

VSS78 VSS158
1

6 3 1 AF2 VSS79 VSS159 K33

C1875

5 @ R1498 AE35 K30

VSS80 VSS160
1

R1497 20K_0402_5%~D C1883 2 1 0.1U_0402_10V7K~D

R1499 100K_0402_5%~D
4

100K_0402_5%~D 2
REV1.0
2

C1884 2 1 0.1U_0402_10V7K~D
RUN_ON_CPU1.5VS3 TYCO_CALPELLA_AUBURNDALE
2

@ PJP906
Q201B 1 1 2
RUN_ON_CPU1.5VS3# 5 DMN66D0LDW-7_SOT363-6~D
C1878 PAD-OPEN 4x4m
4700P_0402_25V7K~D +1.5V_CPU_VDDQ +1.5V_MEM
4

2 @ PJP907
6

1 2

Q201A PAD-OPEN 4x4m

1 2 2 DMN66D0LDW-7_SOT363-6~D
<34,39,42,47> RUN_ON
@R1500
@ R1500 0_0402_5%~D
1

A RUN_ON_CPU1.5VS3# <42> A
<40> CPU1.5V_S3_GATE 1 2
R1501 0_0402_5%~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
GFX_VR_ON 1
R358
2
470_0402_5%~D BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Arrarndale (6/6)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 12 of 57
 5 4 3 2 1

WWW.AliSaler.Com +V_DDR_REF 1 2 +1.5V_MEM +1.5V_MEM

R87 0_0402_5%~D JDIMMA
DIMM0_VREF 1 2
<9> DDR_A_DQS#[0..7] VREF_DQ VSS
3 4 DDR_A_D4
VSS DQ4

2.2U_0603_6.3V6K~D

0.1U_0402_16V4Z~D
DDR_A_D0 5 6 DDR_A_D5
<9> DDR_A_D[0..63] DQ0 DQ5
DDR_A_D1 7 8
DQ1 VSS DDR_A_DQS#0
<9> DDR_A_DM[0..7] 1 1 9 VSS DQS0# 10
DDR_A_DM0 11 12 DDR_A_DQS0 +1.5V_MEM
DM0 DQS0

C1119

C1120
<9> DDR_A_DQS[0..7] Populate R87 for Intel DDR3 13 VSS VSS 14
DDR_A_D2 15 16 DDR_A_D6 DDR3_DRAMRST# 2 1
VREFDQ multiple methods M1 2 2 DDR_A_D3 17
DQ2 DQ6
18 DDR_A_D7 R1509 1K_0402_5%~D
<9> DDR_A_MA[0..15] DQ3 DQ7
19 VSS VSS 20
DDR_A_D8 21 22 DDR_A_D12
D DDR_A_D9 DQ8 DQ12 DDR_A_D13 D
23 DQ9 DQ13 24
25 VSS VSS 26
DDR_A_DQS#1 27 28 DDR_A_DM1
DDR_A_DQS1 DQS1# DM1 DDR3_DRAMRST#
29 DQS1 RESET# 30 DDR3_DRAMRST# <8,14>
Layout Note: Note: 31 VSS VSS 32
DDR_A_D10 33 34 DDR_A_D14
Place near JDIMMA Check voltage tolerance of DDR_A_D11 35
DQ10 DQ14
36 DDR_A_D15
DQ11 DQ15
VREF_DQ at the DIMM socket 37 VSS VSS 38
DDR_A_D16 39 40 DDR_A_D20
DDR_A_D17 DQ16 DQ20 DDR_A_D21
41 DQ17 DQ21 42
43 VSS VSS 44
DDR_A_DQS#2 45 46 DDR_A_DM2
+1.5V_MEM DDR_A_DQS2 DQS2# DM2
47 DQS2 VSS 48
49 50 DDR_A_D22
DDR_A_D18 VSS DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54
DQ19 VSS
0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D DDR_A_D28
55 VSS DQ28 56
1 1 1 1 DDR_A_D24 57 58 DDR_A_D29
DQ24 DQ29
C1121

C1122

C1123

C1124
DDR_A_D25 59 60
DQ25 VSS DDR_A_DQS#3
61 VSS DQS3# 62
DDR_A_DM3 63 64 DDR_A_DQS3
2 2 2 2 DM3 DQS3
65 VSS VSS 66
DDR_A_D26 67 68 DDR_A_D30
DDR_A_D27 DQ26 DQ30 DDR_A_D31
69 DQ27 DQ31 70
71 VSS VSS 72

DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA
<9> DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA <9>
75 VDD VDD 76
77 78 DDR_A_MA15
+1.5V_MEM DDR_A_BS2 NC A15 DDR_A_MA14
<9> DDR_A_BS2 79 BA2 A14 80
81 VDD VDD 82
C DDR_A_MA12 DDR_A_MA11 C
83 A12/BC# A11 84
DDR_A_MA9 85 86 DDR_A_MA7
A9 A7
10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

87 VDD VDD 88
DDR_A_MA8 89 90 DDR_A_MA6
A8 A6
330U_SX_2VY~D

1 DDR_A_MA5 91 92 DDR_A_MA4
A5 A4
1 1 1 1 1 1 93 VDD VDD 94
C1126

C1127

C1128

C1129

C1130

C1131

C1125

+ DDR_A_MA3 95 96 DDR_A_MA2
DDR_A_MA1 A3 A2 DDR_A_MA0
97 A1 A0 98
99 VDD VDD 100
2 2 2 2 2 2 2 M_CLK_DDR0 M_CLK_DDR1
<9> M_CLK_DDR0 101 CK0 CK1 102 M_CLK_DDR1 <9>
M_CLK_DDR#0 103 104 M_CLK_DDR#1
<9> M_CLK_DDR#0 CK0# CK1# M_CLK_DDR#1 <9>
105 VDD VDD 106
DDR_A_MA10 107 108 DDR_A_BS1
A10/AP BA1 DDR_A_BS1 <9>
DDR_A_BS0 109 110 DDR_A_RAS#
<9> DDR_A_BS0 BA0 RAS# DDR_A_RAS# <9>
111 VDD VDD 112
DDR_A_WE# 113 114 DDR_CS0_DIMMA#
<9> DDR_A_WE# WE# S0# DDR_CS0_DIMMA# <9>
DDR_A_CAS# 115 116 M_ODT0
<9> DDR_A_CAS# CAS# ODT0 M_ODT0 <9>
117 VDD VDD 118
DDR_A_MA13 119 120 M_ODT1
A13 ODT1 M_ODT1 <9>
Layout Note: DDR_CS1_DIMMA# 121 122
<9> DDR_CS1_DIMMA# S1# NC
123 124
Place near JDIMMA.203,204 125
VDD VDD
126
TEST VREF_CA +V_DDR_REF
127 VSS VSS 128

2.2U_0603_6.3V6K~D

0.1U_0402_16V4Z~D
DDR_A_D32 129 130 DDR_A_D36
DDR_A_D33 DQ32 DQ36 DDR_A_D37
131 DQ33 DQ37 132
133 VSS VSS 134 1 1
DDR_A_DQS#4 135 136 DDR_A_DM4
DQS4# DM4

C1132

C1133
DDR_A_DQS4 137 138
DQS4 VSS DDR_A_D38
139 VSS DQ38 140
+0.75V_DDR_VTT DDR_A_D34 141 142 DDR_A_D39 2 2
DDR_A_D35 DQ34 DQ39
143 DQ35 VSS 144
145 146 DDR_A_D44
B DDR_A_D40 VSS DQ44 DDR_A_D45 B
147 DQ40 DQ45 148
DDR_A_D41 149 150
DQ41 VSS
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

151 152 DDR_A_DQS#5

DDR_A_DM5 VSS DQS5# DDR_A_DQS5
1 1 1 1 1 153 DM5 DQS5 154
155 VSS VSS 156
C1134

C1135

C1136

C1137

C1138

DDR_A_D42 157 158 DDR_A_D46

DDR_A_D43 DQ42 DQ46 DDR_A_D47
159 DQ43 DQ47 160
2 2 2 2 2
161 VSS VSS 162
DDR_A_D48 163 164 DDR_A_D52
DDR_A_D49 DQ48 DQ52 DDR_A_D53
165 DQ49 DQ53 166
167 VSS VSS 168
DDR_A_DQS#6 169 170 DDR_A_DM6
DDR_A_DQS6 DQS6# DM6
171 DQS6 VSS 172
173 174 DDR_A_D54
DDR_A_D50 VSS DQ54 DDR_A_D55
175 DQ50 DQ55 176
DDR_A_D51 177 178
DQ51 VSS DDR_A_D60
179 VSS DQ60 180
DDR_A_D56 181 182 DDR_A_D61
DDR_A_D57 DQ56 DQ61
183 DQ57 VSS 184
185 186 DDR_A_DQS#7
DDR_A_DM7 VSS DQS7# DDR_A_DQS7
187 DM7 DQS7 188
189 VSS VSS 190
DDR_A_D58 191 192 DDR_A_D62
DDR_A_D59 DQ58 DQ62 DDR_A_D63
193 DQ59 DQ63 194
195 VSS VSS 196
1 2 197 198
R1182 10K_0402_5%~D199 SA0 EVENT# MEM_SMBDATA
+3.3V_RUN VDDSPD SDA 200 MEM_SMBDATA <8,14,15,16,28>
0.1U_0402_16V4Z~D

2.2U_0603_6.3V6K~D

1 2 201 202 MEM_SMBCLK

SA1 SCL MEM_SMBCLK <8,14,15,16,28>
1 1 R1183 10K_0402_5%~D203 204 +0.75V_DDR_VTT
VTT VTT
C1141

C1142

+0.75V_DDR_VTT
205 GND1 GND2 206
A 2 2 A
FOX_AS0A626-U4SN-7F

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DDRIII-SODIMM SLOT1
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 13 of 57
 5 4 3 2 1

WWW.AliSaler.Com +V_DDR_REF 1 2 +1.5V_MEM +1.5V_MEM

R88 0_0402_5%~D JDIMMB
DIMM1_VREF 1 2
VREF_DQ VSS DDR_B_D4
3 4
VSS DQ4

2.2U_0603_6.3V6K~D

0.1U_0402_16V4Z~D
DDR_B_D0 5 6 DDR_B_D5
DDR_B_D1 DQ0 DQ5
7 8
DQ1 VSS DDR_B_DQS#0
<9> DDR_B_DQS#[0..7] 1 1 9 VSS DQS0# 10
DDR_B_DM0 11 12 DDR_B_DQS0
DM0 DQS0

C1143

C1144
<9> DDR_B_D[0..63] Populate R88 for Intel DDR3 13 VSS VSS 14
DDR_B_D2 15 16 DDR_B_D6
VREFDQ multiple methods M1 2 2 DDR_B_D3 17
DQ2 DQ6
18 DDR_B_D7
<9> DDR_B_DM[0..7] DQ3 DQ7
19 VSS VSS 20
DDR_B_D8 21 22 DDR_B_D12
D <9> DDR_B_DQS[0..7] DQ8 DQ12 D
DDR_B_D9 23 24 DDR_B_D13
DQ9 DQ13
<9> DDR_B_MA[0..15] 25 VSS VSS 26
DDR_B_DQS#1 27 28 DDR_B_DM1
DDR_B_DQS1 DQS1# DM1 DDR3_DRAMRST#
29 DQS1 RESET# 30 DDR3_DRAMRST# <8,13>
31 VSS VSS 32
DDR_B_D10 33 34 DDR_B_D14
DDR_B_D11 DQ10 DQ14 DDR_B_D15
Note: 35 DQ11 DQ15 36
37 38
Check voltage tolerance of DDR_B_D16 39
VSS VSS
40 DDR_B_D20
DDR_B_D17 DQ16 DQ20 DDR_B_D21
VREF_DQ at the DIMM socket 41 DQ17 DQ21 42
43 VSS VSS 44
DDR_B_DQS#2 45 46 DDR_B_DM2
DDR_B_DQS2 DQS2# DM2
47 DQS2 VSS 48
49 50 DDR_B_D22
DDR_B_D18 VSS DQ22 DDR_B_D23
51 DQ18 DQ23 52
DDR_B_D19 53 54
DQ19 VSS DDR_B_D28
Layout Note: 55 VSS DQ28 56
DDR_B_D24 57 58 DDR_B_D29
Place near JDIMMB DDR_B_D25 59
DQ24 DQ29
60
DQ25 VSS DDR_B_DQS#3
61 VSS DQS3# 62
DDR_B_DM3 63 64 DDR_B_DQS3
DM3 DQS3
65 VSS VSS 66
DDR_B_D26 67 68 DDR_B_D30
DDR_B_D27 DQ26 DQ30 DDR_B_D31
69 DQ27 DQ31 70
71 VSS VSS 72
+1.5V_MEM
DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB
<9> DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB <9>
75 VDD VDD 76
77 78 DDR_B_MA15
NC A15
0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

DDR_B_BS2 79 80 DDR_B_MA14
<9> DDR_B_BS2 BA2 A14
1 1 1 1 81 VDD VDD 82
C1145

C1146

C1147

C1148

C DDR_B_MA12 DDR_B_MA11 C
83 A12/BC# A11 84
DDR_B_MA9 85 86 DDR_B_MA7
A9 A7
87 VDD VDD 88
2 2 2 2 DDR_B_MA8 DDR_B_MA6
89 A8 A6 90
DDR_B_MA5 91 92 DDR_B_MA4
A5 A4
93 VDD VDD 94
DDR_B_MA3 95 96 DDR_B_MA2
DDR_B_MA1 A3 A2 DDR_B_MA0
97 A1 A0 98
99 VDD VDD 100
M_CLK_DDR2 101 102 M_CLK_DDR3
<9> M_CLK_DDR2 CK0 CK1 M_CLK_DDR3 <9>
M_CLK_DDR#2 103 104 M_CLK_DDR#3
+1.5V_MEM <9> M_CLK_DDR#2 CK0# CK1# M_CLK_DDR#3 <9>
105 VDD VDD 106
DDR_B_MA10 107 108 DDR_B_BS1
A10/AP BA1 DDR_B_BS1 <9>
DDR_B_BS0 109 110 DDR_B_RAS#
<9> DDR_B_BS0 BA0 RAS# DDR_B_RAS# <9>
111 VDD VDD 112
10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

DDR_B_WE# 113 114 DDR_CS2_DIMMB#

<9> DDR_B_WE# WE# S0# DDR_CS2_DIMMB# <9>
DDR_B_CAS# 115 116 M_ODT2
<9> DDR_B_CAS# CAS# ODT0 M_ODT2 <9>
330U_SX_2VY~D

1 117 VDD VDD 118

1 1 1 1 1 1 DDR_B_MA13 119 120 M_ODT3
A13 ODT1 M_ODT3 <9>
C1150

C1151

C1152

C1153

C1154

C1155

C1149

+ DDR_CS3_DIMMB# 121 122

<9> DDR_CS3_DIMMB# S1# NC
123 VDD VDD 124
125 TEST VREF_CA 126 +V_DDR_REF
2 2 2 2 2 2 2 127 128
VSS VSS

2.2U_0603_6.3V6K~D

0.1U_0402_16V4Z~D
DDR_B_D32 129 130 DDR_B_D36
DDR_B_D33 DQ32 DQ36 DDR_B_D37
131 DQ33 DQ37 132
133 VSS VSS 134 1 1
DDR_B_DQS#4 135 136 DDR_B_DM4
DQS4# DM4

C1156

C1157
DDR_B_DQS4 137 138
DQS4 VSS DDR_B_D38
139 VSS DQ38 140
DDR_B_D34 141 142 DDR_B_D39 2 2
DDR_B_D35 DQ34 DQ39
143 DQ35 VSS 144
145 146 DDR_B_D44
B DDR_B_D40 VSS DQ44 DDR_B_D45 B
147 DQ40 DQ45 148
Layout Note: DDR_B_D41 149 150
DQ41 VSS DDR_B_DQS#5
151 152
Place near JDIMMB.203,204 DDR_B_DM5 153
VSS DQS5#
154 DDR_B_DQS5
DM5 DQS5
155 VSS VSS 156
DDR_B_D42 157 158 DDR_B_D46
DDR_B_D43 DQ42 DQ46 DDR_B_D47
159 DQ43 DQ47 160
161 VSS VSS 162
DDR_B_D48 163 164 DDR_B_D52
DDR_B_D49 DQ48 DQ52 DDR_B_D53
165 DQ49 DQ53 166
167 VSS VSS 168
+0.75V_DDR_VTT DDR_B_DQS#6 169 170 DDR_B_DM6
DDR_B_DQS6 DQS6# DM6
171 DQS6 VSS 172
173 174 DDR_B_D54
DDR_B_D50 VSS DQ54 DDR_B_D55
175 DQ50 DQ55 176
DDR_B_D51 177 178
DQ51 VSS
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

179 180 DDR_B_D60

DDR_B_D56 VSS DQ60 DDR_B_D61
1 1 1 1 181 DQ56 DQ61 182
DDR_B_D57 183 184
DQ57 VSS
C1158

C1159

C1160

C1161

185 186 DDR_B_DQS#7

DDR_B_DM7 VSS DQS7# DDR_B_DQS7
187 DM7 DQS7 188
2 2 2 2
189 VSS VSS 190
DDR_B_D58 191 192 DDR_B_D62
DDR_B_D59 DQ58 DQ62 DDR_B_D63
193 DQ59 DQ63 194
195 VSS VSS 196
+3.3V_RUN 197 198
SA0 EVENT# MEM_SMBDATA
+3.3V_RUN 199 VDDSPD SDA 200 MEM_SMBDATA <8,13,15,16,28>
2 1 201 202 MEM_SMBCLK
SA1 SCL MEM_SMBCLK <8,13,15,16,28>
+0.75V_DDR_VTT 203 VTT VTT 204 +0.75V_DDR_VTT
1

R1184
10K_0402_5%~D

0.1U_0402_16V4Z~D

2.2U_0603_6.3V6K~D

10K_0402_5%~D
R1185

1 1 205 GND1 GND2 206

C1162

C1163

A A
FOX_AS0A626-U8SN-7F
2

2 2

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DDRIII-SODIMM SLOT2
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 14 of 57
 5 4 3 2 1

WWW.AliSaler.Com
CMOS_CLR1
Shunt
CMOS setting
Clear CMOS <18> USB_OC0#_R
USB_OC0#_R @ R78
@R78 1 2 33_0402_5%~D XDP_FN0
+3.3V_ALW_PCH
1
@JXDP2
@ JXDP2
GND0 GND1 2
USB_OC1#_R @R91
@ R91 1 2 33_0402_5%~D XDP_FN1 +3.3V_ALW_PCH 3 4 XDP_FN16
<18> USB_OC1#_R USB_OC2# XDP_FN2 OBSFN_A0 OBSFN_C0 XDP_FN17
Open Keep CMOS @R101
@ R101 1 2 33_0402_5%~D 5 6
+3.3V_RUN <18> USB_OC2# OBSFN_A1 OBSFN_C1
USB_OC3# @R102
@ R102 1 2 33_0402_5%~D XDP_FN3 1 7 8
<18> USB_OC3# GND2 GND3
USB_OC4# @R103
@ R103 1 2 33_0402_5%~D XDP_FN4 XDP_FN0 9 10 XDP_FN8
<18> USB_OC4# OBSDATA_A0 OBSDATA_C0
ME_CLR1 TPM setting USB_OC5# @R104
@ R104 1 2 33_0402_5%~D XDP_FN5 @ C1375 XDP_FN1 11 12 XDP_FN9
<18> USB_OC5# OBSDATA_A1 OBSDATA_C1

1
USB_OC6# @R105
@ R105 1 2 33_0402_5%~D XDP_FN6 0.1U_0402_16V4Z~D 13 14
<18> USB_OC6# 2 GND4 GND5
Shunt Clear ME RTC Registers @R62
@ R62 USB_OC7# @R106
@ R106 1 2 33_0402_5%~D XDP_FN7 XDP_FN2 15 16 XDP_FN10
<18> USB_OC7# OBSDATA_A2 OBSDATA_C2
10K_0402_5%~D PCMCLK_REQ# @R107
@ R107 1 2 33_0402_5%~D XDP_FN8 XDP_FN3 17 18 XDP_FN11
<16,34> PCMCLK_REQ# LANCLK_REQ# XDP_FN9 OBSDATA_A3 OBSDATA_C3
Open Keep ME RTC Registers @R108
@ R108 1 2 33_0402_5%~D 19 20
<16,30> LANCLK_REQ# HDD_DET#_R XDP_FN10 GND6 GND7
@R109
@ R109 1 2 33_0402_5%~D 21 22

2
GPIO19 @R110
@ R110 33_0402_5%~D XDP_FN11 OBSFN_B0 OBSFN_D0
1 2 23 OBSFN_B1 OBSFN_D1 24
CONTACTLESS_DET# @R111
@ R111 1 2 33_0402_5%~D XDP_FN12 25 26
D +RTC_CELL <19,31> CONTACTLESS_DET# GND8 GND9 D
PCH_AZ_SYNC GPIO37 @R112
@ R112 1 2 33_0402_5%~D XDP_FN13 XDP_FN4 27 28 XDP_FN12
<19> GPIO37 OBSDATA_B0 OBSDATA_D0
EN_ESATA_RPTR# @R113
@ R113 1 2 33_0402_5%~D XDP_FN14 XDP_FN5 29 30 XDP_FN13
<19,37> EN_ESATA_RPTR# OBSDATA_B1 OBSDATA_D1

1
TEMP_ALERT# @R114
@ R114 1 2 33_0402_5%~D XDP_FN15 31 32
<19,39> TEMP_ALERT# GND10 GND11
1

@R120
@ R120 TOUCH_SCREEN_DET# @R115
@ R115 1 2 33_0402_5%~D XDP_FN16 XDP_FN6 33 34 XDP_FN14
<19,39> TOUCH_SCREEN_DET# OBSDATA_B2 OBSDATA_D2
R217 100K_0402_5%~D SIO_EXT_SCI#_R @R116
@ R116 1 2 33_0402_5%~D XDP_FN17 XDP_FN7 35 36 XDP_FN15
<19> SIO_EXT_SCI#_R OBSDATA_B3 OBSDATA_D3
330K_0402_1%~D 37 38
RESET_OUT# GND12 GND13 +3.3V_ALW_PCH
39 40

2
<17,40> RESET_OUT# PWRGOOD/HOOK0 ITPCLK/HOOK4
1 2 PCH_PWRBTN#_XDP 41 42
2

PCH_INTVRMEN <8,17> SIO_PWRBTN#_R HOOK1 ITPCLK#/HOOK5

@ R69 0_0402_5%~D 43 44
VCC_OBS_AB VCC_OBS_CD PLTRST1#_XDP
45 HOOK2 RESET#/HOOK6 46
@ R1545 47 48 XDP_DBRESET#
0_0402_5%~D HOOK3 DBR#/HOOK7 XDP_DBRESET# <8,17>
INTVRMEN- Integrated SUS On Die PLL VR is supplied by 49 GND14 GND15 50
2 1 PCH_RTCX1 1 2 MEM_SMBDATA_R 51 52 PCH_JTAG_TDO
1.1V VRM Enable 1.5V when sampled high, 1.8 V <8,13,14,16,28> MEM_SMBDATA SDA TD0
C296 12P_0402_50V8J~D 1 2 MEM_SMBCLK_R 53 54 PCH_JTAG_RST#_R 1 2PCH_JTAG_RST#
<8,13,14,16,28> MEM_SMBCLK SCL TRST# PCH_JTAG_TDI
High - Enable Internal VRs when sampled low @ R1546 55 TCK1 TDI 56 @ R117 0_0402_5%~D

1
0_0402_5%~D PCH_JTAG_TCK 57 58 PCH_JTAG_TMS
TCK0 TMS

3
R222 59 60
GND16 GND17

NC NC
Y1 10M_0402_5%~D
32.768K_12.5PF_Q13MC30610018~D SAMTE_BSH-030-01-L-D-A
U73A

2
R223 REV1.0
0_0402_5%~D B13 D33 LPC_LAD0
RTCX1 FWH0 / LAD0 LPC_LAD0 <31,32,39,40>
2 1 1 2 PCH_RTCX2 D13 B33 LPC_LAD1
RTCX2 FWH1 / LAD1 LPC_LAD1 <31,32,39,40>
C297 12P_0402_50V8J~D C32 LPC_LAD2 LPC_LAD2 <31,32,39,40>
FWH2 / LAD2 LPC_LAD3
FWH3 / LAD3 A32 LPC_LAD3 <31,32,39,40>
1 2 PCH_RTCRST# C14
+RTC_CELL RTCRST#
R224 20K_0402_1%~D C34 LPC_LFRAME# PLTRST1#_XDP 1 2
SRTCRST# FWH4 / LFRAME# LPC_LFRAME# <31,32,39,40> PLTRST_XDP# <18>
1 2 D17 @R118
@ R118 1K_0402_5%~D
R225 20K_0402_5%~D SRTCRST# LPC_LDRQ0#
A34

RTC

LPC
LDRQ0# LPC_LDRQ0# <39>
1 2 INTRUDER# A16 F34 LPC_LDRQ1#
INTRUDER# LDRQ1# / GPIO23 LPC_LDRQ1# <39>
R226 1M_0402_5%~D
2 1 PCH_INTVRMEN A14 AB9 IRQ_SERIRQ +3.3V_RUN
C INTVRMEN SERIRQ IRQ_SERIRQ <31,32,39,40> C
@ C300
27P_0402_50V8J~D R236
1 2 1 2 33_0402_5%~D IRQ_SERIRQ 2 1
1 2 1 2 PCH_AZ_BITCLK R265 10K_0402_5%~D
<37> PCH_AZ_MDC_BITCLK 1 2 A30 HDA_BCLK
SATA0RXN AK7 PSATA_PRX_DTX_N0_C <28>
1 2 PCH_AZ_SYNC D29 AK6
<37> PCH_AZ_MDC_SYNC HDA_SYNC SATA0RXP PSATA_PRX_DTX_P0_C <28>
@ @ R238 33_0402_5%~D AK11 HDD
ME1 SHORT PADS~D CMOS1 SHORT PADS~D SATA0TXN PSATA_PTX_DRX_N0_C <28>
<29> SPKR P1 SPKR SATA0TXP AK9
PSATA_PTX_DRX_P0_C <28>
1 2 1 2
C298 1U_0402_6.3V6K~D C299 1U_0402_6.3V6K~D 1 2 PCH_AZ_RST# C30
<37> PCH_AZ_MDC_RST# HDA_RST#
CMOS place near DIMM R240 33_0402_5%~D AH6
SATA1RXN SATA_ODD_PRX_DTX_N1_C <28>
SATA1RXP AH5 SATA_ODD_PRX_DTX_P1_C <28>
PCH_AZ_CODEC_SDIN0 G30 AH9 ODD
<29> PCH_AZ_CODEC_SDIN0 HDA_SDIN0 SATA1TXN SATA_ODD_PTX_DRX_N1_C <28>
SATA1TXP AH8 SATA_ODD_PTX_DRX_P1_C <28>
PCH_AZ_MDC_SDIN1 F30
<37> PCH_AZ_MDC_SDIN1 HDA_SDIN1
SATA2RXN AF11
E32 AF9

IHDA
HDA_SDIN2 SATA2RXP
SATA2TXN AF7
F32 HDA_SDIN3 SATA2TXP AF6

<29> PCH_AZ_CODEC_SDOUT 1 2 PCH_AZ_SDOUT AH3

R234 33_0402_5%~D PCH_AZ_SDOUT SATA3RXN
<37> PCH_AZ_MDC_SDOUT 1 2 B29 AH1
HDA_SDO SATA3RXP
<29> PCH_AZ_CODEC_SYNC 1 2 PCH_AZ_SYNC R242 33_0402_5%~D
SATA3TXN AF3
R235 33_0402_5%~D +3.3V_ALW_PCH AF1
SATA3TXP
1 2 PCH_AZ_RST# <39> ME_FWP
ME_FWP H32

SATA
<29> PCH_AZ_CODEC_RST# HDA_DOCK_EN# / GPIO33
R239 33_0402_5%~D AD9
SATA4RXN ESATA_PRX_DTX_N4_C <37>
1

<29> PCH_AZ_CODEC_BITCLK 1 2 PCH_AZ_BITCLK <36> USB_MCARD3_DET#

USB_MCARD3_DET# J30 AD8 ESATA_PRX_DTX_P4_C <37>
R241 33_0402_5%~D R123 HDA_DOCK_RST# / GPIO13 SATA4RXP
1 SATA4TXN AD6
ESATA_PTX_DRX_N4_C <37> E-SATA
0_0603_5%~D AD5
@ C302 SATA4TXP ESATA_PTX_DRX_P4_C <37>
27P_0402_50V8J~D R804 2 1 51_0402_5%~D PCH_JTAG_TCK M3 AD3
2

2 JTAG_TCK SATA5RXN SATA_PRX_DKTX_N5_C <38>

SATA5RXP AD1 SATA_PRX_DKTX_P5_C <38>
B R807 2 1 200_0402_5%~D PCH_JTAG_TMS B
K3 JTAG_TMS SATA5TXN AB3
SATA_PTX_DKRX_N5_C <38> DOCKED
SATA5TXP AB1 SATA_PTX_DKRX_P5_C <38>
R805 2 1 200_0402_5%~D PCH_JTAG_TDI K1 JTAG_TDI

JTAG
+3.3V_ALW_PCH_JTAG 2 1 PCH_JTAG_TDO J2 AF16 +1.05V_RUN
R806 200_0402_5%~D JTAG_TDO SATAICOMPO
PCH_JTAG_RST# J4 AF15 SATA_COMP 1 2
200 MIL SO8 TRST# SATAICOMPI R1201 37.4_0402_1%~D
1

1
100_0402_5%~D

100_0402_5%~D

100_0402_5%~D

+3.3V_M T174 PAD~D

64Mb Flash ROM +3.3V_RUN
R1281

R1282

R1315

C328
For iAMT 1 2 PCH_SPI_CLK BA2 SPI_CLK
1

1
R298 0.1U_0402_16V4Z~D PCH_SPI_CS0# AV3
2

3.3K_0402_5%~D R299 SPI_CS0# R382

3.3K_0402_5%~D PCH_SPI_CS1# AY3 T3 SATA_ACT#_R 43K_0402_5%~D
U12 SPI_CS1# SATALED# SATA_ACT#_R <43>
2

PCH_SPI_CS0# 1 8
2

2
/CS VCC PCH_SPI_DO HDD_DET#_R
AY1 Y9 1 2 HDD_DET# <28>
PCH_SPI_DIN SPI_MOSI SATA0GP / GPIO21 R131 0_0402_5%~D
2 7

SPI
DO /HOLD PCH_SPI_DIN 1 2 PCH_SPI_DIN_R AV1 V1 GPIO19 2 1 +3.3V_RUN
SPI_WP#_SEL PCH_SPI_CLK R1247 33_0402_5%~D SPI_MISO SATA1GP / GPIO19 R58 10K_0402_5%~D
1 2 3 6
@ R1246 0_0402_5%~D /WP CLK
4 5 PCH_SPI_DO IBEXPEAK-M_FCBGA1071~D
GND DIO +3.3V_RUN
SPI_WP#_SEL <39>
PCH JTAG Enable PCH JTAG Disable Production @ R264
@R264
W25Q64BVSSIG_SO8~D 1K_0402_5%~D
SPKR 2 1
PCH Pin Ref. ES1 ES2 ES1 ES2 Ύ All
+3.3V_M
C1205 R806 No Stuff 200 ohm No Stuff No Stuff 200 ohm No Reboot Strap
1 2 TDO
R1315 No Stuff 100 ohm No Stuff No Stuff 100 ohm Low = Default
1

A 0.1U_0402_16V4Z~D SPKR A
R1237 200 MIL SO8 R807 200 ohm 200 ohm No Stuff No Stuff 200 ohm High = No Reboot
1

3.3K_0402_5%~D TMS
32Mb Flash ROM R1238 R1281 100 ohm 100 ohm No Stuff No Stuff 100 ohm
U13 3.3K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
2

PCH_SPI_CS1# 1 8 R805 200 ohm 200 ohm 20K ohm No Stuff 200 ohm
/CS VCC
TDI
2

PCH_SPI_DIN 2 DO /HOLD 7 R1282 100 ohm 100 ohm 10K ohm No Stuff 100 ohm Compal Electronics, Inc.
SPI_WP#_SEL 1 2 3 6 PCH_SPI_CLK TCK R804 4.7K ohm 4.7K ohm 4.7K ohm 4.7K ohm 51 ohm Title
/WP CLK
@R1060
@ R1060 0_0402_5%~D
4 5 PCH_SPI_DO R808 20K ohm No Stuff No Stuff No Stuff No Stuff
PCH (1/8)
GND DIO Size Document Number Rev
TRST#
R1316 10K ohm No Stuff No Stuff No Stuff No Stuff 1.0
W25Q32BVSSIG_SO8~D LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 15 of 57
 5 4 3 2 1

WWW.AliSaler.Com +3.3V_RUN

2
MEM_SMBCLK_P 6 1 MEM_SMBCLK <8,13,14,15,28>
@Q190A
@ Q190A

5
DMN66D0LDW-7_SOT363-6~D
D MEM_SMBDATA_P 3 4 D
MEM_SMBDATA <8,13,14,15,28>
@Q190B
@ Q190B
DMN66D0LDW-7_SOT363-6~D
U73B
1 2
REV1.0 R51 0_0402_5%~D
PCIE_PRX_WANTX_N1 BG30 B9 PCH_SMB_ALERT#
<36> PCIE_PRX_WANTX_N1 PCIE_PRX_WANTX_P1 PERN1 SMBALERT# / GPIO11
<36> PCIE_PRX_WANTX_P1 BJ30 1 2
C317 1 PCIE_PTX_WANRX_N1 PERP1 MEM_SMBCLK_P
MiniWWAN (Mini Card 1)---> 2 0.1U_0402_10V7K~D BF29 H14 R54 0_0402_5%~D
<36> PCIE_PTX_WANRX_N1_C C319 1 PCIE_PTX_WANRX_P1 PETN1 SMBCLK
2 0.1U_0402_10V7K~D BH29
<36> PCIE_PTX_WANRX_P1_C PETP1 MEM_SMBDATA_P
SMBDATA C8
PCIE_PRX_WLANTX_N2 AW30
<36> PCIE_PRX_WLANTX_N2 PERN2
PCIE_PRX_WLANTX_P2 BA30
<36> PCIE_PRX_WLANTX_P2 PCIE_PTX_WLANRX_N2 BC30 PERP2
MiniWLAN (Mini Card 2)---> C320 1 2 0.1U_0402_10V7K~D J14
<36> PCIE_PTX_WLANRX_N2_C C321 1 PCIE_PTX_WLANRX_P2 BD30 PETN2 SML0ALERT# / GPIO60
2 0.1U_0402_10V7K~D
<36> PCIE_PTX_WLANRX_P2_C PETP2 LAN_SMBCLK
SML0CLK C6
PCIE_PRX_PCMTX_N3 LAN_SMBCLK <30>
AU30

SMBus
<33> PCIE_PRX_PCMTX_N3 PERN3
PCIE_PRX_PCMTX_P3 AT30 G8 LAN_SMBDATA
<33> PCIE_PRX_PCMTX_P3 PERP3 SML0DATA LAN_SMBDATA <30>
PCMCIA---> C1373 1 2 0.1U_0402_10V7K~D PCIE_PTX_PCMRX_N3 AU32
<33> PCIE_PTX_PCMRX_N3_C C1374 1 PCIE_PTX_PCMRX_P3 PETN3
<33> PCIE_PTX_PCMRX_P3_C 2 0.1U_0402_10V7K~D AV32 PETP3
SML1ALERT# / GPIO74 M14
PCIE_PRX_EXPTX_N4 BA32
<34> PCIE_PRX_EXPTX_N4 PERN4
PCIE_PRX_EXPTX_P4 BB32 E10 SML1_SMBCLK
<34> PCIE_PRX_EXPTX_P4 PERP4 SML1CLK / GPIO58 SML1_SMBCLK <40>
Express card---> C1008 1 2 0.1U_0402_10V7K~D PCIE_PTX_EXPRX_N4 BD32
<34> PCIE_PTX_EXPRX_N4_C C1009 1 PCIE_PTX_EXPRX_P4 PETN4 SML1_SMBDATA
2 0.1U_0402_10V7K~D BE32 G12 SML1_SMBDATA <40>
<34> PCIE_PTX_EXPRX_P4_C PETP4 SML1DATA / GPIO75

PCI-E*
PCIE_PRX_WPANTX_N5 BF33
<36> PCIE_PRX_WPANTX_N5 PERN5
MiniPCIE/SATA PCIE_PRX_WPANTX_P5 BH33 T13 PCH_CL_CLK1
<36> PCIE_PRX_WPANTX_P5 PERP5 CL_CLK1 PCH_CL_CLK1 <36>

Controller
C1025 1 2 0.1U_0402_10V7K~D PCIE_PTX_WPANRX_N5 BG32
(Mini Card 3)---> <36> PCIE_PTX_WPANRX_N5_C C1024 1 2 0.1U_0402_10V7K~D PCIE_PTX_WPANRX_P5 BJ32
PETN5
T11 PCH_CL_DATA1
<36> PCIE_PTX_WPANRX_P5_C PETP5 CL_DATA1 PCH_CL_DATA1 <36>

Link
C PCIE_PRX_GLANTX_N6 PCH_CL_RST1# C
<30> PCIE_PRX_GLANTX_N6 BA34 PERN6 CL_RST1# T9 PCH_CL_RST1# <36>
PCIE_PRX_GLANTX_P6 AW34 +3.3V_ALW_PCH
<30> PCIE_PRX_GLANTX_P6 PERP6
10/100/1G LAN ---> C326 1 2 0.1U_0402_10V7K~D PCIE_PTX_GLANRX_N6 BC34 R1
<30> PCIE_PTX_GLANRX_N6_C C327 1 PCIE_PTX_GLANRX_P6 PETN6
2 0.1U_0402_10V7K~D BD34 10K_0402_5%~D
<30> PCIE_PTX_GLANRX_P6_C PETP6 PEG_A_CLKRQ# SML1_SMBCLK
H1 1 2 1 2
PEG_A_CLKRQ# / GPIO47 R1178 2.2K_0402_5%~D
AT34 PERN7
AU34 SML1_SMBDATA 1 2
PERP7 R1179 2.2K_0402_5%~D
AU36 PETN7 CLKOUT_PEG_A_N AD43
AV36 PETP7 CLKOUT_PEG_A_P AD45

BG34 AN4 CLK_CPU_DMI#

PERN8 CLKOUT_DMI_N CLK_CPU_DMI# <8>

PEG
BJ34 AN2 CLK_CPU_DMI
PERP8 CLKOUT_DMI_P CLK_CPU_DMI <8>
BG36 PETN8
BJ36 +3.3V_ALW_PCH
PETP8 CLK_CPU_DPLL#
CLKOUT_DP_N / CLKOUT_BCLK1_N AT1
CLK_CPU_DPLL CLK_CPU_DPLL# <8>
CLKOUT_DP_P / CLKOUT_BCLK1_P AT3 CLK_CPU_DPLL <8>
AK48 MEM_SMBCLK_P 2 1
CLKOUT_PCIE0N @ R252 2.2K_0402_5%~D
AK47 CLKOUT_PCIE0P

From CLK BUFFER

AW24 CLK_BUF_DMI# MEM_SMBDATA_P 2 1
CLKIN_DMI_N CLK_BUF_DMI# <6>
+3.3V_ALW_PCH R122 1 2 10K_0402_5%~D PCIECLKREQ0# P9 BA24 CLK_BUF_DMI @ R255 2.2K_0402_5%~D
PCIECLKRQ0# / GPIO73 CLKIN_DMI_P CLK_BUF_DMI <6> PCH_SMB_ALERT# 2 1
R1175 10K_0402_5%~D
R1198 1 2 0_0402_5%~D PCIE_LAN# AM43 AP3 CLK_BUF_BCLK#
<30> CLK_PCIE_LAN# PCIE_LAN CLKOUT_PCIE1N CLKIN_BCLK_N CLK_BUF_BCLK CLK_BUF_BCLK# <6>
R1199 1 2 0_0402_5%~D AM45 AP1
<30> CLK_PCIE_LAN CLKOUT_PCIE1P CLKIN_BCLK_P CLK_BUF_BCLK <6>
10/100/1G LAN --->
LANCLK_REQ# U4
<15,30> LANCLK_REQ# PCIECLKRQ1# / GPIO18 CLK_BUF_DOT96# +3.3V_LAN
CLKIN_DOT_96N F18 CLK_BUF_DOT96# <6>
E18 CLK_BUF_DOT96
CLKIN_DOT_96P CLK_BUF_DOT96 <6>
R1293 2 1 0_0402_5%~D PCIE_PCM# AM47
<33> CLK_PCIE_PCM# PCIE_PCM CLKOUT_PCIE2N LAN_SMBCLK
R1294 2 1 0_0402_5%~D AM48 2 1
<33> CLK_PCIE_PCM CLKOUT_PCIE2P
PCMCIA---> R876 1 2 10K_0402_5%~D AH13 CLK_BUF_CKSSCD# R309 2.2K_0402_5%~D
+3.3V_RUN CLKIN_SATA_N / CKSSCD_N CLK_BUF_CKSSCD# <6>
PCMCLK_REQ# N4 AH12 CLK_BUF_CKSSCD LAN_SMBDATA 2 1
B <15,34> PCMCLK_REQ# PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P CLK_BUF_CKSSCD <6> B
R377 2.2K_0402_5%~D

R1297 2 1 0_0402_5%~D PCIE_MINI3# AH42 P41 CLK_PCH_14M

<36> CLK_PCIE_MINI3# CLKOUT_PCIE3N REFCLK14IN CLK_PCH_14M <6>
MiniWPAN (Mini Card 3)---> R1302 2 1 0_0402_5%~D PCIE_MINI3 AH41
<36> CLK_PCIE_MINI3 CLKOUT_PCIE3P
+3.3V_ALW_PCH R61 2 1 10K_0402_5%~D
MINI3CLK_REQ# A8 J42 CLK_PCI_LOOPBACK
<36> MINI3CLK_REQ# PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK CLK_PCI_LOOPBACK <18>
R379
0_0402_5%~D
R1205 2 1 0_0402_5%~D PCIE_EXP# AM51 AH51 XTAL25_IN 2 1
<34> CLK_PCIE_EXP# CLKOUT_PCIE4N XTAL25_IN
Express card---> R1206 2 1 0_0402_5%~D PCIE_EXP AM53 AH53 XTAL25_OUT
<34> CLK_PCIE_EXP CLKOUT_PCIE4P XTAL25_OUT

1
+3.3V_ALW_PCH R523 2 1 10K_0402_5%~D
EXPCLK_REQ# M9 AF38 1 2 R685
<34> EXPCLK_REQ# PCIECLKRQ4# / GPIO26 XCLK_RCOMP +1.05V_RUN
R686 90.9_0402_1%~D 1M_0402_5%~D

R1203 2 1 0_0402_5%~D PCIE_MINI2# AJ50 T45 SIO_14M R1223 2 1 22_0402_5%~D Y6

2
<36> CLK_PCIE_MINI2# CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64 CLK_SIO_14M <39>
R1196 2 1 0_0402_5%~D PCIE_MINI2 AJ52 2 1
<36> CLK_PCIE_MINI2 CLKOUT_PCIE5P
MiniWLAN (Mini Card 2)---> +3.3V_ALW_PCH R45 2 1 10K_0402_5%~D
MINI2CLK_REQ# H6 P43 PCI_TCM 3@ R1220 2 1 22_0402_5%~D 25MHZ_12PF_X5H025000FC1H-H
Clock Flex

<36> MINI2CLK_REQ# PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65 CLK_PCI_TPM_CHA <32>

2 2
C1168 C1187
R1195 2 1 0_0402_5%~D PCIE_MINI1# AK53 T42 PCI_TPM R1219 2 1 22_0402_5%~D 12P_0402_50V8J~D 12P_0402_50V8J~D
<36> CLK_PCIE_MINI1# CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66 CLK_PCI_TPM <31>
R1202 2 1 0_0402_5%~D PCIE_MINI1 AK51
<36> CLK_PCIE_MINI1 R40 2 CLKOUT_PEG_B_P 1 1
MiniWWAN (Mini Card 1)---> +3.3V_ALW_PCH 1 10K_0402_5%~D
MINI1CLK_REQ# P13 N50 JETWAY_14M
<36> MINI1CLK_REQ# PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67 JETWAY_14M <32>

IBEXPEAK-M_FCBGA1071~D

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCH (2/8)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 16 of 57
 5 4 3 2 1

WWW.AliSaler.Com
+3.3V_ALW_PCH

+3.3V_RUN
Intel WW18 Strapping option
PORT STRAP ENABLE DISABLE
ME_SUS_PWR_ACK 2 1
R269 10K_0402_5%~D CLKRUN# 2 1 LVDS L_DDC_DATA PU to 3.3V thoough 2.2Kohm NC
R282 8.2K_0402_5%~D
PCH_PCIE_WAKE# 2 1 PORT B SDVO_CTRLDATA PU to 3.3V thoough 2.2Kohm NC
R268 10K_0402_5%~D
PORT B DDPC_CTRLDATA PU to 3.3V thoough 2.2Kohm NC
SIO_SLP_LAN# 2 1
D R380 10K_0402_5%~D D
PORT B DDPD_CTRLDATA PU to 3.3V thoough 2.2Kohm NC
PCH_RI# 2 1 eDP on CPU CFG[4] (at CPU) PD to GND thoough 3.3Kohm NC
R267 10K_0402_5%~D

Intel request DDPB can not support eDP

U73C
FDI_CTX_PRX_N0 U73D
DMI_CTX_PRX_N0 BC24
REV1.0 FDI_RXN0 BA18
BH17 FDI_CTX_PRX_N1 FDI_CTX_PRX_N0 <7> PANEL_BKEN_PCH T48 BJ46
<7> DMI_CTX_PRX_N0 DMI0RXN FDI_RXN1 FDI_CTX_PRX_N1 <7> <39> PANEL_BKEN_PCH L_BKLTEN SDVO_TVCLKINN
DMI_CTX_PRX_N1 BJ22 BD16 FDI_CTX_PRX_N2 ENVDD_PCH T47 BG46
<7> DMI_CTX_PRX_N1 DMI1RXN FDI_RXN2 FDI_CTX_PRX_N2 <7> <24,39> ENVDD_PCH L_VDD_EN SDVO_TVCLKINP
DMI_CTX_PRX_N2 AW20 BJ16 FDI_CTX_PRX_N3
<7> DMI_CTX_PRX_N2 DMI_CTX_PRX_N3 DMI2RXN FDI_RXN3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N3 <7> BIA_PWM_PCH
<7> DMI_CTX_PRX_N3 BJ20 DMI3RXN FDI_RXN4 BA16 FDI_CTX_PRX_N4 <7> <24> BIA_PWM_PCH Y48 L_BKLTCTL SDVO_STALLN BJ48
BE14 FDI_CTX_PRX_N5 BG48
FDI_RXN5 FDI_CTX_PRX_N5 <7> SDVO_STALLP
DMI_CTX_PRX_P0 BD24 BA14 FDI_CTX_PRX_N6 AB48
<7> DMI_CTX_PRX_P0 DMI0RXP FDI_RXN6 FDI_CTX_PRX_N6 <7> L_DDC_CLK
DMI_CTX_PRX_P1 BG22 BC12 FDI_CTX_PRX_N7 Y45 BF45
<7> DMI_CTX_PRX_P1 DMI1RXP FDI_RXN7 FDI_CTX_PRX_N7 <7> L_DDC_DATA SDVO_INTN
DMI_CTX_PRX_P2 BA20 BH45
<7> DMI_CTX_PRX_P2 DMI2RXP SDVO_INTP
DMI_CTX_PRX_P3 BG20 BB18 FDI_CTX_PRX_P0 AB46
<7> DMI_CTX_PRX_P3 DMI3RXP FDI_RXP0 FDI_CTX_PRX_P0 <7> L_CTRL_CLK
BF17 FDI_CTX_PRX_P1 V48
FDI_RXP1 FDI_CTX_PRX_P1 <7> L_CTRL_DATA
DMI_CRX_PTX_N0 BE22 BC16 FDI_CTX_PRX_P2
<7> DMI_CRX_PTX_N0 DMI0TXN FDI_RXP2 FDI_CTX_PRX_P2 <7>
DMI_CRX_PTX_N1 BF21 BG16 FDI_CTX_PRX_P3 AP39 T51
<7> DMI_CRX_PTX_N1 DMI1TXN FDI_RXP3 FDI_CTX_PRX_P3 <7> LVD_IBG SDVO_CTRLCLK PCH_SDVO_CTRLCLK <26>
DMI_CRX_PTX_N2 BD20 AW16 FDI_CTX_PRX_P4 AP41 T53
<7> DMI_CRX_PTX_N2 DMI2TXN FDI_RXP4 FDI_CTX_PRX_P4 <7> LVD_VBG SDVO_CTRLDATA PCH_SDVO_CTRLDATA <26>
DMI_CRX_PTX_N3 BE18 BD14 FDI_CTX_PRX_P5
<7> DMI_CRX_PTX_N3 DMI3TXN FDI_RXP5 FDI_CTX_PRX_P5 <7>
BB14 FDI_CTX_PRX_P6 AT43
FDI_RXP6 FDI_CTX_PRX_P6 <7> LVD_VREFH
DMI_CRX_PTX_P0 BD22 BD12 FDI_CTX_PRX_P7 AT42 BG44
<7> DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI0TXP FDI_RXP7 FDI_CTX_PRX_P7 <7> LVD_VREFL DDPB_AUXN DPB_PCH_AUX# <26>
<7> DMI_CRX_PTX_P1 BH21 DMI1TXP DDPB_AUXP BJ44 DPB_PCH_AUX <26>
DMI_CRX_PTX_P2 BC20 AU38
<7> DMI_CRX_PTX_P2 DMI2TXP DDPB_HPD DPB_PCH_HPD <26>

LVDS
DMI_CRX_PTX_P3 BD18 BJ14 FDI_INT AV53
<7> DMI_CRX_PTX_P3 DMI3TXP FDI_INT FDI_INT <7> LVDSA_CLK#
AV51 BD42

DMI
FDI
+1.05V_RUN FDI_FSYNC0 LVDSA_CLK DDPB_0N DPB_PCH_LANE_N0 <26>
FDI_FSYNC0 BF13 FDI_FSYNC0 <7> DDPB_0P BC42
C DPB_PCH_LANE_P0 <26> C
BH25 DMI_ZCOMP BB47 LVDSA_DATA#0 DDPB_1N BJ42 DPB_PCH_LANE_N1 <26>
FDI_FSYNC1

Digital Display Interface

FDI_FSYNC1 BH13 FDI_FSYNC1 <7> BA52 LVDSA_DATA#1 DDPB_1P BG42
DMI_COMP_R DPB_PCH_LANE_P1 <26>
1 2 BF25 AY48 BB40
R385 49.9_0402_1%~D DMI_IRCOMP FDI_LSYNC0 LVDSA_DATA#2 DDPB_2N DPB_PCH_LANE_N2 <26>
FDI_LSYNC0 BJ12 FDI_LSYNC0 <7> AV47 LVDSA_DATA#3 DDPB_2P BA40 DPB_PCH_LANE_P2 <26>
DDPB_3N AW38
FDI_LSYNC1 DPB_PCH_LANE_N3 <26>
FDI_LSYNC1 BG14 FDI_LSYNC1 <7> BB48 LVDSA_DATA0 DDPB_3P BA38 DPB_PCH_LANE_P3 <26>
BA50 LVDSA_DATA1
PCH_PWROK R48 1 2 8.2K_0402_5%~D AY49 LVDSA_DATA2
AV48 LVDSA_DATA3 DDPC_CTRLCLK Y49 PCH_DDPC_CTRLCLK <25>
PCH_RSMRST# R260 1 2 10K_0402_5%~D AB49
DDPC_CTRLDATA PCH_DDPC_CTRLDATA <25>
AP48 LVDSB_CLK#
AP47 LVDSB_CLK DDPC_AUXN BE44 DPC_PCH_DOCK_AUX# <25>
XDP_DBRESET# T6 J12 PCH_PCIE_WAKE# BD44
<8,15> XDP_DBRESET# SYS_RESET# WAKE# PCH_PCIE_WAKE# <39> DDPC_AUXP DPC_PCH_DOCK_AUX <25>
AY53 LVDSB_DATA#0 DDPC_HPD AV40
DPC_PCH_DOCK_HPD <38>
AT49 LVDSB_DATA#1
R253 1 2 SYS_PWROK M6 Y1 CLKRUN# AU52 BE40
SYS_PWROK CLKRUN# / GPIO32 CLKRUN# <32,39,40> LVDSB_DATA#2 DDPC_0N DPC_PCH_LANE_N0 <38>
0_0402_5%~D AT53 BD40
LVDSB_DATA#3 DDPC_0P DPC_PCH_LANE_P0 <38>
BF41
System Power Management

R254 1 PCH_PWROK DDPC_1N DPC_PCH_LANE_N1 <38>

<15,40> RESET_OUT# 2 B17 PWROK AY51 LVDSB_DATA0 DDPC_1P BH41
0_0402_5%~D DPC_PCH_LANE_P1 <38>
AT48 LVDSB_DATA1 DDPC_2N BD38 DPC_PCH_LANE_N2 <38>
AU50 LVDSB_DATA2 DDPC_2P BC38
R256 1 PM_MEPWROK_R SUS_STAT#/LPCPD# T173 PAD~D DPC_PCH_LANE_P2 <38>
<40> PM_MEPWROK 2 K5 MEPWROK SUS_STAT# / GPIO61 P8 AT51 LVDSB_DATA3 DDPC_3N BB36
0_0402_5%~D DPC_PCH_LANE_N3 <38>
DDPC_3P BA36 DPC_PCH_LANE_P3 <38>
R257 1 2 LAN_RST# A10 F3 SUSCLK T179 PAD~D
0_0402_5%~D LAN_RST# SUSCLK / GPIO62 PCH_CRT_BLU
<27> PCH_CRT_BLU AA52 CRT_BLUE DDPD_CTRLCLK U50
T2 PAD~D PCH_CRT_GRN AB53 U52
<27> PCH_CRT_GRN CRT_GREEN DDPD_CTRLDATA
PM_DRAM_PWRGD D9 E4 SIO_SLP_S5# PCH_CRT_RED AD53
<8> PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 SIO_SLP_S5# <40> <27> PCH_CRT_RED CRT_RED
T3 PAD~D BC46
PCH_RSMRST# SIO_SLP_S4# PCH_CRT_DDC_CLK_R DDPD_AUXN
<40> PCH_RSMRST# C16 RSMRST# SLP_S4# H7 V51 CRT_DDC_CLK DDPD_AUXP BD46
B SIO_SLP_S4# <39> PCH_CRT_DDC_DAT_R B
V53 CRT_DDC_DATA DDPD_HPD AT38
T4 PAD~D
ME_SUS_PWR_ACK M1 P12 SIO_SLP_S3# R480 20_0402_1%~D BJ40
<40> ME_SUS_PWR_ACK SUS_PWR_DN_ACK / GPIO30 SLP_S3# SIO_SLP_S3# <39> DDPD_0N
<8,15> SIO_PWRBTN#_R <27> PCH_CRT_HSYNC 1 2 HSYNC Y53 CRT_HSYNC DDPD_0P BG40
T5 PAD~D
<27> PCH_CRT_VSYNC 1 2 VSYNC Y51 BJ38
SIO_PWRBTN#_R SIO_SLP_M# R673 20_0402_1%~D CRT_VSYNC DDPD_1N
<40> SIO_PWRBTN# 1 2 P5 K8 BG38
PWRBTN# SLP_M# SIO_SLP_M# <39,48> DDPD_1P

CRT
R53 0_0402_5%~D BF37
CRT_IREF DDPD_2N
AD48 DAC_IREF DDPD_2P BH37
AC_PRESENT P7 N2 AB51 BE36
<40> AC_PRESENT ACPRESENT / GPIO31 TP23 CRT_IRTN DDPD_3N
REV1.0 DDPD_3P BD36

1
T6 PAD~D
+3.3V_ALW_PCH 1 2 PCH_BATLOW# A6 BJ10 H_PM_SYNC
H_PM_SYNC <8>
IBEXPEAK-M_FCBGA1071~D
R275 8.2K_0402_5%~D BATLOW# / GPIO72 PMSYNCH R672
1K_0402_0.5%~D
PCH_RI# F14 F6 SIO_SLP_LAN#

2
RI# SLP_LAN# / GPIO29 SIO_SLP_LAN# <30,39>

IBEXPEAK-M_FCBGA1071~D
1 2 PCH_CRT_BLU
R679 150_0402_1%~D
1 2 PCH_CRT_GRN +3.3V_RUN
R680 150_0402_1%~D
1 2 PCH_CRT_RED
R681 150_0402_1%~D 1 2 PCH_CRT_DDC_CLK_R
+3.3V_RUN 1 2 ENVDD_PCH R890 2.2K_0402_5%~D
R682 100K_0402_5%~D 1 2 PCH_CRT_DDC_DAT_R
R887 2.2K_0402_5%~D
2

A 6 1 PCH_CRT_DDC_CLK_R A
<27> PCH_CRT_DDC_CLK
Q212A
5

DMN66D0LDW-7_SOT363-6~D

<27> PCH_CRT_DDC_DAT 3 4 PCH_CRT_DDC_DAT_R DELL CONFIDENTIAL/PROPRIETARY

Q212B
DMN66D0LDW-7_SOT363-6~D
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
1
@R1543
@ R1543
2
0_0402_5%~D BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCH (3/8)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
1 2
@R1544
@ R1544 0_0402_5%~D LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 17 of 57
 5 4 3 2 1

WWW.AliSaler.Com Stuff: R78,R89,R101~R116

+3.3V_RUN PCH XDP ENABLE
No Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130
R1471 1 2 PCI_DEVSEL#
8.2K_0402_5%~D
R1472 1 2 PCI_PIRQA# Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130
8.2K_0402_5%~D PCH XDP DISABLE
R1473 1 2 PCI_PLOCK#
8.2K_0402_5%~D No Stuff: R78,R89,R101~R116
R1474 1 2 PCI_PERR#
8.2K_0402_5%~D
R1475 1 PCI_TRDY# U73E
2
D 8.2K_0402_5%~D D
R1477 1 2 PCI_FRAME#
H40
N34
AD0 REV1.0 NV_CE#0 AY9
BD1
8.2K_0402_5%~D AD1 NV_CE#1
C44 AD2 NV_CE#2 AP15
R1476 1 2 PCI_REQ1# A38 BD8
8.2K_0402_5%~D AD3 NV_CE#3
C36 AD4
R1478 1 2 PCI_PIRQD# J34 AV9 +VCCPNAND no support?
8.2K_0402_5%~D AD5 NV_DQS0
A40 AD6 NV_DQS1 BG8
R1479 1 2 PCI_PIRQB# D45 AD7

1
8.2K_0402_5%~D E36 AP7
R1480 1 PCI_REQ0# AD8 NV_DQ0 / NV_IO0 @ R872
2 H48 AP6
8.2K_0402_5%~D AD9 NV_DQ1 / NV_IO1 10K_0402_5%~D
E40 AD10 NV_DQ2 / NV_IO2 AT6
R1481 1 2 PCI_SERR# C40 AT9
8.2K_0402_5%~D AD11 NV_DQ3 / NV_IO3
M48 BB1

2
R1482 1 PCI_IRDY# AD12 NV_DQ4 / NV_IO4 NV_ALE
2 M45 AV6
8.2K_0402_5%~D AD13 NV_DQ5 / NV_IO5
F53 AD14 NV_DQ6 / NV_IO6 BB3
R1483 1 2 PCI_STOP# M40 BA4
8.2K_0402_5%~D AD15 NV_DQ7 / NV_IO7

NVRAM
M43 AD16 NV_DQ8 / NV_IO8 BE4
R1484 1 2 LVDS_CBL_DET# J36 BB6
8.2K_0402_5%~D AD17 NV_DQ9 / NV_IO9
K48 AD18 NV_DQ10 / NV_IO10 BD6 Danbury Technology Enabled
R1485 1 2 PCI_PIRQC# F40 BB7
8.2K_0402_5%~D AD19 NV_DQ11 / NV_IO11
C42 AD20 NV_DQ12 / NV_IO12 BC8
K46 AD21 NV_DQ13 / NV_IO13 BJ8 High = Enabled (Default)
M51 AD22 NV_DQ14 / NV_IO14 BJ6 NV_ALE
J52 AD23 NV_DQ15 / NV_IO15 BG6 Low = Disabled
K51 AD24
L34 BD3 NV_ALE
AD25 NV_ALE NV_CLE
F42 AD26 NV_CLE AY6
1 2 CAM_MIC_CBL_DET# J40
R212 8.2K_0402_5%~D AD27
G46 AD28
F44 AD29 NV_RCOMP AU2
M47 AD30 +VCCPNAND

PCI
1 2 BT_DET# H36 AV7
C R590 8.2K_0402_5%~D AD31 NV_RB# C
J50 C/BE0# NV_WR#0_RE# AY8

1
G42 C/BE1# NV_WR#1_RE# AY5
H47 @R866
@ R866
C/BE2# 1K_0402_5%~D
G34 C/BE3# NV_WE#_CK0 AV11
NV_WE#_CK1 BF5
PCI_PIRQA# G38

2
PCI_PIRQB# PIRQA#
H51 PIRQB#
PCI_GNT3# PCI_PIRQC# USBP0- NV_CLE
PCI_PIRQD#
B37
A44
PIRQC# USBP0N H18
J18 USBP0+
USBP0- <37> ----->Right Side Top
PIRQD# USBP0P USBP0+ <37>
USBP1-
USBP1N A18 USBP1- <37> ----->USH_BIO
1

PCI_REQ0# F51 C18 USBP1+

REQ0# USBP1P USBP1+ <37>
@R863
@ R863 PCI_REQ1# A46 N20 USBP2-
4.7K_0402_5%~D B45
REQ1# / GPIO50 USBP2N
P20 USBP2+
USBP2- <37> ----->Left Side Top
<36> PCIE_MCARD2_DET# REQ2# / GPIO52 USBP2P USBP2+ <37>
BT_DET# M53 J20 USBP3- DMI Termination Voltage
<41> BT_DET# REQ3# / GPIO54 USBP3N
L20 USBP3+
USBP3- <37> ----->Left Side Bottom
2

USBP3P USBP3+ <37>

PCI_GNT0# F48 F20 USBP4-
PCI_GNT1# K45
GNT0# USBP4N
G20 USBP4+
USBP4- <36> ----->WLAN Set to Vss when LOW
GNT1# / GPIO51 USBP4P USBP4+ <36>
PCIE_MCARD3_DET# USBP5- NV_CLE
<36> PCIE_MCARD3_DET#
PCI_GNT3#
F36
H53
GNT2# / GPIO53 USBP5N A20
C20 USBP5+
USBP5- <36> ----->WWAN Set to Vcc when HIGH
GNT3# / GPIO55 USBP5P USBP6- USBP5+ <36>
LVDS_CBL_DET# B41
USBP6N M22
N22 USBP6+
USBP6- <41> ----->Blue Tooth
<24> LVDS_CBL_DET# PIRQE# / GPIO2 USBP6P USBP6+ <41>
K53 B21 USBP7-
A16 swap override Strap/Top-Block CAM_MIC_CBL_DET# A36
PIRQF# / GPIO3 USBP7N
D21 USBP7+ USBP7- <31> ----->Express Card
<24> CAM_MIC_CBL_DET# PIRQG# / GPIO4 USBP7P USBP7+ <31>
1 2 FFS_PCH_INT A48 H22 USBP8-
Swap Override jumper <28,40> HDD_FALL_INT1
R632 0_0402_5%~D PIRQH# / GPIO5 USBP8N
J22 USBP8+
USBP8- <38> ----->DOCK
USBP8P USBP8+ <38>

USB
1 2 PCH_PCIRST# K6 E22 USBP9-
@R121
@ R121 0_0402_5%~D PCIRST# USBP9N
F22 USBP9+
USBP9- <38> ----->DOCK
USBP9P USBP9+ <38> +3.3V_ALW_PCH
Low = A16 swap PCI_SERR# USBP10-
PCI_GNT#3
reserve for DEBUG PCI_PERR#
E44
E50
SERR# USBP10N A22
C22 USBP10+ USBP10- <33> ----->Right Side Bottom
PERR# USBP10P USBP10+ <33>
High = Default USBP11-
USBP11N G24
H24 USBP11+
USBP11- <24> ----->Camera USB_OC0# R1486 2 1 10K_0402_5%~D
B PCI_IRDY# USBP11P USBP11+ <24> B
A42 IRDY# USBP12N L24
H44 M24 USB_OC1# R1487 2 1 10K_0402_5%~D
PCI_DEVSEL# PAR USBP12P USBP13-
PCI_FRAME#
F46
C46
DEVSEL# USBP13N A24
C24 USBP13+
USBP13- <36> ----->WPAN USB_OC3# R1488 2 1 10K_0402_5%~D
FRAME# USBP13P USBP13+ <36>
PCI_PLOCK# D49 Within 500 mils USB_OC4# R1489 2 1 10K_0402_5%~D
PLOCK# USBRBIAS
USBRBIAS# B25 1 2
PCI_STOP# D41 R303 USB_OC5# R1490 2 1 10K_0402_5%~D
PCI_TRDY# STOP# 22.6_0402_1%~D
C48 TRDY# USBRBIAS D25
R100 1 2 0_0402_5%~D USB_OC6# R1491 2 1 10K_0402_5%~D
<31> PLTRST_USH#
R97 1 2 0_0402_5%~D M7
<33> PLTRST_R5U242# PME#
@R94
@ R94 1 2 0_0402_5%~D N16 USB_OC0#_R R71 1 2 0_0402_5%~D USB_OC7# R1493 2 1 10K_0402_5%~D
<15> PLTRST_XDP# OC0# / GPIO59 USB_OC0# <37>
R14 1 2 0_0402_5%~D PCH_PLTRST# D5 J16 USB_OC1#_R R77 1 2 0_0402_5%~D
<30> PLTRST_LAN# PLTRST# OC1# / GPIO40 USB_OC2# USB_OC1# <37> USB_OC2#
F16 R1494 2 1 10K_0402_5%~D
OC2# / GPIO41 USB_OC2# <15>
R1216 2 1 22_0402_5%~D PCI_5028 N52 L16 USB_OC3#
<39> CLK_PCI_5028 CLKOUT_PCI0 OC3# / GPIO42 USB_OC3# <15>
R1217 2 1 47_0402_5%~D PCI_MEC P53 E14 USB_OC4#
<40> CLK_PCI_MEC PCI_DOCK CLKOUT_PCI1 OC4# / GPIO43 USB_OC5# USB_OC4# <15>
R1215 1 2 47_0402_5%~D P46 G16
<38> CLK_PCI_DOCK CLKOUT_PCI2 OC5# / GPIO9 USB_OC5# <15>
P51 F12 USB_OC6#
CLKOUT_PCI3 OC6# / GPIO10 USB_OC6# <15>
R63 2 1 22_0402_5%~D PCI_LOOPBACKOUT P48 T15 USB_OC7#
<16> CLK_PCI_LOOPBACK CLKOUT_PCI4 OC7# / GPIO14 USB_OC7# <15>

+3.3V_RUN USB_OC0#_R <15>

IBEXPEAK-M_FCBGA1071~D
C40 USB_OC1#_R <15>
1 2
PCI_GNT0#
0.1U_0402_16V4Z~D PCI_GNT1#
5

U11

1
1K_0402_5%~D

1K_0402_5%~D
PCH_PLTRST# 1
P

B PCH_PLTRST#_EC
O 4 Boot
PCH_PLTRST#_EC <8,32,34,36,39,40> BIOS Strap
@ R79

@ R93
2 A
G

A A
TC7SH08FU_SSOP5~D PCI_GNT#1 PCI_GNT#0 Boot BIOS Location
3

2
0 0 LPC
DELL CONFIDENTIAL/PROPRIETARY
0 1 Reserved (NAND) Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
1 0 PCI BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCH (4/8)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
* 1 1 SPI LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 18 of 57
 5 4 3 2 1

WWW.AliSaler.Com

D D
U73F
<15> SIO_EXT_SCI#_R
SIO_EXT_SCI# 1 2 Y3 AH45
<40> SIO_EXT_SCI# BMBUSY# / GPIO0 CLKOUT_PCIE6N
R130 0_0402_5%~D AH46
PCH_GPIO1 CLKOUT_PCIE6P
C38 TACH1 / GPIO1
PCH_GPIO6 D37 TACH2 / GPIO6 +3.3V_RUN
CLKOUT_PCIE7N AF48

MISC
1394_DET# J32 AF47
<33> 1394_DET# TACH3 / GPIO7 CLKOUT_PCIE7P
1 2 SIO_EXT_SMI# <40> SIO_EXT_SMI#
SIO_EXT_SMI# F10 SIO_A20GATE 2 1
@R99
@ R99 1K_0402_5%~D GPIO8 R230 8.2K_0402_5%~D
PM_LANPHY_ENABLE K9 U2 SIO_A20GATE SIO_RCIN# 2 1
<30> PM_LANPHY_ENABLE LAN_PHY_PWR_CTRL / GPIO12 A20GATE SIO_A20GATE <40>
R231 10K_0402_5%~D
SIO_EXT_WAKE# T7 1394_DET# 1 2
<39> SIO_EXT_WAKE# GPIO15 R836 10K_0402_5%~D
EN_ESATA_RPTR# AA2 AM3 CLK_CPU_BCLK# SIO_EXT_SCI# 1 2
<15,37> EN_ESATA_RPTR# SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLK# <8>
R272 10K_0402_5%~D
SPEAKER_DET# F38 AM1 CLK_CPU_BCLK +1.05V_RUN_VTT
<29> SPEAKER_DET# TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_CPU_BCLK <8>
PCH_GPIO22 Y7 BG10 H_PECI
SCLOCK / GPIO22 PECI H_PECI <8>

1
GPIO
H10 T1 SIO_RCIN# R237
<36> PCIE_MCARD1_DET# GPIO24 RCIN# SIO_RCIN# <40>
56_0402_5%~D
TP_ONDIE_PLL_VR AB12 BE10 H_CPUPWRGD
GPIO27 PROCPWRGD H_CPUPWRGD <8>

CPU

2
TOUCH_SCREEN_DET# V13 BD10 PCH_THRMTRIP#_R
<15,39> TOUCH_SCREEN_DET# GPIO28 THRMTRIP#
PCH_GPIO34 M11 1
+3.3V_ALW_PCH STP_PCI# / GPIO34
Internal pull up GPIO27 to USB_MCARD1_DET# V6 C33
C <36> USB_MCARD1_DET# SATACLKREQ# / GPIO35 0.1U_0402_16V4Z~D C
enable VccVRM
1

CONTACTLESS_DET# AB7 BA22 2

<15,31> CONTACTLESS_DET# SATA2GP / GPIO36 TP1 +3.3V_ALW_PCH
R1284
8.2K_0402_5%~D GPIO37 AB13 AW22
<15> GPIO37 SATA3GP / GPIO37 TP2
@
TPM_ID0 V3 BB22 IO_LOOP 2 1
2

TP_ONDIE_PLL_VR SLOAD / GPIO38 TP3 R835 100K_0402_5%~D

TPM_ID1 P3 AY45
SDATAOUT0 / GPIO39 TP4 TOUCH_SCREEN_DET# 1 2
USB_MCARD2_DET# H3 AY46 R74 10K_0402_5%~D
<36> USB_MCARD2_DET# PCIECLKRQ6# / GPIO45 TP5
GPIO46 F1 AV43 SIO_EXT_SMI# 1 2
PCIECLKRQ7# / GPIO46 TP6 R274 10K_0402_5%~D
FFS_INT2 AB6 AV45
<28> FFS_INT2 SDATAOUT1 / GPIO48 TP7 SIO_EXT_WAKE# 1 2
TEMP_ALERT# AA4 AF13 R1557 2.2K_0402_5%~D
<15,39> TEMP_ALERT# SATA5GP / GPIO49 TP8
IO_LOOP F8 M18
+3.3V_ALW_PCH <37> IO_LOOP GPIO57 TP9

TP10 N18

1 2 GPIO46 VSS_NCTF_1 A4 AJ24

R1309 10K_0402_5%~D VSS_NCTF_2 VSS_NCTF_1 TP11
A49

NCTF
VSS_NCTF_2

RSVD
VSS_NCTF_3 A5 AK41
+3.3V_RUN VSS_NCTF_4 VSS_NCTF_3 TP12
A50 VSS_NCTF_4
VSS_NCTF_5 A52 AK42
CONTACTLESS_DET# VSS_NCTF_6 VSS_NCTF_5 TP13
2 1 A53
R1242 10K_0402_5%~D VSS_NCTF_7 VSS_NCTF_6
B2 VSS_NCTF_7 TP14 M32
2 1 GPIO37 VSS_NCTF_8 B4
R1243 10K_0402_5%~D VSS_NCTF_9 VSS_NCTF_8
B52 VSS_NCTF_9 TP15 N32
2 1 EN_ESATA_RPTR# VSS_NCTF_10 B53
R1244 10K_0402_5%~D VSS_NCTF_11 VSS_NCTF_10
BE1 VSS_NCTF_11 TP16 M30
B 2 1 TEMP_ALERT# VSS_NCTF_12 BE53 B
R1245 10K_0402_5%~D VSS_NCTF_13 VSS_NCTF_12
BF1 VSS_NCTF_13 TP17 N30
2 1 PCH_GPIO1 VSS_NCTF_14 BF53
R1510 10K_0402_5%~D VSS_NCTF_15 VSS_NCTF_14
PCH_GPIO6
All NCTF pins should have thick VSS_NCTF_16
BH1 VSS_NCTF_15 TP18 H12
2 1 BH2
R1511 10K_0402_5%~D traces at 45°from the pad. VSS_NCTF_17 VSS_NCTF_16
BH52 VSS_NCTF_17 TP19 AA23
1 2 SPEAKER_DET# VSS_NCTF_18 BH53
R95 8.2K_0402_5%~D VSS_NCTF_19 VSS_NCTF_18
BJ1 VSS_NCTF_19 NC_1 AB45
1 2 PCH_GPIO22 VSS_NCTF_20 BJ2
R1520 10K_0402_5%~D VSS_NCTF_21 VSS_NCTF_20
BJ4 VSS_NCTF_21 NC_2 AB38
1 2 PCH_GPIO34 VSS_NCTF_22 BJ49
R1521 10K_0402_5%~D VSS_NCTF_23 VSS_NCTF_22
BJ5 VSS_NCTF_23 NC_3 AB42
VSS_NCTF_24 BJ50
VSS_NCTF_25 VSS_NCTF_24
BJ52 VSS_NCTF_25 NC_4 AB41
VSS_NCTF_26 BJ53
VSS_NCTF_27 VSS_NCTF_26
D1 VSS_NCTF_27 NC_5 T39
VSS_NCTF_28 D2
VSS_NCTF_29 VSS_NCTF_28
D53 VSS_NCTF_29
VSS_NCTF_30 E1 P6 INIT3_3V# PAD~D T7 @
VSS_NCTF_31 VSS_NCTF_30 INIT3_3V#
E53 VSS_NCTF_31
REV1.0 TP24 C10

IBEXPEAK-M_FCBGA1071~D
+3.3V_RUN
+3.3V_RUN
2

TPM_ID0 TPM_ID1
5@ R273 4@ R787
10K_0402_5%~D 20K_0402_5%~D China TPM 0 0
A A
No TPM, No China TPM 0 1
1

TPM_ID0 TPM_ID1 Reserved 1 0

2

6@ R922 TPM 1 1
10K_0402_5%~D
3@ R339
2.2K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
1

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCH (5/8)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 19 of 57
 5 4 3 2 1

WWW.AliSaler.Com
PCH Power Rail Table
+1.05V_RUN +3.3V_RUN S0 Iccmax
Voltage Rail Voltage Current (A)
U73G POWER +VCCADAC
L49
AB24 VCCCORE[1] VCCADAC[1] AE50 2 1
AB26 BLM18PG181SN1_0603~D V_CPU_IO 1.1/1.05 < 1 (mA)
VCCCORE[2]

10U_0805_4VAM~D

1U_0402_6.3V6K~D

0.1U_0402_10V7K~D
0.01U_0402_16V7K~D
1 1 AB28 VCCCORE[3] VCCADAC[2] AE52
AD26 VCCCORE[4] 1 1 1

CRT
C77
C1139
AD28 VCCCORE[5] VSSA_DAC[1] AF53 V5REF 5 < 1 (mA)

C87
C109
AF26 C38
2 2 VCCCORE[6]

VCC CORE
D
AF28 AF51 10U_0805_4VAM~D D
VCCCORE[7] VSSA_DAC[2] 2 2 2
AF30 VCCCORE[8]
V5REF_Sus 5 < 1 (mA)
AF31 VCCCORE[9]
AH26 VCCCORE[10]
AH28 VCCCORE[11]
Vcc3_3 3.3 0.357
AH30 VCCCORE[12]
AH31 VCCCORE[13] VCCALVDS AH38
AJ30 VccAClk 1.1 0.052
VCCCORE[14]
AJ31 VCCCORE[15] VSSA_LVDS AH39

VccADAC 3.3 0.069

+1.05V_RUN AP43
VCCTX_LVDS[1]
VCCTX_LVDS[2] AP45
AT46 VccADPLLA 1.1 0.068

LVDS
VCCTX_LVDS[3]
AK24 VCCIO[24] VCCTX_LVDS[4] AT45

VccADPLLB 1.1 0.069

VCCAPLLEXP BJ24 VCCAPLLEXP
VCC3_3[2] AB34
VccapllEXP 1.1 0.04

1U_0402_6.3V6K~D
1
AN20 VCCIO[25] VCC3_3[3] AB35

C78
Place C78 Near BJ24 pin AN22

HVCMOS
VCCIO[26]
AN23 AD35 +3.3V_RUN VccCore 1.1 1.432
2 @ VCCIO[27] VCC3_3[4]
AN24 VCCIO[28]
AN26 VCCIO[29] 1
AN28 VccDMI 1.1 0.058
VCCIO[30] C93
BJ26 VCCIO[31]
BJ28 VCCIO[32] 0.1U_0402_10V7K~D
2 VccDMI 1.1 0.061
AT26 VCCIO[33]
AT28 VCCIO[34]
+1.05V_RUN AU26 VCCIO[35] +1.5V_1.8V_RUN_VCCADMI_VRM
AU28 VCCIO[36]
VccFDIPLL 1.1 0.037
C C
AV26 VCCIO[37]
AV28 AT24 1 2 +1.05V_+1.5V_1.8V_RUN
VCCIO[38] VCCVRM[2] R391 0_0603_5%~D
AW26 VCCIO[39]
VccIO 1.1 3.062
10U_0805_4VAM~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1 1 1 1 1 AW28 VCCIO[40]

DMI
BA26 VCCIO[41] VCCDMI[1] AT16
C80

C81

C82

C83

C84

BA28 VccLAN 1.1 0.32

VCCIO[42]
BB26 VCCIO[43] VCCDMI[2] AU16 +1.05V_RUN_VTT
2 2 2 2 2 BB28 VCCIO[44] 1
BC26 VccME 1.1 1.849
VCCIO[45]

PCI E*
BC28 C1140
VCCIO[46] 1U_0402_6.3V6K~D
BD26 VCCIO[47] 2 VccME3_3 3.3 0.085
BD28 VCCIO[48]
BE26 AM16 +VCCPNAND
+3.3V_RUN VCCIO[49] VCCPNAND[1]
BE28 VCCIO[50] VCCPNAND[2] AK16
BG26 VCCIO[51] VCCPNAND[3] AK20 1 2 +3.3V_RUN VccpNAND 1.8 0.156
BG28 AK19 @ R489 0_0805_5%~D
VCCIO[52] VCCPNAND[4]
0.1U_0402_10V7K~D

0.1U_0402_10V7K~D
BH27 VCCIO[53] VCCPNAND[5] AK15
1 VCCPNAND[6] AK13 1 1 2 +1.8V_RUN VccRTC 3.3 2 (mA)
AN30 AM12 R495 0_0805_5%~D
VCCIO[54] VCCPNAND[7]
C85

C94
NAND / SPI
AN31 VCCIO[55] VCCPNAND[8] AM13
AM15 VccSATAPLL 1.1 0.031
2 VCCPNAND[9] 2
AN35 VCC3_3[1]
VccSus3_3 3.3 0.163
+VCCAFDI_VRM AT22 VCCVRM[1]
Place C22 Near BJ18 pin VccSusHDA 3.3 0.006
BJ18 VCCFDIPLL VCCME3_3[1] AM8 +3.3V_M
VCCME3_3[2] AM9
FDI

VccVRM 1.8 / 1.5 0.196

1U_0402_6.3V6K~D

1 +1.05V_RUN AM23 VCCIO[1] VCCME3_3[3] AP11 1

VCCME3_3[4] AP9
C22

C95
B 0.1U_0402_10V7K~D VccVRM 1.05 < 1 (mA) B
2 @ REV1.0 2
IBEXPEAK-M_FCBGA1071~D
VccALVDS 3.3 < 1 (mA)

VccTX_LVDS 1.8 0.059

+1.05V_+1.5V_1.8V_RUN

1 2 +VCCAFDI_VRM
R390 0_0603_5%~D

+1.5V_RUN +1.05V_+1.5V_1.8V_RUN

2 1 +1.05V_+1.5V_1.8V_RUN
@ R96 0_0603_5%~D
+1.8V_RUN

2 1
R387 0_0603_5%~D
+1.05V_RUN

2 1
@ R80 0_0603_5%~D
A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCH (6/8)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 20 of 57
 5 4 3 2 1

WWW.AliSaler.Com Place C39 Near AP51 pin

+VCCACLK

1U_0402_6.3V6K~D
1
U73J POWER
REV1.0

@ C39
AP51 V24 +1.05V_RUN_VCCUSBCORE 2 1 +1.05V_RUN
VCCACLK[1] VCCIO[5] R499 0_0603_5%~D +5V_ALW R651 +5V_ALW_PCH
VCCIO[6] V26
2 AP53 Y24 0_0402_5%~D
VCCACLK[2] VCCIO[7] 1
+1.05V_M

S
VCCIO[8] Y26 2 1 1 3
C96

0.1U_0402_10V7K~D
1 2 +1.05V_M_VCCAUX AF23 V28 1U_0402_6.3V6K~D Q10
VCCLAN[1] VCCSUS3_3[1]

1
R669 0_0603_5%~D 2 SSM3K7002FU_SC70-3~D

1U_0402_6.3V6K~D
1 U28 1

G
2
VCCSUS3_3[2] R57
AF24 VCCLAN[2] VCCSUS3_3[3] U26

C18
C100
D 20K_0402_5%~D D
VCCSUS3_3[4] U24
VCCSUS3_3[5] P28 <42> ALW_ENABLE
2 +TP_PCH_VCCDSW Y20 P26 2

2
DCPSUSBYP VCCSUS3_3[6]
1 VCCSUS3_3[7] N28
VCCSUS3_3[8] N26
C110 AD38 M28 +3.3V_ALW_VCCPUSB 2 1
VCCME[1] VCCSUS3_3[9] +3.3V_ALW_PCH
0.1U_0402_10V7K~D M26 R500 0_0603_5%~D
+1.05V_M 2 VCCSUS3_3[10]

0.1U_0402_10V7K~D
AD39 L28

USB
VCCME[2] VCCSUS3_3[11]
Place C116 Near AD38 pin VCCSUS3_3[12] L26 1
1 2 +1.05V_M_VCCEPW AD41 J28
VCCME[3] VCCSUS3_3[13] +5V_ALW_PCH +3.3V_ALW_PCH

C97
R674 0_0805_5%~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1U_0402_6.3V6K~D
1 1 1 VCCSUS3_3[14] J26
AF43 VCCME[4] VCCSUS3_3[15] H28
2

C116

@ C112

C101
VCCSUS3_3[16] H26

2
AF41 VCCME[5] VCCSUS3_3[17] G28
2 2 2 G26 R313 D16
VCCSUS3_3[18] 100_0402_5%~D
AF42 VCCME[6] VCCSUS3_3[19] F28 RB751S40T1_SOD523-2~D
VCCSUS3_3[20] F26
V39 E28

1
VCCME[7] VCCSUS3_3[21] +PCH_V5REF_SUS

Clock and Miscellaneous

VCCSUS3_3[22] E26 +3.3V_ALW_VCCPUSB

0.1U_0402_10V7K~D
V41 VCCME[8] VCCSUS3_3[23] C28 1

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1U_0402_6.3V6K~D
1 1 1 VCCSUS3_3[24] C26 1
Place C117 Near V39 pin V42 VCCME[9] VCCSUS3_3[25] B27 C342

C99
C117

@ C111

C102
A28 1U_0603_10V6K~D
VCCSUS3_3[26] 2
Y39 VCCME[10] VCCSUS3_3[27] A26
2 2 2 2
Y41 VCCME[11] VCCSUS3_3[28] U23 Follow DG 1.11
Y42 VCCME[12] VCCIO[56] V23 +1.05V_RUN
F24 +PCH_V5REF_SUS +5V_RUN +3.3V_RUN
V5REF_SUS
+VCCRTCEXT V9 DCPRTC

2
C C
1
R311 D15
C103 K49 +PCH_V5REF_RUN 100_0402_5%~D RB751S40T1_SOD523-2~D
0.1U_0402_10V7K~D V5REF +3.3V_RUN
AU24

PCI/GPIO/LPC
2 +1.05V_+1.5V_1.8V_RUN VCCVRM[3]

1
J38 +3.3V_RUN_VCCPPCI 2 1 +PCH_V5REF_RUN
VCC3_3[8] R517 0_0805_5%~D
+1.05V_RUN_DPLLA BB51 VCCADPLLA[1] 1
BB53 VCCADPLLA[2] VCC3_3[9] L38 1
C335
M36 C356 1U_0603_10V6K~D
VCC3_3[10] 0.1U_0402_10V7K~D 2
+1.05V_RUN_DPLLB BD51 VCCADPLLB[1]
+1.05V_RUN 2
BD53 VCCADPLLB[2] VCC3_3[11] N36
+3.3V_RUN
AH23 VCCIO[21] VCC3_3[12] P36
AJ35 VCCIO[22]
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

AH35 VCCIO[23] VCC3_3[13] U35 1

1 1
AF34 C1203
VCCIO[2]
C108

C138

AD13 0.1U_0402_10V7K~D
VCC3_3[14] 2
AH34 VCCIO[3]
2 2
AF32 VCCIO[4]
VCCSATAPLL[1] AK3
+VCCSST +VCCSATAPLL

1U_0402_6.3V6K~D
V12 DCPSST VCCSATAPLL[2] AK1
Place C610 Near AK3 pin
1U_0402_6.3V6K~D

@ C610
ƉŝŶ:ϯϱ͕,ϯϱΘƉŝŶ&ϯϰ͕,ϯϰ͕&ϯϮ
0.1U_0402_10V7K~D

1 1
ŶĞĞĚƚŽƌŽƵƚĞϳϬϬŵŝůƚŚĞŶĐŽŶŶĞĐƚƚŽ
C139

C217

+DCPSUS
0.1U_0402_10V7K~D

Y22 DCPSUS
нϭ͘ϬϱsͺZhE͕ϭϯϴΘϭϯϵŶĞĂƌ'ƉŝŶ͕ 1 AH22
2
2 2 VCCIO[9]
ϭϴϵϯŶĞĂƌ'ƉŝŶĂƚůĞĂƐƚϳϬϬŵŝůĂŶĚ
C677

ƉůĂĐĞĚŝĨĨĞƌĞŶƚƐŝĚĞĨƌŽŵW,
P18 VCCSUS3_3[29] VCCVRM[4] AT20 +1.05V_+1.5V_1.8V_RUN
B 2 B
+3.3V_ALW_PCH U19

SATA
VCCSUS3_3[30] PCI/GPIO/LPC
0.1U_0402_10V7K~D

VCCIO[10] AH19
1 2 +3.3V_ALW_VCCPSUS U20
R690 0_0805_5%~D VCCSUS3_3[31]
1 VCCIO[11] AD20 +1.05V_RUN
U22 VCCSUS3_3[32]
C759

1U_0402_6.3V6K~D
VCCIO[12] AF22 1
2

C611
VCCIO[13] AD19
+3.3V_RUN V15 AF20
VCC3_3[5] VCCIO[14] 2
VCCIO[15] AF19
1 2 +3.3_RUN_VCCPCORE V16 AH20
R691 0_0805_5%~D VCC3_3[6] VCCIO[16]
1
Y16 VCC3_3[7] VCCIO[17] AB19
C760 AB20
0.1U_0402_10V7K~D VCCIO[18] +1.05V_M
VCCIO[19] AB22
+1.05V_RUN_VTT 2 AD22
VCCIO[20]
AT18 V_CPU_IO[1]
+V_CPU_IO +VCCME_13 R559 0_0603_5%~D
0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2 AA34 2 1
CPU

R692 0_0603_5%~D VCCME[13] +VCCME_14 R573 0_0603_5%~D

1 1 1 Y34 2 1
VCCME[14] +VCCME_15 R591 0_0603_5%~D
AU18 Y35 2 1
V_CPU_IO[2] VCCME[15]
C777

C113

C763 AA35 +VCCME_16 R592 1 2 0_0603_5%~D

4.7U_0603_6.3V6K~D +RTC_CELL VCCME[16]
2 2 2
RTC

A12 L30 +VCCSUSHDA 2 1

VCCRTC VCCSUSHDA +3.3V_ALW_PCH
HDA

R650 0_0603_5%~D
0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 1 1
IBEXPEAK-M_FCBGA1071~D
C781

C783

C672
1U_0402_6.3V6K~D
2 2 2
+1.05V_RUN +1.05V_RUN_DPLLA +1.05V_RUN +1.05V_RUN_DPLLB
A L45 L46 A
10UH_LBR2012T100M_20%~D 10UH_LBR2012T100M_20%~D
220U_B2_2.5VM_R35M~D

220U_B2_2.5VM_R35M~D
1U_0402_6.3V6K~D

1 2 1 2
1 1
1U_0402_6.3V6K~D

+
1
+
1
DELL CONFIDENTIAL/PROPRIETARY
@ C105
C1873

C1874

@ C106

2 2 2 2 Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCH (7/8)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
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Date: Wednesday, January 20, 2010
1
Sheet 21 of 57
 5 4 3 2 1

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U73I
AY7 VSS[159] VSS[259] H49
B11 VSS[160] VSS[260] H5
B15 VSS[161] VSS[261] J24
B19 VSS[162] VSS[262] K11
B23 VSS[163] VSS[263] K43
D U73H D
B31 VSS[164] VSS[264] K47
AB16 VSS[0] B35 VSS[165] VSS[265] K7
B39 VSS[166] VSS[266] L14
AA19 VSS[1] VSS[80] AK30 B43 VSS[167] VSS[267] L18
AA20 VSS[2] VSS[81] AK31 B47 VSS[168] VSS[268] L2
AA22 VSS[3] VSS[82] AK32 B7 VSS[169] VSS[269] L22
AM19 VSS[4] VSS[83] AK34 BG12 VSS[170] VSS[270] L32
AA24 VSS[5] VSS[84] AK35 BB12 VSS[171] VSS[271] L36
AA26 VSS[6] VSS[85] AK38 BB16 VSS[172] VSS[272] L40
AA28 VSS[7] VSS[86] AK43 BB20 VSS[173] VSS[273] L52
AA30 VSS[8] VSS[87] AK46 BB24 VSS[174] VSS[274] M12
AA31 VSS[9] VSS[88] AK49 BB30 VSS[175] VSS[275] M16
AA32 VSS[10] VSS[89] AK5 BB34 VSS[176] VSS[276] M20
AB11 VSS[11] VSS[90] AK8 BB38 VSS[177] VSS[277] N38
AB15 VSS[12] VSS[91] AL2 BB42 VSS[178] VSS[278] M34
AB23 VSS[13] VSS[92] AL52 BB49 VSS[179] VSS[279] M38
AB30 VSS[14] VSS[93] AM11 BB5 VSS[180] VSS[280] M42
AB31 VSS[15] VSS[94] BB44 BC10 VSS[181] VSS[281] M46
AB32 VSS[16] VSS[95] AD24 BC14 VSS[182] VSS[282] M49
AB39 VSS[17] VSS[96] AM20 BC18 VSS[183] VSS[283] M5
AB43 VSS[18] VSS[97] AM22 BC2 VSS[184] VSS[284] M8
AB47 VSS[19] VSS[98] AM24 BC22 VSS[185] VSS[285] N24
AB5 VSS[20] VSS[99] AM26 BC32 VSS[186] VSS[286] P11
AB8 VSS[21] VSS[100] AM28 BC36 VSS[187] VSS[287] AD15
AC2 VSS[22] VSS[101] BA42 BC40 VSS[188] VSS[288] P22
AC52 VSS[23] VSS[102] AM30 BC44 VSS[189] VSS[289] P30
AD11 VSS[24] VSS[103] AM31 BC52 VSS[190] VSS[290] P32
AD12 VSS[25] VSS[104] AM32 BH9 VSS[191] VSS[291] P34
AD16 VSS[26] VSS[105] AM34 BD48 VSS[192] VSS[292] P42
AD23 VSS[27] VSS[106] AM35 BD49 VSS[193] VSS[293] P45
AD30 VSS[28] VSS[107] AM38 BD5 VSS[194] VSS[294] P47
AD31 VSS[29] VSS[108] AM39 BE12 VSS[195] VSS[295] R2
C C
AD32 VSS[30] VSS[109] AM42 BE16 VSS[196] VSS[296] R52
AD34 VSS[31] VSS[110] AU20 BE20 VSS[197] VSS[297] T12
AU22 VSS[32] VSS[111] AM46 BE24 VSS[198] VSS[298] T41
AD42 VSS[33] VSS[112] AV22 BE30 VSS[199] VSS[299] T46
AD46 VSS[34] VSS[113] AM49 BE34 VSS[200] VSS[300] T49
AD49 VSS[35] VSS[114] AM7 BE38 VSS[201] VSS[301] T5
AD7 VSS[36] VSS[115] AA50 BE42 VSS[202] VSS[302] T8
AE2 VSS[37] VSS[116] BB10 BE46 VSS[203] VSS[303] U30
AE4 VSS[38] VSS[117] AN32 BE48 VSS[204] VSS[304] U31
AF12 VSS[39] VSS[118] AN50 BE50 VSS[205] VSS[305] U32
Y13 VSS[40] VSS[119] AN52 BE6 VSS[206] VSS[306] U34
AH49 VSS[41] VSS[120] AP12 BE8 VSS[207] VSS[307] P38
AU4 VSS[42] VSS[121] AP42 BF3 VSS[208] VSS[308] V11
AF35 VSS[43] VSS[122] AP46 BF49 VSS[209] VSS[309] P16
AP13 VSS[44] VSS[123] AP49 BF51 VSS[210] VSS[310] V19
AN34 VSS[45] VSS[124] AP5 BG18 VSS[211] VSS[311] V20
AF45 VSS[46] VSS[125] AP8 BG24 VSS[212] VSS[312] V22
AF46 VSS[47] VSS[126] AR2 BG4 VSS[213] VSS[313] V30
AF49 VSS[48] VSS[127] AR52 BG50 VSS[214] VSS[314] V31
AF5 VSS[49] VSS[128] AT11 BH11 VSS[215] VSS[315] V32
AF8 VSS[50] VSS[129] BA12 BH15 VSS[216] VSS[316] V34
AG2 VSS[51] VSS[130] AH48 BH19 VSS[217] VSS[317] V35
AG52 VSS[52] VSS[131] AT32 BH23 VSS[218] VSS[318] V38
AH11 VSS[53] VSS[132] AT36 BH31 VSS[219] VSS[319] V43
AH15 VSS[54] VSS[133] AT41 BH35 VSS[220] VSS[320] V45
AH16 VSS[55] VSS[134] AT47 BH39 VSS[221] VSS[321] V46
AH24 VSS[56] VSS[135] AT7 BH43 VSS[222] VSS[322] V47
AH32 VSS[57] VSS[136] AV12 BH47 VSS[223] VSS[323] V49
AV18 VSS[58] VSS[137] AV16 BH7 VSS[224] VSS[324] V5
AH43 VSS[59] VSS[138] AV20 C12 VSS[225] VSS[325] V7
AH47 VSS[60] VSS[139] AV24 C50 VSS[226] VSS[326] V8
AH7 VSS[61] VSS[140] AV30 D51 VSS[227] VSS[327] W2
B AJ19 AV34 E12 W52 B
VSS[62] VSS[141] VSS[228] VSS[328]
AJ2 VSS[63] VSS[142] AV38 E16 VSS[229] VSS[329] Y11
AJ20 VSS[64] VSS[143] AV42 E20 VSS[230] VSS[330] Y12
AJ22 VSS[65] VSS[144] AV46 E24 VSS[231] VSS[331] Y15
AJ23 VSS[66] VSS[145] AV49 E30 VSS[232] VSS[332] Y19
AJ26 VSS[67] VSS[146] AV5 E34 VSS[233] VSS[333] Y23
AJ28 VSS[68] VSS[147] AV8 E38 VSS[234] VSS[334] Y28
AJ32 VSS[69] VSS[148] AW14 E42 VSS[235] VSS[335] Y30
AJ34 VSS[70] VSS[149] AW18 E46 VSS[236] VSS[336] Y31
AT5 VSS[71] VSS[150] AW2 E48 VSS[237] VSS[337] Y32
AJ4 VSS[72] VSS[151] BF9 E6 VSS[238] VSS[338] Y38
AK12 VSS[73] VSS[152] AW32 E8 VSS[239] VSS[339] Y43
AM41 VSS[74] VSS[153] AW36 F49 VSS[240] VSS[340] Y46
AN19 VSS[75] VSS[154] AW40 F5 VSS[241] VSS[341] P49
AK26 VSS[76] VSS[155] AW52 G10 VSS[242] VSS[342] Y5
AK22 VSS[77] VSS[156] AY11 G14 VSS[243] VSS[343] Y6
AK23 VSS[78] VSS[157] AY43 G18 VSS[244] VSS[344] Y8
AK28 VSS[79] REV1.0 VSS[158] AY47 G2
G22
VSS[245] VSS[345] P24
T43
IBEXPEAK-M_FCBGA1071~D VSS[246] VSS[346]
G32 VSS[247] VSS[347] AD51
G36 VSS[248] VSS[348] AT8
G40 VSS[249] VSS[349] AD47
G44 VSS[250] VSS[350] Y47
G52 VSS[251] VSS[351] AT12
AF39 VSS[252] VSS[352] AM6
H16 VSS[253] VSS[353] AT13
H20 VSS[254] VSS[354] AM5
H30 VSS[255] VSS[355] AK45
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
A A

REV1.0
IBEXPEAK-M_FCBGA1071~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCH (8/8)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com
3 2
Date: Wednesday, January 20, 2010
1
Sheet 22 of 57
 5 4 3 2 1

WWW.AliSaler.Com
+3.3V_M +3.3V_M

1
R142 R1517
10K_0402_5%~D 10K_0402_5%~D

2
JFAN1
FAN1_DET# 1
+FAN1_VOUT 1
2 2
D FAN1_TACH_FB D

RB751S40T1_SOD523-2~D
3 3 G1 5

22U_0805_6.3VAM~D
4 4 G2 6

1
1

D2

C219
MOLEX_53398-0471~D

2
+3.3V_M
1

R134
8.2K_0402_5%~D
2

+1.05V_RUN_VTT THERMATRIP1#
R135
IMVP_IMON <11,49>
1

2.2K_0402_5%~D C 1
1 2 2 1 2 MAX8731_IINP <51>
B C218 R998 4.7K_0402_5%~D
<40> BC_DAT_EMC4002
Q5 E 0.1U_0402_16V4Z~D
3

PMST3904_SOT323-3~D 2
Place under CPU <40> BC_CLK_EMC4002
<8> H_THERMTRIP# Place C223 close to the Q8 as possible
Place C224, close to the Guardian pins as possible

1
R1408

1
2 C 2 0_0402_5%~D
@ C223 2 C224
100P_0402_50V8K~D B 2200P_0402_50V7K~D

2
E Q8
3

1 MMBT3904WT1G_SC70-3~D 1
C Place C221 close to the U3 C
Diode circuit at DP2/DN2 is used
for skin temp sensor (placed Guardian pins as possible.
BC_DAT_EMC4002 10
optimally BC_CLK_EMC4002 SMDATA/BC-LINK_DATA
11 SMCLK/BC-LINK_CLK VIN1 39
1

C 48
between CPU, MCH and MEM). 1 1 VCP1
2 45
C222 @ B C221 VCP2
100P_0402_50V8K~D E Q7 2200P_0402_50V7K~D REM_DIODE1_P 36 44
3

Place C222 close to Q7 as 2 MMBT3904WT1G_SC70-3~D 2 REM_DIODE1_N DP1/VREF_T DP4/DN8

35 DN1/THERM DN4/DP8 43
possible.
REM_DIODE2_P 38 47
REM_DIODE2_N DP2 DP5/DN9
37 DN2 DN5/DP9 46
1 1
1

Q9 Place near DIMM C C228 REM_DIODE3_P 41 1

@ C227
@C227 2200P_0402_50V7K~D REM_DIODE3_N DP3/DN7 DP6/VREF_T2 Assign Diode 6 to GPU VR controller Imon output instead of a thermistor.
2 40 2
100P_0402_50V8K~D B DN3/DP7 DN6/VIN2
Place C227 close 2 E Q9 Place C228 close 2to the +VCC_4002
3

to Q9 MMBT3904WT1G_SC70-3~D
Guardian pins as possible. 2 1 +3.3V_M
+3.3V_M R1218 1 2 22_0402_5%~D 4 R141 10K_0402_5%~D
VDD
ATF_INT#/BC-LINK_IRQ# 12 BC_INT#_EMC4002 <40>
1 21 26 POWER_SW#
+RTC_CELL RTC_PWR3V POWER_SW#
1U_0402_6.3V6K~D

1 ACAVAIL_CLR 27 ACAV_IN <40,50,51>

C229 +3.3V_M 20 PWM 2 1
THERMTRIP_SIO/PWM1/GPIO5 +3.3V_M
C230

0.1U_0402_16V4Z~D 25 R145 10K_0402_5%~D THERM_STP# <45>

2 SYS_SHDN#
1 2 18 1 2 +RTC_CELL
+3.3V_M 2 R146 1 VDD_PWRGD
<40> PCH_PWRGD# 2 10K_0402_5%~D 17 @ R147 47K_0402_1%~D
R148 1K_0402_5%~D 3V_PWROK#
THERMATRIP1# 22
THERMATRIP2# THERMTRIP1#
23 THERMTRIP2#
1

THERMATRIP3# 24 19 2 1
R137 THERMTRIP3# LDO_SHDN# R211 10K_0402_5%~D
8.2K_0402_5%~D VSET 42 34
B VSET LDO_POK B
1

1 2 1 3 33 LDO_SET
+VCC_4002
2

R151 +5V_RUN R150 4.7K_0402_5%~D ADDR_MODE/XEN LDO_SET

THERMATRIP2# C231 953_0402_1%~D

1
0.1U_0402_16V4Z~D 6 32
2 VDDH1 VDDH2
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D

1 5 31 R154
2

+3.3V_RUN VDDH1 VDDH2 1K_0402_5%~D

C220 1 1 9 28
VDDL1 VDDL2
C235

0.1U_0402_16V4Z~D

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

2
2
C234

Rset=953,Tp=88degree 1 1 +FAN1_VOUT 7 29
FAN_OUT1 LDO_OUT/FAN_OUT2
8 FAN_OUT1 LDO_OUT/FAN_OUT2 30
2 2
C236

C237

FAN1_TACH_FB 15 16 FAN1_DET#
2 2 TACH1/GPIO3 TACH2/GPIO4
14 CLK_IN/GPIO2 PWM2/GPIO1 13 PM_EXTTS# <8>

VSS
EC_32KHZ_OUT
+3.3V_M <40> EC_32KHZ_OUT
EMC4002-HZH C_QFN48_7X7~D
49
1

R157 +RTC_CELL C1050

8.2K_0402_5%~D 0.1U_0402_16V4Z~D
1 2
Pull-up Resistor For Remote1 SMBUS
2

5
U68
THERMATRIP3# on ADDR_MODE/XEN mode Address TC7SH08FU_SSOP5~D 1

P
B DOCK_PWR_SW# <40>
POWER_SW# 4 O
1 * <= 4.7K +/- 5% 2N3904 2F(r/w) A 2 POWER_SW_IN# <40>

G
A C243 A
10K 2N3904 2E(r/w)

3
0.1U_0402_16V4Z~D
2
18K Thermistor 2F(r/w)
>= 33K Thermistor 2E(r/w)
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, FAN & Thermal Sensor
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 23 of 57
 5 4 3 2 1

LCD Power
WWW.AliSaler.Com
45
46
JEDP1
MGND1 CONNTST 44
43
LVDS_CBL_DET#
LVDS_CBL_DET# <18> +15V_ALW +LCDVDD +3.3V_ALW

D
MGND2 GND EDP_LANE_N1 @C225
@ C225 2 1 0.1U_0402_10V7K~D

S
47 42 6
MGND3 LANE1_N EDP_LANE_P1 @
@C359
C359 2 EDP_CPU_LANE_N1 <7> +LCDVDD +15V_ALW
48 41 1 0.1U_0402_10V7K~D 4 5
MGND4 LANE1_P EDP_CPU_LANE_P1 <7>

1
49 40 2
MGND5 GND

100_0402_5%~D
50 39 EDP_LANE_N0 C358 2 1 0.1U_0402_10V7K~D 1
MGND6 LANE0_N EDP_CPU_LANE_N0 <7>

100K_0402_5%~D
EDP_LANE_P0 C271 2 1 0.1U_0402_10V7K~D R158 Q12

G
51 38 1
MGND7 LANE0_P EDP_CPU_LANE_P0 <7>

1
DMN66D0LDW-7_SOT363-6~D

R161
52 37 100K_0402_5%~D SI3456BDV-T1-E3_TSOP6~D

3
MGND8 GND

R162
53 36 MB_EDP_AUX C295 1 2 0.1U_0402_10V7K~D C241

2
MGND9 AUX_CH_P EDP_CPU_AUX <7>
54 35 MB_EDP_AUX# C314 1 2 0.1U_0402_10V7K~D 0.1U_0402_16V4Z~D
MGND10 AUX_CH_N EDP_CPU_AUX# <7> 2
55 34

6 2
MGND11 GND

DMN66D0LDW-7_SOT363-6~D

0.1U_0402_25V4Z~D
56 33 +LCDVDD

2
MGND12 LCD_VCC

3
57 MGND13 LCD_VCC 32 +LCDVDD 1

0.1U_0402_16V4Z~D
LCD_VCC 31

Q13A

Q13B

C242
D 1 2 LCD_TST D
TEST 30 LCD_TST <39>
29 R667 1K_0402_5%~D 1 2 5
GND EDP_HPD 2
HPD 28

1
+3.3V_RUN

C244
27 D3

4
BL_GND
BL_GND 26
25 2 3
BL_PWR +BL_PWR_SRC <39> LCD_VCC_TEST_EN

1
BL_PWR 24
23 C246 1 2 0.1U_0603_50V4Z~D @ R165 1 EN_LCDPWR 2
BL_PWR 10K_0402_5%~D
BL_PWR 22 Close to JEDP1.31,32,33 <17,39> ENVDD_PCH 2
BL_GND 21
20 Q15

2
BL_GND BAT54CW_SOT323-3~D PDTC124EU_SC70-3~D
19 1 2

3
BL_PWM BIA_PWM_PCH <17>
18 LCD_SMBCLK L92 BLM18BB221SN1D_2P~D
SMBUS_CLK LCD_SMBCLK <40>
17 LCD_SMBDAT
SMBUS_DATA LCD_SMBDAT <40>
ALS_VCC 16 +3.3V_RUN
15 ALS_INT#
ALS_INT# ALS_INT# <39>
GND 14
CAM_MIC_CBL_DET# 13 CAM_MIC_CBL_DET# <18>
12 USBP11_D+
USB+ USBP11_D-
USB- 11
USB_VCC 10 +CAMERA_VDD Q17
9 DMIC_CLK
MIC_CLK DMIC_CLK <29> FDC654P_SSOT6~D
8 +PWR_SRC
MIC_GND
7 DMIC0 40mil
40mil

D
MIC_DAT DMIC0 <29>

S
6 6 +BL_PWR_SRC
GND BREATH_BLUE_LED
5 BREATH_BLUE_LED <43> 4 5
PWR_LED BATT_YELLOW_LED
BATT2_LED 4 BATT_YELLOW_LED <43> 2

1000P_0402_50V7K~D
3 BATT_BLUE_LED 1
BATT1_LED BATT_BLUE_LED <43>

G
SD05.TCT_SOD323-2~D
SD05.TCT_SOD323-2~D
GND 2 1

1
1 1

3
CONNTST

D49
R167 C247

C248
D48
100K_0402_5%~D 0.1U_0603_50V4Z~D
C I-PEX_20505-044E-011G @ @ L59 2 C
@ DLW21SN121SQ2L_4P~D 2

2
USBP11+ 1 1 USBP11_D+
<18> USBP11+ 2 2 PWR_SRC_ON

USBP11- USBP11_D- Q18

<18> USBP11- 4 4 3 3
SSM3K7002FU_SC70-3~D

S
1 2 1 2 1 3
R457 0_0402_5%~D R168 47K_0402_5%~D

1 2

G
2
R513 0_0402_5%~D

EN_INVPWR
FDC654P: P CHANNAL
<40> EN_INVPWR
@ U50
@U50
1 GND VCC 4 +CAMERA_VDD Panel backlight power control by EC
2 1 +LCDVDD
R180 0_0402_5%~D USBP11_D- 2 3 USBP11_D+
LCD_SMBCLK IO1 IO2
2 1 2 1 +3.3V_RUN
R548 2.2K_0402_5%~D @
@R181
R181 0_0402_5%~D PRTR5V0U2X_SOT143-4~D
LCD_SMBDAT 2 1
R549 2.2K_0402_5%~D

@ R995
@R995
B 0_0603_5%~D B
1 2 +1.05V_RUN_VTT

For Webcam
Q132

1
+CAMERA_VDD
R997 PMV45EN_SOT23-3~D R1470
0_0603_5%~D 7.5K_0402_5%~D
S

2 1 +CAMERA_VDD_R 3 1 +3.3V_RUN

2
0.1U_0402_16V4Z~D

10U_1206_16V4Z~D

EDP_HPD#
EDP_HPD# <7>
Q3
G

1 1
2

BSS138_SOT23~D

1
D
C249

C250

EDP_HPD 2
2 2 G
2

3
1 R1028
110K_0402_1%~D
C1043
0.1U_0402_16V4Z~D
1

2
+15V_ALW
1

R169
100K_0402_5%~D
2

A Webcam PWR CTRL A

1

D
SSM3K7002FU_SC70-3~D

CCD_OFF 2 1
<39> CCD_OFF
Q133

G
S C1044
DELL CONFIDENTIAL/PROPRIETARY
3

0.1U_0402_25V4Z~D
2

Compal Electronics, Inc.

Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
eDP & CAM Conn
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
LA-5471P
5 4
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Date: Wednesday, January 20, 2010
1
Sheet 24 of 57
 5 4 3 2 1

WWW.AliSaler.Com

D D

+3.3V_RUN
AUX/DDC SW for DPC to E-DOCK 2 1

C337
0.1U_0402_16V4Z~D

C272 U86
0.1U_0402_10V7K~D 1 14
DPC_AUX_C BE0 VCC
<17> DPC_PCH_DOCK_AUX 2 1 2 13
C A0 BE3 +3.3V_RUN C
DPC_DOCK_AUX 3 12
<38> DPC_DOCK_AUX B0 A3 PCH_DDPC_CTRLCLK <17>
4 11
DPC_AUX#_C BE1 B3 PCH_DDPC_CTRLCLK
<17> DPC_PCH_DOCK_AUX# 2 1 5 10 1 2
C274 0.1U_0402_10V7K~D A1 BE2 R885 2.2K_0402_5%~D
DPC_DOCK_AUX# 6 9 1 2 PCH_DDPC_CTRLDATA
<38> DPC_DOCK_AUX# B1 A2 PCH_DDPC_CTRLDATA <17>
R886 2.2K_0402_5%~D
7 GND B2 8

PI3C3125LEX_TSSOP14~D

+5V_RUN

2 1 1 R996
2 DPC_CA_DET
1M_0402_5%~D
C277

1
5
0.1U_0402_16V4Z~D

NC
DPC_CA_DET P DPC_CA_DET#
<38> DPC_CA_DET 2 A Y 4
G

U8
NC7SZ04P5X_NL_SC70-5~D
3

B B

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DPC DPD SW for DOCK
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
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Date: Wednesday, January 20, 2010
1
Sheet 25 of 57
 2 1

WWW.AliSaler.Com

Display port Connector

+3.3V_RUN

2
0_1206_5%~D
F1 @

R184
1.5A_6V_1206L150PR~D

1
+VDISPLAY_VCC

DPB SW for MB & DOCK

0.1U_0402_10V7K~D

10U_0805_10V4Z~D
B B
1 1

C1075
C275
U9
2 2
<17> DPB_PCH_LANE_P0
C316 2 1 0.1U_0402_10V7K~D DPB_LANE_P0_C 55 IN_P1 OUT1_1P 33 DPB_MB_LANE_P0 C278 2 1 0.1U_0402_10V7K~D MBDP_LANE_P0
<17> DPB_PCH_LANE_N0
C312 2 1 0.1U_0402_10V7K~D DPB_LANE_N0_C 56 32 DPB_MB_LANE_N0 C279 2 1 0.1U_0402_10V7K~D MBDP_LANE_N0
IN_N1 OUT1_1N

<17> DPB_PCH_LANE_P1
C309 2 1 0.1U_0402_10V7K~D DPB_LANE_P1_C 1 IN_P2 OUT1_2P 30 DPB_MB_LANE_P1 C280 2 1 0.1U_0402_10V7K~D MBDP_LANE_P1
<17> DPB_PCH_LANE_N1
C301 2 1 0.1U_0402_10V7K~D DPB_LANE_N1_C 2 29 DPB_MB_LANE_N1 C281 2 1 0.1U_0402_10V7K~D MBDP_LANE_N1
IN_N2 OUT1_2N

<17> DPB_PCH_LANE_P2
C315 2 1 0.1U_0402_10V7K~D DPB_LANE_P2_C 4 IN_P3 OUT1_3P 25 DPB_MB_LANE_P2 C282 2 1 0.1U_0402_10V7K~D MBDP_LANE_P2 JDP1
<17> DPB_PCH_LANE_N2
C318 2 1 0.1U_0402_10V7K~D DPB_LANE_N2_C 5 24 DPB_MB_LANE_N2 C283 2 1 0.1U_0402_10V7K~D MBDP_LANE_N2 20
IN_N3 OUT1_3N DP_PWR
19 RTN
<17> DPB_PCH_LANE_P3
C338 2 1 0.1U_0402_10V7K~D DPB_LANE_P3_C 6 IN_P4 OUT1_4P 22 DPB_MB_LANE_P3 C284 2 1 0.1U_0402_10V7K~D MBDP_LANE_P3 DPB_MB_HPD 18 HP_DET
<17> DPB_PCH_LANE_N3
C322 2 1 0.1U_0402_10V7K~D DPB_LANE_N3_C 7 21 DPB_MB_LANE_N3 C285 2 1 0.1U_0402_10V7K~D MBDP_LANE_N3 DPB_MB_AUX# 17
IN_N4 OUT1_4N AUX_CH-
16 GND
DPB_MB_AUX 15 AUX_CH+
<17> DPB_PCH_AUX
C90 2 1 0.1U_0402_10V7K~D DPB_AUX_C 8 19 DPB_MB_AUX DPB_MB_P14 14
AUXP_S SCL1 GND
<17> DPB_PCH_AUX#
C91 2 1 0.1U_0402_10V7K~D DPB_AUX#_C 9 18 DPB_MB_AUX# DPB_MB_CA_DET 13
AUXN_S SDA1 MBDP_LANE_N3 CA_DET
12 LAN3-
11 LAN3_shield GND 21
2 1 DPB_AUX_C DPB_MB_HPD 17 MBDP_LANE_P3 10 22
C1893 100P_0402_50V8J~D DPB_DOCK_HPD HPD1 DPB_DOCK_P0 C286 MBDP_LANE_N2 LAN3+ GND
36 49 2 1 0.1U_0402_10V7K~D 9 23
<38> DPB_DOCK_HPD HPD2 OUT2_1P DPB_DOCK_N0 C287 DPB_DOCK_LANE_P0 <38> LAN2- GND
48 2 1 0.1U_0402_10V7K~D 8 24
DPB_AUX#_C OUT2_1N DPB_DOCK_LANE_N0 <38> MBDP_LANE_P2 LAN2_shield GND
2 1 7
C1894 100P_0402_50V8J~D DPB_MB_CA_DET DPB_DOCK_P1 C288 MBDP_LANE_N1 LAN2+
26 46 2 1 0.1U_0402_10V7K~D 6
DPB_DOCK_CA_DET CAD1 OUT2_2P DPB_DOCK_N1 C289 DPB_DOCK_LANE_P1 <38> LAN1-
<38> DPB_DOCK_CA_DET 27 CAD2 OUT2_2N 45 2 1 0.1U_0402_10V7K~D DPB_DOCK_LANE_N1 <38> 5 LAN1_shield
MBDP_LANE_P1 4
DPB_DOCK_P2 C290 MBDP_LANE_N0 LAN1+
43 2 1 0.1U_0402_10V7K~D 3
OUT2_3P DPB_DOCK_N2 C291 DPB_DOCK_LANE_P2 <38> LAN0-
ƉůĂĐĞĐůŽƐĞƚŽhϵƉŝŶϴ͕ϵ <17> PCH_SDVO_CTRLDATA 11 SDA_S OUT2_3N 42 2 1 0.1U_0402_10V7K~D DPB_DOCK_LANE_N2 <38> 2 LAN0_shield
10 MBDP_LANE_P0 1
<17> PCH_SDVO_CTRLCLK SCL_S LAN0+
41 DPB_DOCK_P3 C292 2 1 0.1U_0402_10V7K~D
DP_PRIORITY OUT2_4P DPB_DOCK_N3 C293 DPB_DOCK_LANE_P3 <38>
<39> DP_PRIORITY 35 HPDSEL OUT2_4N 40 2 1 0.1U_0402_10V7K~D MOLEX_105088-0001
DPB_DOCK_LANE_N3 <38>
2
100K_0402_5%~D

38 DPB_DOCK_AUX
@PAD~D T30 SCL2 DPB_DOCK_AUX# DPB_DOCK_AUX <38>
14 EQ_S0/SDA_CTL SDA2 37
DPB_DOCK_AUX# <38>
R190

@PAD~D T27 15 OEB/SCL_CNTL

@PAD~D T28 34 12
1

@PAD~D T29 EQ_S1/I2C_Address HPD_S DPB_PCH_HPD <17>

16 12C_CTL_EN

CAD_S 28 T40 PAD~D @

@PAD~D T37 54 CEC_S P1_OC1
P1_OC1 13
@PAD~D T38 52 23 P1_OC0
@PAD~D T39 CEC1 P1_OC0 +3.3V_RUN
53 CEC2
50 P2_OC1
P2_OC1 P2_OC0
+3.3V_RUN 44 VDD4 P2_OC0 47
+3.3V_RUN 31 1 2 PCH_SDVO_CTRLCLK
VDD3 R888 2.2K_0402_5%~D
20 VDD2
3 51 1 2 PCH_SDVO_CTRLDATA
VDD1 Vbias R889 2.2K_0402_5%~D
0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

39 1 2 DPB_MB_AUX#
GND R278 100K_0402_5%~D
GPAD 57
1 1 1 1
C92

C104

C98

C107

PI3VDP8200ZBEX_TQFN56_8X8~D
2 2 2 2 DPB_PCH_HPD
1 2
+3.3V_RUN R191 110K_0402_1%~D
1 2 DPB_DOCK_CA_DET
R1098 1M_0402_5%~D
A P1_OC1 A
1 2 1 2 DPB_MB_AUX
@ R1537 4.7K_0402_5%~D R1024 100K_0402_5%~D
P1_OC0 1 2 1 2 DPB_MB_CA_DET
@ R1538 4.7K_0402_5%~D R185 1M_0402_5%~D
P2_OC1 1 2 1 2 DPB_MB_HPD
@ R1539 4.7K_0402_5%~D R186 110K_0402_1%~D
P2_OC0 1 2 1 2 DPB_MB_P14
R1516 4.7K_0402_5%~D R797 5.1M_0603_1%~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Display port
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
2
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Date: Wednesday, January 20, 2010 Sheet 26 of 57
 2 1

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DA204U_SOT323-3~D

DA204U_SOT323-3~D

DA204U_SOT323-3~D
+5V_RUN

2
3
@ @ @

D5

D6

D7
+3.3V_RUN

NC
D8
BAT1000-7-F_SOT23-3~D

1
+5V_RUN_CRT
RED_CRT 1 2
L61
BLM18BB050SN1D_0603~D
GREEN_CRT 1 2
L62 +CRT_VCC
BLM18BB050SN1D_0603~D

1U_0402_6.3V6K~D
5A_125V_R451005.MRL~D
BLUE_CRT 1 2
L63

2
0_1206_5%~D
BLM18BB050SN1D_0603~D 1

2
4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

@ F2
150_0402_1%~D

150_0402_1%~D

150_0402_1%~D
1 1 1

R171

C254
4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D
1 1 1

C390

C518

C996
R172

R173

R174
2

C251

C252

C253

1
2 2 2

1
2 2 2 JCRT1
6
11
R 1
+5V_RUN_SYNC 7
12
G 2
B 8 16 B

1K_0402_5%~D

1K_0402_5%~D
2.2K_0402_5%~D

2.2K_0402_5%~D
JVGA_HS 13 17

1
B 3

@R175
@

@R176
@
R794

R793
+CRT_VCC 9

R175

R176
JVGA_VS 14
M_ID2# 4
10

2
15
5
DAT_DDC2_CRT
CLK_DDC2_CRT SUYIN_070546FR015H358ZR~D

1
L11 C258
BLM18AG121SN1D_0603~D
HSYNC_CRT 2
1 2 HSYNC_L2 1 2 0.1U_0402_16V4Z~D
R177 0_0402_5%~D

VSYNC_CRT 1 2 VSYNC_L2 1 2
R178 0_0402_5%~D L12
BLM18AG121SN1D_0603~D

VGA SW for MB/DOCK

+3.3V_RUN
U131

22P_0402_50V8J~D

22P_0402_50V8J~D
PCH_CRT_VSYNC 1 4 1 1
<17> PCH_CRT_VSYNC A0 VDD

@ C267

@ C268
PCH_CRT_HSYNC 2 16
<17> PCH_CRT_HSYNC A1 VDD
PCH_CRT_RED 5 23
<17> PCH_CRT_RED PCH_CRT_GRN A2 VDD
<17> PCH_CRT_GRN 6 A3 VDD 29
PCH_CRT_BLU 2 2
<17> PCH_CRT_BLU 7 A4 VDD 32

CRT_SWITCH 8 27 VSYNC_BUF
SEL1 0B1 HSYNC_BUF
1B1 25
22 RED_CRT
PCH_CRT_DDC_DAT 2B1 GREEN_CRT
<17> PCH_CRT_DDC_DAT 9 A5 3B1 20
PCH_CRT_DDC_CLK 10 18 BLUE_CRT
<17> PCH_CRT_DDC_CLK A6 4B1
12 DAT_DDC2_CRT
CRT_SWITCH 5B1 CLK_DDC2_CRT
<39> CRT_SWITCH 30 SEL2 6B1 14
+5V_RUN

26 VSYNC_DOCK
0B2 VSYNC_DOCK <38>

2
24 HSYNC_DOCK
1B2 RED_DOCK HSYNC_DOCK <38>
3 GND 2B2 21
GREEN_DOCK RED_DOCK <38> D9
11 GND 3B2 19 GREEN_DOCK <38>
28 17 BLUE_DOCK SDM10U45-7_SOD523-2~D
GND 4B2 DAT_DDC2_DOCK BLUE_DOCK <38>
31 13

1
GND 5B2 CLK_DDC2_DOCK DAT_DDC2_DOCK <38>
33 GPAD 6B2 15 CLK_DDC2_DOCK <38>
1 2 +5V_RUN_SYNC 1 2
PI3V712-AZLEX_TQFN32_6X3~D R179 1K_0402_5%~D
C269

1
5
+3.3V_RUN 0.1U_0402_16V4Z~D

OE#
P
HSYNC_BUF 2 4 HSYNC_CRT
A Y

G
10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

U5
74AHCT1G125GW_SOT353-5~D

3
A A
SEL CRT 1 1 1 1 1 1
1 2
C259

C260

C261

C262

C263

C264

0 MB (A=B1)

1
5
C270
2 2 2 2 2 2 0.1U_0402_16V4Z~D
1 APR/SPR(A=B2)

OE#
P
VSYNC_BUF 2 4 VSYNC_CRT
A Y

G
U6
74AHCT1G125GW_SOT353-5~D

3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, CRT/Video switch
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
2
WWW.AliSaler.Com 1
Date: Wednesday, January 20, 2010 Sheet 27 of 57
 5 4 3 2 1

WWW.AliSaler.Com
+5VMOD Source
For ODD +15V_ALW +5V_ALW

JSATA1

1
1 +3.3V_ALW2
GND
+5V_MOD
<15> SATA_ODD_PTX_DRX_P1_C
C311 2 1 0.01U_0402_16V7K~D SATA_ODD_PTX_DRX_P1 2 R316
RX+
<15> SATA_ODD_PTX_DRX_N1_C
C310 2 1 0.01U_0402_16V7K~D SATA_ODD_PTX_DRX_N1 3 100K_0402_5%~D
RX-

1
2
5
6
4 GND
1000P_0402_50V7K~D

0.1U_0402_16V4Z~D
C374 2 1 0.01U_0402_16V7K~D SATA_ODD_PRX_DTX_N1 5 R317 D Q29

2
<15> SATA_ODD_PRX_DTX_N1_C TX- 100K_0402_5%~D G SI3456BDV-T1-E3_TSOP6~D
1 1 6 TX+
C375 2 1 0.01U_0402_16V7K~D SATA_ODD_PRX_DTX_P1 7 2 MOD_EN 3
<15> SATA_ODD_PRX_DTX_P1_C GND
C376

C377
D S D

3
DMN66D0LDW-7_SOT363-6~D
ODD_DET# 8 +5V_MOD +5V_RUN

4
2 2 <40> ODD_DET# DP

0.1U_0603_50V4Z~D
+5V_MOD 9 PJP15
+5V

Q31B
10 1 2
+5V

10U_0805_10V4Z~D

100K_0402_5%~D
+3.3V_RUN 1 2 11 MD 5 1

1
DMN66D0LDW-7_SOT363-6~D
R1239 10K_0402_5%~D 12 14 1 @ PAD-OPEN 4x4m
GND GND1

C378
13 15

4
GND GND2

C379

R318
2

Q31A
TYCO_2-1759838-8
2 2

2
<39> MODC_EN
Pleace near ODD CONN

1
Main SATA +5V Default R319
100K_0402_5%~D

+3.3V_RUN

2
@R1308
@ R1308

R1305
0.01U_0402_16V7K~D

0.1U_0402_16V4Z~D
HDD Repeater

2
1 1

C1383

C1384

0_0402_5%~D

0_0402_5%~D
2 2

1
U96
7 EN VCC 6
PSATA_PTX_DRX_P0_C 2 1 PSATA_PTX_DRX_P0 10
<15> PSATA_PTX_DRX_P0_C VCC
C323 0.01U_0402_16V7K~D 1 16
PSATA_PTX_DRX_N0_C RX_1P VCC
<15> PSATA_PTX_DRX_N0_C 2 1 PSATA_PTX_DRX_N0 2 20
C324 0.01U_0402_16V7K~D RX_1N VCC
C PSATA_PRX_DTX_P0_C C
2 1 PSATA_PRX_DTX_P0 5 9
<15> PSATA_PRX_DTX_P0_C C1382 0.01U_0402_16V7K~D TX_2P PE1
4 TX_2N PE2 8
PSATA_PRX_DTX_N0_C 2 1 PSATA_PRX_DTX_N0
<15> PSATA_PRX_DTX_N0_C C1385 0.01U_0402_16V7K~D PSATA_PTX_DRX_P0_RP
3 GND TX_1P 15
13 14 PSATA_PTX_DRX_N0_RP
GND TX_1N
17
+3.3V_RUN
Free Fall Sensor 18
GND
GND RX_2N 12 PSATA_PRX_DTX_N0_RP
PSATA_PRX_DTX_P0_RP
HDD PWR
19 GND RX_2P 11
21 +5V_ALW
PAD +15V_ALW
10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

SN75LVCP412ARTJR_QFN20_4X4~D

1
1
0_0402_5%~D
1 1 R1304 +3.3V_ALW2

1
@ R1303
U139 0_0402_5%~D
C435

C436

DE351DLTR R320

1
2
5
6
100K_0402_5%~D

2
2

1
2 2 1 D Q32
VDD_IO G SI3456BDV-T1-E3_TSOP6~D
6 2

2
VDD GND R321 HDD_EN_5V
4 3
HDD_FALL_INT1 GND 100K_0402_5%~D S
8 INT 1 GND 5
<18,40> HDD_FALL_INT1 FFS_INT2 +5V_HDD +5V_RUN
9 10

4
<19> FFS_INT2 INT 2 GND

3
DMN66D0LDW-7_SOT363-6~D
PJP16

0.1U_0603_50V4Z~D
12 SDO 1 2

Q34B

10U_0805_10V4Z~D
1 2 HDD_SMBDAT_R 13
3,14,15,16> MEM_SMBDATA SDA / SDI / SDO

100K_0402_5%~D
R1547 1 2 0_0402_5%~D HDD_SMBCLK_R 14 5 1 1 @ PAD-OPEN 4x4m
3,14,15,16> MEM_SMBCLK SCL / SPC

1
DMN66D0LDW-7_SOT363-6~D
R1548 0_0402_5%~D 3 +3.3V_RUN Open
RSVD

C382

C383

R322
1 2 7 11

4
<40> HDD_SMBDAT CS RSVD
@ R1549
@R1549 1 2 0_0402_5%~D
<40> HDD_SMBCLK 2 2

Q34A
@R1550
@ R1550 0_0402_5%~D
DE351DLTR8_LGA14_3X5~D 2

2
<39> HDDC_EN
+3.3V_RUN

1
1
B B

1 2 HDD_SMBDAT_R
For HDD R323
100K_0402_5%~D +5V_HDD Source
R445 2.2K_0402_5%~D JSATA2
1 2 HDD_SMBCLK_R 1

2
PSATA_PTX_DRX_P0_RP C308 2 GND
R463 2.2K_0402_5%~D 1 0.01U_0402_16V7K~D SATA_PTX_DRX_P0 2 +3.3V_ALW
PSATA_PTX_DRX_N0_RP C307 2 RX+
1 0.01U_0402_16V7K~D SATA_PTX_DRX_N0 3 RX-
4 GND
PSATA_PRX_DTX_N0_RP 2 1 SATA_PRX_DTX_N0 5
PSATA_PRX_DTX_P0_RP C380 2 TX-
1 0.01U_0402_16V7K~D SATA_PRX_DTX_P0 6 TX+
C381 0.01U_0402_16V7K~D 7 GND

1
2
5
6
+3.3V_HDD 8 3.3V
9 D 9@ Q117
3.3V G SI3456BDV-T1-E3_TSOP6~D
10 3.3V
11 GND 3
HDD_DET# 12 S
<15> HDD_DET# GND +3.3V_HDD +3.3V_RUN
13

4
GND PJP17
+5V_HDD 14 5V
15 1 2
5V
16 5V

10U_0805_10V4Z~D
9@ C79

100K_0402_5%~D
9@ R477
17 1 @ PAD-OPEN 4x4m
GND

1
FFS_INT2_Q 18 23 Open
Reserved GND1
19 GND GND2 24
20 12V
21 2
12V
22

2
+5V_HDD +3.3V_HDD +3.3V_RUN +5V_HDD 12V
TYCO_1775707-3_RV
1000P_0402_50V7K~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_10V7K~D

Main SATA +5V Default +3.3V_HDD Source

9@ C387

9@ C388

A @R329
@ R329 A
1 1 1 1
100K_0402_5%~D
C384

C385

2
G

2 2 2 2
FFS_INT2 3 1 1 2 FFS_INT2_Q DELL CONFIDENTIAL/PROPRIETARY
S

Q118 D10
Compal Electronics, Inc.
SSM3K7002FU_SC70-3~D SDM10U45-7_SOD523-2~D Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT ODD/HDD CONNECTOR
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
Pleace near HDD CONN PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 28 of 57
 2 1

WWW.AliSaler.Com Speaker Connector

15 mils trace JSPK1 +3.3V_RUN +3.3V_RUN
1 1
INT_SPK_R+ 2 2

1
INT_SPK_R- 3 Close pin 24 Close pin 18 Close pin 25
INT_SPK_L+ 3 R365
4 4 2 1

0.1U_0402_10V7K~D

1U_0603_10V6K~D

10U_0805_10V6K~D

0.1U_0402_10V7K~D

1U_0603_10V6K~D

0.1U_0402_10V7K~D

1U_0603_10V6K~D
INT_SPK_L- 5 100K_0402_5%~D L70
5 47UH_CBMF1608T470K_10%~D
<19> SPEAKER_DET# 6 6
1 1 1 1 1 1 1

2
7 GND

C429

C458

C428

C398

C397

C431

C463
8 PCH_AZ_CODEC_RST# 1 2 RST#
GND @ R50 U15
2 2 2 2 2 2 2

0.1U_0402_10V7K~D
100P_0402_50V8J~D

100P_0402_50V8J~D

100P_0402_50V8J~D

100P_0402_50V8J~D
TYCO_1775765-6~D 33_0402_5%~D 1
ĐŽŶŶĞĐƚŽƌůŝƐƚ͗ϭϳϳϱϳϲϱͲϲ +3.3V_RUN_I2S_VDD 25 5 I2S_DO
AVDD DOUT

C433
27 AUD_DOCK_MIC_IN_L_R
LEFT_LO AUD_DOCK_MIC_IN_R_R
1 1 1 1 18 DRVDD RIGHT_LO 29
2

@ C423

@ C424

@ C425

@ C426
Place close to JSPK1 24 DRVDD
@ D1 L18 +1.8V_RUN 32 20
2 2 2 2 INT_SPK_R+ INT_SPK_L+ BLM18EG601SN1D_2P~D DVDD NC
1 V I/O V I/O 6 NC 19
+3.3V_RUN 1 2 +3.3V_RUN_IOVDD 7 22
IOVDD NC
2 Ground V BUS 5 +5V_RUN NC 23

0.1U_0402_10V7K~D

1U_0603_10V6K~D 4700P_0402_25V7K~D
I2S_BCLK 2 28
INT_SPK_R- INT_SPK_L- I2S_DI# BCLK NC
3 V I/O V I/O 4 1 1 4 DIN NC 11
XTALI_12MHZ 1 13
MCLK NC

C392

C393
IP4223CZ6_SO6~D 14
AUD_DOCK_HP_L_C NC
10 LINEL NC 16
+5V_RUN 2 2 AUD_DOCK_HP_R_C 12 LINER NC 15
L77 30
+3.3V_RUN +3.3V_RUN +CODEC_DVDD_CORE BLM21PG600SN1D_0805~D RST# NC
1 1 31 RESET#

@ C1066

4700P_0402_25V7K~D
@ C1067
+VDDA_AVDD 1 2 17
AVSS1

0.1U_0402_10V7K~D

1U_0603_10V6K~D
10U_0805_10V6K~D
DAI_GPU_R3P_SMBCLK 8 26
SCL AVSS2
1U_0603_10V6K~D

B 1 2 2 B
0.1U_0402_10V7K~D

0.1U_0402_10V7K~D L3 DAI_GPU_R3P_SMBDAT 9
1 1 SDA DRVSS 21

C403
1 1 1 +VDDA_PVDD 1 2
U16

C399

C454
BLM21PG600SN1D_0805~D I2S_LRCLK 3 6
2 WCLK DVSS
C405

C402

C404

2 2

0.1U_0402_10V7K~D

1U_0603_10V6K~D

10U_0805_10V6K~D
1 DVDD_CORE AVDD 27 GPAD 33
2 2 2
AVDD 38 1 1 1
9 TLV320AIC3004IRHBR_QFN32_5X5~D
DVDD

C401

C456

C400
PVDD 39
3 DVDD_IO PVDD 45
2 2 2 +3.3V_RUN
DAI_GPU_R3P_SMBCLK <40>
13 AUD_SENSE_A
PCH_AZ_CODEC_BITCLK SENSE_A AUD_SENSE_B
<15> PCH_AZ_CODEC_BITCLK 6 HDA_BITCLK SENSE_B 14 DAI_GPU_R3P_SMBDAT <40>

0.1U_0402_10V7K~D
2 PCH_AC_SDIN0_R 1 8 R18
<15> PCH_AZ_CODEC_SDIN0 HDA_SDI
33_0402_5%~D R332 28 0_0402_5%~D X4 Close pin 32
HP0_PORT_A_L AUD_EXT_MIC_L <37>
PCH_AZ_CODEC_SDOUT 5 29 1 2 4 1
<15> PCH_AZ_CODEC_SDOUT HDA_SDO HP0_PORT_A_R AUD_EXT_MIC_R <37> VDD ST/OE +1.8V_RUN
VREFOUT_A_or_F 23 +VREFOUT 1

C432
10 XTALI_12MHZ 3 2
<15> PCH_AZ_CODEC_SYNC HDA_SYNC OUT GND
HP1_PORT_B_L 31 AUD_HP_OUT_L <37>

0.1U_0402_10V7K~D

1U_0603_10V6K~D
PCH_AZ_CODEC_RST# 11 32 12MHZ_15PF_SIT8102AC3333E12T~D
<15> PCH_AZ_CODEC_RST# HDA_RST# HP1_PORT_B_R AUD_HP_OUT_R <37> 2
1 1
PORT_C_L 19

C430

C459
L4 20
BLM18BB221SN1D_2P~D PORT_C_R
VREFOUT_C 24
DMIC_CLK_R 2 2
<24> DMIC_CLK 1 2 2 DMIC_CLK/GPIO1
4 40 INT_SPK_L+
<24> DMIC0 DMIC0/GPIO2 SPKR_PORT_D_L+
150P_0402_50V8J~D

150P_0402_50V8J~D

41 INT_SPK_L-
SPKR_PORT_D_L- C1895 1
1 1 46 DMIC1/GPIO0/SPDIF_OUT_1 2 1000P_0402_50V7K~D
@ @ R1296 43 INT_SPK_R- C1896 1 2 1000P_0402_50V7K~D
SPKR_PORT_D_R-
C676

C679

10K_0402_5%~D 48 44 INT_SPK_R+
SPDIF_OUT_0 SPKR_PORT_D_R+ R340 2K_0402_1%~D C410 1U_0603_10V6K~D @ R1090 2
+3.3V_RUN 1 2 1 10M_0402_5%~D
2 2 AUD_DOCK_HP_OUT_L AUD_DOCK_HP_L_R 1
<39> AUD_NB_MUTE 47 EAPD PORT_E_L 15 1 2 2 AUD_DOCK_HP_L_C
16 AUD_DOCK_HP_OUT_R 1 2 AUD_DOCK_HP_R_R 1 2 AUD_DOCK_HP_R_C
PORT_E_R R342 2K_0402_1%~D C411 1U_0603_10V6K~D @ R1089 2 1 10M_0402_5%~D
17 AUD_DOCK_MIC_IN_L
PORT_F_L AUD_DOCK_MIC_IN_R C1897 1
35 CAP- PORT_F_R 18 2 1000P_0402_50V7K~D
2 1000P_0402_50V7K~D C1898 1
1 12 C408 1U_0603_10V6K~D R1091 2K_0402_1%~D
PC_BEEP DOCK_MIC_IN_L_C AUD_DOCK_MIC_IN_L_R
36 CAP+ 1 2 1 2
C453 25 1 2 DOCK_MIC_IN_R_C 1 2 AUD_DOCK_MIC_IN_R_R
4.7U_0603_6.3V6M~D MONO_OUT C409 1U_0603_10V6K~D R1092 2K_0402_1%~D
2 AUD_PC_BEEP
7 DVSS 2 1 2 1 SPKR <15>
C389 0.1U_0402_16V4Z~D R327 510K_0402_5%~D
33 22 CAP2
AVSS CAP2
30 AVSS 2 1 2 1 BEEP <40>
26 21 VREFFILT C394 0.1U_0402_16V4Z~D R828 510K_0402_5%~D
AVSS VREFFILT
42 PVSS V- 34
Close to U16 pin5 Close to U16 pin6
49 DAP VREG 37 Resistor SENSE_A SENSE_B
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK
92HD81B1B5NLGXUAX8_QFN48_7X7~D 39.2K PORT A (HP0) PORT E
1

@ R344 @ R343 +3.3V_RUN +3.3V_RUN

10U_0805_10V6K~D

1U_0603_10V6K~D
4.7U_0603_6.3V6M~D
4.7U_0603_6.3V6M~D

47_0402_5%~D 10_0402_5%~D 1 1 1 1 20K PORT B (HP1) PORT F

C455

C414

C415

0.1U_0402_16V7K~D
C457
2

1 1 2 2 2 2
10K PORT C DMIC0

2
DA204U_SOT323-3~D

DA204U_SOT323-3~D

DA204U_SOT323-3~D

DA204U_SOT323-3~D
@C416
@C416 @ C412 2

C413
0.1U_0402_10V7K~D 10P_0402_50V8J~D 5.11K SPDIFOUT0 SPDIFOUT1 (DMIC0) @ @ @ @
2 2

D17

D18

D19

D55
2.49K Pull-up to AVDD 1 U17
16

1
VCC
I2S_BCLK 2 3
+VDDA_AVDD 1A 1Y# DAI_BCLK# <38>
A A
Place closely to Pin 34 I2S_LRCLK 4 5
R346 +VDDA_AVDD 2A 2Y# DAI_LRCK# <38>
Place closely to Pin 13. 2.49K_0402_1%~D R347 I2S_DO 6 3A 3Y# 7 DAI_DO# <38>
AUD_SENSE_A 2 1 2.49K_0402_1%~D
AUD_SENSE_B 2 1 XTALI_12MHZ 10 9
+3.3V_RUN 4A 4Y# DAI_12MHZ# <38>
1000P_0402_50V7K~D

1000P_0402_50V7K~D

+3.3V_RUN
39.2K_0402_1%~D

20K_0402_1%~D

1 1 12 5A 5Y# 11
1

39.2K_0402_1%~D

20K_0402_1%~D

+3.3V_RUN
1

+3.3V_RUN
R348

R349

C417

C420

14 13 I2S_DI#
+3.3V_RUN 6A 6Y#
R352

R351

R350
1

100K_0402_5%~D 2 2
<39> EN_I2S_NB_CODEC# 1 OE1#
1

2
R355 2 1 15 8
2

OE2# GND
1

100K_0402_5%~D R353 R345 D20

2

100K_0402_5%~D R354 1K_0402_5%~D @ DA204U_SOT323-3~D

6

100K_0402_5%~D CD74HC366M96_SO16~D
2

1
<37> AUD_MIC_SWITCH 2 5 AUD_HP_NB_SENSE <37,39>
Q38A Q38B DAI_DI <38>
<39> DOCK_HP_DET 2 5 DOCK_MIC_DET <39>
1

DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
Q40A Q40B
1

DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Azalia (HD) Codec
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
LA-5471P
2 WWW.AliSaler.Com 1
Date: Wednesday, January 20, 2010 Sheet 29 of 57
 5 4 3 2 1

WWW.AliSaler.Com
+3.3V_LAN +3.3V_LAN

+3.3V_RUN R370
0_1210_5%~D
@ R75 1 TP_LAN_JTAG_TMS +1.05V_M for VC10 not the

10U_0805_6.3V6M~D
0.1U_0402_10V7K~D
2 1 2 1 1

1
10K_0402_5%~D
correct or complete

C804

C805
@ R76 1 2 TP_LAN_JTAG_TCK R699

1
implementation to connect to

0_1210_5%~D
10K_0402_5%~D 10K_0402_5%~D
2 2
+1.05V SVR.

R371
2
U79

0.01U_0402_16V7K~D

2
1
1 2 LANCLK_REQ#_R 48 13 LAN_TX0+ 1
<15,16> LANCLK_REQ# R1534 0_0402_5%~D CLK_REQ_N MDI_PLUS0 LAN_TX0- R72 +3.3V_LAN_R
<18> PLTRST_LAN# 36 PE_RST_N MDI_MINUS0 14

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D
D D

C1118
4.99K_0402_1%~D
CLK_PCIE_LAN 44 17 LAN_TX1+
<16> CLK_PCIE_LAN CLK_PCIE_LAN# PE_CLKP MDI_PLUS1 LAN_TX1- 2
45 18 1 1

2
<16> CLK_PCIE_LAN#

PCIE
PE_CLKN MDI_MINUS1

MDI

C466
C465
<16> PCIE_PRX_GLANTX_P6 2 1 PCIE_PRX_GLANTX_P6_C 38 PETp MDI_PLUS2 20 LAN_TX2+
C451 0.1U_0402_10V7K~D 39 21 LAN_TX2-
PETn MDI_MINUS2

3
Trace=12mil 2 2
<16> PCIE_PRX_GLANTX_N6 2 1 PCIE_PRX_GLANTX_N6_C
+3.3V_LAN C452 0.1U_0402_10V7K~D 41 23 LAN_TX3+
<16> PCIE_PTX_GLANRX_P6_C PERp MDI_PLUS3 LAN_TX3- REGCTL_PNP10
<16> PCIE_PTX_GLANRX_N6_C 42 24 1 2 1
PERn MDI_MINUS3 R73 0_0402_5%~D
1

Q45
R44 LAN_SMBCLK 28 6 DCP69A-13_SOT223-3~D

2
4
<16> LAN_SMBCLK

SMBUS
10K_0402_5%~D LAN_SMBDATA SMB_CLK VCT +1.05V_M
<16> LAN_SMBDATA 31 SMB_DATA
1 +RSVD_VCC3P3_1 R70 2 1 3.01K_0402_1%~D +1.0V_LAN @ R119
RSVD_VCC3P3_1 +3.3V_LAN
SMBus Device Address 0xC8 2 +RSVD_VCC3P3_2 R1291 2 1 3.01K_0402_1%~D 0_0805_5%~D
2

RSVD_VCC3P3_2 Intel suggest to empty it.

5 1 2
VDD3P3_IN

10U_0805_10V4Z~D
R42 1 2 0_0402_5%~D LAN_DISABLE#_R

0.1U_0402_10V7K~D
<19> PM_LANPHY_ENABLE 3 LAN_DISABLE_N
4 +3.3V_LAN_OUT 1 1
VDD3P3_OUT

C474
<39> LAN_DISABLE#_R

C806
15 +3.3V_LAN_OUT_R 2 1 1
VDD3P3_15
1

LOM_ACTLED_YEL# 26 19 R693 0_0603_5%~D

@R56
@ R56 LOM_SPD100LED_ORG# LED0 VDD3P3_19 C786 2 2
27 LED1 VDD3P3_29 29

LED
10K_0402_5%~D LOM_SPD10LED_GRN# 25 1U_0603_10V6K~D
LED2 2
47 +1.0V_LAN +1.0V_LAN
2

VDD1P0_47
VDD1P0_46 46
PAD~D @ T176 TP_LAN_JTAG_TDI 32 37 +1.0V_LAN_4 R694 2 1 0_0603_5%~D
PAD~D @ TP_LAN_JTAG_TDO JTAG_TDI VDD1P0_37

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D
T177 34 JTAG_TDO

JTAG
TP_LAN_JTAG_TMS 33 43 +1.0V_LAN_3 R695 2 1 0_0603_5%~D
TP_LAN_JTAG_TCK JTAG_TMS VDD1P0_43
35 JTAG_TCK 1 1 1 1
C427 11 +1.0V_LAN_2 R696 2 1 0_0603_5%~D
VDD1P0_11

C800

C801

C802

C803
10P_0402_50V8J~D
C XTALO C
1 2 9 40
XTALI XTAL_OUT VDD1P0_40 2 2 2 2
10 XTAL_IN VDD1P0_22 22
Y2 16
25MHZ_18PF_1Y725000CE1A~D VDD1P0_16
VDD1P0_8 8
1 2 LAN_TEST_EN 30 TEST_EN
RES_BIAS REGCTL_PNP10
33P_0402_50V8J~D

33P_0402_50V8J~D

12 RBIAS CTRL_1P0 7
2 2
+1.0V_LAN_2 +1.0V_LAN_3 +1.0V_LAN_4
3.01K_0402_1%~D

VSS_EPAD 49
1

1
C475

C476

R1200
1K_0402_5%~D
R59

WG82577LM-QLDT-A2_QFN48_6X6~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D
1 1

0.1U_0402_10V7K~D
1 1 1 1

C477

C478

C479

C480
2

2 2 2 2
Need to verify A3 silicon drive R1200 Resistor Value:
power before removing C427 3.01 kohm for Hanksville-M LOM +3.3V_M
2.37 kohm for Hanksville-D LOM

2
@ R373
@R373
+3.3V_LAN 0_1210_5%~D
0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1
2 2 2
C460

C461

C462

+3.3V_ALW Q2 +3.3V_LAN
LAN ANALOG SI3456BDV-T1-E3_TSOP6~D
B 1 1 1 B
SWITCH +15V_ALW

D
6

S
+3.3V_ALW2
39
30
21
14

5 4
8
4
1

1
U25 2
R1310

10U_0805_6.3V6M~D

0.1U_0402_10V7K~D
1 1 1
VDD
VDD
VDD
VDD
VDD
VDD
VDD

38 SW_LAN_TX0+ 100K_0402_5%~D

G
B0+ SW_LAN_TX0+ <37>

C482

C481
37 SW_LAN_TX0-

3
B0- SW_LAN_TX0- <37>

1
LAN_TX0+ 1 2 LAN_TX0+R 2

2
L20 22NH_0603CS-220EJTS_5%~D A0+ SW_LAN_TX1+ R1311 ENAB_3VLAN 2 2
B1+ 34 SW_LAN_TX1+ <37>
LAN_TX0- 1 2 LAN_TX0-R 3 33 SW_LAN_TX1- 100K_0402_5%~D
A0- B1- SW_LAN_TX1- <37>

2200P_0402_50V7K~D
L21 22NH_0603CS-220EJTS_5%~D
29 SW_LAN_TX2+

2
LAN_TX1+ 1 LAN_TX1+R B2+ SW_LAN_TX2- SW_LAN_TX2+ <37> Q184B
2 6 A1+ B2- 28 1
L22 22NH_0603CS-220EJTS_5%~D SW_LAN_TX2- <37> DMN66D0LDW-7_SOT363-6~D
5

C1414
LAN_TX1- 1 2 LAN_TX1-R 7 25 SW_LAN_TX3+
A1- B3+ SW_LAN_TX3+ <37>

6
L23 22NH_0603CS-220EJTS_5%~D 24 SW_LAN_TX3-

4
B3- SW_LAN_TX3- <37> 2
LAN_TX2+ 1 2 LAN_TX2+R 9 17 LAN_ACTLED_YEL# Q184A
A2+ LEDB0 LAN_ACTLED_YEL# <37>
L24 22NH_0603CS-220EJTS_5%~D 18 LED_100_ORG# 1 2 2 DMN66D0LDW-7_SOT363-6~D
LAN_TX2- LAN_TX2-R LEDB1 LED_10_GRN# LED_100_ORG# <37> <40> AUX_ON
1 2 10 41 R2 0_0402_5%~D
A2- LEDB2 LED_10_GRN# <37>
L25 22NH_0603CS-220EJTS_5%~D

1
36 DOCK_LOM_TRD0+ 1 2
LAN_TX3+ 1 LAN_TX3+R C0+ DOCK_LOM_TRD0- DOCK_LOM_TRD0+ <38> <17,39> SIO_SLP_LAN#
2 11 35 @ R47 0_0402_5%~D
A3+ C0- DOCK_LOM_TRD0- <38>
L26 22NH_0603CS-220EJTS_5%~D
LAN_TX3- 1 2 LAN_TX3-R 12 32 DOCK_LOM_TRD1+
A3- C1+ DOCK_LOM_TRD1- DOCK_LOM_TRD1+ <38>
L27 22NH_0603CS-220EJTS_5%~D 31
C1- DOCK_LOM_TRD1- <38>
DOCKED 13 27 DOCK_LOM_TRD2+
<39> DOCKED SEL C2+ DOCK_LOM_TRD2- DOCK_LOM_TRD2+ <38> +3.3V_LAN
C2- 26 DOCK_LOM_TRD2- <38>
LOM_ACTLED_YEL# 15 23 DOCK_LOM_TRD3+
LEDA0 C3+ DOCK_LOM_TRD3+ <38>
LOM_SPD100LED_ORG# 16 22 DOCK_LOM_TRD3-
A LEDA1 C3- DOCK_LOM_TRD3- <38> A
Layout Notice : Place bead as LOM_SPD10LED_GRN# 42 LEDA2

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D
19 DOCK_LOM_ACTLED_YEL#
close PI3L720 as possible LEDC0 DOCK_LOM_ACTLED_YEL# <38>

1
5 20 DOCK_LOM_SPD100LED_ORG#
PD LEDC1 DOCK_LOM_SPD100LED_ORG# <38>

@R392
@

@R393
@

@R394
@
40 DOCK_LOM_SPD10LED_GRN#
LEDC2 DOCK_LOM_SPD10LED_GRN# <38>

R392

R393

R394
43 PAD_GND DELL CONFIDENTIAL/PROPRIETARY
1: TO DOCK 2

2
FROM NIC DOCKED
0: TO RJ45
Compal Electronics, Inc.
PI3L720ZHEX_TQFN42_9X3P5~D TO Title
LOM_ACTLED_YEL#
DOCK LOM_SPD10LED_GRN# Intel 82577/82578 (Hanksville) / LAN SW
LOM_SPD100LED_ORG# Size Document Number Rev
1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 30 of 57
 5 4 3 2 1

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+3.3V_ALW
+3.3V_ALW
JTAG_CLK_USH

@
R895
1 2 PLTRST1#_USH 0_0402_5%~D
@ R1059 10K_0402_5%~D 1 2 JTAG_RST#_USH 1 2 RST_N 1 2
1 2 USH_LPCEN R737 1K_0402_5%~D R810 4.7K_0402_5%~D U32D
5@ R841 4.7K_0402_5%~D 1 2 USH_LPCEN 1 2 OVSTB JTAG_TDI_USH
1
@ R474
2 LPD#
4.7K_0402_5%~D
6@ R483 4.7K_0402_5%~D R484
1
4.7K_0402_5%~D
2 FP_RESET# REF_XIN G14
BCM5882 D4 UART_TX/GPIO1
REFCLK_XTALIN UART_TX_GPIO_1
1 2 IRQ_SERIRQ_R R1034 4.7K_0402_5%~D JTAG_TDO_USH REF_XOUT F14
REFCLK_XTALOUT UART_RX_GPIO_0 C4 UART_RX/GPIO0

@
R843 4.7K_0402_5%~D 1 2 SPI_RST R896 B3

UART
UART_CTS_GPIO_2 FP_RESET# <37>
1 2 USH_SMBCLK U32A R1524 4.7K_0402_5%~D 0_0402_5%~D
UART_RTS_GPIO_3 A3 CLKDIV1

CLK
R490 2.2K_0402_5%~D 1 2 RST_N G1
1
R626
2 USH_SMBDAT
2.2K_0402_5%~D R468 1 2 0_0402_5%~D USBP7-_R P5
BCM5882 P7 FP_USBD- JTAG_TMS_USH
RST_N

<18> USBP7- USBD_DN USBH_DN_0 FP_USBD- <37>

1 2 BCM5882_ALERT# <18> USBP7+
R469 1 2 0_0402_5%~D USBP7+_R P6 USBD_UP USBH_UP_0 P8 FP_USBD+
FP_USBD+ <37> NC L14
D R629 2.2K_0402_5%~D 5882_GPIO27 N7 P9 USBH_OC0# 2 1 D
USBD_ATTACH_GPIO_27 USBH_OC_0 +3.3V_ALW
1 2 USH_PWR_STATE# R844 4.7K_0402_5%~D JTAG_RST#_USH JTAG_CLK_USH L1 JTAG_TCK

@
R630 4.7K_0402_5%~D P11 R897 JTAG_TDI_USH M1 J1 CONTACTLESS_DET#
USBH_OC1 USBH_DN_1 0_0402_5%~D JTAG_TDO_USH JTAG_TDI GPIO_4 SCC_CMDVCC_N_R
1 2 P12 N1 D2

JTAG
R637 4.7K_0402_5%~D CLK_PCI_TPM USBH_UP_1 USBH_OC1 JTAG_TMS_USH JTAG_TDO GPIO_14 BCM5882_GPIO15
<16> CLK_PCI_TPM P2 LCLK USBH_OC_1 P10 1 2 N2 JTAG_TMS GPIO_15 C2
<15,32,39,40> LPC_LAD0 LPC_LAD0 R615 1 2 0_0402_5%~D N3 JTAG_RST#_USH L3 B1 CLKDIV2
LPC_LAD1 R618 1 LAD0_GPIO_20 JTAG_TRSTN GPIO_16
<15,32,39,40> LPC_LAD1 2 0_0402_5%~D M4 LAD1_GPIO_21
JTCE_USH JTCE_USH L2 JTCE
<15,32,39,40> LPC_LAD2 LPC_LAD2 R619 1 2 0_0402_5%~D K5
LPC_LAD3 R620 1 LAD2_GPIO_22 SPI_CLK UART_RX/GPIO0 CLKOUT
2 0_0402_5%~D N4 G3 D3

@
<15,32,39,40> LPC_LAD3 LAD3_GPIO_23 SSP_CLK0_GPIO_6 CLKOUT T154PAD~D

2
+3.3V_ALW_PCH

@
<15,32,39,40> LPC_LFRAME# LPC_LFRAME# R621 1 2 0_0402_5%~D K4 G2 SPI_CS R894 @ R899 OVSTB E1
LFRAME_N_GPIO_18 SSP_FSS0_GPIO_7 OVSTB
<15,32,39,40> IRQ_SERIRQ @ R842 1 2 0_0402_5%~D IRQ_SERIRQ_R L4 LSERIRQ_GPIO_19 SSP_RXD0_GPIO_8 H1 SPI_RXD 0_0402_5%~D 0_0402_5%~D
H2 SPI_TXD 1 2 C1 SPI_RST
SSP_TXD0_GPIO_9 RSTOUT_N
4.7K_0402_5%~D

<18> PLTRST_USH#
R1048 1 2 0_0402_5%~D PLTRST1#_USH M3 LRESET_N_GPIO_17
SCANACCMODE E3 SCANACCMODE
2
R1515

SPI
USH_LPCEN M5 C3 BCMGPIO_10 UART_TX/GPIO1 @ T158PAD~D

@@@@
T145PAD~D

LPC

1
R466 1 LPD# LPCEN SSP_CLK1_GPIO_10 BCMGPIO_11
<32,39> SP_TPM_LPC_EN 2 0_0402_5%~D N6 LPCPD_N_GPIO_24 SSP_FSS1_GPIO_11 B2 T148PAD~D
A2 BCMGPIO_12 SBOOT E2 J13 POR_MONITOR

@
SSP_RXD1_GPIO_12 T149PAD~D SECURE_BOOT POR_MONITOR T156PAD~D
A1 BCMGPIO_13 T150PAD~D HF_RX_TEST0
SSP_TXD1_GPIO_13
3

@
USH_SMBCLK M9 R907
<40> USH_SMBCLK
1

G
USH_SMBDAT SMBCLK USH_TESTMODE D1
2 L9 0_0402_5%~D K11 SWV

@
<40> USH_SMBDAT SMBDAT TESTMODE SWV T155PAD~D
Q209 BCM5882_ALERT# K9 1 2
<39> BCM5882_ALERT# SMBALERT_N

1
1K_0402_5%~D
@ R1522
Smard Card
D SC_DET R1460 1 2 150_0402_5%~D M7 M11 R472 2 0_0402_5%~D
1 BCM5882_SCCLK
1

SI2301BDS-T1-E3_SOT23-3~D SMB_GPIO1 SMB_GPIO_0 SC_CLK R533 0_0402_5%~D AUX1UC HF_RX_TEST1 POR_EXTR

N8 M12 2 1 J14 C13 PLL_TESTOUT

@
PAD~D T147 SMB_GPIO_1 SC_FCB POR_EXTR PLL_TESTOUT T157PAD~D
1

D R767 0_0402_5%~D BCM5882_GPIO25

SC_SEL5V_GPIO_25 F2 2 1
25882_GPIO27 SC_SEL18V_GPIO_26 F1 R766 2 0_0402_5%~D
1 BCM5882_GPIO26 HF_RX_TEST2

@
USH_PWR_STATE#_R R774 0_0402_5%~D BCM5882_SCDET R908

SM BUS
G 1 2 L7 M2 2 1
<39> USH_PWR_STATE#

2
USBP7+ 1 Q210 R1049 0_0402_5%~D WAKEUP_N SC_DET R608 0_0402_5%~D BCM5882_IO 0_0402_5%~D BCM5882KFBG_FBGA196~D
2 S L11 2 1
3

R470 1.5K_0402_5%~D SSM3K7002FU_SC70-3~D SC_IO R771 0_0402_5%~D BCM5882_SCRST

1 2 K1 IDDQ_EN SC_RST M10 2 1 1 2
R738 1K_0402_5%~D N14 +SC_PWR R775
5882_GPIO271 SC_PWR_N14 0_0402_5%~D HF_RX_TEST3
2 1 2 P1 CORE_PWRDN SC_PWR_P14 P14
@ R1523 0_0402_5%~D R739 1K_0402_5%~D L10 SC_TEST 2 1 SCC_CMDVCC_N U32C
SC_VCC
1 2 E12
C
R481 0_0402_5%~D
1 2 REF_XOUT
R743 1K_0402_5%~D ALDO_PWRDN
R497 1 2 0_0402_5%~D RFTAG_VRXP A6
BCM5882 A8 RFREADER_TXP1 C
R496 1 RFTAG_VRXN HF_RFIDTAG_VRX_P HF_TX_P RFREADER_TXN1
2 0_0402_5%~D B6 HF_RFIDTAG_VRX_N HF_TX_N B8

1 2 REF_XIN C5 A10 RFREADER_RXP

@ R486 10M_0402_5%~D BCM5882KFBG_FBGA196~D HF_RFIDTAG_VTX HF_RX_P RFREADER_RXN
HF_RX_N B10
C595 should be placed
Y3
XI 1 3 XO C589 R744 +3.3V_ALW +1.2V_ALW_AVDD +2.5V_ALW_AVDD closer
1
to2 pin A5 A5 B9 HF_RX_TEST0
IN OUT 4.7P_0402_50V8C~D 10_0402_5%~D C595 0.01U_0402_25V7K~D HF_RFIDTAG_VREF HF_RX_TEST0 HF_RX_TEST1
HF_RX_TEST1 C9
2 4 1 2 PCI_TPM_TERM 2 1 CLK_PCI_TPM +1.2V_ALW_AVDD B4 C10 HF_RX_TEST2
GND GND HF_RFIDTAG_DVDD1P2 HF_RX_TEST2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

4.7U_0603_6.3V6M~D

10U_0603_6.3V6M~D
1 1 E9 HF_RX_TEST3
HF_RX_TEST3

4.7K_0402_5%~D

5.1M_0402_5%~D
27.12MHZ_12PF_1N227120CC0B~D

2
C608 C609 2 2 1 2 2 1 1 +2.5V_ALW_AVDD C6 D7 +RFID_AVDD1P2
HF_RFIDTAG_AVDD2P5_C6 HF_TX_AVDD1P2

R485

R476

C1176

C1177
12P_0402_50V8J~D 15P_0402_50V8J~D E6 F8
2 2 HF_RFIDTAG_AVDD2P5_E6 HF_RX_AVDD1P2

C601

C602

C605

C606

C1021
HF_RX_ADC_AVDD1P2 D10
SCC_CMDVCC_N_R 2 1 SCC_CMDVCC_N
@ R776 0_0402_5%~D 1 1 2 1 1 2 2 +RFID_AVDD2P5
F9

1
HF_RX_AVDD2P5
D6 A7
Smart Card +3.3V_ALW
SBOOT
POR_EXTR
B5
HF_RFIDTAG_AVSS_D6
HF_RFIDTAG_AVSS_B5
HF_TX_AVDD2P5

HF_TX_AVDD3P3_D8 D8 +RFID_AVDD3P3
A4 HF_RFIDTAG_DVSS HF_TX_AVDD3P3_B7 B7
+3.3V_ALW

3.3M_0402_5%~D
1 2 PORADJ

2
10U_0805_10V6M~D
0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1 2 PORADJ @ R538 4.7K_0402_5%~D

HF_TX_AVSS_C7 C7

R488
R537 4.7K_0402_5%~D 1 2 CLKDIV2 1 1 1 C8
HF_TX_AVSS_C8
C622

C620

+5V_ALW

15K_0402_1%~D
1 2 CLKDIV1 R553 4.7K_0402_5%~D
HF_TX_AVSS_E7 E7

1
C706

R532 4.7K_0402_5%~D
A9
1
2 2 2 HF_RX_AVSS_A9
0.1U_0402_16V4Z~D

10U_0805_10V6M~D

R555
HF_RX_AVSS_B11 B11
2 1 C639
U33 1U_0603_10V7K~D E8

2
HF_RX_ADC_AVSS1
C1014

C709

1 RFREADER_RXP 1 2 RFREADER_RXP_C D9
B PORADJ VDD(intf) L71 HF_RX_ADC_AVSS2 B
18 PORadj VDD 17
CLKDIV1 1 2 150NH_LLQ1608-FR15G_2%~D
6 CLKDIV1 +3.3V_ALW 3
CLKDIV2 7 16 1 RFREADER_TXP1 1 2 BCM5882KFBG_FBGA196~D
CLKDIV2 VDDP
2

390P_0603_50V8G~D

390P_0603_50V8G~D
BCM5882_SCRST 3 15 +SC_VCC 1 1
RSTIN VCC

C1070

C1887
SCC_CMDVCC_N 5 @ D31 DA204U_SOT323-3~D +3.3V_ALW 3
BCM5882_GPIO25 CMDVCCN R773 1 0_0402_5%~D SC_RST
2 EN_5V/3VN RST 14 2 1
BCM5882_GPIO26 4 13 R772 1 2 47_0402_5%~D SC_CLK 3 2

AUX1UC
AUX2UC
21
EN_1.8VN

AUX1UC
CLK
I/O
AUX1
9
10
R491 1
R493 1
R492 1
2
2
100_0402_5%~D
0_0402_5%~D
0_0402_5%~D
SC_IO
SC_C4
SC_C8
+3.3V_ALW
2
1
@ D32
2 2
RFID
22 11 2 DA204U_SOT323-3~D
@

PAD~D T143 AUX2UC AUX2

BCM5882_IO 20 8 R1459 1 2 0_0402_5%~D SC_DET @ D33 DA204U_SOT323-3~D C643
BCM5882_SCDET I/OUC PRESN 1U_0603_10V7K~D JCS1
19 OFFN RFREADER_RXN 1 2 RFREADER_RXN_C placement close to U32 pins: RFREADER_TXN1 & 1 1

15K_0402_1%~D
BCM5882_SCCLK 23 24 RFREADER_TXN1_PI 2
XTAL1 XTAL2 +SC_VCC RFREADER_TXP1, and ESD diodes should be placed 2
10P_0402_50V8J~D

10P_0402_50V8J~D

2 2 3 3

1
25 12 between Pi filter and connector. 4
GPAD GND 4
.47U_0402_6.3V6-K~D

C633

C1015

R633
RFID MODE RFREADER_TXP1_PI 5 7
5 G1
TDA8034HN_HVQFN24_4X4~D 2 <15,19> CONTACTLESS_DET# 6 6 G2 8
1 1
Component VOLTAGE CURRENT
C718

TYCO_2041084-6~D

2
SC_VCC should be 3X wide as R555,R633 3K NOPOP L72
1 150NH_LLQ1608-FR15G_2%~D
regular SC trace width to carry D31-D34 POP NOPOP RFREADER_TXN1 1 2
+SC_VCC ~60mA max. current per ISO spec +3.3V_ALW ĐŽŶŶĞĐƚŽƌůŝƐƚ͗ϮϬϰϭϬϴϰͲϲ

390P_0603_50V8G~D

390P_0603_50V8G~D
0.1U_0402_16V4Z~D

C1031 and C646 should be placed 1 1

C1071

C1888
+3.3V_ALW 3
very close to SC cage pin
10U_0805_10V4Z~D

0.22U_0402_10V6K~D

Place C718 close 1 1

C644

1 2 to U33 pin15 2
2 2 Hardware enable for USH TPM:Populate D70 & R841,
@ C1031

No Stuff R483.
C646

JSC1 D34
2 DA204U_SOT323-3~D
A 2 1
12 GND Hardware disable for USH TPM:No Stuff D70 & A
11 +3.3V_ALW
GND U34 R841, Populate R483
10 @ U14 SPI_TXD 1 8 SPI_RXD
SC_RST 10 SPI_CS SPI_CLK D Q +3.3V_ALW +2.5V_ALW_AVDD +1.2V_ALW_AVDD
9 9 1 /CS VCC 8 2 C VSS 7
SC_CLK 8 SPI_RST 3 6 BLM18BB100SN1D_2P~D BLM18BB100SN1D_2P~D BLM18BB100SN1D_2P~D
SC_C4 7
8
7
SPI_RXD 2 DO /HOLD 7 SPI_RST SPI_CS 4
RESET#
S#
VCC
W# 5 BCM5882_GPIO15 2
L38
1 +RFID_AVDD3P3 2
L36
1 +RFID_AVDD2P5 2
L37
1 +RFID_AVDD1P2 DELL CONFIDENTIAL/PROPRIETARY
6 6
3.3U_0603_10V6K~D

1U_0603_10V6K~D

0.1U_0402_16V4Z~D

1U_0603_10V6K~D

1U_0603_10V6K~D

0.1U_0402_16V4Z~D

1U_0603_10V6K~D

1U_0603_10V6K~D

0.1U_0402_16V4Z~D
SC_IO
5
4
5
BCM5882_GPIO15
3 /WP CLK 6 SPI_CLK M45PE16-VMW6TG_SO8W8~D
1 2 1 2 2 1 1 1 1
Compal Electronics, Inc.
4

C626
SC_C8 3 4 5 SPI_TXD Title
3 GND DIO
C631

C624

C625
C630

C632

C627

C628

C629
SC_DET 2 BCM5882_GPIO15 1 2
1 2 1
2 R341 4.7K_0402_5%~D USH BCM5882 (1/2)
1 W25X32VSSIG_SO8~D 2 1 2 1 1 2 2 2 2 Size Document Number Rev
R1468 FCI_10089709-010010LF~D 1.0
1.5K_0402_5%~D LA-5471P
Date: Wednesday, January 20, 2010 Sheet 31 of 57
5 4 3 2 1

WWW.AliSaler.Com
 5 4 3 2 1

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+3.3V_ALW +1.2V_ALW_PLL

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D
U32B
1 1 1
BCM5882

C1178
2 2 2 2 2 2 2 1

C1179

C592

C593
+1.2V_ALW_PLL H14 AVDD_1P2I_REF

C613

C614

C615

C616

C617

C618

C619
+1.2V_ALW_AVDD A11 AVDD_1P2O_A11
2 2 2
A12 AVDD_1P2O_A12 AVSS_LDO12 C11
1 1 1 1 1 1 1 2
+2.5V_ALW_AVDD
H13 AVDD_2P5I AVSS_LDO25_B13 B13
E10 AVDD_2P5O_E10 AVSS_LDO25_C12 C12
D +3.3V_ALW E11 D
AVDD_2P5O_E11
AVSS_PLL B14

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D
A13 AVDD25_LDO12_A13

4.7U_0603_6.3V6M~D
B12 AVDD25_LDO12_B12 AVSS_REF F13
2 2 2 2 2 2 2
1 PLL_AVSS D12

C621

C635

C636

C637

C638

C875

C612
A14 AVDD25_PLL_A14

C1017
PLL_DVSS E13
1 1 1 1 1 1 1
2
D11 AVDD33_LDO25

POR_AVSS G13
+SC_PWR P13 OTP_PWR

2 +1.2V_ALW_PLL D14 PLL_AVDD_1P2I

C1027 E14
0.1U_0402_16V4Z~D PLL_AVDD_1P2O
C14 PLL_DVDD_1P2I VSSC_F4 F4
USH BCM5882 and China TPM Z8H172T Option 1 VSSC_F5 F5
D13 VDDC_D13 VSSC_F6 F6
Ref Des TCM Enable TPM Enable ALL TPM/TCM Disable +VDDC_5882
PART/PIN F3 VDDC_F3 VSSC_F7 F7
J4 VDDC_J4 VSSC_F10 F10
TCM circuit All 3@ POP @ @ J5 VDDC_J5 VSSC_F11 F11
J6 VDDC_J6 VSSC_F12 F12
SIO 5028 ->SP_TPM_LPC_EN PU R841 @ POP @ J7 VDDC_J7 VSSC_G5 G5
J8 VDDC_J8 VSSC_G6 G6
PD R483 POP @ @ J10 VDDC_J10 VSSC_G7 G7
J11 VDDC_J11 VSSC_G8 G8
PU R788 @ @ @ +3.3V_ALW
K7 VDDC_K7 VSSC_G9 G9
K8 VDDC_K8 VSSC_G10 G10
VSSC_G11 G11
C C
PCH GPIO39 ->TPM_ID1 PU R787 @ @ POP E4 VDDO_33_E4 VSSC_G12 G12
J2 VDDO_33_J2 VSSC_H5 H5
PD R339 POP POP @ K3 VDDO_33_K3 VSSC_H6 H6
L8 VDDO_33_L8 VSSC_H7 H7
+VDDC_5882 N10 H8
VDDO_33_N10 VSSC_H8
PCH GPIO38 ->TPM_ID0 PU R273 POP POP @ VSSC_H9 H9
G4 VDDO_33CORE_G4 VSSC_H10 H10

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D
PD R922 @ @ POP H3 VDDO_33CORE_H3 VSSC_H11 H11
H4 VDDO_33CORE_H4 VSSC_H12 H12
2 2 2 2 J3 VDDO_33CORE_J3 VSSC_J9 J9
VSSC_J12 J12

C596

C597

C598

C599
M13 VDDO_33SC_M13 VSSC_K2 K2
N13 VDDO_33SC_N13 VSSC_K6 K6
1 1 1 1 K13
VSSC_K13
L6 VDDO_LPC_L6 VSSC_K14 K14
M6 VDDO_LPC_M6 VSSC_L5 L5
VSSC_M8 M8
VSSC_M14 M14
K10 VDDO_SC_K10 VSSC_N9 N9

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D
LOW:Power Down Mode K12
L12
VDDO_SC_K12 VSSC_N11 N11
N12
VDDO_SC_L12 VSSC_N12
High:Working Mode L13 P3
China TPM: ZTE & Jetway co-lay 2 2 1 VDDO_SC_L13 VSSC_P3

C1180
VSSC_P4 P4

C873

C877
D5 VDDO_VAR_D5
E5 VDDO_VAR_E5
+3.3V_RUN 1 1 2
N5 VESD
3@ U24

10 BCM5882KFBG_FBGA196~D
VDD_0

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

10U_0603_6.3V6M~D
VDD_1 19
VDD_2 24
B B
2 2 2 1
3@ 3@ 3@ 3@

C1171

C1172

C1173

C1174
3@ R893 1 2 0_0402_5%~D C_TPM_LPC_EN 28
<31,39> SP_TPM_LPC_EN LPCPD#
3@ R901 1 2 0_0402_5%~D LPC_LAD0_R 26 11
<15,31,39,40> LPC_LAD0 LAD0 GND_11 1 1 1 2
3@ R902 1 2 0_0402_5%~D LPC_LAD1_R 23 18
<15,31,39,40> LPC_LAD1 LAD1 GND_18
3@ R903 1 2 0_0402_5%~D LPC_LAD2_R 20 25
<15,31,39,40> LPC_LAD2 LAD2 GND_25
3@ R904 1 2 0_0402_5%~D LPC_LAD3_R 17 4
<15,31,39,40> LPC_LAD3 LAD3 GND_4

21 5 JETWAY_PIN5
<16> CLK_PCI_TPM_CHA LCLK NC_5
3@ R905 1 2 0_0402_5%~D LPC_LFRAME#_R 22 12
<15,31,39,40> LPC_LFRAME# LFRAME# NC_12
3@ R906 1 2 0_0402_5%~D PCI_RST#_R 16 13 JETWAY_CLK14M 1 2 JETWAY_14M
<8,18,34,36,39,40> PCH_PLTRST#_EC LRESET# NC_13 JETWAY_14M <16>
+3.3V_RUN 27 @R910
@ R910 22_0402_5%~D
<15,31,39,40> IRQ_SERIRQ SERIRQ
3@ R909 1 2 0_0402_5%~D CLKRUN#_R 15 1
<17,39,40> CLKRUN# CLKRUN# NC_1
1 2 7 2 place R910 close to U73 +3.3V_RUN
@ R1210 4.7K_0402_5%~D TCM_BA1 PP NC_2
3 BA_1 NC_6 6
TCM_BA0 9 8
BA_0 NC_8
1U_0402_6.3V6K~D

NC_P 14

1
10K_0402_5%~D

10K_0402_5%~D
1 3@ @ @
C23

R1022

R1025
2

2
SSX44-B_TSSOP28~D 2
JETWAY_PIN5 TCM_BA0
TCM_BA1
2
@ C1175
@C1175 TCM Vender POP
3@ R1023

0.1U_0402_16V4Z~D 3@ R1026
1

1
1K_0402_5%~D

1K_0402_5%~D

1 ZTE R1026, R1023, C23, C1174

A A
Jetway C1175, R910
2

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT USH BCM5882 (2/2)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 32 of 57
 5 4 3 2 1

WWW.AliSaler.Com +3.3V_RUN

+CBS_VCC

1U_0402_6.3V6K~D
1

1@ C495

0.1U_0402_16V4Z~D

10U_0805_10V4Z~D
2

1@ C496
1 1

@C497
@ C497
+5V_RUN
1@ U27
2 2

1U_0402_6.3V6K~D
11 VCC3IN VCCOUT 9

1@ C498
1 VCCOUT 14
D D
VCCOUT 12

13 VCC5IN
2
15 VCC5IN +CBS_VPP

VPPEN0 3 8
<34> VPPEN0 EN0 VPPOUT

0.1U_0402_16V4Z~D

0.01U_0402_16V7K~D
VPPEN1 4
<34> VPPEN1 EN1
1 2 @

1@ C499

C500
Crystal close to U94 VCC3EN# 2
<34> VCC3EN# VCC5EN# VCC3_EN
2 1 <34> VCC5EN# 1
C514 VCC5_EN 2 1
C645,Close to U94.C10
15P_0402_50V8J~D

2
+3.3V_RUN C603,Close to U94.J4/K3 5 7
X3 U94A FLG NC
16 GND NC 6
24.57MHZ_12PF_X5H024576FC1HH~D 10
30ppm NC
C695,Close to U94.M13

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
1
R5U241_XI A8 C10 1 1
2 1 2 1 R5U241_XO B8
XI VCC_3V0
J4
C697,Close to U94.M11/N11 R5531V002-E2-FA_SSOP16~D
XO VCC_3V1 C698,Close to U94.J3

C603

C645
C515 R421 100_0402_5%~D K3
15P_0402_50V8J~D TPAP0 VCC_3V2
A5 TPAP0 C699,Close to U94.C8
TPAN0 2 2
B5 TPAN0
+3.3V_RUN TPBIAS0 C7
TPBP0 TPBIAS0
A6 TPBP0
TPBN0 B6 +PCIE_PHY
TPBN0
1 2 CPS D4 CPS
JSD1
R1146 0_0402_5%~D C8
PCIE_VOUT0 SDDAT3/MMCDAT3

10U_0805_10V4Z~D
J3 14

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
PCIE_VOUT1 SDCMD/MMCCMD DAT3/SD1
<16> CLK_PCIE_PCM N8 REFCLKP 1 1 1 1 1 12 CMD/SD2
<16> CLK_PCIE_PCM# M8 REFCLKN 10 VSS1/SD3

C695

C697

C698

C699

C700
PCIE_VIN0 M13 +3.3V_RUN_CARD 9 VCC/SD4
C C710 1 PCIE_PRX_PCMTX_P3_C N12 SDCLK/MMC_CLK C
C710,C713 as close 2 0.1U_0402_10V7K~D M11 8
<16> PCIE_PRX_PCMTX_P3 C713 1 PCIE_PRX_PCMTX_N3_C N13 TXP PCIE_VIN1 2 2 2 2 2 CLK/SD5
as possible to U94 2 0.1U_0402_10V7K~D N11 6
<16> PCIE_PRX_PCMTX_N3 TXN PCIE_VIN2 SDDAT0/MMCDAT0 GND/VSSS2/SD6
4 DAT7/SD7

10P_0402_50V8J~D
SDDAT1/MMCDAT1 3
SDDAT2/MMCDAT2 DAT1/SD8
<16> PCIE_PTX_PCMRX_P3_C N10 RXP 1 15 DAT2/SD9

C491
<16> PCIE_PTX_PCMRX_N3_C M10 RXN PCIe / Power /
MMCDAT4 13
1394 / MultiCard MMCDAT5 DAT4/MMC10
AVCC_3V D7 +3.3V_RUN 11 DAT5/MMC11
2 MMCDAT6

1U_0402_6.3V6K~D
7

0.1U_0402_16V4Z~D
PLTRST_R5U242# MMCDAT7 DAT6/MMC12
<18> PLTRST_R5U242# M12 PERST# 1 1 5 DAT7/MMC13
RXC L9 +3.3V_RUN_CARD
RXC +3.3V_RUN_CARD

C701

C702
CPO L10
RREF CPO SDCD#/MMCCD#
L11 RREF 17 CD_SW/SD
2 2

47U_0805_6.3V6M~D

0.1U_0402_16V4Z~D

150K_0402_5%~D
D13 SDWP# 18

0.1U_0402_16V4Z~D
MF_VOUT SDCD#/MMCCD# WP_SW/SD
1 1 1 2 CD_SW_TAISOL/SD

1
SDWP# SDWP#
0.022U_0402_16V7K~D

H13 MFIO00 1 WP/SW_TAISOL/SD

1

C21

C767

R1464
C703
SDDAT1/MMCDAT1 SDDAT1/MMCDAT1_R H12
1500P_0402_7K~D

1 1 1 2 MFIO01
R1148 SDDAT0/MMCDAT0 R36 1 2 0_0402_5%~D SDDAT0/MMCDAT0_R G13 D8 C701, C702,Close to U94.D7 16
MFIO02 SD18C 2 2 2 GND_SW
C707

C705

5.1K_0402_1%~D R35 0_0402_5%~D MMCDAT7 G12

MMCDAT6 MFIO03
R8 Close to U94 F13 K11 1 C703,Close to U94.D13

2
2 2 SDCLK/MMC_CLK SDCLK/MMC_CLK_R F12 MFIO04 AGND0
SDCLK/MMC_CLK 1 2 L12 19
2

R8 0_0402_5%~D MFIO05 AGND1 C1889 CD_WP_SW/GRD

D12 MFIO06 GND0 A7 20 CD_WP_SW/GRD
need shield GND MMCDAT5 D10 MFIO07 GND1 B7 1U_0402_6.3V6K~D Place close
SDCMD/MMCCMD 1 2 SDCMD/MMCCMD_R C13 C6 2 FOX_2WX131A1-31DD-7F~D
R34 0_0402_5%~D MMCDAT4 C12
MFIO08 GND2
D11
to JSD1.9
SDDAT3/MMCDAT3 SDDAT3/MMCDAT3_R B13 MFIO09 GND3
1 2
MFIO10 GND4 E12 only for MMC/SD
C707,C705,R1148 as close SDDAT2/MMCDAT2 R32 1 2 0_0402_5%~D SDDAT2/MMCDAT2_R C11 E13 R46:
R31 0_0402_5%~D MFIO11 GND5
as possible to U94 A13 MFIO12 GND8 K4 For R5U241 should be 0 ohm,
B12 MFIO13 GND9 L8
A12 MFIO14 GND10 M9 R5U242 should be 1uF
GND11 N9

0.33U_0603_10V7K~D
SDCD#/MMCCD# F11 L5 TPBIAS0
2A currect caoacity request between
MFCD0# GND12

56.2_0402_1%~D

56.2_0402_1%~D
B G11 B
MFCD1# R5U242 and SD slot 1

1
1@ R802 G10 MFCD2#

R398

R399

C493
0_0402_5%~D
2 1 USBP10-_R1 H1
<18> USBP10- USBDP 2
2 1 USBP10+_R1 H2
<18> USBP10+ USBDM J1394

2
2@ R671 1@ R803 R5U242-CSP144P_CSP144~D 1
0_0402_5%~D 0_0402_5%~D TPAP0 1
2 2
2 1 TPAN0 3
<34> USBP10-_EXP 3
2 1 TPBP0 4
<34> USBP10+_EXP 4
2@ R745 TPBN0 5
0_0402_5%~D 5
<19> 1394_DET# 6 6

1
1
7 GND
R403 R401 8
56.2_0402_1%~D 56.2_0402_1%~D GND
TYCO_1775765-6~D

2
2
MFIO Pin Assignment Table Z3008 ĐŽŶŶĞĐƚŽƌůŝƐƚ͗ϭϳϳϱϳϲϱͲϲ

2
MFIO SD8 XD MS8 2
R407
00 WP D7 BS C494 5.1K_0402_1%~D
01 D1 D6 - 270P_0402_50V7K~D
1

1
02 D0 D5 D1 Close to U94
03 D7 D4 -
04 D6 D3 D5
05 CLK D2 D0
06 - D1 -
A A
07 D5 D0 D4
08 CMD WP# D2
09 D4 WE# D6
10 D3 ALE D3 DELL CONFIDENTIAL/PROPRIETARY
11 D2 CLE -
12 - CE# - Compal Electronics, Inc.
13 - RE# D7 Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
14 - R/B# CLK TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT R5U241 (1/2)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 33 of 57
 5 4 3 2 1

WWW.AliSaler.Com +1.5V_CARD

+1.5V_RUN

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

10U_0805_6.3V6M~D
U94B +3.3V_SUS +3.3V_RUN

0.1U_0402_16V4Z~D
2@ C997

2@ C999

2@ C1000

2@ C1012
1 1 1 1 +3.3V_CARD
L2 CBS_CAD19
CADR25 CBS_CAD17
C9 GND CADR24 K2

0.1U_0402_16V4Z~D
2@ C134

0.1U_0402_16V4Z~D
2@ C135
A10 H4 CBS_CFRAME# 1 1
GND CADR23 2 2 2 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

10U_0805_6.3V6M~D
A9 J1 CBS_CTRDY# 2@ U52
+3.3V_RUN GND CADR22 CBS_CDEVSEL#
B9 GND CADR21 G3 12 1.5Vin 1.5Vout 11

2@ C1001

2@ C1002

2@ C1003
B11 F3 CBS_CSTOP# 14 13 1 1 1
GND CADR20 CBS_CBLOCK# 2 2 1.5Vin 1.5Vout
A11 GND CADR19 G2
1

D CBS_DATA18 D
CADR18 F2 R410 Close to U94, CBS_CCLK need shield GND.
R1151 E2 CBS_CAD16 2 3
47K_0402_5%~D CADR17 CBS_CCLK_R CBS_CCLK 3.3Vin 3.3Vout 2 2 2
H10 H3 2 1 4 5
NC CADR16 CBS_CIRDY# 1@ R410 3.3Vin 3.3Vout
B10 GND CADR15 J2
G1 CBS_CPERR# 0_0402_5%~D 17 15 +3.3V_CARDAUX
2

CADR14 CBS_CPAR AUX_IN AUX_OUT

K13 UDIO0 CADR13 F1

0.1U_0402_16V4Z~D

10U_0805_6.3V6M~D
1 2 K12 K1 CBS_CC/BE2# 6 19
<15,16> PCMCLK_REQ# UDIO1 CADR12 <8,18,32,36,39,40> PCH_PLTRST#_EC SYSRST# OC#

2@ C1006

2@ C1016
R81 0_0402_5%~D
J13 C2 CBS_CAD12
UDIO2 CADR11 CBS_CAD9
J12 C3 <39> EXPRCRD_STDBY# 1 2 20 8 1 1
UDIO3 CADR10 CBS_CAD14 @R1495
@ R1495 0_0402_5%~D SHDN# PERST#
J11 UDIO4 CADR9 D2
H11 E3 CBS_CC/BE1# 1 2 EXPRCRD_STBY_R# 1 16
SPKROUT UDIO5 CADR8 CBS_CAD18 <12,39,42,47> RUN_ON STBY# NC
J10 L1 2@ R683 0_0402_5%~D
SPKROUT CADR7 CBS_CAD20 EXPRCRD_CPPE# 2 2
L13 M1 <39> EXPRCRD_PWREN# 1 2 10 7
PWR_ON_RST WAKE# CADR6 CBS_CAD21 @R1496
@ R1496 0_0402_5%~D CPPE# GND
K9 GBRST# CADR5 M2
SROM: SPKROUT L3 CBS_CAD22 CPUSB# 9
CADR4 CBS_CAD23 CPUSB#
Pull-Hi: Disable K10 TEST CADR3 M3
N3 CBS_CAD24 18

CARDBUS / MEDIA CARD / SD Card

Pull-Lo: Enable (Default) CADR2
N4 CBS_CAD25 RCLKEN
CADR1
1

M4 CBS_CAD26 TPS2231MRGPR-1_QFN20_4X4~D CARD_RESET#

@R1152
@ R1152 +3.3V_RUN CADR0
47K_0402_5%~D B1 CBS_CAD8
CDATA15 CBS_DATA14
CDATA14 B2
1

B3 CBS_CAD6
2

R1150 CDATA13 CBS_CAD4

CDATA12 C4
47K_0402_1%~D B4 CBS_CAD2
CDATA11 CBS_CAD31
CDATA10 M7
M6 CBS_CAD30
2

PWR_ON_RST CDATA9 CBS_CAD28

CDATA8 M5
A1 CBS_CAD7
CDATA7 CBS_CAD5
1 CDATA6 A2
A3 CBS_CAD3

C
2
C708
1U_0603_25V6-K~D
CDATA5
CDATA4
CDATA3
A4
C5
CBS_CAD1
CBS_CAD0
CBS_DATA2
Express Card C

CDATA2 N7
N6 CBS_CAD29
CDATA1 CBS_CAD27
CDATA0 N5 +1.5V_CARD: Max. 650mA, Average 500mA
CBS_CAD11
OE# C1
CBS_CGNT# +3.3V_CARD: Max. 1300mA, Average 1000mA
Power-On-Reset: GBRST# WE# F4
CBS_CAD10
CE2# D3
(Global Reset) CE1# D5 CBS_CC/BE0#
L4 CBS_CC/BE3#
Note: De-asserted BEFORE REG#
N1 CBS_CRST#
RESET
PERST# de-assertion WAIT# N2 CBS_CSERR#
L7 CBS_CCLKRUN#
WP#/IOIS16# CBS_CINT# +1.5V_CARD +3.3V_SUS
RDY/IREQ# G4
L6 CBS_CAUDIO
BVD2

0.1U_0402_16V4Z~D
K7 CBS_CSTSCHNG
BVD1 CBS_CVS2
VS2# K5

2.2K_0402_5%~D

2.2K_0402_5%~D
2@ C1007
E4 CBS_CVS1 1 2 1
VS1#

1
2@ R126

2@ R127
VPPEN1 D9 K8 CBS_CCD2# @R791
@ R791 0_0402_5%~D
<33> VPPEN1 VPPEN0 VPPEN1 CD2# CBS_CCD1#
E10 VPPEN0 CD1# D6
<33> VPPEN0 VCC3EN# CBS_CREQ#
<33> VCC3EN# F10 VCC3EN# INPACK# K6
VCC5EN# CBS_CAD13 2
E11 D1 1 2
<33> VCC5EN# VCC5EN# IORD# CBS_CAD15 @ R792
@R792 0_0402_5%~D 2@
E1

2
IOWR# USBP10_D- JEXP1
<33> USBP10-_EXP 4 4 3 3
1 GND1
R5U242-CSP144P_CSP144~D 2
USBP10_D+ USB_D-
<33> USBP10+_EXP 1 1 2 2 3 USB_D+
CPUSB# 4
2@ L64 CPUSB#
5 RESERVED
DLW21SN900SQ2_0805~D 6
CARD_SMBCLK RESERVED
<40> CARD_SMBCLK 7 SMB_CLK
CARD_SMBDAT 8
B <40> CARD_SMBDAT SMB_DAT B
1@ JCBUS1 9 +1.5V
1 GND1 GND3 35 10 +1.5V
CBS_CAD0 2 36 CBS_CCD1# PCIE_WAKE# 11
CBS_CAD1 CAD0 CCD1# CBS_CAD2 <36,39> PCIE_WAKE# WAKE#
3 CAD1 CAD2 37 +3.3V_CARDAUX 12 +3.3VAUX
CBS_CAD3 4 38 CBS_CAD4 +CBS_VPP CARD_RESET# 13
CAD3 CAD4 PERST#
0.1U_0402_10V7K~D

0.1U_0402_16V4Z~D
CBS_CAD5 5 39 CBS_CAD6 14
CAD5 CAD6 +3.3V_CARD +3.3V
CBS_CAD7 6 40 CBS_DATA14 1 15
CAD7 CB_D14 1@ C769 +3.3V

2@ C1004
CBS_CC/BE0# 7 41 CBS_CAD8 1 16
CBS_CAD9 CCBE0# CAD8 CBS_CAD10 <16> EXPCLK_REQ# EXPRCRD_CPPE# CLKREQ#
8 CAD9 CAD10 42 17 CPPE#
CBS_CAD11 9 43 CBS_CVS1 18
CAD11 CVS1 2 <16> CLK_PCIE_EXP# REFCLK-

0.1U_0402_16V4Z~D
CBS_CAD12 10 44 CBS_CAD13 19
CAD12 CAD13 2 <16> CLK_PCIE_EXP REFCLK+
CBS_CAD14 11 45 CBS_CAD15 20
CAD14 CAD15 GND

2@ C1005
CBS_CC/BE1# 12 46 CBS_CAD16 1 <16> PCIE_PRX_EXPTX_N4 21
CBS_CPAR CCBE1# CAD16 CBS_DATA18 PER_N0
13 CPAR CB_D18 47 <16> PCIE_PRX_EXPTX_P4 22 PER_P0
CBS_CPERR# 14 48 CBS_CBLOCK# 23
CBS_CGNT# CPERR# CBLOCK# CBS_CSTOP# GND
15 CGNT# CSTOP# 49 <16> PCIE_PTX_EXPRX_N4_C 24 PET_N0
CBS_CINT# 16 50 CBS_CDEVSEL# 2 25
CINT# CDEVSEL# Close to JCBUS1 Pin18/52 <16> PCIE_PTX_EXPRX_P4_C PET_P0
+CBS_VCC 17 VCC VCC 51 +CBS_VCC 26 GND
+CBS_VPP 18 VPP1 VPP2 52 +CBS_VPP
CBS_CCLK 19 53 CBS_CTRDY# 27
CBS_CIRDY# CCLK CTRDY# CBS_CFRAME# GND
20 CIRDY# CFRAME# 54 28 GND
CBS_CC/BE2# 21 55 CBS_CAD17 29
CBS_CAD18 CCBE2# CAD17 CBS_CAD19 +CBS_VCC GND
22 CAD18 CAD19 56 30 GND
CBS_CAD20 23 57 CBS_CVS2
CBS_CAD21 CAD20 CVS2 CBS_CRST# MOLEX_48326-0001_RT
24 CAD21 CRST# 58
CBS_CAD22 25 59 CBS_CSERR#
CAD22 CSERR#
0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

10U_0805_10V4Z~D

CBS_CAD23 26 60 CBS_CREQ#
CAD23 CREQ#
1@ C541

1@ C542

1@ C543

CBS_CAD24 27 61 CBS_CC/BE3#
CBS_CAD25 CAD24 CCBE3# CBS_CAUDIO
28 CAD25 CAUDIO 62 1 1 1
CBS_CAD26 29 63 CBS_CSTSCHNG
CBS_CAD27 CAD26 CSTSCHG CBS_CAD28
30 CAD27 CAD28 64
CBS_CAD29 31 65 CBS_CAD30
A CBS_DATA2 CAD29 CAD30 CBS_CAD31 2 2 2 A
32 CB_D2 CAD31 66
CBS_CCLKRUN# 33 67 CBS_CCD2#
CCLKRUN# CCD2#
34 GND2 GND4 68
Close to JCBUS1 pin23,63
69 GND5 GND7 71 DELL CONFIDENTIAL/PROPRIETARY
70 GND6 GND8 72
Compal Electronics, Inc.
MOLEX_48315-0013_RT Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT R5U241 (2/2)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 34 of 57
 5 4 3 2 1

WWW.AliSaler.Com

D D

Mini WWAN Mini WLAN

+15V_ALW +3.3V_ALW +3.3V_PCIE_SATA_WAN +3.3V_RUN +15V_ALW +3.3V_ALW +3.3V_WLAN

100K_0402_5%~D

100K_0402_5%~D
@ R504

D
6 0_0805_5%~D 6

S
1

1
100K_0402_5%~D
5 4 1 2 5 4

1
100K_0402_5%~D

R453

R432
2 2

1
1 Q51 1 Q47

R431
SI3456BDV-T1-E3_TSOP6~D SI3456BDV-T1-E3_TSOP6~D

G
R451

3
2
1

1
2

3
4700P_0402_25V7K~D

4700P_0402_25V7K~D
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D
R1540 R1541
1 20K_0402_5%~D 1 20K_0402_5%~D

Q193B

Q53B
C571

C551
5 5

2
6

6
2 2
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D
4

4
Q193A

Q53A
<39> MCARD_WWAN_PWREN 2 <39> AUX_EN_WOWL 2
1

1
1

1
R452 R437
100K_0402_5%~D 100K_0402_5%~D
C C
2

2
FUNCTION FIELD.

PCIE/BKT Card
+15V_ALW +3.3V_ALW +3.3V_PCIE_BKT
100K_0402_5%~D

B B
D

6
S
1
100K_0402_5%~D

5 4
1

R436

2
1 Q50
R435

SI3456BDV-T1-E3_TSOP6~D
G
2

3
2

1
3
DMN66D0LDW-7_SOT363-6~D

4700P_0402_25V7K~D

R1542
1 20K_0402_5%~D
Q192B

C553

5
2
6

2
DMN66D0LDW-7_SOT363-6~D

4
Q192A

<36,39> MCARD_PCIE_BKT_PWREN 2
1

R450
100K_0402_5%~D
2

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PCIE PWR
Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 35 of 57
 5 4 3 2 1

WWW.AliSaler.Com +3.3V_ALW_PCH
+3.3V_ALW_PCH

1 2 PCIE_MCARD1_DET# 1 2
USB_MCARD2_DET# 2 1 @R428
@ R428 0_0402_5%~D R443 100K_0402_5%~D
R447 100K_0402_5%~D
1 2 WLAN_RADIO_DIS#_R
<39> WLAN_RADIO_DIS# +3.3V_RUN
+3.3V_RUN D21
RB751S40T1_SOD523-2~D USB_MCARD1_DET# 1 2
PCIE_MCARD2_DET# 1 2 R438 100K_0402_5%~D
R449 100K_0402_5%~D PCIE_MCARD1_DET# 1 2
@ R439 100K_0402_5%~D

USB_MCARD2_DET# 1 2 PCIE_MCARD2_DET#
D
Mini WWAN @R740
@ R740 0_0402_5%~D D

+3.3V_PCIE_SATA_WAN +3.3V_PCIE_SATA_WAN
JMINI1
1 1 2
3 3
5 5
2
4
6
4
6 +1.5V_RUN
Mini WLAN USB_MCARD1_DET# 1 2 PCIE_MCARD1_DET#
MINI1CLK_REQ# 7 7 8 @ R741 0_0402_5%~D
<16> MINI1CLK_REQ# 8 +SIM_PWR
9 9 10 UIM_DATA +3.3V_WLAN +3.3V_WLAN
CLK_PCIE_MINI1# 10 UIM_CLK
11 11 12 12
<16> CLK_PCIE_MINI1# CLK_PCIE_MINI1 UIM_RESET JMINI2 +1.5V_RUN
<16> CLK_PCIE_MINI1 13 13 14 14 <34,39> PCIE_WAKE#
15 15 16 UIM_VPP PCIE_WAKE# 1 2
16 COEX2_WLAN_ACTIVE R440 1 2
17 17 18 1 2 0_0402_5%~D 3 4
18 WWAN_RADIO_DIS# <41> COEX2_WLAN_ACTIVE COEX1_BT_ACTIVE R441 3 4
19 19 20 WWAN_RADIO_DIS# <39> 1 2 0_0402_5%~D 5 6
20 <41> COEX1_BT_ACTIVE 5 6
21 21 22 1 2 PCH_PLTRST#_EC <8,18,32,34,39,40> 7 8
PCIE_PRX_WANTX_N1 22 R442 0_0402_5%~D <16> MINI2CLK_REQ# 7 8
23 23 24 9 10 1 2
<16> PCIE_PRX_WANTX_N1 PCIE_PRX_WANTX_P1 24 9 10
25 25 26 26 11 11 12 12
<16> PCIE_PRX_WANTX_P1 <16> CLK_PCIE_MINI2# C1705 4700P_0402_25V7K~D
27 27 28 28 <16> CLK_PCIE_MINI2 13 13 14 14
29 29 30 30 15 15 16 16 HOST_DEBUG_TX <40>
PCIE_PTX_WANRX_N1_C 31 31 32 17 18
<16> PCIE_PTX_WANRX_N1_C 32 <40> HOST_DEBUG_RX 17 18
PCIE_PTX_WANRX_P1_C 33 33 34 19 20 WLAN_RADIO_DIS#_R
<16> PCIE_PTX_WANRX_P1_C 34 <40> MSCLK 19 20
35 35 36 USBP5- 21 22 2 1 PCH_PLTRST#_EC
36 USBP5- <18> 21 22
PCIE_MCARD2_DET# 37 37 38 USBP5+ PCIE_PRX_WLANTX_N2 23 24 R444 0_0402_5%~D
<18> PCIE_MCARD2_DET# 38 USBP5+ <18> <16> PCIE_PRX_WLANTX_N2 23 24
39 39 40 USB_MCARD2_DET# PCIE_PRX_WLANTX_P2 25 26
40 USB_MCARD2_DET# <19> <16> PCIE_PRX_WLANTX_P2 25 26
41 41 42 LED_WWAN_OUT# 27 28
42 LED_WWAN_OUT# <43> 27 28
43 43 44 44 29 29 30 30
45 45 46 1 2 WIMAX_LED# PCIE_PTX_WLANRX_N2_C 31 32
46 COEX2_WLAN_ACTIVE <16> PCIE_PTX_WLANRX_N2_C PCIE_PTX_WLANRX_P2_C 31 32
47 47 48 R840 0_0402_5%~D 33 34
+1.5V_RUN 48 <16> PCIE_PTX_WLANRX_P2_C 33 34
49 49 50 For WIMAX LED debug 35 36 USBP4-
50 35 36 USBP4- <18>
51 51 52 1 PCIE_MCARD1_DET# 37 38 USBP4+
52 <19> PCIE_MCARD1_DET# 37 38 USB_MCARD1_DET# USBP4+ <18>
39 39 40 40 USB_MCARD1_DET# <19>
53 54 @C552
@ C552 41 42 WIMAX_LED#
GND1 GND2 41 42
33P_0402_50V8J~D

0.047U_0402_16V4Z~D

C 33P_0402_50V8J~D LED_WLAN_OUT# C
43 43 44 44 LED_WLAN_OUT# <43>
2 45 46
<16> PCH_CL_CLK1 45 46
1 1 TYCO_1775861-1~D 47 48 1 2
<16> PCH_CL_DATA1 47 48 MSDATA <40>
<16> PCH_CL_RST1# 1 2 PCH_CL_RST1#_R 49 50 @ R1409 0_0402_5%~D
49 50
C569

C570

R448 0_0402_5%~D 51 52
51 52
2 2
53 GND1 GND2 54
+1.5V_RUN +3.3V_WLAN

330U_D2E_6.3VM_R25~D
TYCO_1775861-1~D

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

4.7U_0603_6.3V6M~D
Primary Power Aux Power 1
PWR Rail Voltage 1 1 1 1 1 1 1 1 @

C554
@ +
Tolerance

C555

C556

C557

C558

C559

C560

C561

C562
Peak Normal Normal
2 2 2 2 2 2 2 2 2
+3.3V_PCIE_SATA_WAN +3.3V +-9% 1000 750
250 (Wake enable)
0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

33P_0402_50V8J~D

22U_0805_6.3VAM~D

33P_0402_50V8J~D

330U_D2E_6.3VM_R25~D

+3.3V_PCIE_SATA_WAN +-9% 330 250 5 (Not wake enable)

1
1 1 1 1 1
+ USB_MCARD3_DET# 2 PCIE_MCARD3_DET#
+1.5V +-5% 500 375 NA 1 WPAN Noise
C564

C565

C566

C567

C568

C563

@R742
@ R742 0_0402_5%~D
USB_MCARD3_DET#
2 2 2 2 2 2
PCIE/BKT Card 1
+3.3V_PCIE_BKT +3.3V_PCIE_BKT C572
4700P_0402_25V7K~D
JMINI3 2
B PCIE_WAKE# 1 2 B
COEX2_WLAN_ACTIVE R454 1 1 2
2 0_0402_5%~D 3 4
3 4
5 5 6 6 +1.5V_RUN
MINI3CLK_REQ#_Q 7 8
7 8
9 10 Confirm with DELL about UWB
SIM Card <16> CLK_PCIE_MINI3#
<16> CLK_PCIE_MINI3
CLK_PCIE_MINI3#
CLK_PCIE_MINI3
11
13
9
11
13
10
12
14
12
14
15 15 16 16
+SIM_PWR 17 18
17 18
19 19 20 20 UWB_RADIO_DIS# <39>
JSIM1 21 22 2 1 PCH_PLTRST#_EC
21 22 R456 0_0402_5%~D
1 VCC GND 5 <16> PCIE_PRX_WPANTX_N5 23 23 24 24
UIM_RESET 2 6 UIM_VPP 25 26
UIM_CLK RST VPP UIM_DATA <16> PCIE_PRX_WPANTX_P5 25 26
3 CLK I/O 7 27 27 28 28
4 NC NC 8 29 29 30 30
1U_0402_6.3V6K~D

9 31 32 UWB_RADIO_DIS#
GND <16> PCIE_PTX_WPANRX_N5_C 31 32
1 GND 10 <16> PCIE_PTX_WPANRX_P5_C 33 33 34 34
35 36 USBP13-
35 36 USBP13- <18>
C573

MOLEX_475531001 PCIE_MCARD3_DET# 37 38 USBP13+

<18> PCIE_MCARD3_DET# 37 38 USB_MCARD3_DET# USBP13+ <18>
39 39 40 40 USB_MCARD3_DET# <15>
2 1 2 41 42
+3.3V_RUN 41 42
R458 100K_0402_5%~D 43 44 2 1 +3.3V_ALW_PCH
43 44 R266 100K_0402_5%~D
45 45 46 46
47 47 48 48
U31 49 50
+1.5V_RUN +3.3V_PCIE_BKT 49 50
51 51 52 52

UIM_RESET 1 6 UIM_VPP 53 54
GND1 GND2
0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

4.7U_0603_6.3V6M~D
2 5 +SIM_PWR reserved for test 1 1 1 1 1 1 1 1 TYCO_1775861-1~D
+3.3V_PCIE_BKT @
C578

C579

C580

C581

C582

C583

C584

C585
A A
UIM_CLK 3 4 UIM_DATA R1492
1

2 2 2 2 2 2 2 2
1 2
33P_0402_50V8J~D

33P_0402_50V8J~D

33P_0402_50V8J~D

33P_0402_50V8J~D

0_0402_5%~D @ R207
@ @ @ @ 100K_0402_5%~D
1 1
SRV05-4.TCT_SOT23-6~D
1 1
@ Q191 DELL CONFIDENTIAL/PROPRIETARY
C574

C575

C576

C577

SSM3K7002FU_SC70-3~D
2

2 2 2 2 MINI3CLK_REQ#_Q Compal Electronics, Inc.

D

<16> MINI3CLK_REQ# 1 3
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Mini Card
G
2

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
MCARD_PCIE_BKT_PWREN PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
<35,39> MCARD_PCIE_BKT_PWREN LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 36 of 57
 5 4 3 2 1

WWW.AliSaler.Com @ L29
@L29 +5V_ESATA/USB3 +5V_ESATA/USB2
DLW21SN121SQ2L_4P~D
1 1 FP_USB_D+ @ R1528
@R1528
<31> FP_USBD+ 2 2 0_0402_5%~D
+5V_ALW PJP23 U53 2 1
FP_USB_D- JUMP_43X79 <15,19> EN_ESATA_RPTR#
<31> FP_USBD- 4 3 1 10 USB_OC1# <18>
4 3 +5V_ALW_USB GND FAULT1#
2 2 1 1 2 IN OUT1 9

1
D
1 2 3 8
IN OUT2

0.1U_0402_16V4Z~D

10U_1206_16V4Z~D
R422 0_0402_5%~D 4 7 R28 1 2 @ Q211 2 ESATA_EN
<39> ESATA_USB_PWR_EN# EN1# ILIM
1 2 5 6 24.9K_0402_1%~D SSM3K7002FU_SC70-3~D G
R423 0_0402_5%~D EN2# FAULT#2
1 1 11 S

3
T-PAD

C546

C547
TPS2560DRCR_SON10_3X3~D
D Fingerprint CONN.+3.3V_RUN 2 2
D

JBIO1

0.1U_0402_16V4Z~D
1 1 +3.3V_RUN
2 +3.3V_RUN
2 FP_USB_D-
3 1
3
4 4 FP_USB_D+
ESATA Repeater

@ R1298
C770
5 5 FP_RESET# <31>

R1299
0.01U_0402_16V7K~D

0.1U_0402_16V4Z~D
6 6

2
7 2
GND 1 1
GND 8

C1378

C1379
+3.3V_RUN 1 2

0_0402_5%~D

0_0402_5%~D
TYCO_2041070-6 +3.3V_RUN Place close to R1513 0_0402_5%~D
ESATA_EN 2 2
JBIO1.1 <39> EN_ESATA_RPTR 1 2

1
@ R1514 0_0402_5%~D
ĐŽŶŶĞĐƚŽƌůŝƐƚ͗ϮϬϰϭϬϳϬͲϲ U95
U51 7 6
ESATA_PTX_DRX_P4_C 2 ESATA_PTX_DRX_P4 EN VCC
1 GND VCC 4 +3.3V_RUN <15> ESATA_PTX_DRX_P4_C 1 VCC 10
C304 0.01U_0402_16V7K~D 1 16
ESATA_PTX_DRX_N4_C 2 ESATA_PTX_DRX_N4 RX_1P VCC
<15> ESATA_PTX_DRX_N4_C 1 2 20
FP_USB_D- FP_USB_D+ C303 0.01U_0402_16V7K~D RX_1N VCC
2 IO1 IO2 3
ESATA_PRX_DTX_P4_C 2 1 ESATA_PRX_DTX_P4 5 9
PRTR5V0U2X_SOT143-4~D <15> ESATA_PRX_DTX_P4_C C1380 0.01U_0402_16V7K~D TX_2P PE1
4 TX_2N PE2 8
ESATA_PRX_DTX_N4_C 2 1 ESATA_PRX_DTX_N4
<15> ESATA_PRX_DTX_N4_C C1381 0.01U_0402_16V7K~D ESATA_PTX_DRX_P4_RP
3 GND TX_1P 15
13 14 ESATA_PTX_DRX_N4_RP
GND TX_1N
17 GND
18 12 ESATA_PRX_DTX_N4_RP
GND RX_2N ESATA_PRX_DTX_P4_RP
19 GND RX_2P 11
21 PAD

1
1
SN75LVCP412ARTJR_QFN20_4X4~D
C C

0_0402_5%~D
R1301

R1300
0_0402_5%~D

2
2
@

@ D4
USBP2_R+ 1 6 USBP2_R-
V I/O V I/O +5V_ESATA/USB3
2 Ground V BUS 5 +5V_ALW_USB

150U_D2_6.3VY_R15M~D
USBP3_R- 3 4 USBP3_R+
V I/O V I/O

0.1U_0402_16V4Z~D
IP4223CZ6_SO6~D 1
1
+

C544

C545
2 2
I/O board CONN.
Connector need updated JESA1
1 A_VBUS
JIO1 USBP3_R- 2
DETECT_GND USBP3_R+ A_D-
<30> SW_LAN_TX3+ 1 1 26 26 3 A_D+
2 27 +5V_ESATA/USB2 4
<30> SW_LAN_TX3- 2 27 AUD_EXT_MIC_L <29> A_GND
3 28 L90 HCMC0805-900MFS_4P~D
3 28 AUD_EXT_MIC_R <29> USBP3- USBP3_R- USB
<30> SW_LAN_TX2- 4 4 29 29 <18> USBP3- 1 1 2 2 5 B_VBUS

150U_D2_6.3VY_R15M~D

0.1U_0402_16V4Z~D
5 30 USBP2_R- 6
B <30> SW_LAN_TX2+ 5 30 +VREFOUT B_D- B
6 31 1 USBP2_R+ 7
6 31 AUD_MIC_SWITCH <29> USBP3+ USBP3_R+ B_D+
<30> SW_LAN_TX1+ 7 7 32 32 LAN_ACTLED_YEL# <30> <18> USBP3+ 4 4 3 3 1 8 B_GND
8 33 +
<30> SW_LAN_TX1- 8 33 LED_10_GRN# <30>

C588

C548
9 34 ESATA_PTX_DRX_P4_RP 1 2 SATA_PTX_DRX_P4 9
9 34 LED_100_ORG# <30> GND
10 35 +3.3V_ALW_PCH 1 2 C1376 0.01U_0402_16V7K~D 10
<30> SW_LAN_TX0- 10 35 2 2 A+ ESATA
11 36 @ R1530 0_0402_5%~D ESATA_PTX_DRX_N4_RP 1 2 SATA_PTX_DRX_N4 11
<30> SW_LAN_TX0+ 11 36 +LOM_VCT_IO A-
12 37 C1377 0.01U_0402_16V7K~D 12
12 37 USB_SIDE_EN# <39> GND
13 38 1 2 ESATA_PRX_DTX_N4_RP 1 2 SATA_PRX_DTX_N4 13
+3.3V_LAN 13 38 USB_OC0# <18> B-
14 39 @ R1531 0_0402_5%~D C549 0.01U_0402_16V7K~D 14
14 39 ESATA_PRX_DTX_P4_RP B+
<18> USBP0+ 15 15 40 40 1 2 SATA_PRX_DTX_P4 15 GND
16 41 PCH_AZ_MDC_BITCLK <15> C550 0.01U_0402_16V7K~D
<18> USBP0- 16 41
17 42 PCH_AZ_MDC_RST1# 16
17 42 G1
<18> USBP1+ 18 18 43 43 17 G2
PCH_AZ_MDC_SDOUT <15>
<18> USBP1- 19 19 44 44 PCH_AZ_MDC_SYNC <15> 18 G3
20 20 45 45 PCH_AZ_MDC_SDIN1 <15> 19 G4
21 21 46 46
AUD_HP_NB_SENSE <29,39> FCI_10100446-003RLF
22 22 47 47
23 23 48 48 AUD_HP_OUT_L <29>
+5V_ALW 24 24 49 49 AUD_HP_OUT_R <29>
25 50 L91 HCMC0805-900MFS_4P~D
<19> IO_LOOP 25 50
0.1U_0402_16V4Z~D

USBP2- 1 USBP2_R-
1
TYCO_1759898-1
<18> USBP2- 1 2 2 PCH_AZ_MDC_RST1#

S
<15> PCH_AZ_MDC_RST# 1 3
C623

USBP2+ 4 3 USBP2_R+ +5V_ALW

2 <18> USBP2+ 4 3 Q35

100K_0402_5%~D
G
2

1
10K_0402_5%~D
SSM3K7002FU_SC70-3~D

R325
1 2

1
@ R1532 0_0402_5%~D

R326
+3.3V_LAN +VREFOUT +LOM_VCT_IO +3.3V_ALW_PCH 1 2

2
@ R1533 0_0402_5%~D
0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1U_0402_6.3V6K~D

0.1U_0402_16V4Z~D

1 1 1 1

2
@C712
@

A A
ƌĞƐĞƌǀĞĚĨŽƌD/ƚĞƐƚŝŶŐ <39> MDC_RST_DIS#
C768

C634

C712

C711

2 2 2 2

DELL CONFIDENTIAL/PROPRIETARY
Place close Place close Place close Place close
Compal Electronics, Inc.
Title
to JIO1.13 to JIO1.30 to JIO1.36 to JIO1.35 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT USB 2.0 PORT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 37 of 57
 2 1

WWW.AliSaler.Com
JDOCK1

DOCK_DET_1 1 2 DOCK_AC_OFF
1 2 DOCK_AC_OFF <39,50>
3 3 4 4
<30> DOCK_LOM_SPD10LED_GRN# DPC_CA_DET DOCK_LOM_SPD100LED_ORG# <30>
5 5 6 6
<26> DPB_DOCK_CA_DET DPC_CA_DET <25>
7 7 8 8
9 10 DPC_DOCK_LANE_P0 C361 2 1 0.1U_0402_10V7K~D
<26> DPB_DOCK_LANE_P0 9 10 DPC_DOCK_LANE_N0 DPC_PCH_LANE_P0 <17>
11 12 C357 2 1 0.1U_0402_10V7K~D
<26> DPB_DOCK_LANE_N0 11 12 DPC_PCH_LANE_N0 <17>
13 13 14 14
15 16 DPC_DOCK_LANE_P1 C355 2 1 0.1U_0402_10V7K~D
<26> DPB_DOCK_LANE_P1 15 16 DPC_PCH_LANE_P1 <17>
17 18 DPC_DOCK_LANE_N1 C313 2 1 0.1U_0402_10V7K~D
<26> DPB_DOCK_LANE_N1 17 18 DPC_PCH_LANE_N1 <17>
19 19 20 20
21 22 DPC_DOCK_LANE_P2 C360 2 1 0.1U_0402_10V7K~D
<26> DPB_DOCK_LANE_P2 21 22 DPC_PCH_LANE_P2 <17>
23 24 DPC_DOCK_LANE_N2 C362 2 1 0.1U_0402_10V7K~D
<26> DPB_DOCK_LANE_N2 23 24 DPC_PCH_LANE_N2 <17>
25 25 26 26
27 28 DPC_DOCK_LANE_P3 C364 2 1 0.1U_0402_10V7K~D
<26> DPB_DOCK_LANE_P3 27 28 DPC_PCH_LANE_P3 <17>
29 30 DPC_DOCK_LANE_N3 C363 2 1 0.1U_0402_10V7K~D
<26> DPB_DOCK_LANE_N3 29 30 DPC_PCH_LANE_N3 <17>
31 31 32 32
<26> DPB_DOCK_AUX 33 33 34 34 DPC_DOCK_AUX <25>
<26> DPB_DOCK_AUX# 35 35 36 36 DPC_DOCK_AUX# <25>
37 37 38 38
<26> DPB_DOCK_HPD 39 39 40 40 DPC_PCH_DOCK_HPD <17>
+NBDOCK_DC_IN_SS 41 41 42 42 ACAV_DOCK_SRC# <50>
1 43 43 44 44 1
BLUE_DOCK 45 46
<27> BLUE_DOCK 45 46 DAT_DDC2_DOCK <27>
C985 47 48 C986
B 47 48 CLK_DDC2_DOCK <27> B
0.033U_0402_16V7K~D 49 50 0.033U_0402_16V7K~D
2 49 50 2
Close to DOCK 51 51 52 52
RED_DOCK 53 54 SATA_PRX_DKTX_P5 2 1
Its for Enhance ESD on dock issue. <27> RED_DOCK 53 54 SATA_PRX_DKTX_N5 C586 2 1 0.01U_0402_16V7K~D
SATA_PRX_DKTX_P5_C <15>
55 55 56 56 SATA_PRX_DKTX_N5_C <15> Close to DOCK
57 58 C587 0.01U_0402_16V7K~D
GREEN_DOCK 59
57 58
60 SATA_PTX_DKRX_P5 1 2
Its for Enhance ESD on dock issue.
<27> GREEN_DOCK 59 60 SATA_PTX_DKRX_P5_C <15>
61 62 SATA_PTX_DKRX_N5 C306 1 2 0.01U_0402_16V7K~D
61 62 C305 0.01U_0402_16V7K~D SATA_PTX_DKRX_N5_C <15>
63 63 64 64
<27> HSYNC_DOCK 65 65 66 66 USBP8+ <18>
<27> VSYNC_DOCK 67 67 68 68 USBP8- <18>
69 69 70 70
71 72 DPC_PCH_DOCK_HPD
<40> CLK_MSE 71 72 USBP9+ <18>
<40> DAT_MSE 73 73 74 74 USBP9- <18>
DPB_DOCK_HPD 75 76
75 76
<29> DAI_BCLK# 77 77 78 78 CLK_KBD <40>

2
<29> DAI_LRCK# 79 79 80 80 DAT_KBD <40>
81 82 R796
81 82
2

<29> DAI_DI 83 83 84 84 110K_0402_1%~D

R798 85 86
<29> DAI_DO# 85 86
110K_0402_1%~D 87 88

1
87 88
<29> DAI_12MHZ# 89 89 90 90
91 92
1

91 92
93 93 94 94
95 95 96 96
<39> D_LAD0 97 97 98 98 BREATH_LED# <40,43>
<39> D_LAD1 99 99 100 100
DOCK_LOM_ACTLED_YEL# <30>
101 101 102 102
<39> D_LAD2 103 103 104 104
DOCK_LOM_TRD0+ <30>
<39> D_LAD3 105 105 106 106
DOCK_LOM_TRD0- <30>
107 107 108 108
109 110 +3.3V_ALW
<39> D_LFRAME# 109 110 DOCK_LOM_TRD1+ <30> +LOM_VCT
111 112 R1038
<39> D_CLKRUN# 111 112 DOCK_LOM_TRD1- <30>
113 114 100K_0402_5%~D
113 114 DOCK_DET#
<39> D_SERIRQ 115 116 1 1 2
115 116
<39> D_DLDRQ1# 117 117 118 118 +LOM_VCT
119 120 C42
119 120 1U_0402_6.3V6K~D
<18> CLK_PCI_DOCK 121 121 122 122 DOCK_LOM_TRD2+ <30> 2
123 123 124 124 DOCK_LOM_TRD2- <30>
125 125 126 126
127 128 +PWR_SRC +VCHGR
<40> DOCK_SMB_CLK 127 128 DOCK_LOM_TRD3+ <30>
<40> DOCK_SMB_DAT 129 129 130 130 DOCK_LOM_TRD3- <30>
131 132 2 1
131 132 C1891 0.1U_0402_25V4Z~D
<40,44> DOCK_SMB_ALERT# 133 133 134 134 DOCK_DCIN_IS+ <51>
<44> DOCK_PSID 135 135 136 136 DOCK_DCIN_IS- <51>
137 137 138 138
139 140 D71
<40> DOCK_PWR_BTN# 139 140 DOCK_POR_RST# <40>
141 142 RB751S40T1_SOD523-2~D
SLICE_BAT_PRES# 141 142 DOCK_DET_R#
<39,44,50> SLICE_BAT_PRES# 143 144 1 2 DOCK_DET# <39>
143 144
145 149 CLK_PCI_DOCK
GND1 PWR2 +DOCK_PWR_BAR
+DOCK_PWR_BAR 146 PWR1 PWR2 150

1
4.7U_0805_25V6K~D
147 PWR1 PWR2 151
3

2
4.7U_0805_25V6K~D

148 152 @ R462

@R462
PWR1 GND2

0.1U_0603_50V4Z~D
C1033
SM24.TCT_SOT23-3~D
D64

1 1 10_0402_5%~D
@ C1899

0.1U_0603_50V4Z~D
C1034

C1900
1 1 153 Shield_G Shield_G 159
@

154 160

2
Shield_G Shield_G
155 Shield_G Shield_G 161 1
156 162 2 2
1

2 2 Shield_G Shield_G @C590

@C590
157 Shield_G Shield_G 163
158 164 4.7P_0402_50V8C~D
Shield_G Shield_G 2

JAE_WD2F144WB1R300~D
A A

Reserve for EMI test

Compal Electronics, Inc.

Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT DOCKING CONN
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
2
WWW.AliSaler.Com 1
Date: Wednesday, January 20, 2010 Sheet 38 of 57
 5 4 3 2 1

WWW.AliSaler.Com
+3.3V_ALW

1 2 PCIE_WAKE#
+3.3V_RUN
Option for select PC
Card & Express Card
R501 10K_0402_5%~D For PC Card stuff R882

2
1 2 SLICE_BAT_PRES# For Experss card stuff
R503 100K_0402_5%~D 1@ R882 +3.3V_ALW
1 2 DCIN_CBL_DET# 100K_0402_5%~D R883
R862 100K_0402_5%~D

1
1 1 1 1
DET_PCCRD_EXPSCRD# 1
C1072 C648 C649 C650

2
1 2 PWR_BTN_BD_DET# 10U_0805_10V4Z~D 0.1U_0402_16V4Z~D C652 0.1U_0402_10V7K~D 0.1U_0402_16V4Z~D
R754 100K_0402_5%~D 2@ R883 2 2 0.1U_0402_16V4Z~D 2 2
100K_0402_5%~D 2
D D

A17
B30
A43
A54
U35
+3.3V_ALW2 B68 +3.3V_ALW

VCC1
VCC1
VCC1
VCC1
NC
NC B35
PBAT_PRES# B52 B34 +3.3V_ALW
<44> PBAT_PRES# GPIOA[0] NC
1 2 USB_SIDE_EN# A49 B1
R502 10K_0402_5%~D <43> SCRL_LED# GPIOA[1] NC
B53 GPIOA[2] VCC1 B5
<43> NUM_LED#

0.1U_0402_16V4Z~D
1 2 ESATA_USB_PWR_EN# DCIN_CBL_DET# A50 B8 DOCK_MIC_DET
<44> DCIN_CBL_DET# GPIOA[3] GPIOJ[7] DOCK_MIC_DET <29>
R923 10K_0402_5%~D PBATT_OFF B54 B11 TEMP_ALERT# TP_DET# 2 1
<50> PBATT_OFF GPIOA[4] GPIOK[4] TEMP_ALERT# <15,19>
MDC_RST_DIS# A51 R756 100K_0402_5%~D
<37> MDC_RST_DIS#
<34,36> PCIE_WAKE#
PCIE_WAKE# B55
GPIOA[5]
GPIOA[6]
ECE5028-LZY GPIOI[1] B63 SIO_SLP_M#
SIO_SLP_M# <17,48>
1

C653
A52 GPIOA[7]
A5 SIO_SLP_LAN# +3.3V_RUN
GPIOJ[2] SIO_SLP_LAN# <17,30> 2
+3.3V_RUN WIRELESS_ON#/OFF B13 B6
<43> WIRELESS_ON#/OFF GPIOH[0] GPIOJ[3]
BT_RADIO_DIS# A13 A7 DOCK_HP_DET
<41> BT_RADIO_DIS# GPIOH[1] GPIOJ[6] DOCK_HP_DET <29>
EXPRCRD_PWREN# B14 B7 CRT_SWITCH CRT_SWITCH <27> D_CLKRUN# 2 1
<34> EXPRCRD_PWREN# GPIOH[4] GPIOJ[5]
EXPRCRD_STDBY# A14 A8 ME_FWP R510 100K_0402_5%~D
<34> EXPRCRD_STDBY# GPIOH[5] GPIOK[0] ME_FWP <15>
BC_INT#_ECE5028 A29 B9 D_SERIRQ 2 1
<40> BC_INT#_ECE5028 BC_INT# GPIOK[1]
1 2 WIRELESS_ON#/OFF BC_DAT_ECE5028 B31 A10 DP_PRIORITY R511 100K_0402_5%~D
<40> BC_DAT_ECE5028 BC_DAT GPIOK[3] DP_PRIORITY <26>
R874 100K_0402_5%~D BC_CLK_ECE5028 A30 B10 1.8V_RUN_PWRGD D_DLDRQ1# 2 1
1 2 SP_TPM_LPC_EN
<40> BC_CLK_ECE5028 BC_CLK GPIO GPIOK[2]
GPIOK[5] A11 RUN_ON
1.8V_RUN_PWRGD <47>
RUN_ON <12,34,42,47>
R512 100K_0402_5%~D
@ R788 10K_0402_5%~D TSTX_ECRX_BUF A1 B12 CPU_CATERR# ME_FWP 2 1
ALS_INT# TSRX_ECTX GPIOE[0]/RXD GPIOK[6] R1558 10K_0402_5%~D
1 2 B2
R258 2.2K_0402_5%~D GPIOE[1]/TXD
A2 B66 1 2 IMVP_VR_ON <49>
GPIOE[2]/RTS# GPIOI[6] R509 0_0402_5%~D RUN_ON
B3 GPIOE[3]/DSR# GPIOI[5] A62 2 1
DET_PCCRD_EXPSCRD# 0.75V_DDR_VTT_ON IMVP_PWRGD <8,49,52> R515 100K_0402_5%~D
A3 GPIOE[4]/CTS# GPIOI[2] A60 0.75V_DDR_VTT_ON <47>
1 2 LCD_TST B45 B46 +CAP_LDO 8mil
R816 100K_0402_5%~D GPIOE[5]/DTR# CAP_LDO C1051 CPU_VTT_ON
A42 GPIOE[6]/RI# GPIOJ[0] B67 2 1
PANEL_BKEN_PCH AUX_EN_WOWL <35> +3.3V_ALW 0.1U_0402_16V4Z~D R518 100K_0402_5%~D
2 1 B4
R530 100K_0402_5%~D GPIOE[7]/DCD#
1 2
C SYS_LED_MASK# USB_SIDE_EN# 0.75V_DDR_VTT_ON 2 C
1 2 <37> USB_SIDE_EN# A33 1
R658 10K_0402_5%~D EN_I2S_NB_CODEC# GPIOB[0]/INIT# R520 100K_0402_5%~D
<29> EN_I2S_NB_CODEC# B36 GPIOB[1]/SLCTIN# ACAV_IN_NB <40,50,51>
USH_PWR_STATE# A34 B19 2 1 PBATT_OFF 2 1
<31> USH_PWR_STATE# GPIOC[2]/SLCT TEST_PIN

5
EN_DOCK_PWR_BAR B37 R514 R521 100K_0402_5%~D
<50> EN_DOCK_PWR_BAR
PANEL_BKEN_PCH A35
GPIOC[3]/PE TEST 1K_0402_5%~D ACAV_IN_NB 1
GPIO

P
<17> PANEL_BKEN_PCH GPIOC[4]/BUSY B
ENVDD_PCH B38 4 2 1
<17,24> ENVDD_PCH GPIOC[5]/ACK# O DOCK_AC_OFF <38,50>
LCD_TST A36 2 D65
<24> LCD_TST GPIOC[6]/ERROR# A

G
PSID_DISABLE# A37 A63 DOCK_AC_OFF_EC RB751S40T1_SOD523-2~D
<44> PSID_DISABLE# GPIOC[7]/ALF# GPIOI[7]

1
B40 B65 U69

3
GPIOD[0]/STROBE# GPIOI[4] SIO_SLP_S3# <17>
DOCKED A38 A61 TC7SH08FU_SSOP5~D R1078
<30> DOCKED GPIOC[1]/PD7 GPIOI[3] SIO_SLP_S4# <17> DOCK_AC_OFF_EC <50>
DOCK_DET# B41 33K_0402_5%~D
<38> DOCK_DET# GPIOC[0]/PD6
AUD_NB_MUTE A39
<29> AUD_NB_MUTE MCARD_WWAN_PWREN GPIOB[7]/PD5
B42

2
<35> MCARD_WWAN_PWREN GPIOB[6]/PD4 LPC_LAD[0..3] <15,31,32,40>
LCD_VCC_TEST_EN A40 A27 LPC_LAD0
<24> LCD_VCC_TEST_EN GPIOB[5]/PD3 LAD0
CCD_OFF B43 A26 LPC_LAD1
<24> CCD_OFF GPIOB[4]/PD2 LAD1
AUD_HP_NB_SENSE A41 B26 LPC_LAD2
<29,37> AUD_HP_NB_SENSE GPIOB[3]/PD1 LAD2
ESATA_USB_PWR_EN# B44 B25 LPC_LAD3
<37> ESATA_USB_PWR_EN# GPIOB[2]/PD0 LAD3
A21 LPC_LFRAME#
LID_CL_SIO# LFRAME# PCH_PLTRST#_EC LPC_LFRAME# <15,31,32,40>
B32 B22
<48> CPU_VTT_ON
CPU_VTT_ON A31
GPIOD[1]
GPIOD[2]
LPC LRESET#
PCICLK A28 CLK_PCI_5028
PCH_PLTRST#_EC <8,18,32,34,36,40>
CLK_PCI_5028 <18>
B20 CLKRUN#
CLKRUN# LPC_LDRQ0# CLKRUN# <17,32,40>
B33 GPIOD[3]/VBUS_DET LDRQ0# A23 LPC_LDRQ0# <15>
B15 A22 LPC_LDRQ1#
MCARD_PCIE_BKT_PWREN A15 GPIOD[4]/OCS1_N LDRQ1# IRQ_SERIRQ LPC_LDRQ1# <15>
<35,36> MCARD_PCIE_BKT_PWREN GPIOD[5]/OCS2_N SER_IRQ B21 IRQ_SERIRQ <15,31,32,40>
HDDC_EN B16
<28> HDDC_EN GPIOD[6]/OCS3_N
MODC_EN A16 A32 CLK_SIO_14M
<28> MODC_EN GPIOD[7]/OCS4_N CLKI (14.318 MHz) CLK_SIO_14M <16> CLK_SIO_14M CLK_PCI_5028
+3.3V_ALW SLICE_BAT_PRES# B17 B51
<38,44,50> SLICE_BAT_PRES# GPIOH[6] VSS
PWR_BTN_BD_DET# B18
<43> PWR_BTN_BD_DET# GPIOH[7]

1
B29 D_LAD0
VGA_ID_DISC LAN_DISABLE#_R DLAD0 D_LAD1 D_LAD0 <38> ME_FWP @R506
@ R506 R527
1 2 <30> LAN_DISABLE#_R B47 B28
@R875
@ R875 100K_0402_5%~D GPIOG[0] DLAD1 D_LAD2 D_LAD1 <38> 10_0402_5%~D 10_0402_5%~D
A45 GPIOG[1] DLAD2 A25

2
B VGA_ID_UMA <43> CAP_LED# SYS_LED_MASK# D_LAD3 D_LAD2 <38> B
1 2 B48 A24
R881 100K_0402_5%~D
<43> SYS_LED_MASK#
ALS_INT# A46
GPIOG[2] DLPC DLAD3
B23 D_LFRAME# D_LAD3 <38> @ R649
@R649

2
<24> ALS_INT# GPIOG[3] DLFRAME# D_LFRAME# <38>
R526 1 2 0_0402_5%~D B49 A19 D_CLKRUN# 1K_0402_5%~D
<19> SIO_EXT_WAKE# GPIOG[4] DCLK_RUN# D_CLKRUN# <38>
EN_ESATA_RPTR A47 B24 D_DLDRQ1# 1 1
<37> EN_ESATA_RPTR GPIOG[5] DLDRQ1# D_DLDRQ1# <38>
PCH_PCIE_WAKE# B50 A20 D_SERIRQ
D_SERIRQ <38>

1
VGA_ID_DISC <17> PCH_PCIE_WAKE# WLAN_RADIO_DIS# GPIOG[6] DSER_IRQ @C654
@C654 C656
1 2 <36> WLAN_RADIO_DIS# A48
R522 100K_0402_5%~D GPIOG[7] 4.7P_0402_50V8C~D 4.7P_0402_50V8C~D
VGA_ID_UMA WWAN_RADIO_DIS# 2 2
1 2 <36> WWAN_RADIO_DIS# A53
@R558
@ R558 100K_0402_5%~D SYSOPT1/GPIOH[2]
B57 SYSOPT0/GPIOH[3]
A4 RUNPWROK_R1 2 1 +3.3V_RUN
PWRGD R1130 10K_0402_5%~D
B58 GPIOF[7]
VGA_ID_UMA A55 B56 SP_TPM_LPC_EN
GPIOF[6] OUT65 SP_TPM_LPC_EN <31,32>
VGA_ID_DISC B59
UWB_RADIO_DIS# GPIOF[5]
VGA_ID_UMA VGA_ID_DISC <36> UWB_RADIO_DIS# A56 GPIOF[4]
R528 A6
10K_0402_5%~D GPIOJ[4] GPIO_PSID_SELECT <44> +3.3V_ALW
Discrete 0 1 B60 IRTX VSS A9
2 1 A57 A12
IRRX GPIOK[7] SPI_WP#_SEL <15>
UMA 1 0 VSS A18 1
B61 GPIOF[3]/IRMODE/IRRX3B VSS B27

1
SG 1 1 A58 B39 C657
BCM5882_ALERT# GPIOF[2]/IRTX2 VSS 4.7U_0603_6.3V6M~D R524
<31> BCM5882_ALERT# B62 GPIOF[1]/IRRX2 VSS A44
2 +3.3V_RUN 100K_0402_5%~D
A59 GPIOF[0]/IRMODE/IRRX3A VSS B64
9@ C88 +3.3V_RUN A64
0.1U_0402_16V4Z~D GPIOJ[1] R525
EP

2
1
9@ C114 1 2 10_0402_5%~D
TP_DET# <41> LID_CL_SIO# LID_CL#
0.1U_0402_16V4Z~D ECE5028-LZY_DQFN132_11X11~D R1288 2 1
C1

LID_CL# <43>
1
5

2 1 8.2K_0402_5%~D
1
OE#
P

JTS1 TSTX_ECRX 2 4 TSTX_ECRX_BUF

2
A Y +1.05V_RUN_VTT CPU_CATERR# C655
1 1 +5V_RUN
G

2 9@ U60 R1289 0.047U_0402_16V4Z~D

2

1
3 TSRX_ECTX_BUF SN74LVC1G125DKR_SC70-5~D 2.2K_0402_5%~D C 2
1
3

A 3 TSTX_ECRX A
4 1 2 2
4 B C1372
5 5 TOUCH_SCREEN_DET# <15,19> +5V_RUN Q182 E 0.1U_0402_16V4Z~D

3
6 9@ C89 PMST3904_SOT323-3~D 2
GND
GND 7 0.1U_0402_16V4Z~D
<8> H_CATERR#
DELL CONFIDENTIAL/PROPRIETARY
2 1
TYCO_1734595-5
1

9@
Compal Electronics, Inc.
OE#

TSRX_ECTX_BUF 4 2 TSRX_ECTX PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
Y A TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
ECE5028
G

9@ U61 BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
SN74LVC1G125DKR_SC70-5~D NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
3

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0

LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 39 of 57
 5 4 3 2 1

WWW.AliSaler.Com +RTC_CELL

1
R539
100K_0402_5%~D 1 2

+3.3V_ALW @ C658

2
1U_0402_6.3V6K~D
POWER_SW_IN# 1 2
<23> POWER_SW_IN# POWER_SW#_MB <41,43>
1 2 BC_DAT_ECE5028 1 R541 10K_0402_5%~D
R543 100K_0402_5%~D
2 1 BC_DAT_EMC4002 C659
R545 100K_0402_5%~D +RTC_CELL +3.3V_ALW 1U_0402_6.3V6K~D
2 1 BC_DAT_ECE1077 2
R546 100K_0402_5%~D 1 2 +RTC_CELL_VBAT

0.1U_0402_16V4Z~D
10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
2 1 DOCK_SMB_ALERT# R544 1
D R547 10K_0402_5%~D 0_0402_5%~D D
C660 +RTC_CELL
1 1 1 1 1 1 1 1 1

C661
0.1U_0402_16V4Z~D
2

C663

C662

C664

C665

C666

C667

C668

C651

1
PBAT_SMBDAT 2 2 2 2 2 2 2 2 2
1 2
R551 2.2K_0402_5%~D 1 2

A11
A22
B35
A41
A58
A52

A26
B64
PBAT_SMBCLK R550

B3
1 2
R552 2.2K_0402_5%~D U36 100K_0402_5%~D @ C669

2
2 1 LPC_LDRQ#_MEC 1U_0402_6.3V6K~D

VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]
VTR[8]
VBAT
@ R837 100K_0402_5%~D DOCK_PWR_SW# 1 2
<23> DOCK_PWR_SW# DOCK_PWR_BTN# <38>
1 2 CHARGER_SMBDAT 1 R554 10K_0402_5%~D
R29 2.2K_0402_5%~D
1 2 CHARGER_SMBCLK PS/2 INTERFACE MISC INTERFACE
R30 2.2K_0402_5%~D SML1_SMBDATA A5 A10 SYSTEM_ID
<16> SML1_SMBDATA GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA GPIO021/RC_ID1 2 C670
SML1_SMBCLK B6 B10 BOARD_ID
<16> SML1_SMBCLK GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK GPIO020/RC_ID2
CLK_TP_SIO A37 B14 DDR_ON 1U_0402_6.3V6K~D
<41> CLK_TP_SIO GPIO110/PS2_CLK2/GPTP-IN6 GPIO025/UART_CLK DDR_ON <46,47>
DAT_TP_SIO B40 B44 HOST_DEBUG_TX
<41> DAT_TP_SIO GPIO111/PS2_DAT2/GPTP-OUT6 GPIO120/UART_TX HOST_DEBUG_TX <36>
CLK_KBD A38 B46 HOST_DEBUG_RX
<38> CLK_KBD GPIO112/PS2_CLK1A GPIO124/GPTP-OUT5/UART_RX HOST_DEBUG_RX <36>
+3.3V_RUN DAT_KBD B41 B26 RUNPWROK
<38> DAT_KBD GPIO113/PS2_DAT1A VCC_PRWGD
CLK_MSE A39 A25 EN_INVPWR
<38> CLK_MSE GPIO114/PS2_CLK0A GPIO060/KBRST EN_INVPWR <24>
1 2 DAI_GPU_R3P_SMBDAT DAT_MSE B42 B36 +RTC_CELL
<38> DAT_MSE GPIO115/PS2_DAT0A GPIO101/ECGP_SCLK
R26 2.2K_0402_5%~D PBAT_SMBDAT B59 B37
<44> PBAT_SMBDAT GPIO154/I2C1C_DATA/PS2_CLK1B GPIO103/ECGP_SIN
1 2 DAI_GPU_R3P_SMBCLK PBAT_SMBCLK A56 B38
<44> PBAT_SMBCLK GPIO155/I2C1C_CLK/PS2_DAT1B GPIO105/ECGP_SOUT

1
R27 2.2K_0402_5%~D A34 DDR_HVREF_RST_GATE
GPIO102/HSPI_SCLK DDR_HVREF_RST_GATE <8>
GPIO104/HSPI_MISO A35
A36 CPU1.5V_S3_GATE 1 2
GPIO106/HSPI_MOSI MSDATA CPU1.5V_S3_GATE <12> R560
JTAG INTERFACE GPIO116/MSDATA A40 MSDATA <36>
2 1 MSDATA JTAG_TDI A51 B43 MSCLK 100K_0402_5%~D @ C1885
MSCLK <36>

2
R589 10K_0402_5%~D JTAG_TDO GPIO145/JTAG_TDI GPIO117/MSCLK SIO_A20GATE 1U_0402_6.3V6K~D
B55 GPIO146/I2C1K_CLK/JTAG_TDO GPIO127/A20M A45 SIO_A20GATE <19>
2 1 M_ON JTAG_CLK B56 A55 PS_ID LAT_ON_SW# 1 2
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK GPIO153/LED3 PS_ID <44> LAT_ON_SW#_R <43>
R561 100K_0402_5%~D JTAG_TMS A53 A57 BAT1_LED# Bat2 = Amber LED 1 R1512 10K_0402_5%~D
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS GPIO156/LED1 BAT1_LED# <43>
1 2 AUX_ON JTAG_RST# B57 B61 BAT2_LED#
JTAG_RST# GPIO157/LED2 BAT2_LED# <43>Bat1 = Blue LED
R563 2.7K_0402_5%~D C1053 B65 FWP#
DDR_ON 0.1U_0402_16V4Z~D nFWP 20mA drive pins
1 2
R564 100K_0402_5%~D 2 C1886
1 2
1 2 SUS_ON FAN PWM & TACH 1U_0402_6.3V6K~D
C R566 100K_0402_5%~D DOCK_POR_RST# B22 C
<38> DOCK_POR_RST# GPIO050/FAN_TACH1
1 2 PCH_ALW_ON SUS_ON A21 GENERAL PURPOSE I/O
<42> SUS_ON GPIO051/FAN_TACH2
R568 100K_0402_5%~D AUX_ON B23
<30> AUX_ON GPIO052/FAN_TACH3
1 2 DOCK_POR_RST# BREATH_LED# B24 B2
<38,43> BREATH_LED# GPIO053/PWM0 GPIO001/ECSPI_CS1
R1046 100K_0402_5%~D PCH_ALW_ON A23 A2 DOCK_SMB_ALERT#
<42> PCH_ALW_ON GPIO054/PWM1 GPIO002/ECSPI_CS2 DOCK_SMB_ALERT# <38,44>
1 2 EN_INVPWR KYBRD_BKLT_PWM B25 B8 FFS_INT1 2 1
<41> KYBRD_BKLT_PWM GPIO055/PWM2 GPIO014/GPTP-IN7/HSPI_CS1 HDD_FALL_INT1 <18,28>
R595 100K_0402_5%~D A24 B18 CPU_DETECT# @ R635 0_0402_5%~D +3.3V_RUN
GPIO056/PWM3 GPIO040/GPTP-OUT3/HSPI_CS2 CPU_DETECT# <8>
A8 ME_SUS_PWR_ACK R1131
GPIO015/GPTP-OUT7 ME_SUS_PWR_ACK <17>
B9 1.5V_SUS_PWRGD 10K_0402_5%~D
GPIO016/GPTP-IN8 1.5V_SUS_PWRGD <46>
BC-LINK A9 PM_MEPWROK RUNPWROK 2 1
GPIO017/GPTP-OUT8 PM_MEPWROK <17>
BC_CLK_ECE5028 A43 A14 1.05V_M_PWRGD
<39> BC_CLK_ECE5028 GPIO123/BCM_A_CLK GPIO26/GPTP-IN1 1.05V_M_PWRGD <48>
BC_DAT_ECE5028 B45 B15 ALW_PWRGD_3V_5V
+3.3V_ALW <39> BC_DAT_ECE5028 GPIO122/BCM_A_DAT GPIO27/GPTP-OUT1 ALW_PWRGD_3V_5V <45>
BC_INT#_ECE5028 A42 A17 ODD_DET# +3.3V_ALW_PCH
<39> BC_INT#_ECE5028 GPIO121/BCM_A_INT# GPIO041 ODD_DET# <28>
BC_CLK_EMC4002 A12 B39 RESET_OUT#
<23> BC_CLK_EMC4002 GPIO022/BCM_B_CLK GPIO107/nRESET_OUT RESET_OUT# <15,17>
<23> BC_DAT_EMC4002 BC_DAT_EMC4002 B13 A44 M_ON
GPIO023/BCM_B_DAT GPIO125/GPTP-IN5 M_ON <42,48>
10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

100K_0402_5%~D

<23> BC_INT#_EMC4002 BC_INT#_EMC4002 A13 B47 PCH_RSMRST# AC_PRESENT 1 2

GPIO024/BCM_B_INT# GPIO126 PCH_RSMRST# <17>
1

B20 A54 AC_PRESENT R1231 10K_0402_5%~D

GPIO044/BCM_C_CLK GPIO151/GPTP-IN4 AC_PRESENT <17>
@ R574

A18 B58 SIO_PWRBTN#

GPIO043/BCM_C_DAT GPIO152/GPTP-OUT4 SIO_PWRBTN# <17>
R576

R1410

R575

B19 GPIO042/BCM_C_INT#
BC_CLK_ECE1077 A20
<41> BC_CLK_ECE1077 BC_DAT_ECE1077 GPIO047/LSBCM_D_CLK +3.3V_ALW
<41> BC_DAT_ECE1077 B21
2

JDEG1 BC_INT#_ECE1077 GPIO046/LSBCM_D_DAT

<41> BC_INT#_ECE1077 A19 GPIO045/LSBCM_D_INT#
1 BEEP A16 SMBUS INTERFACE
1 <29> BEEP GPIO032/GPTP-IN3/BCM_E_CLK
2 MSCLK SIO_SLP_S5# B16 A3 DOCK_SMB_DAT
2 <17> SIO_SLP_S5# GPIO31/GPTP-OUT2/BCM_E_DAT GPIO003/I2C1A_DATA DOCK_SMB_DAT <38>
7 3 MSDATA ACAV_IN_NB A15 B4 DOCK_SMB_CLK DOCK_SMB_DAT 2 1
G1 3 <39,50,51> ACAV_IN_NB GPIO30/GPTP-IN2/BCM_E_INT# GPIO004/I2C1A_CLK DOCK_SMB_CLK <38>
8 4 1 2 HOST_DEBUG_TX A4 LCD_SMBDAT R565 2.2K_0402_5%~D
G2 4 GPIO005/I2C1B_DATA LCD_SMBDAT <24>
5 R593 1 2 0_0402_5%~D HOST_DEBUG_RX HOST INTERFACE B5 LCD_SMBCLK DOCK_SMB_CLK 2 1
5 GPIO006/I2C1B_CLK LCD_SMBCLK <24>
6 R577 0_0402_5%~D SIO_EXT_SMI# A6 B7 CKG_FFS_SMBDAT R567 2.2K_0402_5%~D
6 <19> SIO_EXT_SMI# GPIO011/nSMI GPIO012/I2C1H_DATA/I2C2D_DATA CKG_FFS_SMBDAT <6>
SIO_RCIN# A27 A7 CKG_FFS_SMBCLK +3.3V_ALW CPU_DETECT# 2 1
<19> SIO_RCIN# GPIO061/LPCPD# GPIO013/I2C1H_CLK/I2C2D_CLK CKG_FFS_SMBCLK <6>
ACES_85204-06001~D LPC_LDRQ#_MEC B29 B48 DAI_GPU_R3P_SMBDAT R1529 100K_0402_5%~D
LDRQ# GPIO130/I2C2A_DATA DAI_GPU_R3P_SMBDAT <29>
IRQ_SERIRQ A28 B49 DAI_GPU_R3P_SMBCLK RESET_OUT# 1 2
<15,31,32,39> IRQ_SERIRQ SER_IRQ GPIO131/I2C2A_CLK DAI_GPU_R3P_SMBCLK <29>
PCH_PLTRST#_EC B30 A47 CHARGER_SMBDAT @ R5 8.2K_0402_5%~D
<8,18,32,34,36,39> PCH_PLTRST#_EC LRESET# GPIO132/I2C1G_DATA CHARGER_SMBDAT <51>

2
+3.3V_ALW CLK_PCI_MEC A29 B50 CHARGER_SMBCLK
<18> CLK_PCI_MEC PCI_CLK GPIO140/I2C1G_CLK CHARGER_SMBCLK <51>
LPC_LFRAME# B31 B52 CARD_SMBDAT R578
<15,31,32,39> LPC_LFRAME# LFRAME# GPIO141/I2C1F_DATA/I2C2B_DATA CARD_SMBDAT <34>
LPC_LAD0 A30 A49 CARD_SMBCLK 10K_0402_5%~D
<15,31,32,39> LPC_LAD0 LAD0 GPIO142/I2C1F_CLK/I2C2B_CLK CARD_SMBCLK <34>
LPC_LAD1 B32 B53 USH_SMBDAT
<15,31,32,39> LPC_LAD1 LAD1 GPIO143/I2C1E_DATA USH_SMBDAT <31>
10K_0402_5%~D
49.9_0402_1%~D

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

LPC_LAD2 A31 A50 USH_SMBCLK +5V_RUN

<15,31,32,39> LPC_LAD2 USH_SMBCLK <31>

1
LAD2 GPIO144/I2C1E_CLK
1

B LPC_LAD3 B33 B
<15,31,32,39> LPC_LAD3 LAD3
R580

R581

R582

R583

CLKRUN# FWP# CLK_KBD

R584

<17,32,39> CLKRUN# A32 CLKRUN# 2 1 HDD_SMBDAT <28> 2 1

SIO_EXT_SCI# A33 @ R446 2 1 0_0402_5%~D R569 4.7K_0402_5%~D
<19> SIO_EXT_SCI# GPIO100/nEC_SCI HDD_SMBCLK <28>
DELL PWR SW INF @ R508 0_0402_5%~D DAT_KBD 2 1

2
A59 R570 4.7K_0402_5%~D
2

JP2 BGPO0 LAT_ON_SW# @ R586 CLK_MSE

VCI_IN2# B63 2 1
1 MASTER CLOCK A60 ALWON 10K_0402_5%~D R571 4.7K_0402_5%~D
1 VCI_OUT ALWON <45>
2 JTAG_TDI MEC_XTAL1 A61 A63 VCI_IN1# DAT_MSE 2 1
2 JTAG_TMS MEC_XTAL2 XTAL1 VCI_IN1# POWER_SW_IN# R572 4.7K_0402_5%~D
7 3 2 1 A62 B67

1
G1 3 JTAG_CLK R587 0_0402_5%~D XTAL2 VCI_IN0# ACAV_IN
8 G2 4 4 B62 GPIO160/32KHZ_OUT VCI_OVRD_IN B1 ACAV_IN <23,50,51>
5 JTAG_TDO A1 DOCK_PWR_SW#
5 <23> EC_32KHZ_OUT VCI_IN3#
VR_CAP[1]

6 +3.3V_RUN
6
VSS_RO
VSS[2]
VSS[5]
VSS[7]
VSS[8]
AGND

ACES_85204-06001~D CKG_FFS_SMBDAT 2 1
NC1
NC2
NC3
NC4
NC5
NC6
NC7

R540 2.2K_0402_5%~D
EP

CKG_FFS_SMBCLK 2 1
MEC5045-LZY_DQFN132_11X11~D R542 2.2K_0402_5%~D
32 KHz Clock
B17
B34
A46
A48
B51
A64
B68

B66

B27
B60
B11
B28

B12

B54

C1

Same as Laguna +3.3V_ALW

8mil +VR_CAP
10K_0402_5%~D

MEC_XTAL1
1

15mil
R579

+3.3V_ALW +3.3V_ALW
4.7U_0603_6.3V6M~D

Y4 1
C671

32.768K_12.5PF_Q13MC30610018~D R98 C919 REV +RTC_CELL

2

2
MEC_XTAL2 1 4
JTAG_RST# R85 R98
2 NC NC 3 2
1K_0402_5%~D 1K_0402_5%~D 240K 4700p X00
33P_0402_50V8J~D

33P_0402_50V8J~D

0.1U_0402_16V4Z~D

VCI_IN1# 2 1
1 1
130K 4700p X01
1

1
C675

C1040

1 R657 100K_0402_5%~D
1

1
C674

100_0402_1%~D
@ R585

SYSTEM_ID BOARD_ID
33K 4700p X02
1

4700P_0402_25V7K~D

4700P_0402_25V7K~D
2 2
2 JTAG1 SYSTEM_ID for BID 1 1 4.3K 4700p X03
2

@SHORT PADS~D +3.3V_M

function 2K 4700p X04
C918

C919
@
A
Ύ 1K 4700p A00 A
1

2 2
2

Place closely pin 58 R640

2

1=JTAG interface Reset disabled 100K_0402_5%~D

CLK_PCI_MEC 0=Reset JTAG interface
2
1

PCH_PWRGD#
@ R588
PCH_PWRGD# <23>
DELL CONFIDENTIAL/PROPRIETARY
10_0402_5%~D
1

D
RESET_OUT# 2 Q189
Compal Electronics, Inc.
2

1 G SSM3K7002FU_SC70-3~D
S PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
3

@ C673 TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
4.7P_0402_50V8C~D BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, MEC5045
2 NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 40 of 57
 5 4 3 2 1

WWW.AliSaler.Com
BlueTooth +3.3V_RUN
C1703
1 2
Touch Pad 0.1U_0402_16V4Z~D

D +3.3V_ALW JBT D
1 1
<18> BT_DET# 2 2
<36> COEX1_BT_ACTIVE 3 3
4 4

1
5 5
R613 R614 6
4.7K_0402_5%~D 4.7K_0402_5%~D <43> BT_ACTIVE 6
<39> BT_RADIO_DIS# 7 7
<36> COEX2_WLAN_ACTIVE 8 8
9

2
9
10 10
TP_DATA 1 2 DAT_TP_SIO 11
DAT_TP_SIO <40> <18> USBP6- 11
R1564 100_0603_5%~D 12 @ FAN
<18> USBP6+ 12
TP_CLK 1 2 CLK_TP_SIO 13 Part Number Description
CLK_TP_SIO <40> Shield
R1565 100_0603_5%~D 14 Shield

10P_0402_50V8J~D

10P_0402_50V8J~D
DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA

10P_0402_50V8J~D

10P_0402_50V8J~D
1 1 1 1 MOLEX_48227-1211
@ Speak
C680

C681

C682

C683

100P_0402_50V8J~D
ŶĞĞĚĚŽƵďůĞĐŚĞĐŬĨŽŽƚƉƌŝŶƚ͘ Part Number Description

33P_0402_50V8J~D

1 10K_0402_5%~D
2 2 2 2

@ C1334
1 1 PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG

C1704

R1407
@SM CARD BODY
2 2 Part Number Description

2
SP070007V0L S SOCKET TYCO 1770551-1
10P H5.9 SMART

@PCMCIA BODY
Part Number Description

DC000001Q0L PCMCIA TYCO

C 1759096-1 C

@ MDC wire set cable

Part Number Description

Touch Pad Conn. Pitch=0.5 Power Switch for debug DC02000CS0L H-CONN SET ZGX
MB-MDC

@ T/P wire set cable

Part Number Description
JTP1
+3.3V_ALW 1 +5V_RUN H-CONN SET ZJX
1 DC02000840L
2 POWER_SW#_MB 1 2 MB-B/T-TP-FP
2 <40,43> POWER_SW#_MB 1 2
0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
3 3
4 1 1 @ LVDS cable
<40> BC_CLK_ECE1077 4
1 <40> BC_DAT_ECE1077 5 5 Part Number Description

C678
6 @C684
@ C684
<40> BC_INT#_ECE1077 6
C771

7 100P_0402_50V8J~D PWRSW1 DC020003Y0L H-CONN SET ZJX MB-LCD

+3.3V_ALW 7 2 2 14 WXGA+(-1ch)
+3.3V_RUN 8 @SHORT PADS~D
2 TP_CLK 8
9 9 @ Place on Top
TP_DATA 10 @ LVDS cable
10
+5V_RUN 11 11 Part Number Description
+5V_ALW 12 12 Place close to
Place close to KYBRD_BKLT_PWM 13 DC02000870L H-CONN SET ZJX
<40> KYBRD_BKLT_PWM
14
13 JTP1.11 MB-LCD 14 WXGA+(-2ch)
JTP1.7 15
14
15 @ RTC BATT
16 16 1 1 2 2
<39> TP_DET#
Part Number Description
+5V_ALW
17 G1 GC20323MX00 BATT CR2032 3V
0.1U_0402_16V4Z~D

18 G2
220MAH MAXELL
B PWRSW2 B
1
@SHORT PADS~D
C1413

Place
@ on Bottom
HRS_FH12-16S-0P5SH(55)~D 2

Place close to
JTP1.12

TP_CLK
TP_DATA
SD05.TCT_SOD323-2~D

SD05.TCT_SOD323-2~D
1

@ @
D53

D54
2

Place close to JTP1 connector

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Touch PAD/Int KB/LID
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 41 of 57
 5 4 3 2 1

WWW.AliSaler.Com
DC/DC Interface +3.3V_ALW_PCH Source
+15V_ALW +3.3V_ALW Q54 +3.3V_ALW_PCH +5VRUN Source
SI3456BDV-T1-E3_TSOP6~D
+3.3V_ALW2 +15V_ALW +5V_ALW Q55

D
+3.3V_ALW2 6 FDS8878_SO8~D +5V_RUN

S
1
5 4 8 1

1
10U_0805_10V4Z~D
R598 2 7 2

10U_0805_10V4Z~D
100K_0402_5%~D 1 1 R597 6 3

1
C687
100K_0402_5%~D 5 1

G
R602 R601 R599 R600

C686
100K_0402_5%~D ALW_ENABLE 20K_0402_5%~D 100K_0402_5%~D 20K_0402_5%~D

4
<21> ALW_ENABLE 2 5V_RUN_ENABLE

2
3
D 2 D
2

2
3

2200P_0402_50V7K~D
Q57B 1
ALW_ON_3.3V# 5 DMN66D0LDW-7_SOT363-6~D Q56B
C688 RUN_ON_ENABLE# 5 DMN66D0LDW-7_SOT363-6~D 1
6

3300P_0402_50V7K~D

4
2

C689
4
Q57A

6
2 DMN66D0LDW-7_SOT363-6~D 2
<40> PCH_ALW_ON
Q56A
1

2 DMN66D0LDW-7_SOT363-6~D
+15V_ALW +3.3V_SUS Source <12,34,39,47> RUN_ON
+3.3V_ALW Q60

1
SI3456BDV-T1-E3_TSOP6~D +3.3V_SUS

1
+3.3V_RUN Source

D
R603 6

S
+3.3V_ALW2 100K_0402_5%~D 5 4 +3.3V_ALW Q61 +3.3V_RUN
2 +15V_ALW NTMS4107NR2G_SO8~D

1
10U_0805_10V4Z~D
1 1 8 1
2

C690

10U_0805_10V4Z~D
R605 7 2

G
1

1
20K_0402_5%~D 1 2 6 3 1

3
<8> 1.5V_PWRGD 0.75V_VR_EN <47>

C691
R604 SUS_ENABLE R1508 100K_0402_5%~D 5 @ R607
@R607
100K_0402_5%~D 2 R606 20K_0402_5%~D

2
3

100K_0402_5%~D

4
2
2

2
Q62B
SUS_ON_3.3V# 5 DMN66D0LDW-7_SOT363-6~D 1 3.3V_RUN_ENABLE
Q208
6

C692 BSS138_SOT23~D
4

1
4700P_0402_25V7K~D D D
2 1
Q62A RUN_ON_ENABLE# 1 2 2 2
C DMN66D0LDW-7_SOT363-6~D R1535 0_0402_5%~D G G Q64 C693 C
<40> SUS_ON 2
S S SSM3K7002FU_SC70-3~D 470P_0402_50V7K~D

3
RUN_ON_CPU1.5VS3# 1 2 2
1

@ R1536 0_0402_5%~D

+3.3VM Source Discharg Circuit

+3.3V_ALW Q66 +1.5V_RUN Source
+15V_ALW SI3456BDV-T1-E3_TSOP6~D +3.3V_M +3.3V_M
100K_0402_5%~D

+3.3V_ALW2 +1.5V_MEM Q151

D

6 +15V_ALW SIS406DN-T1-GE3_POWERPAK8-5~D
S
1

1
39_0603_5%~D
5 4 1 +1.5V_RUN
R610

2 10U_0805_10V4Z~D 2
1

1
R616
1 1 3

10U_0805_10V4Z~D
R611 @ R612 5
G

1
C694
100K_0402_5%~D 20K_0402_5%~D R1224 1
2

C1190
M_ENABLE R1225

+3.3V_M_CHG
100K_0402_5%~D

4
2 20K_0402_5%~D
2

2
3

1.5V_RUN_ENABLE 2

2
SSM3K7002FU_SC70-3~D
Q68B
M_ON_3.3V# 5 DMN66D0LDW-7_SOT363-6~D 1

1
D
1
6

1
D

Q72
C696 M_ON_3.3V# 2
4

4700P_0402_25V7K~D G 2 Q152 C1191

Q68A 2 S G SSM3K7002FU_SC70-3~D 4700P_0402_25V7K~D

3
B 2 DMN66D0LDW-7_SOT363-6~D S 2 B

3
<40,48> M_ON
1

Discharg Circuit +1.05V_RUN Source

+1.5V_CPU_VDDQ +0.75V_DDR_VTT
+5V_RUN +1.5V_RUN +3.3V_RUN +1.05V_RUN +15V_ALW +1.05V_M Q183
+3.3V_SUS +3.3V_ALW_PCH SI7658ADP-T1-GE3_POWERPAK8-5~D

1
1 +1.05V_RUN
1

1
1K_0402_5%~D

1K_0402_5%~D

39_0603_5%~D
1K_0402_5%~D

1K_0402_5%~D

39_0402_5%~D

R1502 R624 2
1

@R622
@

@R623
@

@ R636

220_0402_5%~D 22_0603_5%~D R1306 5 3

R622

R623

R625

10U_0805_10V4Z~D
@ R627

@ R628

100K_0402_5%~D

1
1

2
R1307

+1.5V_CPU_VDDQ_CHG
2

C1411
1.05V_RUN_ENABLE 20K_0402_5%~D
+5V_RUN_CHG

+1.5V_RUN_CHG

+3.3V_RUN_CHG

+1.05V_RUN_CHG
2

+DDR_CHG
+3.3V_ALWPCH_CHG

2
+3.3V_SUS_CHG

2
1
D

2200P_0402_50V7K~D
2 Q1
G SSM3K7002FU_SC70-3~D 1
<12> RUN_ON_CPU1.5VS3#
S

C1412
1
D
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D
1

D D D D 2
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

Q78
@ @ @ 2
1

D D D
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

Q76

Q77

Q79

Q80

@ @ RUN_ON_ENABLE# 2 2 2 2 G
Q81

Q82

Q202

SUS_ON_3.3V# 2 ALW_ON_3.3V# 2 G G G G 2 S

3
G G S S S S G
3

A S S S A
3

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, POWER CONTROL
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 42 of 57
 5 4 3 2 1

WWW.AliSaler.Com HDD LED solution for Blue LED

+3.3V_RUN
<39> PWR_BTN_BD_DET#
+3.3V_ALW
PWR_BTN_BD_DET# 1
2
JSNIF1

1
@ H1
@H_3P0
@ H2
@H_3P0
@ H3
@H_3P0
@ H4
@H_3P0
@ H5
@H_3P0
@ H6
@H_3P0
@ H7
@H_3P0
EMI CLIP
Fiducial Mark
@FD1
@ FD1
LID_CL# 2
<39> LID_CL# 3 3 1

1
+5V_RUN BREATH_BLUE_LED_SNIFF 4 CLIP1

1
4

0.1U_0402_16V4Z~D
R654 5 EMI_CLIP FIDUCIAL MARK~D
10K_0402_5%~D <40,41> POWER_SW#_MB 5
2 6 6
<40> LAT_ON_SW#_R @FD2
@ FD2
7 7 GND 1

C685
WIRELESS_ON#/OFF 8 1
<39> WIRELESS_ON#/OFF

2
8

3
9 9
1 10 @ H8 @ H9 @ H10 @ H11 @ H12 @ H13 @ H14 CLIP2 FIDUCIAL MARK~D
10 @H_3P0 @H_3P0 @H_3P2 @H_3P2 @H_3P2 @H_3P2 @H_3P1X2P1 EMI_CLIP
11 11 GND 13

D
3 1 SATA_ACT# 2 12 14 @FD3
@ FD3
<15> SATA_ACT#_R 12 GND
GND 1 1
Q93 Q92 TYCO_1-2041070-2~D

1
PDTA114EU_SC70-3~D FIDUCIAL MARK~D

G
SSM3K7002FU_SC70-3~D

2
D D
MASK_BASE_LEDS# @FD4
@ FD4

1
1
1 2 SATA_LED 2 1 @ H15 @ H16 @ H18
R659 1K_0402_5%~D +5V_ALW @H_5P2 @H_3P2 @H_4P5N FIDUCIAL MARK~D
D42
LTST-C191ZBKT-Q_BLUE~D

1
3
+3.3V_WLAN 2
<39> CAP_LED#
+5V_RUN Q120
Keyboard Status LED

3
PDTA114EU_SC70-3~D
1

R556
R662 1K_0402_5%~D

1
3
100K_0402_5%~D 2 1 2 R_CAP_LED# 2 1
<39> NUM_LED#
D67 Q121 D57
2

3
PDTA114EU_SC70-3~D
S

3 1 1 2 2 LTST-C191ZBKT-Q_BLUE~D
<36> LED_WLAN_OUT#
R596
Q98 SDM10U45-7_SOD523-2~D Q97 1K_0402_5%~D

1
SSM3K7002FU_SC70-3~D PDTA114EU_SC70-3~D R_NUM_LED#
G

<39> SCRL_LED# 2 1 2 2 1
2

MASK_BASE_LEDS# Q122 D58

1

PDTA114EU_SC70-3~D LTST-C191ZBKT-Q_BLUE~D
R655
1K_0402_5%~D

1
1 2 R_SCRL_LED# 2 1

D45 +5V_ALW D59

LTST-C191ZBKT-Q_BLUE~D

1
D
1 2 WLAN_LED 2 1 R1006

3
R663 1K_0402_5%~D 100K_0402_5%~D MASK_BASE_LEDS# 2
LTST-C191ZBKT-Q_BLUE~D +5V_ALW 1 2 G
+3.3V_ALW Q150 S

3
2 SSM3K7002FU_SC70-3~D
C WLAN LED solution for Blue LED C

6
Q99
C1058
Q144A PDTA114EU_SC70-3~D Battery LED

1
DMN66D0LDW-7_SOT363-6~D R665 D46
+3.3V_RUN R89 1 2 2 +5V_ALW 1K_0402_5%~D BLUE

1
47K_0402_5%~D 1 2 BATT_BLUE 2 1
+5V_RUN

1
0.1U_0402_16V4Z~D

1
1

1
2
R206 R1004 +5V_ALW BATT_YELLOW 4 3

NC
P
100K_0402_5%~D BAT2_LED# 2 4 BAT2_LED 100K_0402_5%~D
<40> BAT2_LED# A Y
3

YEL

SSM3K7002FU_SC70-3~D
Q142

3
U63 LTST-C155TBJSKT_Blue/YEL~D
2

2
NC7SZ04P5X_NL_SC70-5~D SSM3K7002FU_SC70-3~D

1
D
S

<36> LED_WWAN_OUT# 3 1 2

Q141
S

D
5 3 1 2 MASK_BASE_LEDS# 2
Q116 Q115 Q144B G
SSM3K7002FU_SC70-3~D PDTA114EU_SC70-3~D DMN66D0LDW-7_SOT363-6~D Q139
G

S
2

3
PDTA114EU_SC70-3~D

G
2
MASK_BASE_LEDS#
<39> SYS_LED_MASK#
1

1 2 WWAN_LED 2 1

1
R125 1K_0402_5%~D +3.3V_ALW
D61
LTST-C191ZBKT-Q_BLUE~D R1007

3
100K_0402_5%~D
WWAN LED solution for Blue LED +3.3V_ALW 1 2

+3.3V_ALW 2

6
Q101
+3.3V_RUN Q145A PDTA114EU_SC70-3~D
C1059

1
+5V_RUN DMN66D0LDW-7_SOT363-6~D R666
C1337 R82 1 2 2 +3.3V_ALW 150_0402_5%~D

1
1 2 47K_0402_5%~D 1 2

1
0.1U_0402_16V4Z~D

1
3

1
0.1U_0402_16V4Z~D U117

2
5

NC7SZ04P5X_NL_SC70-5~D R1005 +3.3V_ALW

NC
P
BAT1_LED# 2 4 BAT1_LED 100K_0402_5%~D
P

NC

<40> BAT1_LED# A Y
S

<41> BT_ACTIVE BT_ACTIVE 2 4 3 1 2

A Y Q143

3
B B
U64

2
G

Q95
10K_0402_5%~D

Q94 NC7SZ04P5X_NL_SC70-5~D SSM3K7002FU_SC70-3~D R1002

3
1

SSM3K7002FU_SC70-3~D PDTA114EU_SC70-3~D 1K_0402_5%~D

G
2
3

D
5 3 1 2 1 2 BATT_BLUE_LED <24>
R748

MASK_BASE_LEDS# Q145B
1

<BOM Structure> DMN66D0LDW-7_SOT363-6~D Q140

4
D43 PDTA114EU_SC70-3~D

G
2

2
1 2 WPAN_LED 2 1 R1003
R661 1K_0402_5%~D 150_0402_5%~D
<39> SYS_LED_MASK#

1
LTST-C191ZBKT-Q_BLUE~D 1 2 BATT_YELLOW_LED <24>
WPAN LED solution for Blue LED +5V_ALW

1
+5V_ALW
R999
100K_0402_5%~D
LED Circuit Control Table

3
Q134B

2
DMN66D0LDW-7_SOT363-6~D
SYS_LED_MASK# LID_CL# 4 3 2
+3.3V_ALW

6
DMN66D0LDW-7_SOT363-6~D
Q137
PDTA114EU_SC70-3~D
Mask All LEDs (Sniffer Function) 0 X

5
Q134A
R664
C1060 +5V_ALW 1K_0402_5%~D
Mask Base MB LEDs (Lid Closed) 1 0 2

1
1

1 2 1 2 BREATH_BLUE_LED BREATH_BLUE_LED <24>

<39> SYS_LED_MASK#
R90
Do not Mask LEDs (Lid Opened) 1 1

1
47K_0402_5%~D +5V_ALW
0.1U_0402_16V4Z~D R1000
5

100K_0402_5%~D
2

3
P

NC

2 4 BREATH_LED#_R Q135B
<38,40> BREATH_LED#

2
A Y DMN66D0LDW-7_SOT363-6~D
G

U42 4 3 2
NC7SZ04P5X_NL_SC70-5~D
3

+3.3V_ALW
DMN66D0LDW-7_SOT363-6~D

Q138
A PDTA114EU_SC70-3~D A
C1061

5
Q135A

1 2 2 R1001

1
MASK_BASE_LEDS# 150_0402_5%~D
1 2 BREATH_BLUE_LED_SNIFF
1

0.1U_0402_16V4Z~D
5

U65
SYS_LED_MASK# 1
P

<39> SYS_LED_MASK# B
4 MASK_BASE_LEDS#
LID_CL# 2 A
O DELL CONFIDENTIAL/PROPRIETARY
G

TC7SH08FU_SSOP5~D
Compal Electronics, Inc.
3

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PAD and Standoff
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 43 of 57
 5 4 3 2 1

WWW.AliSaler.Com
+COINCELL
COIN RTC Battery

1
PR1
1K_0402_5%~D

+3.3V_RTC_LDO

2
JRTC1
+3.3V_ALW

Z4012
+COINCELL 1 1
2 2 G1 4
3 3 G2 5
D ESD Diodes D
MOLEX_53398-0371~D

3
+RTC_CELL

2
PD1

1
PL1 RB715F UMD3 1
PD2 PD3 PD4 FBMA-L18-453215-900LMA90T_1812~D +3.3V_ALW PC1

1
@ DA204U_SOT323~D @ DA204U_SOT323~D @ DA204U_SOT323~D 1 2 1U_0603_10V4Z~D
2
Primary Battery Connector Move to power schematic
PJP1

1
10K_0402_1%~D
PBATT+_C 1 2 PBATT+

PR2
11 PC2 PAD-OPEN 4x4m
GND 0.1U_0603_25V7K~D
GND 10
9 PR3

2
9 100_0402_5%~D PR4
8 8
2200P_0402_50V7K~D

7 Z4304 1 2 100_0402_5%~D PR5

7 PBAT_SMBCLK <40>
6 Z4305 1 2 100_0402_5%~D
6 PBAT_SMBDAT <40>
5 Z4306 1 2
5 PBAT_PRES# <39>
1
PC3

4 4
3 PQ1
3
2
2

2 FDN338P_NL_SOT23-3~D
1 1
PD6

3
1 2 1 3 DOCK_SMB_ALERT# <38,40>
PBATT1
SUYIN_200275MR009G50PZR RB751V-40_SOD323-2~D

2
2
PR7
GND 1 2
<38,39,50> SLICE_BAT_PRES#
0_0402_5%~D
C C

1
PC87
1500P_0402_7K~D

2
+5V_ALW
+3.3V_ALW

DA204U_SOT323~D

2.2K_0402_5%~D
PD7
@ PR8 PU1

2
1 2 GND <38> DOCK_PSID 1 6 GPIO_PSID_SELECT <39>
0_0402_5%~D NO IN

PR9
2 GND V+ 5 +5V_ALW
PL2 PR10

1
BLM18BD102SN1D_0603~D 33_0402_5%~D
NB_PSID NB_PSID_TS5A63157

S
2 1 1 3 1 2 3 NC COM 4 PS_ID <40>
100K_0402_1%~D PQ2 TS5A63157DCKR_SC70-6~D
2 FDV301N_NL_SOT23-3~D +5V_ALW

G
2
PR11

DA204U_SOT323~D
+5V_ALW
+5V_ALW
2

2
10K_0402_1%~D

PD9
DA204U_SOT323~D

1
C

PR12
2 PQ3
3

2
PD10

B MMST3904-7-F_SOT323~D @
15K_0402_1%~D

3
2

@
1

1
PR13

@ PD8
SM24_SOT23 PR14
GND 1 2
1

PSID_DISABLE# <39>
1

PR15 @ 10K_0402_5%~D
0_0402_5%~D
1 2 DCIN_CBL_DET# <39>
.47U_0402_6.3V6-K~D

B B
DC_IN+ Source
2
PC4

@ +DC_IN +DC_IN_SS
PQ74
FDS6679AZ_SO8~D
1 S D 8
PL3 2 S
FBMJ4516HS720NT_1806~D D 7
3 S D 6
1 2 +DC_IN 4 G D 5
1
VZ0603M260APT_0603

1M_0402_5%~D
0.022U_0805_50V7K~D
2

10U_1206_25V6M~D
4.7K_0805_5%~D
0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D
1

1
PC5

PR16

1
PD11

1
1

PR17

PC10
PC6

PC7

PC8
0.1U_0603_25V7K~D

2
1

4.7K_0805_5%~D

PJPDC1 PR20
2
1
0.1U_0603_25V7K~D

1 @ 1 2
2

1
1
PC9

2 10K_0402_5%~D
2

2
1M_0402_5%~D
@ PR18

3 -DCIN_JACK
3
1

2
PC11

4
2

4
PR19

5 +DCIN_JACK
2

5
6 6
7 @ <50> SOFT_START_GC
7
2

MOLEX_87438-0743 PL4
FBMJ4516HS720NT_1806~D
1 2
0.1U_0603_25V7K~D
1
PC12

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +DCIN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-5471P
Date: Wednesday, January 20, 2010 Sheet 44 of 57

5 4
WWW.AliSaler.Com 3 2 1
 5 4 3 2 1

WWW.AliSaler.Com
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+DC1_PWR_SRC

PJP48
+PWR_SRC 1 2

PAD-OPEN 4x4m
WŽƉϭϬKŚŵĨŽƌDyϭϳϬϮϬ ϯ͘ϯsŽůƚнͬͲϱй

2
0_0805_5%~D

0_0805_5%~D
PJP49 +5V_VCC1
D dŚĞƌŵĂůĞƐŝŐŶƵƌƌĞŶƚ͗ϰ͘ϭϵϭ D

2200P_0402_50V7K~D

0.1U_0805_50V7M~D
+5V_ALW2 1 2

2200P_0402_50V7K~D

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D
0.1U_0805_50V7M~D

PR22

PR23
PR24 WĞĂŬĐƵƌƌĞŶƚ͗ϱ͘ϵϴϴ

1
10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D
PAD-OPEN1x1m 10_0603_5%~D
ϱsŽůƚнͬͲϱй KWͺD/E͗ϳ͘ϭϴϲ

1
1

PC19

PC20

PC21

PC22

PC23
4.7U_0805_6.3V6K~D
2 1

PC14

PC15

PC16

PC17

PC18
dŚĞƌŵĂůĞƐŝŐŶƵƌƌĞŶƚ͗ϱ͘ϯϰϰ

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KWͺD/E͗ϵ͘ϭϲϭ +3.3V_ALW2

2
0.1U_0603_25V7K~D
1
PC25

1U_0402_6.3V4Z~D
0_0402_5%~D

1U_0603_10V6K~D
@PR26
@ PR26
&ƐǁсϰϬϬ<,nj

1
PC26
0_0402_5%~D

1
PR25

PC27
1 2

2
@PR27
@ PR27

2
0_0402_5%~D

2
1 2

+5V_ALW2P
5V_3V_REF

EN_3V_5V
+3.3V_ALW2
+3.3V_RTC_LDO PC28
0.1U_0603_25V7K~D

1
GNDA_3V5V GNDA_3V5V PR29

VIN
1 2
0_0402_5%~D
LDOREFIN 1 2

0.1U_0402_10V7K~D
SI4134DY-T1-GE3 1N SO8

0.1U_0402_10V7K~D
@PR28
@ PR28
PR30

2
3

PC30
0_0603_5%~D @

33

2
1
3

1
8
7
6
5

5
6
7
8
4
GNDA_3V5V PU19 1 2
D

1
+5V_ALWP

PC29
0_0402_5%~D

SI4128DY-T1-GE3 1N SO8
TON
VCC
LDOREFIN

IN
PAD

RTC

REF

D
D
D
D
LDO

ONLDO

REFIN2
PQ6

2
2

PQ7
2 @ PR31
G 316K_0402_1%~D
9 BYP REFIN2 32 4 G
+5V_ALWP PR32 10 31 1 2 GNDA_3V5V
OUT1 ILIM2
S

300K_0402_1%~D +5V_FB1 11 30 +3.3V_OUT2

FB1 OUT2

S
S
S
C GNDA_3V5V 1 2 12 29 2 PR33 0_0402_5%~D
1 +3.3V_ALWP C
1

PL5 POK1 ILIM1 SKIP POK2

13 28

3
2
1
EN_3V_5V PGOOD1 PG00D2 EN_3V_5V PL6
14 ON1 ON2 27
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D +5V_ALW_UGATE 15 26 +3.3V_ALW_UGATE 4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D
+5V_ALWP +5V_ALW_PHASE DH1 DH2 +3.3V_ALW_PHASE +3.3V_ALWP
1 2 16 LX1 LX2 25 2 1
0.1U_0603_25V7K~D

0.1U_0603_25V7K~D
SECFB
3
1

1
AGND
PGND
0_0402_5%~D

0_0402_5%~D
0.1U_0603_25V7K~D
GNDA_3V5V @

BST1

BST2
FDMS7692 1N POWER56-8

VDD

5
6
7
8

1
DL1

DL2
PC31

PC32
330U_D3L_6.3VM_R25~D

330U_D3L_6.3VM_R25~D
D
PR34

PR35
0.1U_0402_10V7K~D

0.1U_0402_10V7K~D
0.1U_0603_25V7K~D

D
D
D
D
2

2
1

1
PC35

PC36
MAX17020ETJ+_TQFN32_5X5~D

SI4134DY-T1-GE3 1N SO8
1 1

17
18
19
20
21
22
23
24
PQ8

@
2
1

1
+ +
PC33

PC34

PC37

PC38
@ 2

2
G

SECFB

PQ9
4 G
2

2
PR36 PR39 @ PR37
2

2
2 2
S

@ 1_0603_5%~D 1_0603_5%~D 4.7_1206_5%~D @

S
S
S

0_0402_5%~D
1 2+5V_ALW_BOOT +3.3V_ALW_BOOT1 2
1
1

1
0_0402_5%~D

4.7_1206_5%~D

3
2
1
PR38

PR41
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1

1
PR40

@
2

2
+5V_ALW_LGATE
GNDA_3V5V

GNDA_3V5V

1U_0603_10V6K~D
GNDA_3V5V PC39 PJP50

1
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PC40
1 1 2

+5V_ALW2
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2
PAD-OPEN1x1m
1

100K_0402_1%~D

100K_0402_1%~D
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PC41

BAT54SW-7-F_SOT323-3~D

2
2

PR42

PR43
PC42
2 0.1U_0603_25V7K~D PD14
1

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3 @

1
PR44 PD13 POK2
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1
200K_0402_5%~D
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PR47
PR45
PR46

0_0402_5%~D
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2
1

POK1
PJP5 ALW_PWRGD_3V_5V <40>
1 2

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PJP6 PJP7 200K_0402_1%~D
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1

PR49
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PJP8 39K_0402_5%~D
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+3.3V_ALWP
1

PAD-OPEN 4x4m
PJP9
1 2

PAD-OPEN 4x4m
GNDA_3V5V

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL DC/DC +3V/ +5V
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 45 of 57
 5 4 3 2 1

WWW.AliSaler.Com +1.5V_SUS_P(TPS51316)

DC_5V_ALW1

1U_0402_6.3V6K~D
2
+3.3V_ALW

PC104
+1.5V_VX

17

16

2
@ PU15
PC89 @

VIN

VIN
1
GNDA_TPS_1.5V @ 0.22U_0603_10V7K~D

1
@PR377
@ PR377
@ PC103 100P_0402_50V8J~D 0_0603_5%~D
D D
2 1 1 VCCA VBST 15 TPS51318_BST 1 2

@ 2 GND PGOOD 14 1.5V_SUS_PWRGD

@ PR79 5.6K_0402_5%~D PC93 680P_0402_50V7K~D
2 1 2 1 TPS51318_COMP 3 13 DDR_EN
COMP EN 22.1K_0402_1%~D
TPS51318_VFB 4 12 TPS51318_FSET 2 1
@ PR78 2K_0402_5%~D VFB FSET @PR74
@ PR74
2 1 +1.5V_SUS_P 5 11 TPS51318_MODE
VOUT MODE
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+1.5V_SUS_P
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10K_0402_5%~D
2 1 1 2
SS IMON

PR72
2200P_0402_50V7K~D
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1
@

+1.5V_VX

1.33K_0402_1%~D
PR80
GNDA_TPS_1.5V GNDA_TPS_1.5V
PJP19
1 2

2
@

PAD-OPEN1x1m
@ PR77
@PR77 0_0402_5%~D
2 1 GNDA_TPS_1.5V

C C

+1.5V_SUS_P(VT356)
PL9
FBMJ4516HS720NT_1806~D
DC_5V_ALW1 1 2 +5V_ALW
2

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

1U_0603_10V6K~D
0.1U_0603_25V7K~D
PC66

PC67
PR59

1
10_0402_1%~D

PC81

PC64

PC65
1

2
AVDD1 @
0.22U_0402_10V6K~D
1
PC68

D5

D4

D3

D2

D1
PU4
VX

VX

VX

VX

VX
GNDA_1.5V BIAS A1 C5
BIAS VDD PL8
+1.5V_R_SEL/LOAD A2 C4 0.42UH_MPC0740LR42C_20A_20%~D
R_SEL/ILOAD VDD +1.5V_VX +1.5V_VX 2 1
+1.5V_VDES A3 C3
VDES GND

1
B PR265 VSENSE1 A4 C2 @ B
0_0402_5%~D VSENSE+ GND PC69 +1.5V_SUS_P
<40,47> DDR_ON 1 2 DDR_EN A5 C1 0.1U_0603_25V7K~D

2
OE GND
AGND

TEMP
AVDD

STAT
IRIPL
5.9K_0402_1%~D

B1

B2

B3

B4

B5
2

2
2200P_0402_50V7K~D

2200P_0402_50V7K~D

VT356FCX-ADJ_CSP20~D
44.2K_0402_0.5%
PR61

PR62

@ PR63
1.5V_SUS_PWRGD
54.9K_0402_1%~D

68.1K_0402_1%~D
1

7.68K_0805_1%~D
1

1
AVDD1
PC95

PC70

PR70

PR60

PC79

PC80
6800P_0402_25V7K~D
10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

0.1U_0603_25V7K~D
1

1
1

1
PR65
33.2K_0402_1%~D
2

PR64

PC94

PC90

@ PC71

PC72

PC73

PC74

PC75

PC76

PC77

PC78
0_0402_5%~D
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VSENSE1
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PAD-OPEN 4x4m
2

DELL CONFIDENTIAL/PROPRIETARY
1.5V_SUS_PWRGD <40>
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +1.5V_MEM
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 46 of 57
 5 4 3 2 1

WWW.AliSaler.Com +1.8V_RUN
+3.3V_ALW PJP301
2 1 +1.8V_PWR_SRC

PAD-OPEN 2x2m~D

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

1
0_0603_5%~D
0.1U_0603_25V7K~D

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0_0402_5%~D @

2
2 1

PR417

PU301

1
3
4

VIN

VIN
SYNCH

VDD
1 2 5 17 GNDA_1.8V
<34,39,42> RUN_ON EN TPAD +1.8V_RUN
PR405 0_0402_5%~D
NC 16
6 PL401
NC PJP303
2UH +-20% #A915AY-H-2R0M=P3 3.3A
ISL8014IRZ-T_QFN16_4X4~D 15 1.8V_LX 2 1 1.8V_RUNP 2 1
LX
7 PG PAD-OPEN 2x2m~D

680P_0603_50V8J~D
LX 14

PC312
1
1.8V_FB

150P_0402_50V8F~D
8 VFB NC 13

47P_0402_50V8J~D
10U_0805_6.3V6M~D

10U_0805_6.3V6M~D
SGND

SGND

PGND

PGND
C C

124K_0402_1%~D
@

1
1

1
PC319

PR414

PC318

PC317

PC316
1.8V_RUN_PWRGD <39>

10

11

12
1

2
PR406

2
PR407
100K_0402_5%~D

4.7_0805_5%~D
2

100K_0402_1%~D
1
GNDA_1.8V @

PR415
+3.3V_RUN

2
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1 2

PAD-OPEN1x1m

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2 1
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10 3
Thermal Design Current: 0.525A
PJP31 VIN VTT
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Peak current: 0.750A
VLDOIN VTTSNS
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OCP mini: 0.900A
10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

1 VDDQSNS VTTREF 6
@ PR117 0_0402_5%~D
0.1U_0402_10V7K~D

1 2 7 4
S3 PGND
2

<39> 0.75V_DDR_VTT_ON
PC83

PC84

GND 8
2
PC82

PR128
10U_0805_6.3V6M~D

0.1U_0603_25V7K~D

9 S5 BP 11
0_0402_5%~D PJP18
1

2 1 TPS51100DGQRG4_MSOP10~D 2 1
1

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2

42 0.75V_VR_EN
PC85

+0.75V_P
PC86

A PAD-OPEN 2x2m~D A
1

1 2
<40,46> DDR_ON
PR118 0_0402_5%~D DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT +0.75V_DDR_VTT/+1.8V_RUN
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 47 of 57
 5 4 3 2 1

WWW.AliSaler.Com
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PR201 PC106 PC115 PR188
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100_0402_1%~D 820P_0402_50V7K~D 51K_0402_1%~D 470P_0402_50V7K~D 470P_0402_50V7K~D 82K_0402_1%~D 820P_0402_50V7K~D 180_0402_1%~D

D D
@ PR92
0_0402_5%~D
2 1 VTT_SENSE <11>

2
PR203

13.7K_0402_1%~D
13.7K_0402_1%~D

20_0603_1%~D

PR199
1
1

PR83

1
2
PC131
1 2
GNDA_VTT GNDA_VTT
PR71 1500P_0402_7K~D
0_0402_5%~D
<40,42> M_ON

NCP5222_COMP2

NCP5222_COMP1
2 1

2
GNDA_VTT

NCP5222_FB2

NCP5222_FB1
NCP5222_VIN
@ PR214 PR96 @
@ PR85
@PR85 0_0402_5%~D 0_0402_5%~D
0_0402_5%~D
2 1 CPU_VTT_ON <39>

1
<17,39> SIO_SLP_M#
NCP5222_ICS2 NCP5222_ICS1

3
7

1
+1.05V_MP PU16 NCP5222_CS1-/Vo1 PJP30

SIS412DN-T1-GE3 1N POWERPAK1212-8

SIS412DN-T1-GE3 1N POWERPAK1212-8
VTT_B+ VTT_B+ 1 2

VIN
COMP2

COMP1
ICS2

ICS1
FB2

FB1
+PWR_SRC
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10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D
0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR211 PAD-OPEN 4x4m

5
SIR472DP-T1-GE3

C NCP5222_EN2/SKIP2 0_0402_5%~D C

5
8 28 NCP5222_EN1/SKIP11 2
CS2-/Vo2 CS1-/Vo1
1

1
PC203

PC206

PC97
PQ13

PQ15

PC96

PC98

PC99
PC204

PC205

9 CS2+ CS1+ 27
2

2
PQ16

4 PC132 PR84 10 26 PR82 PC100

0.1U_0603_25V7K~D 2_0603_5%~D EN2/SKIP2 EN1/SKIP1 2_0603_5%~D0.1U_0603_25V7K~D
4 4
1 2 2 1NCP5222_BST2 11 BST2 BST1 25 NCP5222_BST12 1 1 2

NCP5222_UGATE2 12 24 NCP5222_UGATE1
1
2
3

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3
2
1

3
2
1
NCP5222_PHASE2 13 23 NCP5222_PHASE1 0.56UH +-20% MPC1040LR56C 23A +1.05VTTP
+1.05V_MP PL7 SWN2 SWN1
0.6UH +-20% MPC0750LR60C 17A 14 22 NCP5222_LGATE1 4 1
DL2 DL1

DRVS/2CH
2 1

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PGOOD1

5
3 2

PGND2

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5

AGND

VCCP
220U_V_2.5VM_R9M

220U_V_2.5VM_R9M

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D
10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D
VCC
1 1

1
PC122
0.1U_0603_25V7K~D
PR204
1

1
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AON6704L

AON6704L
PC202

PC136

PC135

PC120

PC121

@ PC210
PR207 NCP5222MNR2G_QFN28_4X4~D 5.23K_0402_1%~D

29

15

NCP5222_PGD2 16

NCP5222_VCC 17

18

19

NCP5222_PGD1 20

21

PQ12

PQ14
AON6704L
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@ PC220

PC102
PC134 4.32K_0402_1%~D 4 4 1 2 1 2

2
PQ17
0.1U_0603_25V7K~D

1 2 1 2 4 NCP5222_LGATE2
2

2
1

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PC133

0.1U_0603_25V7K~D @ 0.1U_0603_25V7K~D

4.7_1206_5%~D
GNDA_VTT @
2

3
2
1

3
2
1

2
PR208 1 2
1
2
3

PR87
1 2 @
2

PR205
6.49K_0402_1%~D 24K_0402_1%~D
4.7_1206_5%~D

PD27 PD19 @

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D
1
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330U_D2E_2.5VM_R9~D
1 2 2 1
1 1 1
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PC109
@ PR209 + + +
+5V_ALW 1 2 +5V_ALW
20_0603_1%~D 2 2 2
1

1
@
B +3.3V_ALW B
PC208 PC207
1
1NCP5222_DRVS/2CH

0_0402_5%~D
1U_0603_16V6K~D 3.3U_0603_10V6K~D
2

2
+5V_ALW
100K_0402_1%~D

PR73

9.31K_0402_1%~D
2

1
PR69

GNDA_VTT @
2

PR93
PR95
1

2
<40> 1.05V_M_PWRGD
0_0402_5%~D

2 PR210 1 2 1
H_VTTPWRGD <8>
PR86

2.74K_0402_1%~D
0_0402_5%~D
0_0402_5%~D

1
@
2

PR94
@ PC110
1000P_0402_50V7K~D
BRIDGE_G

2
2 1
4

5 3
2
1
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FDMS7672 1N POWER56-8
+15V_ALW +5V_ALW
100K_0402_5%~D

PJP21
PJP32
2

47K_0402_5%~D

+1.05V_MP 1 2 +1.05V_M PC215 PC209

1

1
PR336

GNDA_VTT 1 2
1 2
PR335

PAD-OPEN 4x4m 0.01U_0402_25V7K~D 0.01U_0402_25V7K~D

A A
2

NCP5222_ICS2 NCP5222_ICS1 JUMP_43X79

1

BRIDGE_G PR212
PJP24
DMN66D0LDW-7 2N SOT363-6

DMN66D0LDW-7 2N SOT363-6

1 2
3

1 1 2 2 +1.05V_RUN_VTT
+1.05VTTP
6

PQ77A 499K_0603_1%~D

5 Current Sharing JUMP_43X79 DELL CONFIDENTIAL/PROPRIETARY

2 NCP5222_DRVS/2CH PJP25
Compal Electronics, Inc.
4

PQ77B 1 2
PJP22
1

1 2 Title
2 1
JUMP_43X79 +1.05V_M/+1.05VTT_RUN
PAD-OPEN1x1m Size Document Number Rev
1.0
GNDA_VTT LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 48 of 57
 8 7 6 5 4 3 2 1

+1.05V_RUN_VTT

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PJP26

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PR319

PR320

PR321

PR322

PR323

PR324
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2200P_0402_50V7K~D

10U_1206_25V6M~D

10U_1206_25V6M~D
1K_0402_1%~D

1K_0402_1%~D

1K_0402_1%~D

1K_0402_1%~D

1K_0402_1%~D

1K_0402_1%~D

1K_0402_1%~D

100U_25V_M~D

100U_25V_M~D

100U_25V_M~D
0.1U_0603_25V7K~D
1 1 1

PC127

PC128

PC129
2

1
<11> VID0 + + +

PC123

PC125

PC126
H H

PC124
<11> VID1

2
2 2 2

3
<11> VID2
@ @ @

D
<11> VID3

PR325

PR326

PR327

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PR331

1K_0402_1%~D

1K_0402_1%~D

1K_0402_1%~D
@
/ͺd͗ϯϯ͘ϲ

PR328 1K_0402_1%~D

PR329 1K_0402_1%~D

S
<11> VID6
KWŵŝŶŝ͗ϱϳ͘ϲ

1
1

1
1K_0402_1%~D

1K_0402_1%~D
CSP1 PR101 PC130
0_0603_5%~D 0.22U_0603_10V7K~D >ŽĂĚůŝŶĞ͗Ͳϭ͘ϵŵsͬ
1

1
CSN1 PR102 PC198 BOOT1 2 1 BOOT1_2 1 2
1.1_0603_1%~D 1200P_0402_50V7K~D PL11
0.022U_0402_25V7K~D

UGATE1 0.45UH +-20% MPC1040LR45CP 24A

2
0.22U_0603_25V7K~D

G G
GNDA_VCORE PHASE1 4 1 +VCC_CORE
1 2

1000P_0603_50V7K~D
1

3
PC219

0.022U_0402_50V7~D
3 2
1

1
PC271

2
PC266
PC199
2

+3.3V_RUN

AON6704L
vcore_vcc 1200P_0402_50V7K~D PR307 PR304
2

1
PQ18

PC192
1.74K_0402_1%~D1 2
H_CPURST#
10K_0402_1%~D
100K +-5% TSM0B104J4702RE 0402

GNDA_VCORE LGATE1 2 @
<8> G

0.022U_0402_50V7~D
CSP3 40.2K_0402_1%~D

1
2

2.2_1206_1%~D
PR103 @
PR310
1

S
PR141

PR301
CSN3 PC255 PR122 PH3
1.1_0603_1%~D 0_0402_5%~D 2 1 1 2

1
1
PC197
0.022U_0402_25V7K~D

1200P_0402_50V7K~D
2
0.22U_0603_25V7K~D

@ 2.49K_0402_1%~D 10K_0402_1%_TSM0A103F34D1RZ
1 1

2
1 2 <BOM Structure>
1 2

2
GNDA_VCORE @PR123
@ PR123 0_0402_5%~D @
1

2
PC258

@ PC200
1
PC272
PH1

PR114 CSP1 1 2
F PC256 F
100K_0402_5%~D
2

1200P_0402_50V7K~D 0.022U_0402_50V7~D
2

+CPU_PWR_SRC

1
+5V_ALW

1U_0603_10V6K~D
GNDA_VCORE CSN1
GNDA_VCORE

2200P_0402_50V7K~D
0.1U_0603_25V7K~D
3
1

10U_1206_25V6M~D

10U_1206_25V6M~D
PC263
PR127
<11,23> IMVP_IMON
40

31
39
38
37
36
35
34
33
32

2 1

1
PC217
0_0402_5%~D PU20

2
2

PC214

PC218

PC216
SIR472DP-T1-GE3
PC270
PGD_IN
CSN1
CSP1
D6
D5
D4
D3
D2
D1
D0

PQ51
0.033U_0402_16V7K~D

2
PR132 30 PR197 PC212 2
1

<11> VSSSENSE BST1 0_0603_5%~D 0.22U_0603_10V7K~D G

1 2 LX1 29
13.7K_0402_1%~D 1 28 BOOT2 1 2BOOT2_2 1 2
CSN3 DH1

S
2 CSP3 DL1 27
+5V_ALW VCORE_THRM 3 26

1
VCORE_IMON 4 THRM VDD VRHOT# PL12
PR140 IMON VRHOT 25
1

E GNDA_VCORE VCORE_ILIM 5 24 0.45UH +-20% MPC1040LR45CP 24A E

ILIM DL2
PR138 1 2 1 2VCORE_TIME 6 TIME DH2 23 UGATE2
PR139 7 22 PHASE2 4 1 +VCC_CORE
VCC LX2

1000P_0603_50V7K~D
10_0603_5%~D 137K_0402_1% 14K_0402_1%~D 8 21
DPRSLPVR

FB BST2

0.022U_0402_50V7~D
vcore_vcc 9 3 2
2

FBAC

1
DRVSKP
PWRGD

FBAC 10 2 1 LGATE2

D
CLKEN

GNDS +1.05V_RUN_VTT

2
PWM3
SHDN

PC267
CSN2
CSP2

TON
2

AON6704L
PSI

1U_0603_10V6K~D 41 PR213 56_0402_5%~D PR308

2
PAD

1
PQ22

PC194
PC269 2 1 1.74K_0402_1%~D PR305
MAX17030GTL+_TQFN40_5X5~D H_PROCHOT# <8> 2 @ 1 2
1

11
12
13
14
15
16
17
18
19
20

0.022U_0402_50V7~D
PR116 0_0402_5%~D

1
1

2.2_1206_1%~D
PWM3 @ 40.2K_0402_1%~D
PSI#

S
DPRSLPVR

PR302
GNDA_VCORE
VCORE_TON
VR_ON

GNDA_VCORE 1 2 DRSKP# PH4

1
1
PC233
2 PR311 1 1 2
@PC265
@ PC265 0.022U_0402_50V7~D 1 2 +3.3V_RUN @

2
@ PR121 PR112 10K_0402_5%~D 2.49K_0402_1%~D 10K_0402_1%_TSM0A103F34D1RZ

2
1K_0402_5%~D @
<11> VCCSENSE 1 2 2 1 PWRGD 1 2 IMVP_PWRGD <8,39,52>
D PR113 0_0402_5%~D @ PC213
@PC213 D
PR134 10_0402_5%~D CSP2 1 2
2 1
2

PR119 0.022U_0402_50V7~D
PR142 PR137 1 2 1 2 +CPU_PWR_SRC
+3.3V_RUN
27.4 +-1% 0402~D 4.75K_0402_1%~D PR111 1.91K_0402_1%~D
1

0_0402_5%~D +5V_ALW CSN2

@ CLK_EN# <6,52>
PC157 1U_0603_10V6K~D
1

1000P_0402_50V7K~D
2

2200P_0402_50V7K~D

10U_1206_25V6M~D
0.1U_0603_25V7K~D
3

10U_1206_25V6M~D
PC236

GNDA_VCORE
1 2 PR136 PC154

D
+CPU_PWR_SRC
2

1
PC145
PU17 0_0603_5%~D 0.22U_0603_10V7K~D

PC146

PC147

PC148
SIR472DP-T1-GE3
1 2 PR133 200K_0402_1%~D 5 1 BOOT3 2 1BOOT3_2 2 1
<11> VSSSENSE VDD BST

PQ48

2
PR135 10_0402_5%~D 2 1 +1.05V_RUN_VTT 6 8 UGATE3 2
@ PR110 1K_0402_5%~D SKIP DH G
2

GNDA_VCORE 1 2 2 PWM LX 7

S
PR143 2 1 H_PSI# <11>
C 27.4 +-1% 0402~D @ PC264 0.022U_0402_50V7~D PR115 0_0402_5%~D 3 4 C

1
GND DL
1

@
2 1 PR144 9 PL13
1

PR334 10K_0402_5%~D 33K_0402_5%~D EP 0.45UH +-20% MPC1040LR45CP 24A

GNDA_VCORE CSP2 MAX8791GTA+_TQFN8_3X3~D PHASE3 4 1 +VCC_CORE

2
1200P_0402_50V7K~D

2 1 +1.05V_RUN_VTT

3
1

PC259

0.022U_0402_50V7~D
PR104 1K_0402_1%~D PR332 3 2
1

1
1000P_0603_50V7K~D
1.1_0603_1%~D

2
PC268
0.022U_0402_25V7K~D

0.22U_0603_25V7K~D

2 1

AON6704L
0_0402_5%~D PR109 H_DPRSLPVR <11> PR309
2

1
PQ26

PC196
1.74K_0402_1%~D PR306
12
1

PC261

2 1 LGATE3 2 @ 1 2
G
PC273

0.022U_0402_50V7~D
GNDA_VCORE @ 1K_0402_1%~D PR333

1
1
@ 40.2K_0402_1%~D
2

2.2_1206_1%~D
CSN2

PR303
PR312 PH5

1
1

1
PC234
PC260 2 1 1 2

2
B 1200P_0402_50V7K~D @ 2.49K_0402_1%~D 10K_0402_1%_TSM0A103F34D1RZ B
2

2
@

GNDA_VCORE @ PC254
CSP3 1 2

PR108 0.022U_0402_50V7~D
<39> IMVP_VR_ON 1 2

0_0402_5%~D CSN3
PJP27
1 2

PAD-OPEN1x1m
GNDA_VCORE

DELL CONFIDENTIAL/PROPRIETARY
A A
Compal Electronics, Inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +VCORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-5471P
8 7 6
WWW.AliSaler.Com
5 4 3 2
Date: Wednesday, January 20, 2010 Sheet
1
49 of 57
 5 4 3 2 1

WWW.AliSaler.Com PD20
B540C-13-F_SMC2~D

2 1

PQ37

+DOCK_PWR_BAR 8 D S 1
7 D S 2
6 D S 3

0.47U_0805_25V7K~D
5 D G 4
D D

PC226
FDS6679AZ_SO8~D
PR227
330K_0402_5%~D

2
2
PR257
2 1 STSTART_DCBLOCK_GC

0_0402_5%~D

PD21
2
1
PR240 3
330K_0402_5%~D
PDS5100H-13_POWERDI5-3~D
1 2
PQ41 PBATT+ PQ40 PQ42
SI4835DDY-T1-E3_SO8~D FDS6679AZ_SO8~D 8 1
D S
8 1 1 S D 8 PBATT_IN_SS
7 D S 2
7 2 2 S D 7 6 D S 3 +PWR_SRC
+VCHGR

2200P_0402_50V7K~D

0.1U_0603_25V7K~D
6 3 3 S D 6 5 D G 4

1
1K_1206_5%~D
5 4 G D 5

PR248
PR260 FDS6679AZ_SO8~D

1
PC227

PC228
2 1
4

C 0_0402_5%~D C

2
1
PR259 PC229

1U_0603_25V6-K~D
1 2 BLK_MOSFET_GC 1U_0805_25V4Z~D

PC230
0_0402_5%~D

2
2

1
PR279
+DOCK_PWR_BAR 1 2 DK_PWR_BAR 0_0402_5%~D PR258
PR277 0_0402_5%~D 0_0402_5%~D
1 2 3301_DC_IN_SS
1

+DC_IN_SS
DSCHRG_MOSFET_GC

PR278 0_0402_5%~D

2
<51> +CHGR_DC_IN

+DC_IN 1 2 CD3301_DCIN
PR280 47_0805_5%~D
1

PC225

0.1U_0603_50V4Z~D
2

P50ALW
30
35
34
33
36

31

28
32

29

<44> SOFT_START_GC 1 2 +5V_ALW

PU902 PR271 0_0402_5%~D
PR281 100K_0402_5%~D
'W/K/ŶƉƵƚĨƌŽŵE
BLK_MOSFET_GC
CHARGERVR_DCIN
NC

DK_PWRBAR

NC
GND

DSCHRG_MOSFET_GC
DC_IN_SS

PBatt+

1 2 CD_PBATT_OFF 1 2
B
+3.3V_ALW2 PBATT_OFF <39> B
PR272 0_0402_5%~D

1 2 ACAVDK_SRC 1 2
ŵďĞĚĚĞĚŽŶƚƌŽůůĞƌ
<38> ACAV_DOCK_SRC# DOCK_AC_OFF <38,39>
PR261 0_0402_5%~D 1 27 PR273 0_0402_5%~D
DC_IN P50ALW
2 26 1 2
ERC1 SS_GC PBATT_OFF DK_AC_OFF
+SDC_IN 1 2 3 25
PR263 0_0402_5%~D ERC1 DK_AC_OFF_EN 3301_ACAV_IN_NB 1M_0402_5%~D
4 ACAVDK_SRC ACAV_IN_NB 24 1 2 ACAV_IN_NB <39,40,51>
5 23 PR276 0_0402_5%~D PR285
CD3301_SDC_IN GND GND DK_AC_OFF_EN
6 22 1 2 DOCK_AC_OFF_EC <39>
SDC_IN DK_AC_OFF_EN SL_BAT_PRES# PR275 0_0402_5%~D
7 DC_BLK_GC SL_BAT_PRES# 21
<51> DC_BLOCK_GC ACAVIN 8 20 BLKNG_MOSFET_GC
P33ALW2 9 ACAV_IN BLKNG_MOSFET_GC
P33ALW2 NBDK_DCINSS 19
EN_DK_PWRBAR

<23,40,51> ACAV_IN 1 2
SS_DCBLK_GC

PR264 0_0402_5%~D
DK_CSS_GC

1 2 1 2 SLICE_BAT_PRES# <38,39,44>
PWR_SRC

PR284 0_0402_5%~D PR274 0_0402_5%~D

CSS_GC

P33ALW

37 TP
ERC3
ERC2

2 1 1 2
GND

+3.3V_ALW2 +NBDOCK_DC_IN_SS
PR270 0_0402_5%~D
@PD22
@ PD22 RB751S40T1_SOD523-2~D
CD3301RHHR_QFN36_6X6~D
10
11
12
13
14
15
16
17
18

<51> CSS_GC
0.1U_0603_25V7K~D

P33ALW 1 2
ERC2

+3.3V_ALW
1

<51> DK_CSS_GC PR269 0_0402_5%~D

1
PC231

@ PR282 ERC3
180_0402_1%~D
EN_DK_PWRBAR 1
0.047U_0603_25V7K~D

2
2

EN_DOCK_PWR_BAR <39>
PR268 0_0402_5%~D
0.1U_0402_25V4Z~D
2

1 2
PC232

1M_0402_5%~D
PC235

STSTART_DCBLOCK_GC
A @ PR283 A
2

@ 3301_PWRSRC 1 2 +PWR_SRC
PR267 0_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Selector
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 50 of 57
 5 4 3 2 1

WWW.AliSaler.Com PD15 B540C~D

2 1

PQ80
SI4835DDY-T1-E3 1P SO8 +SDC_IN PR145 +PWR_SRC CHAGER_SRC
8 1 0.01_1206_1%~D
7 2 PJP28

TBD_0603_25V7K~D
6 3 1 4 1 2
+DC_IN_SS
5
@ PAD-OPEN 4x4m

0.1U_0603_25V7K~D
2 3

NTR4502PT1G_SOT23-3~D

2200P_0402_50V7K~D
4

1
PC160

PC158

PC159
PR402

2
<50> DC_BLOCK_GC

NTR4502PT1G_SOT23-3~D
1 2

2
1
0_0402_5%~D PR403 1 @ @
<50> CSS_GC

PQ28
D 1 2 2 D
0_0402_5%~D 2
ϮͺK<сϭϳ͘ϳs

1
1
3

3
PQ29
2
2 PQ71B
NTGD4161PT1G_TSOP6~D
WZϭϲϭ 3

S
d/YϮϰϳϰϱсϯϭϲ<

D
2 4 DOCK_DCIN_IS+ <38>

/ŶƚĞƌƐŝů/^>ϴϴϳϯϭсϮϮϲ< PQ71A
NTGD4161PT1G_TSOP6~D

G
3
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S
10_0402_1%~D

D
2 1 5 6 DOCK_DCIN_IS- <38>

10_0402_1%~D

100K_0402_5%~D

100K_0402_5%~D
1

1
+SDC_IN

PR155
PR153

1
10K_0402_5%~D

G
1
PR354

PR156

PR157
ISL88731_VDDP ISL88731_VREF @PC162
@ PC162 PC163
0_0402_5%~D
10K_0402_1%~D

0.1U_0603_25V7K~D 0.1U_0402_10V7K~D

2
2

PR161
226K_0402_1%~D

PR404 1 2 1 2 2 1 PR412

2
1

<50> +CHGR_DC_IN 1 2 1 2 DK_CSS_GC <50>

PR159

PR160

1_0402_5%~D PC164 0_0402_5%~D

@ PC353 GNDA_CHG 1U_0603_10V6K~D
0.1U_0603_25V7K~D

27
28
1 2 GNDA_CHG
1

1
@ PC351 GNDA_CHG PU10
2

.1U_0805_25V7K~D

CSSN
NC

CSSP

2
PR162 2 1 22 26
49.9K_0402_1%~D DCIN VCC PR164 PR163
2.2_0603_1%~D 33_0603_1%~D

RB751V_SOD323~D
2 1 2
PR165 ACIN
BOOT 25 1 2
15.8K_0402_1%~D

1 2 13

1
PC166 <23,40,50> ACAV_IN ACOK

1
PC167
0_0402_5%~D

0.1U_0603_25V7K~D
1

PD17
C C

SI4800BDY-T1_SO8~D

SI4800BDY-T1_SO8~D
2 1 11 VDDSMB

5
6
7
8

5
6
7
8
PR166

0.01U_0402_25V7K~D 10 PC168

2
SCL @

10U_1206_25V6M~D

10U_1206_25V6M~D
1U_0603_10V6K~D

2200P_0402_50V7K~D

0.1U_0603_25V7K~D
2

PQ30

PQ31
GNDA_CHG +3.3V_ALW 9 21 ISL88731_VDDP 1 2
2

SDA VDDP

1
PC169

PC170

PC171

PC172
GNDA_CHG 14 4 4
NC CHG_UGATE
UGATE 24
ISL88731_ICM 8

2
ICM
1

23 2 PR167 1
PC173 PHASE 0_0603_1%~D
6

3
2
1

3
2
1
VCOMP

1
0.1U_0402_10V7K~D

3300PF_0402_50V7K~D
2

1 2 5 PC174
@PR168
@ PR168 NC 220P_0402_50V7K~D

2
CHG_LGATE
130P_0402_10V7K~D

GNDA_CHG 200K_0402_5%~D PL14

2.2K_0402_5%~D

12 1 2 4 20
ICOMP LGATE

1
@ PC175 @ PR169 PR171
<40> CHARGER_SMBCLK
1

+VCHGR

PC176
2000P_0402_10V7K~D 7.5K_0402_5%~D 0.01_1206_1%~D
PR170

<40> CHARGER_SMBDAT

2
2
PC177

ISL88731_VREF 3 19 +VCHGR_B 1 2 +VCHGR_L1 4

VREF PGND

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

2200P_0402_50V7K~D

1.8K_1206_5%~D
0.1U_0603_25V7K~D
CSOP 18

D 5
6
D 7
D 8
@ PC178 @ PR172 5.6U_HMU1356B-5R6-F 8A

SI4812BDY-T1-E3_SO8~D
<23> MAX8731_IINP 2 3
2

1
130P_0402_10V7K~D@ 1 2 7 17 @

D
NC CSON

PR173
10_0402_1%~D
0_0402_5%~D PC179
6.81K_0402_1%~D

0.1U_0402_10V7K~D

1 2
1

1
PC186

PC187

PC188

PC189

PC300
10_0402_1%~D
1 PR174
0.1U_0402_10V7K~D

15 2 +VCHGR
VFB
1

1
PR175

PC180

1000P_0603_50V7K
1U_0603_10V6K~D
0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

12

1 2

2
GND
1

PQ32
16 100_0402_5%~D 4

2
NC G
1

1
PC181

PC182

PC183

PC184

PC185

PR176

PR355
4.7_1206_5%
29 @
2

GND

PR177
@ @
2

S
S
S
2

2
@ @ @ ISL88731_TQFN28~D

RHU002N06_SOT323
3
2
1
PC191

1
PJP29 D
1 2 1 2 2 1

PQ33
B 1 2 2 B
@ PC190 0.1U_0402_10V7K~D G
0.1U_0603_25V7K~D @ PC350 S

3
PAD-OPEN1x1m 0.1U_0603_25V7K~D @
For Maxim Charger only GNDA_CHG GNDA_CHG GNDA_CHG
GNDA_CHG ACAV_IN

Maximum charging current is 6.24A

+3.3V_ALW ISL88731_VREF
+DC_IN ISL88731_VREF PR422
100K_0402_5%~D

100K_0402_5%~D

1M_0402_5%~D
232K_0402_1%~D

1 2
1

1
47K_0402_1%~D
1
PR423

PR341

PR362
PR420

+5V_ALW

4
@ PU11A
2

2 LM393DR_SO8~D

G
2

IN-
8

O 1
5 PR401 3
P

IN+ IN+
P
ACAV_IN_NB <39,40,50>
21.5K_0402_1%
100P_0402_50V8J

7 1 2
O 0_0402_5%~D
6
8
IN-
G
1

PU11B
100P_0402_50V8J

42.2K_0402_1%~D
1
PC352

PR192

A LM393DR_SO8~D A
4
1

1
1

1
PC330

PR421

PC193 @
2

0.01U_0402_25V7K~D PC195 @
2

0.01U_0402_25V7K~D
DELL CONFIDENTIAL/PROPRIETARY
2

2
2

+5V_ALW
Compal Electronics, Inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Charger
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-5471P
5 4
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Date: Wednesday, January 20, 2010
1
Sheet 51 of 57
 5 4 3 2 1

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D <12> GFX_VID6 1 2 D
PR801
0_0402_5%~D
<12> GFX_VID5 1 2
PR802
0_0402_5%~D
Thermal Design Current:12A
2 1
<12> GFX_VID4 1
PR803
2 Peak Current:22A
<12> GFX_IMON PR811 0_0402_5%~D OCP Mini: 26.4A

9.09K_0402_1%~D
21K_0402_1%~D <12> GFX_VID3 1 2
PR804

1
0_0402_5%~D

PR810
PC801 <12> GFX_VID2 1 2
0.015U_0402_16V7K~D PR805
PR835 0_0402_5%~D PJP801

2
<12> VSS_AXG_SENSE 1 2 <12> GFX_VID1 1 2 GVR_VBAT 1 2 +PWR_SRC

2
PR806
0_0402_5%~D 0_0402_5%~D PAD-OPEN 4x4m
<12> GFX_VID0 1 2
2 1 2 1 PR807
1

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

0.1U_0805_50V7K
PR813 PR812 0_0402_5%~D
10_0603_5%~D 10_0603_5%~D PC802

1
1000P_0402_50V7K~D <12> GFX_VR_ON 2 1
2

1
PR808 PR832

PC812

PC813

PC814

PC815
+VGFX_COREP 0_0402_5%~D 200K_0402_1%~D

3
GNDA_VGA @ PR809

2
2 1 2 1 2 1 4.7K_0402_5%~D

D
GVR_TON 2
1

SIR472DP-T1-GE3
PR814 PR815 PR816

PQ801

SIR472DP-T1-GE3
10_0603_5%~D 10_0603_5%~D 10.2K_0402_1%~D

PQ804
PR836 PC803 GVR_IMON

14

15

16

17

18

19

20
11
2

GVR_BST_R
2

1000P_0402_50V7K~D PU801 G
<12> VCC_AXG_SENSE 1 2 2 G
GNDA_VGA

D0

D1

D2

D3

D4

D5

D6
SHDN#

S
0_0402_5%~D GNDA_VGA 9 PR831 PC809
TON

S
1 0_0603_5%~D 0.22U_0603_10V7K~D @

1
+3.3V_ALW +3.3V_RUN +3.3V_ALW IMON
24 GVR_BST 1 2 2 1

1
GVR_GNDS 2 BST PL801
GNDS
DH 26 GVR_DRVH_G
10K_0402_1%~D

10K_0402_1%~D

10K_0402_1%~D

C GVR_FB 3 0.56UH +-20% MPC1040LR56C 23A +VGFX_COREP C

FB
LX 25 GVR_SW_PHASE 4 1
1

2 1 2 1 GVR_ILIM 30 MAX17028GTJ+_TQFN32_5X5~D
ILIM

1500P_0603_25V7K~D
PR821

PR820

PR819

@ PC811
PR818 PR817 22 GVR__DRVL_G 3 2

FDMS7660 1N POWER56-8

FDMS7660 1N POWER56-8
DL

4700P_0402_50V7K~D

2200P_0402_50V7K~D
0.1U_0402_10V7K~D
64.9K_0402_1%~D 10K_0402_1%~D GVR_TIME 29

D
GNDA_VGA TIME
21

330U 2V M D2 LESR6M

330U 2V M D2 LESR6M
2
PGND

2.2K_0402_1%~D
@ GVR_VRHOT# 28 1 1
2

VRHOT#

1
PQ802

PQ803

PC825

PC824
CCV 32 1 PR829 2

2
+ +

PR828

PC827

PC826
GVR_SKIP 7 @ 2 2
SKIP G G

100P_0603_50V7K~D

4.7_1206_5%~D
12 GFX_CLK_EN# 20K_0402_1%~D

GVR_NTC

2
CLK_EN#

1
PC810

@ PR830
2 1 10

SLOW#

T_PAD
<8,39,49> IMVP_PWRGD
PGDIN
PWRGD 2 2

S
THRM
PR822 13

VDD

VCC

CSN

CSP

1
V3P3

1
PC808
0_0402_5%~D PH802

1
1

1
2 1 1 2

2
27

23

GFXVR_VCC 31

33
@
PR827 10K_0402_1%_TSM0A103F34D1RZ

GVR_CSN

GVR_CSP
GFXVR_SLOW
GFXVR_THRM 2.49K_0402_1%~D
+5V_ALW

GNDA_VGA

1
2 1
PR823 PC807 PC816
10_0603_5%~D 0.22U_0603_25V7K~D 0.033U_0402_16V7K~D

2
2
1U_0603_10V4Z~D

1U_0603_10V4Z~D

100K +-5% TSM0B104J4702RE 0402

1

PR824
PC804

PC805

13.7K_0402_1%~D
Layout Note:
2

1
1

Place near VDD Pin PC806 @

1 2 GFX_DPRSLPVR <12> 0.001U_0402_50V7M~D

2
PR825
2

0_0402_5%~D
1

GNDA_VGA
B B
PH801

PR826 GNDA_VGA
4.7K_0402_5%~D
1
2

GNDA_VGA GNDA_VGA +3.3V_ALW

2

@ PR834
1.91K_0402_1%~D
1

@ PR833
GFX_CLK_EN# 1 2 CLK_EN# <6,49>
PJP802
0_0402_5%~D 1 2
PJP803
2 1 PAD-OPEN 4x4m

PAD-OPEN1x1m PJP804
GNDA_VGA +VGFX_COREP 1 2 +VCC_GFXCORE
PAD-OPEN 4x4m

PJP805
1 2

PAD-OPEN 4x4m

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAX17028 VGFX_Core
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 52 of 57
 5 4 3 2 1

WWW.AliSaler.Com
V ersion Change L ist ( P. I. R . L ist )
R equest
Item Page# Title D ate Issue D escription Solution D escription R ev.
O w ner
D ϭ ϰϬ ,t ϳͬϭϯͬϮϬϬϵ KDW> ŽĂƌĚ/ ZϵϴĐŚĂŶŐĞƚŽϭϯϬŬŽŚŵ yϬϭ D

Ϯ ϯϬ ,t ϳͬϭϯͬϮϬϬϵ KDW> ĨŽůůŽǁDϬϵнϯ͘ϯsͺ>EĞŶĂďůĞĐŽŶƚƌŽůĐŝƌĐƵŝƚ ĚĞƉŽƉZϰϳ yϬϭ

ĚĚZϭϰϲϵ͕ZϭϰϵϳΕZϭϱϬϱ͕ZϭϱϬϳΕZϭϱϬϵ͕ϭϴϳϱ͕ϭϴϳϴΕϭϴϴϰ͕YϭϵϵΕYϮϬϮ͕YϮϬϱ͕YϮϬϳ͕YϮϬϴ͕
hϭϰϭ͕W:WϵϬϲ͕W:WϵϬϳ͕ĐŚĂŶŐĞZϴϳϵƚŽϭ͘ϱ<͕ZϴϴϬƚŽϳϱϬŽŚŵ͕ZϲϮϰƚŽϮϮŽŚŵ͕ĐŚĂŶŐĞWhY
ϯ ϴ͕ϭϮ͕
,t ϳͬϭϯͬϮϬϬϵ /ŶƚĞů /ŶƚĞů^ϯƌĞĚƵĐƚŝŽŶĐŝƌĐƵŝƚ͘ ƉŽǁĞƌƐŽƵƌĐĞĨƌŽŵнϭ͘ϱsͺDDƚŽнϭ͘ϱsͺWhͺsY͕ĐŚĂŶŐĞн͘ϬϳϱͺZͺsddĚŝƐĐŚĂƌŐĞŐĂƚĞĨƌŽŵ yϬϭ
ϭϯ͕ϰϮ
ZhEͺKEͺE>ηƚŽZhEͺKEͺWhϭ͘ϱs^ϯη͕ĂĚĚнϭ͘ϱsͺWhͺsYĚŝƐĐŚĂƌŐĞĐŝƌĐƵŝƚ͕ĂĚĚŶĞƚ
ΗZͺ,sZ&ͺZ^dͺ'dΗĨƌŽŵhϯϲ͘ϯϰƚŽYϭϭϵ͘Ϯ͕ΗWhϭ͘ϱsͺ^ϯͺ'dΗĨƌŽŵhϯϲ͘ϯϲƚŽZϭϱϬϭ
ϰ ϯϭ ,t ϳͬϮϮͬϮϬϬϵ ƌŽĂĚĐŽŵ ĐŚĂŶŐĞϳϭϴǀĂůƵĞ ĐŚĂŶŐĞϳϭϴĨƌŽŵ͘ϰϳƵ&ƚŽ͘ϮϮƵ& yϬϭ
ĚĞůĞƚĞhϭϰϬ͕Zϭϯϲ͕Zϭϯϴ͕Zϭϱϲ͕ZϱϬϳ͕Zϱϭϲ͕Zϱϭϵ͕ZϱϮϵ͕Zϱϯϭ͕ZϱϯϰΕZϱϯϲ͕Zϱϵϰ͕Zϭϰϱϳ͕Zϭϰϱϴ͕
ϱ Ϯϯ ,t ϳͬϮϮͬϮϬϬϵ >> &ŽůůŽǁ>>ƌĞƋƵĞƐƚƚŽƌĞŵŽǀĞZϯWĐŝƌĐƵŝƚ͘ yϬϭ
ZϭϰϲϮ͕Zϭϰϲϯ͕ϰϯϰ͕ϳϮ͕ϳϯ͕ϯϵϭ͕ϰϬϲ͕ƉŽƉZϭϰϮ͕Ϯ͕Ϯϭϵ
ϲ ϰϭ͕ϯϳ ,t ϳͬϮϮͬϮϬϬϵ KDW> Per M09 lesson learn request ZĞͲĚĞĨŝŶĞ:dWϭ͕:/Kϭ yϬϭ
ϳ ϭϵ ,t ϳͬϮϮͬϮϬϬϵ /ŶƚĞů 'W/Kϭ͕ϲ͕ϳŶĞĞĚƚŽWhŝĨŶŽƵƐĞĚ͘ ĚĚZϭϱϭϬ͕Zϭϱϭϭ yϬϭ
ϴ ϰϬ ,t ϳͬϮϮͬϮϬϬϵ KDW> &ŽůůŽǁ^D^ϱϬϰϱƐƉĞĐ ĚĚZϭϱϭϮ͕Λϭϴϴϱ͕ϭϴϴϲ͕ĐŚĂŶŐĞZϱϲϬƚŽϭϬϬ<ŽŚŵ͕ĂĚĚŶĞƚŶĂŵĞ>dͺKEͺ^tηͺZ yϬϭ
ϵ ϭϲ ,t ϳͬϮϮͬϮϬϬϵ /ŶƚĞů /ŶƚĞů^ŝŐŚƚŝŶŐƌĞƉŽƌƚϯϯϬϲϬϰϴƚŽƉŽƉϮϱD,njĐƌLJƐƚĂů͘ ƉŽƉzϲ͕Zϲϴϱ͕ϭϭϲϴ;ĐŚĂŶŐĞƚŽϭϴƉͿ͕ĐŚĂŶŐĞZϯϴϭƚŽϭϴϴϳ;ϭϴƉͿ yϬϭ
ϭϬ ϯϭ ,t ϳͬϮϮͬϮϬϬϵ ƌŽĂĚĐŽŵ ƌĞŵŽǀĞZ&/ĚŝƐĂďůĞĐŝƌĐƵŝƚ ƌĞŵŽǀĞZϭϬϲϮΕZϭϬϲϱ yϬϭ
ϭϭ Ϯϰ ,t ϳͬϮϮͬϮϬϬϵ KDW> DDŽĚƵůĞĐŚĂŶŐĞĨƌŽŵϳƉŝŶƚŽϴƉŝŶ͘ ĐŚĂŶŐĞƉŝŶĚĞĨŝŶĞĨŽƌ:Wϭ yϬϭ
C ϭϮ ϯϭ ,t ϳͬϮϮͬϮϬϬϵ ƌŽĂĚĐŽŵ ZϴϵϴĂŶĚZϰϴϱƉŽƉĂƚƚŚĞƐĂŵĞƚŝŵĞ͘ ĚĞƉŽƉZϴϵϴ yϬϭ C

ϭϯ Ϯϵ ,t ϳͬϮϵͬϮϬϬϵ KDW> D/ƐŽůƵƚŝŽŶ͘ ĐŚĂŶŐĞZϭϮϵϱƚŽ>ϰ;ϮϮϬŽŚŵͿĂŶĚZϭϮϭϱĨƌŽŵϮϮŽŚŵƚŽϰϳŽŚŵ͘ yϬϭ

ϭϰ ϰϮ ,t ϳͬϮϵͬϮϬϬϵ KDW> ďĂƐĞŽŶĚĞͲƌĂƚŝŶŐƌĞƉŽƌƚ͘ ĐŚĂŶŐĞYϲϭĨƌŽŵKϰϰϱϲƚŽEdD^ϰϭϬϳ yϬϭ
ϭϱ ϯϲ͕ϯϵ ,t ϳͬϮϵͬϮϬϬϵ >> 'W/KDWƵƉĚĂƚĞ ĚĚĐŽŶŶĞĐƚŝŽŶĨƌŽŵ:D/E/ϯ͘ϮϬƚŽϱϬϮϴƉŝŶϱϲ͕ŶĂŵĞĚΗhtͺZ/Kͺ/^ηΗ yϬϭ
ĚĚƌĞƐĞƌǀĞĚZϭϱϭϯďĞƚǁĞĞŶhϵϱ͘ϭϴĂŶĚнϯ͘ϯsͺZhE͕ĂĚĚZϭϱϭϰďĞƚǁĞĞŶhϵϱ͘ϭϴĂŶĚϱϬϮϴ͘ϰϳ
ϭϲ ϯϳ͕ϯϵ ,t ϳͬϮϵͬϮϬϬϵ >> 'W/KDWƵƉĚĂƚĞ yϬϭ
ŶĂŵĞĚEͺ^dͺZWdZ͘
ϭϳ ϰϮ ,t ϳͬϮϵͬϮϬϬϵ KDW> ƌĞƐŽůǀĞůĞĂĐŬĂŐĞŝƐƐƵĞ͘ WŽƉZϲϮϱĂŶĚYϳϵ͕ĐŚĂŶŐĞZϲϮϱƚŽϬϲϬϯƐŝnjĞ͘ yϬϭ
ϭϴ ϯϭ ,t ϳͬϮϵͬϮϬϬϵ ƌŽĂĚĐŽŵ ƌĞƐŽůǀĞϱϴϴϮůĞĂĐŬĂŐĞŝƐƐƵĞ ĂĚĚZϭϱϭϱ͕YϮϬϵ͕YϮϭϬ yϬϭ
ϭϵ Ϯϲ ,t ϳͬϮϵͬϮϬϬϵ KDW> ƌĞƐŽůǀĞϴϮϬϬs/ĐĂŶΖƚǁŽƌŬŝƐƐƵĞ͘ ĂĚĚZϭϱϭϲ yϬϭ
ϮϬ ϯϭ ,t ϳͬϮϵͬϮϬϬϵ ƌŽĂĚĐŽŵ ƌĞƐŽůǀĞƐŵĂƌƚĐĂƌƚĐĂŶΖƚǁŽƌŬƉƌŽďůĞŵ͘ ƉŽƉZϳϳϱ͕Zϱϯϳ͕ĚĞƉŽƉZϳϳϲ͘ yϬϭ
Ϯϭ ϯϲ ,t ϳͬϮϵͬϮϬϬϵ KDW> ŽƌƌĞĐƚWhƉŽǁĞƌƌĂŝůĨŽƌh^ͺDZϭͺdη ĐŚĂŶŐĞh^ͺDZϭͺdηWhƚŽнϯ͘ϯsͺZhE yϬϭ
ϮϮ ϯϭ ,t ϳͬϮϵͬϮϬϬϵ KDW> ƌĞŵŽǀĞZϭϬϲϭƚŽĂǀŽŝĚĚŽƵďůĞWhĂŶĚƉƌŽǀŝĚĞďĂĐŬͲĚƌŝǀĞƉĂƚŚ͘ ƌĞŵŽǀĞZϭϬϲϭ yϬϭ
Ϯϯ ϭϵ ,t ϳͬϮϵͬϮϬϬϵ KDW> ĂĚĚWƚŽƉƌŽǀĞŶƚĨůŽĂƚŝŶŐĂƚW,'W/KϮϮ͕'W/Kϯϰ͘ ĂĚĚZϭϱϮϬ͕ZϭϱϮϭ yϬϭ
&ŽůůŽǁƚŚĞƉŽƉŽƉƚŝŽŶŽŶZϭ͘ϲƚŽĚĞƉŽƉϯϵĨŽƌнs><͕
Ϯϰ Ϯϭ ,t ϳͬϮϵͬϮϬϬϵ KDW> ĚĞͲƉŽƉϲϭϬ͕ϯϵ͕ϭϭϭ͕ϭϭϮ yϬϭ
ϲϭϬĨŽƌн^dW>>͕ϭϭϭĂŶĚϭϭϮĨŽƌнϭ͘ϬϱsͺDͺsWt
ĐŽƌƌĞĐƚƚŚĞĐŽŶŶĞĐƚŝŽŶĨŽƌEͺ^dͺZWdZ͘ŝƚΖƐŶŽƚĚĞƚĞĐƚ
Ϯϱ ϯϳ ,t ϳͬϯϭͬϮϬϬϵ >> ĐŚĂŶŐĞƚŚĞĐŽŶŶĞĐƚŝŽŶĨƌŽŵhϵϱWŝŶϭϴƚŽWŝŶϳ yϬϭ
B ĨƵŶĐƚŝŽŶ͘ B

Ϯϲ Ϯϳ ,t ϴͬϬϱͬϮϬϬϵ KDW> ďĂƐĞŽŶĂŶĚD/ƚĞƐƚƌĞƐƵůƚŽŶZ' ĐŚĂŶŐĞ>ϲϭΕ>ϲϯƚŽ>DϭϴϬϱϬ^EϭĂŶĚϯϵϬ͕ϱϭϴ͕ϵϵϲ͕ϮϱϭΕϮϱϯƚŽϰ͘ϳƉ yϬϭ

ĐŚĂŶŐĞƚŚĞWhƚŽнϯ͘ϯsͺZhEƌĞĨĞƌƚŽƚŚĞĐŽƌĞƉŽǁĞƌƌĂŝůĂƚ
Ϯϳ ϯϲ ,t ϴͬϬϱͬϮϬϬϵ KDW> ĐŚĂŶŐĞƚŚĞWhĨŽƌZϰϱϴĨƌŽŵнϯ͘ϯsͺ>tͺW,ƚŽнϯ͘ϯsͺZhE yϬϭ
W,ƐŝĚĞ͘
ϭϴ͕ϯϱ͕ ĞůĞƚĞEsDĐŽŶŶĞĐƚŝŽŶ͕ĚĞůĞƚĞZϭϰϭϭ͕ZϭϰϱϮ͕Zϭϰϱϯ͕Zϴϲϲ͕ZϴϳϮ͕:tϭ͕
Ϯϴ ,t ϴͬϬϱͬϮϬϬϵ >> ƌĂŝĚǁŽŽĚŶŽůŽŶŐĞƌƐƵƉƉŽƌƚŽŶZŽƚŚƐĐŚŝůĚ͘ yϬϭ
ϯϲ ϭϴϱϭ͕ϭϴϱϮ͘DŽǀĞ:D/E/ϭƉŽǁĞƌĐŝƌĐƵŝƚƚŽƉĂŐĞϯϲ͘
Ϯϵ ϭϬ ,t ϴͬϬϲͬϮϬϬϵ /ŶƚĞů &ŽůůŽǁ/ŶƚĞůƌĞĐŽŵŵĂŶĚƚŽĂĚĚĚĞďƵŐdW͘ ĚĚdϭϴϲΕdϭϵϬ yϬϭ
ϯϬ Ϯϴ ,t ϴͬϬϲͬϮϬϬϵ KDW> &ŽůůŽǁDϬϵƚŽĐŚĂŶŐĞƚŚĞWhƚŽнϯ͘ϯsͺZhE WŽƉZϭϮϯϵĂŶĚĐŚĂŶŐĞƚŚĞWhƉŽǁĞƌƌĂŝůĨƌŽŵнϱsͺDKƚŽнϯ͘ϯsͺZhE yϬϭ
ĚĞůĞƚĞdϭϱϵ͕Zϰϵϰ͕Zϰϵϴ͕Zϲϯϭ͕Zϲϯϰ͕Zϴϵϴ͕ϲϰϬ͕ϲϰϭ͕ϲϰϮϲϰϳ͕ϭϬϮϲ͕>ϳϯ͕ĂĚĚZϭϱϮϮ͕ϭϴϴϳ͕
ϯϭ 31 ,t ϴͬϬϲͬϮϬϬϵ ƌŽĂĚĐŽŵ &ŽůůŽǁƌŽĂĚĐŽŵƌĞƋƵĞƐƚ yϬϭ
ϭϴϴϴ͕ĐŚĂŶŐĞĐŽŶŶĞĐƚŝŽŶĨŽƌZϰϵϲ͕ZϰϵϳƚŽ'E͕ĐŚĂŶŐĞĐŽŶŶĞĐƚŝŽŶĨŽƌ:^ϭƉŝŶϯĂŶĚƉŝŶϰ͘
32 Ϯϯ ,t ϴͬϭϮͬϮϬϬϵ KDW> &EϭͺdηƐŚŽƵůĚŚĂǀĞϭϬ<WhƚŽнϯ͘ϯsͺD ĂĚĚZϭϱϭϳ yϬϭ
33 ϰϬ ,t ϴͬϭϮͬϮϬϬϵ ^D^ ƉĞƌEϭϵ͘ϲ;ƐĞĐƚŝŽŶϲ͘ϳ͕ƉĂŐĞϭϵͿ ĐŚĂŶŐĞZϱϰϭ͕Zϱϱϰ͕ZϭϱϭϮĨƌŽŵϭ<ƚŽϭϬ<͘ yϬϭ
dŚĞƉƵůůͲƵƉƐŽƵƌĐĞŽĨƚŚĞZϭϱϬƐŚŽƵůĚďĞĐŚĂŶŐĞĚƚŽнsͺϰϬϬϮ
34 Ϯϯ ,t ϴͬϭϮͬϮϬϬϵ ^D^ ĐŚĂŶŐĞZϭϱϬWhĨƌŽŵнϯ͘ϯsͺDƚŽнsͺϰϬϬϮ yϬϭ
ďLJ^D^ƌĞƋƵĞƐƚ
ĚĚĚŝƐĐŚĂƌŐĞĐŬƚĨŽƌнϯ͘ϯsͺD͕ǁĂƚĐŚĚŽŐƚŝŵĞƌŵĂLJŶŽƚďĞ
35 Ϯϯ ,t ϴͬϭϮͬϮϬϬϵ ^D^ ƌĞƐĞƚǁŚĞŶDϰϬϬϮsͺWtZ'ŝƐŶŽƚĐŽŵƉůĞƚĞůLJĂƚ ƉŽƉYϳϮĂŶĚZϲϭϲ͕ĐŚĂŶŐĞZϲϭϲĨƌŽŵϭ<;ϬϰϬϮͿƚŽϯϵŽŚŵ;ϬϲϬϯͿ yϬϭ
A >ŽŐŝĐ>Žǁ͘ A

36 ϴ ,t ϴͬϭϮͬϮϬϬϵ KDW> &ŽůůŽǁDĂƌŐĂƵdžƚŽĨŝdž^ϯƉŽǁĞƌƵƉƐĞƋƵĞŶĐĞ͘ ĐŚĂŶŐĞϭϴϴϬĨƌŽŵϬ͘ϬϭƵ&ƚŽϬ͘ϮϮƵ& yϬϭ

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.R (1/1)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
5 4
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Date: Wednesday, January 20, 2010
1
Sheet 53 of 57
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V ersion Change L ist ( P. I. R . L ist )
R equest
Item Page# Title D ate Issue D escription Solution D escription R ev.
O w ner
D ttϯϬĂůƉĞůůĂDŽt͕/ŶƚĞůƌĞƋƵĞƐƚĐŚĂŶŐĞ>ϰϱΘ>ϰϲƚŽ D
37 Ϯϭ ,t ϴͬϭϮͬϮϬϬϵ /ŶƚĞů ĐŚĂŶŐĞ>ϰϱ͕>ϰϲĨƌŽŵϭϬh,ͺ>ϮϬϭϮdϭϬϬDZͺϮϬйƚŽϭϬh,ͺ>ZϮϬϭϮdϭϬϬDͺϮϬй yϬϭ
ϭϬƵ,͕ZсϬ͘ϯϲŽŚŵ
WĞƌ/ŶƚĞůĐŚĞĐŬůŝƐƚƌĞǀϭ͘ϲ͕ĐŚĂŶŐĞWǀĂůƵĞŽĨ,WƐŝŐŶĂůƐ
38 Ϯϲ͕ϯϴ ,t ϴͬϭϮͬϮϬϬϵ /ŶƚĞů ĐŚĂŶŐĞZϭϴϲ͕Zϭϵϭ͕Zϳϵϲ͕ZϳϵϴĨƌŽŵϭϬϬ<ŽŚŵƚŽϭϭϬ<ŽŚŵ yϬϭ
ĨƌŽŵϭϬϬ<ƚŽϭϭϬ<ŽŚŵ͘
s'ͺ/ͺ/^ĂŶĚs'ͺ/ͺhDƐŚŽƵůĚƉƵůůĞĚƵƉƚŽ
39 39 ,t ϴͬϭϮͬϮϬϬϵ KDW> ĐŚĂŶŐĞWhĨƌŽŵнϯ͘ϯsͺZhEƚŽнϯ͘ϯsͺ>tĨŽƌZϴϳϱ͕Zϴϴϭ yϬϭ
нϯ͘ϯsͺ>t
40 31 ,t ϴͬϭϯͬϮϬϬϵ ƌŽĂĚĐŽŵ ĂƐĞŽŶƌŽĂĚĐŽŵƌĞǀŝĞǁĨŽƌDĂƌŐĂƵdž͘ ĂĚĚΛZϭϱϮϯ͕ZϭϱϮϰ͕ĐŚĂŶŐĞϳϭϴƚŽϰϳϬŶ&͕ϲϰϲƚŽϮϮϬŶ&͘ yϬϭ
15, 30, ĐŚĂŶŐĞϮϵϲ͕ϮϵϳƚŽϭϮƉ&͕ϰϳϲƚŽϯϯƉ&͕ϰϮϳƚŽZϭϱϮϲ;ϮϬϬŽŚŵͿ͕ϲϳϰΘϲϳϱƚŽϯϯƉ&͕ZϰϮϭƚŽ
41
33, 40 ,t ϴͬϭϯͬϮϬϬϵ KDW> ĂƐĞŽŶƌĞƐƵůƚĨŽƌĂůůyΖƚĂůĂŶĚK^͘ yϬϭ
ϭϬϬŽŚŵ
42 8 ,t ϴͬϭϯͬϮϬϬϵ /ŶƚĞů ZĞĨĞƌƚŽ/ŶƚĞů^ϯWŽǁĞƌZĞĚƵĐƚŝŽŶͺǁŚŝƚĞWĂƉĞƌͺZĞǀϬ͘ϵ ĂĚĚZϭϱϮϱĂŶĚϭϴϵϬ yϬϭ
43 33, 34 ,t ϴͬϭϯͬϮϬϬϵ ZŝĐŽŚ ŽƌƌĞĐƚƚŚĞĂƌĚďƵƐŽŶƚƌŽůůĞƌƚŽZϱhϮϰϮŽŶWdƉŚĂƐĞ͘ ĐŚĂŶŐĞZϰϲƚŽϭϴϴϵ͕ϮϭĨƌŽŵϭϬƵ&ƚŽϰϳƵ&͕ĐŽƌƌĞĐƚƐLJŵďŽůƚŽZϱhϮϰϮ yϬϭ
44 30 ,t ϴͬϭϰͬϮϬϬϵ /ŶƚĞů ďƐĂĞŽŶ/ŶƚĞůƌĞǀŝĞǁƌĞƐƵůƚ͘ ƌĞŵŽǀĞн>KDͺsd͕ZϱϲϮ͕ϰϭ͕ĚĞƉŽƉϳϭϮĂŶĚĐŚĂŶŐĞƚŚĞŶĞƚŶĂŵĞƚŽн>KDͺsdͺ/K͕ĂĚĚϭϴϵϭ yϬϭ
45 19, 37 ,t ϴͬϭϰͬϮϬϬϵ KDW> 'W/KDWƵƉĚĂƚĞĨŽƌEͺ^dͺZWdZη͘ ĂĚĚΛZϭϱϮϴ͕ΛYϮϭϭ͕ƉŽƉZϭϱϭϯ͕ĚĞƉŽƉZϭϱϭϰ͕ĐŚĂŶŐĞŶĞƚŶĂŵĞĨƌŽŵ'W/KϭϲƚŽEͺ^dͺZWdZη yϬϭ
46 8, 40 ,t ϴͬϭϰͬϮϬϬϵ KDW> 'W/KDWƵƉĚĂƚĞĨŽƌWhͺddη ĚĚZϭϱϮϵ͕ĚĞůĞƚĞdWϭ͕ĐŽŶŶĞĐƚ:Wh͘,ϮϰƚŽhϯϲ͘ϭϴ yϬϭ
47 37 ,t ϴͬϭϳͬϮϬϬϵ KDW> ĂƐĞŽŶD/ƚĞĂŵƌĞƋƵĞƐƚƚŽƌĞƐĞƌǀĞĐŽŵŵĂŶĚĐŚŽŬĞĨŽƌƚĞƐƚ ĚĚ>ϵϬ͕>ϵϭ͕ΛZϭϱϯϬΕΛZϭϱϯϯ͕ĐŚĂŶŐĞ>ϲϰƚŽϮΛ͕ĚĞƉŽƉZϳϵϭ͕ZϳϵϮ͘ yϬϭ
48 30 ,t ϴͬϭϳͬϮϬϬϵ /ŶƚĞů ďƐĂĞŽŶ/ŶƚĞůƌĞǀŝĞǁƌĞƐƵůƚ͘ ƌĞƐĞƌǀĞĚZϭϱϯϰ͘ yϬϭ
C 49 42 ,t ϴͬϭϴͬϮϬϬϵ KDW> ƌĞƐĞƌǀĞĚƉŽƉŽƉƚŝŽŶƚŽŝŵƉƌŽǀĞĚ^ϯĐŝƌĐƵŝƚ͘ ĂĚĚZϭϱϯϱ͕ΛZϭϱϯϲ yϬϭ C

50 31 ,t ϴͬϭϴͬϮϬϬϵ KDW> ďĂƐĞŽŶ^ŵĂƌƚĐĂƌĚƌĞƐƵůƚ͘ ZϳϳϮƚŽϰϳKŚŵĂŶĚϭϬϭϱƚŽϭϬƉ& yϬϭ

51 28, 37 ,t ϴͬϭϴͬϮϬϬϵ KDW> ďĂƐĞŽŶ^dƌĞƐƵůƚŽŶ,ĂŶĚ^d ĚĞƉŽƉZϭϯϬϴ͕ZϭϮϵϴ͕ƉŽƉZϭϯϬϰ͕ZϭϬϯϭ yϬϭ
52 26 ,t ϴͬϮϬͬϮϬϬϵ WĞƌŝĐŽŵ WĞƌWĞƌŝĐŽŵ͗ĚĚϭϬϬƉĨƚŽ'EďĞƚǁĞĞŶƚŚĞƐŽƵƌĐĞĂŶĚϴϮϬϬ ĂĚĚϭϴϵϯ͕ϭϴϵϰ yϬϭ
53 26 ,t ϴͬϮϬͬϮϬϬϵ KDW> ƌĞƐĞƌǀĞĚĨŽƌĚƵďƵŐ͘ ƌĞƐĞƌǀĞĚZϭϱϯϳΕZϭϱϯϵ yϬϭ
54 16 ,t ϴͬϮϭͬϮϬϬϵ KDW> ĂƐĞŽŶƌĞƐƵůƚŽŶƌLJƐƚĂů͘ ĐŚĂŶŐĞzϲƚŽ^:ϭϬϬϬϬϲDϬ>;>сϭϮWͿ yϬϭ
55 29 ,t ϴͬϮϭͬϮϬϬϵ KDW> ĂƐĞŽŶsĞŶĚĞƌƐƵŐŐĞƐƚŝŽŶ ĐŚĂŶŐĞyϰƚŽ^ŝdŝŵĞϭϮD,ͺϭϱW&ͺ^/dϴϭϬϮϯϯϯϯϭϮd yϬϭ
56 36 ,t ϴͬϮϯͬϮϬϬϵ KDW> &ŽůůŽǁƌĞƐƵůƚ ĂĚĚZϭϱϰϬΕZϭϱϰϮ yϬϭ
57 24 ,t ϴͬϮϯͬϮϬϬϵ KDW> ĨŽůůŽǁĞWƐƉĞĐŝĨŝĐĂƚŝŽŶ͘ ĚĞůĞƚĞZϮϳϵĂŶĚZϭϬϮϳ yϬϭ
58 21 ,t ϴͬϮϰͬϮϬϬϵ KDW> ďĂƐĞŽŶƌĞƐƵůƚƚŽƐŽůǀĞ^dĞLJĞ͘ ĚĞůĞƚĞZϱϱϳ yϬϭ
59 13, 14 ,t ϴͬϮϱͬϮϬϬϵ KDW> ĂƐĞŽŶD/ƌĞƋƵĞƐƚƚŽƉŽƉƚŚĞĐĂƉƐĂƚZ/DDĨŽƌǀĞƌŝĨLJ͘ ƉŽƉϭϭϮϭΕϭϭϮϰ͕ϭϭϰϱΕϭϭϰϴ yϬϭ
ŽƵďůĞĚŝƐĐŚĂƌŐĞƉĂƚŚŽŶнϯ͘ϯsͺD͕нϯ͘ϯsͺZhEĂŶĚ
60 42 ,t ϴͬϮϱͬϮϬϬϵ KDW> ĚĞͲƉŽƉZϲϬϳ͕ZϲϭϮĂŶĚZϭϰϵϴ yϬϭ
нϭ͘ϱsͺWhͺsY
61 30 ,t ϴͬϮϲͬϮϬϬϵ /ŶƚĞů &ŽůůŽǁ/ŶƚĞůttϯϱ͚Ϭϵ ŚĂŶŐĞZϭϱϮϲƚŽϰϮϳϭϬƉ&ĂŶĚĐŚĂŶŐĞϰϳϱƚŽϯϯƉ& yϬϭ
62 40 ,t ϭϬͬϬϲͬϮϬϬϵ KDW> ŽĂƌĚ/ ŚĂŶŐĞZϵϴƚŽϯϯ< yϬϮ
63 29 ,t ϭϬͬϬϲͬϮϬϬϵ /d &ŽůůŽǁ/dƌĞƋƵĞƐƚƚŽĂĚĚĂĨŝůƚĞƌĐŝƌĐƵŝƚ ŚĂŶŐĞZϯϰϬ͕ZϯϰϮ͕ZϭϬϰϭ͕ZϭϬϰϮƚŽϮ<͕ĂĚĚϭϴϵϱΕϭϴϵϴ;ϭϬϬϬƉͿ͕ĚĞƉŽƉϭϬϲϲ͕ϭϬϲϳ yϬϮ
B 64 17 ,t ϭϬͬϬϲͬϮϬϬϵ KDW> ĂĚĚůĞǀĞůƐŚŝĨƚĨŽƌZdƐŝŐŶĂů ĂĚĚYϮϭϮ͕Λϭϱϰϯ͕Λϭϱϰϰ yϬϮ B

65 32 ,t ϭϬͬϬϲͬϮϬϬϵ KDW> &ŽůůŽǁ/ŶƚĞů'&>yĐůŽĐŬƚŽƉŽůŽŐLJ͘ ĐŚĂŶŐĞZϵϭϬƚŽϮϮŽŚŵ͘ yϬϮ

66 17 ,t ϭϬͬϬϲͬϮϬϬϵ KDW> &ŽůůŽǁ^ĐŚĞŵĂƚŝĐĐŚĞĐŬůůŝƐƚƌĞǀϮ͘Ϭ ĐŚĂŶŐĞZϮϲϴĨƌŽŵϭ<ŽŚŵƚŽϭϬ<ŽŚŵ͕ĚĞƉŽƉϭϬϱ͕ϭϬϲ yϬϮ
67 36 ,t ϭϬͬϬϲͬϮϬϬϵ KDW> ŽƌƌĞĐƚƚŚĞWhƉŽǁĞƌƌĂŝůĨŽƌh^ͺDZϮͺdη ĐŚĂŶŐĞZϰϰϳWhĨƌŽŵнϯ͘ϯsͺZhEƚŽнϯ͘ϯsͺ>tнϯ͘ϯsͺ>tͺW, yϬϮ
68 36 ,t ϭϬͬϬϲͬϮϬϬϵ KDW> ůĂLJŽƵƚƌĞƋƵĞƐƚƚŽƌĞĚƵĐĞƐƚƵď͘ ĂĚĚZϭϱϰϱ͕Zϭϱϰϲ͘ yϬϮ
69 16 ,t ϭϬͬϮϭͬϮϬϬϵ KDW> &ŽůůŽǁyΖƚĂů͘/dŶƵŵďĞƌ͗&ϯϰϲϲϯϱ ĐŚĂŶŐĞϭϭϲϴϭϭϴϳĨƌŽŵϭϴƉ&ƚŽϭϮƉ&͘ yϬϮ
70 31 ,t ϭϬͬϮϳͬϮϬϬϵ KDW> &ŽůůŽǁƌŽĂĚĐŽŵZ&/ĨŝŶĂůǀĂůƵĞ͘/dŶƵŵďĞƌ͗&ϯϰϭϬϳϮ ĐŚĂŶŐĞ>ϳϭͬ>ϳϮĨƌŽŵϭϱϬŶ,ƚŽϲϴŶ,͕ϭϬϳϬͬϭϬϳϭĨƌŽŵϳϱϬƉ&ƚŽϭϱϬϬƉ&͕ϭϴϴϳͬϭϴϴϴƚŽϭϱϬƉ& yϬϮ
71 16 ,t ϭϬͬϮϵͬϮϬϬϵ KDW> &ŽůůŽǁŶĞǁ^Dh^ƚŽƉŽůŽŐLJƚŽƐŽůǀĞDdDĞŵŽƌLJŝƐƐƵĞ͘ ĂĚĚZϭϱϰϳ͕Zϭϱϰϴ yϬϮ
72 41 ,t ϭϭͬϬϰͬϮϬϬϵ KDW> &ŽůůŽǁŶĞǁdWƐƉĞĐ ĐŚĂŶŐĞWhĨŽƌZϲϭϯĂŶĚZϲϭϰĨƌŽŵнϱsͺ>tƚŽнϯ͘ϯsͺ>t yϬϮ
73 24 ,t ϭϭͬϬϰͬϮϬϬϵ KDW> ^ŽůǀĞ&ϯϰϰϱϲϲD/ƚĞƐƚĨĂŝůĂƚϮϬϬD,njĨƌŽŵW,W/ŶŽŝƐĞ ĐŚĂŶŐĞZϭϲϲƚŽ>ϵϮ;ϮϮϬŽŚŵϬϲϬϯƐŝnjĞďĞĂĚͿ yϬϮ
hϯϰŚĂƐďĞĞŶǀĂůŝĚĂƚĞĚƚŽƐƵƉƉŽƌƚďŽƚŚƚŵĞůͬEƵŵŽŶLJdž
74 31 ,t ϭϭͬϬϰͬϮϬϬϵ ƌŽĂĚĐŽŵ ƌĞŵŽǀĞhϭϰ͘ yϬϮ
ĚĂƚĂĨůĂƐŚĚĞǀŝĐĞƐƚŽŵĞĞƚĞůůƚǁŽƐŽƵƌĐĞƐƌĞƋƵŝƌĞŵĞŶƚ͘
75 31 ,t ϭϭͬϬϱͬϮϬϬϵ KDW> tϮϱyϯϮs^^/'K> ĐŚĂŶŐĞhϭϯĨƌŽŵtϮϱyϯϮs^^/'ƚŽtϮϱYϯϮs^^/' yϬϮ
76 36 ,t ϭϭͬϬϱͬϮϬϬϵ KDW> ƐƵƉƉŽƌƚtŝDy>͘ ƉŽƉZϴϰϬ yϬϮ
77 8, 28 ,t ϭϭͬϬϱͬϮϬϬϵ KDW> ƌĞĚƵĐĞ^Dh^ƐƚƵď͘ ĂĚĚZϭϱϰϵΕZϭϱϱϮĂƐŶŽƉŽƉ͘ yϬϮ
78 40 ,t ϭϭͬϭϭͬϮϬϬϵ KDW> ƐŽůǀĞZdƚŝŵŵŝŶŐŝƐƐƵĞĂŶĚĨŽůůŽǁƚŚĞŶĞǁĞƐƚƌĞƐƵůƚ͘ ĐŚĂŶŐĞϲϳϱĨƌŽŵϯϯƉĨƚŽϯϵƉĨĂŶĚzϭͬϰĨƌŽŵϭd:^ϭϮϱ:ϰϰϮϬWƚŽYϭϯDϯϬϲϭϬϬϭϴ;ϭϬƉƉŵͿ yϬϮ
A 79 24 ,t ϭϭͬϭϭͬϮϬϬϵ KDW> ĨŽůůůŽĞ>ƚŝŵŝŶŐƌĞƐƵůƚ͘ ĐŚĂŶŐĞZϭϲϭĨƌŽŵϰϳϬŽŚŵƚŽϭϬϬŽŚŵ͘ yϬϮ A

80 24 ,t ϭϭͬϭϭͬϮϬϬϵ KDW> Dͺ&tWĂŶĚ^/Kͺydͺt<ηĂƌĞKƉŝŶ͘ ĂĚĚZϭϱϱϳϮ͘Ϯ<ŽŚŵWhƚŽнϯ͘ϯsͺ>tͺW,͕ZϭϱϱϴϭϬ<WhƚŽнϯ͘ϯsͺZhE yϬϮ

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.R (2/2)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
5 4
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Date: Wednesday, January 20, 2010
1
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V ersion Change L ist ( P. I. R . L ist )
R equest
Item Page# Title D ate Issue D escription Solution D escription R ev.
O w ner
D 81 Ϯϭ ^ ϭϭͬϭϳͬϮϬϬϵ KDW> ^ŽůǀĞdW^ŝƐƐƵĞ͘&ϯϰϵϰϳϭ ĂĚĚZϭϱϲϰ͕Zϭϱϲϱ;ϭϬϬŽŚŵͿƚŽƌĞƉůĂĐĞ>ϰϭĂŶĚ>ϰϮ yϬϮ D

82 ϭϵ ,t ϭϭͬϭϳͬϮϬϬϵ /ŶƚĞů &ŽůůŽǁĐŚĞĐŬůŝƐƚƌĞǀϮ͘ϬƚŽĂĚĚƚŚĞWhĨŽƌ'W/KϮϮ͕'W/Kϯϰ ĐŚĂŶŐĞƚŚĞZϭϱϮϬ͕ZϭϱϮϭĨƌŽŵWƚŽWhнϯ͘ϯsͺZhE yϬϮ

83 31 ,t ϭϭͬϭϳͬϮϬϬϵ KDW> ƵƐĞƚŚĞƐĂŵĞƐŽůƵƚŝŽŶŽŶ^ŵĂƌƚĐĂƌĚĐůŽĐŬ͘ ĐŚĂŶŐĞZϳϳϮĨƌŽŵϰϳŽŚŵƚŽϮϮŽŚŵ͘ yϬϮ
84 31 ,t ϭϭͬϭϴͬϮϬϬϵ KDW> ĐŚĞĐŬůŝƐƚƌĞǀϮ͘ϬƌĞƋƵŝƌŵĞŶƚ ĐŚĂŶŐĞZϮϮϰƚŽůĞƌĂŶĐĞĨƌŽŵϱйƚŽϭй͘ yϬϮ
85 40 ,t ϭϮͬϮϮͬϮϬϬϵ KDW> ŚĂŶŐĞďŽĂƌĚ/ĨŽƌyΖďƵŝůĚ ĐŚĂŶŐĞZϵϴĨƌŽŵϯϯŬŽŚŵƚŽϭŬŽŚŵ͘ ϬϬ
86 37 ,t ϭϮͬϮϮͬϮϬϬϵ KDW> &Žƌ&ĐŽŶĐĞƌŶ͕ĐŚĂŶŐĞ:/KϭĨŽŽƚƉƌŝŶƚ ĐŚĂŶŐĞ:/KϭĨŽŽƚƉƌŝŶƚĨƌŽŵdzKͺϭϳϯϰϮϰϮͲϲͺϲWͲdƚŽdzKͺϮϬϰϭϬϳϬͲϲͺϲW͘ ϬϬ
87 38 D/ ϭϮͬϮϮͬϮϬϬϵ KDW> ^ŽůǀĞ^ŝŵƉůŽďĂƚƚĞƌLJƐůŝĐĞD/ŝƐƐƵĞ ĚĚϭϵϬϬĂŶĚƌĞƐĞƌǀĞĚϭϴϵϵ ϬϬ
88 36 ,t ϭϮͬϮϮͬϮϬϬϵ KDW> ^ŽůǀĞtŝͲŵĂdž>ĂďŶŽƌŵĂůŽƉĞƌĂƚŝŽŶ ĞͲƉŽƉZϭϰϬϵ ϬϬ
89 31 ,t ϭϮͬϮϮͬϮϬϬϵ KDW> ^ͺ><ĚĂŵƉŝŶŐƌĞƐŝƐƚŽƌŬĞĞƉWdǀĂůƵĞ ĐŚĂŶŐĞZϳϳϮĨƌŽŵϮϮŽŚŵƚŽϰϳŽŚŵ͘ ϬϬ
90 12 ,t ϭϮͬϮϯͬϮϬϬϵ KDW> ^ƵƌŐĞǀŽůƚĂŐĞŽŶhD'&yĐŽƌĞ ĐŚĂŶŐĞZϯϱϴĨƌŽŵϰ͘ϳŬŽŚŵƚŽϰϳϬŽŚŵ͘ ϬϬ
ŚĂŶŐĞ>ϳϭ͕>ϳϮĨƌŽŵϲϴŶ,ƚŽϭϱϬŶ,͕ϭϬϳϬ͕ϭϬϳϭĨƌŽŵϭϱϬϬƉ&ƚŽϯϵϬƉ&͕ϭϴϴϳ͕ϭϴϴϴĨƌŽŵ
91 31 ,t ϭϮͬϮϯͬϮϬϬϵ ZKD LJZKDƌĞĐŽŵŵĂŶĚ ϬϬ
ϭϱϬƉ&ƚŽϯϵϬƉ&͘
92 32 ,t ϭϮͬϮϯͬϮϬϬϵ KDW> ŚĂŶŐĞdDƚŽdϭǀĞƌƐŝŽŶ ŚĂŶŐĞdDĨƌŽŵ^^yϰϰͲͲdƚŽ^^yϰϰͲͲdϭ ϬϬ
,t ĞͲƉŽƉZϳϴϬΕZϳϴϱ͕ZϮϮ͕ZϮϰ͕ZϭϮϰϭ͕Zϯ͕Zϲ͕Zϳ͕Zϭϵ͕Zϲϴ͕Zϭϭϱϯ͕Zϭϭϱϲ͕Zϭϭϱϳ͕Zϲϲ͕
93 8,15 ϭͬϱͬϮϬϭϬ KDW> ĐŽƐƚƐĂǀŝŶŐĨŽƌyW͕:d' ϬϬ
ϭϵ͕ϮϬ͕ZϭϮϯ͕ZϴϬϰ͕ZϴϬϱ͕ZϴϬϲ͕ZϴϬϳ͕ZϭϮϴϭ͕ZϭϮϴϮ͕Zϭϯϭϱ
94 33, 34 ,t ϭͬϱͬϮϬϭϬ Z/K, ĂƌĚƵƐĐŚĂŶŐĞĨƌŽŵ^ϮƚŽ^ϯ ŚĂŶŐĞhϵϰĨƌŽŵ^ϬϬϬϬϯϮϭ>ƚŽ^ϬϬϬϬϯϮϮ> ϬϬ
C C
Z&ƚĞĂŵƌĞƋƵĞƐƚƚŽĂĚĚϬ͘ϭƵ&ĐĂƉĂĐŝƚŽƌŽŶнϱsͺZhEŽĨ:d^ϭ
95 39 ,t ϭͬϳͬϮϬϭϬ KDW> ĚĚϭϭϰŽŶнϱsͺZhEŽĨ:d^ϭĨŽƌd'ĐŽŶĨŝŐƵƌĂƚŝŽŶ ϬϬ
ƚŽƌĞĚƵĐĞϭϴϭϭ͘ϱD,njŶŽŝƐĞ
96 28,37 ,t ϭͬϭϱͬϮϬϭϬ KDW> ŚĂŶŐĞ^dƌĞƉĞĂƚĞƌŵĂƚĞƌŝĂůƚŽƉŽǁĞƌƐĂǀŝŶŐƉĂƌƚ ŚĂŶŐĞhϵϱĂŶĚhϵϲƉĂƌƚŶƵŵďĞƌƚŽ^ϬϬϬϬϯWϭϬ> ϬϬ
Pericom DP SW DP8200 has new silicon
97 26 ,t ϭͬϭϵͬϮϬϭϬ WĞƌŝĐŽŵ W version in stead of Y version
Change U9 to SA00003CD2L ϬϬ
98 11 ĐŽƵƐƚŝĐ ϭͬϭϵͬϮϬϭϬ KDW> dŽƌĞĚƵĐĞĂĐŽƵƐƚŝĐŶŽŝƐĞ De-pop C53 and C54 ϬϬ

B B

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.R (3/3)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
5 4
WWW.AliSaler.Com 3 2
Date: Wednesday, January 20, 2010
1
Sheet 55 of 57
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V ersion Change L ist ( P. I. R . L ist )
R equest
Item Page# Title D ate Issue D escription Solution D escription R ev.
O w ner
1
D 50 Selector 7/20 TI CSS GC logic wrong issue Add PR282 180_ohm to GND X01 D

2 Compal ADC
46 1.5V_MEM 7/20 Guangyong Add droop resistor for TI solution Add PR77 X01

Compal ADC change PL5 from SH00000H90L to SH00000FN0L

3 45 +3.3V/+5V 8/17 Guangyong Change 3V/5V choke for cost down change PL6 from SH00000HB0L to SH00000HR0L X01

Add 1M_ohm pull down to fix ACAV_IN_NB

4 50 Selector 8/17 Compal oscillation when battery mode S5 Add PR283 X01

new version CD3301 (PG2.1) don't need PD22 depop PD22 add PR282, pop PR430
5 50 Selector 8/17 TI and PR282 X01

6 50 Selector 8/17 TI DOCK_AC_OFF_EC floating issue add PR285 X01

+VCORE change thermistor package from 0603 to 0402 Change PH3,PH4,PH5 and PH802 from SL200000B0L to SL200000W0L X01
7 49,52 +VGFX_CORE 8/17 Compal for cost down
C
Change PC314 from SE00000868L(22u/0805) to SE00000O00L(100u/1206) C

Change PR409 from SD03480618L (8.06k) to SD03460418L (6.04k)

Change PR410 from SD03440218L(4.02k) to SD03430118L(3.01k)
Change PR408 from SD014402A8L(40.2 Ohm) to SD000008H8L(51 Ohm)
8 47 1.8V_RUN 8/18 MAXIM Output ripple voltage unstable issue Change PC315 from SE000003W8L(820pF) to SE076333K8L (3300pF)
X01
Change PR411from SD00000268L(6.98K) to SD03445318L(4.53K)
Change PC310 from SE074102K8L(1000P) to SE074472K8L(4700pF)
Change PC309 from SE071330J8L (33pF) to SE071560J8L (56pF)
Change PC311 from SE042104K8L(.1u/0603/25V) to SE076104K8L(.1u/0402/16V)
Add PR413 SD02800008L (0 Ohm)
9 52 Vcc_gfx_core 8/19 Compal Low side Vds ring over SPEC Change PQ802 and PQ803 from SB00000KP0L(BSC882N03MS)
to SB00000KM0L(FDMS7660) X01

Fine tune Imon time constant meet Change PC801 from SE068103K8L(0.01uF)
10 52 Vcc_gfx_core 8/20 Compal Intel SPEC 300uS~500uS to SE076153K8L(0.015uF) X01
B B

11 52 Vcc_gfx_core 8/20 Maxim Fine tune transient RC time constant Add PC816 SE076333K8L (0.033uF) X01

Change PR102, PR103 and PR104 from SD013220B8L(2.2) to SD00000V98L (1.1)

Change PR310, PR311 and PR312 from SD03430118L(3.01k) to SD03424918L(2.49k)
+VCORE
12 49 MAX17030 8/20 Maxim Vcore FDIM issue Change PR307, PR308 and PR309 from SD03422118L(2.21k) to SD03417418L(1.74k) X01
Change PR137 from SD03449910L(4.99k) to SD03447518L(4.75k)
Add PC271,PC272 and PC273 SE075223K8L(0.022uF)
Change PR188 and PR201 from SD03451018L(5.1k) to SD00000U28L(4.3k)
Change PR199 and PR203 from SD03416228L(16.2k) to SD03413728L(13.7k)
Change PR198 from SD03468008L(680 Ohm) to SD03418008L(180 Ohm)
Change PR202 from SD03468008L(680 Ohm) to SD03410008L(100 Ohm)
Change PC108 and PC116 from SE074331K8L(330p) to SE074471K8L(470p)
+1.05VM/ Change PR200 from SD00000DM0L(200k) to SD03451028L(51k)
13 48 +1.05VTT 8/20 ON Fine tune DC accurcay
Change PC115 from SE071300J0L(SE071300J0L) to SE071220J8L(22P) X01
A
Change PC106 from SE071300J0L(30P) to SE071330J8L(33P) A

Change PR204 from SD03447518L(4.75K) to SD03452318L(5.23K)

Change PR205 from SD03444228L(44.2K) to SD03424028L(24K)
Change PR207 from SD00000LZ0L(3.83K) to SD00000J20L(4.32K)
Change PR208 from SD03482518L(8.25k) to SD03464918L(6.49k)

Title
PIR

Size Document Number Rev

C LA-5471P 1.0

5 4
WWW.AliSaler.Com
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Date: Wednesday, January 20, 2010
1
Sheet 56 of 57
 5 4 3 2 1

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V ersion Change L ist ( P. I. R . L ist )
R equest
Item Page# Title D ate Issue D escription Solution D escription R ev.
O w ner
1.8V transient 0.1A ~ 1.6A Change PU301 from SA00003B10L(MAX15050) to
D 14 47 1.8V_RUN 8/25 DELL output voltage over spec SA00003CG0L (ISL8014) and support circuit X01 D

15 49 Vcore 8/25 MAXIM Improve DC accuracy Change exposed pad to PGND from AGND X01

16 49 Vcore 8/25 MAXIM Vender recommend PSI# pull down 10k Change PR334 from SD03410018L (1k) to SD02810028L(10k) X01

Compal ADC Improve charger choke saturation current Change PL14 from SH04856AM8L (5.6u) to SH00000I60L (5.6u) X01
17 51 Charger 8/25 Guangyong at 100 degree C

3.3V_ALW2 black driver issue

18 44 DCIN 8/25 Compal with RTC battery only Change PD1 from SC100000Q0L(BAT54CW) to SCSB715F08L (RB715F) X01

19 49 Vcore 8/27 Compal Reserve resistor pad for debug Add PR122 and PR123 X01

Fine tune Imon time constant meet

20 49 Vcore 9/01 MAXIM Intel SPEC 300uS~500uS Change PC270 from SE075223K8L (0.022U) to SE076333K8L (.033U) X01

C
21 49 Vcore 9/01 MAXIM Make sure DPRSLPVE low level under 0.33V Change PR109 from SD03449908L (499 Ohm) to SD02800008L (0 Ohm) X01 C

High inrush current on DC_IN

22 44 DC_IN 10/13 TI when AC adapter plug in Change PR20 from SD02800008L(0 Ohm) to SD02810028L(10k) X02

3 phase overlap issue with

23 49 Vcore 10/20 MAXIM 2nd source MOSFET Add PC198, PC199, PC255, PC256, PC259 and PC260 SE074122K8L (1200pF) X02

Fine tune H_VTTPWRGD voltage level meet Change PR94 from SD03410028L (10k) to SD03427418L (2.74K)
24 48 +1.05VTT 10/28 INTEL Vih(min) = 0.75 * Vtt Change PR93 from SD03428728L (28.7k) to SD03493118L (9.31K) X02

+VCORE change thermistor package from 0603 to 0402 Change PH1 and PH801 from SL20000068L (100K 0603)
25 49,52 +VGFX_CORE 11/03 Compal for cost down to SL20000160L (100K 0402) X02

+1.05VTT/
26 48 +1.05VM 11/16 ON Bost diode over stress Change PD19 and PD27 from SC1B751V08L(RB751V) to SCS00003M0L(BAT54HT1G) X02

Change PR828 from SD03424918L (2.49k 0402) to SD000004O8L (2.2k 0402)

Fine tune transient and load line for
27 52 +VGFX_CORE 11/24 MAXIM 2nd and 3rd source choke. Change PR827 from SD03430118L (3.01k 0402) to SD03424918L (2.49k 0402) X02
Change PR816 from SD03411028L (11k 0402) to SD02810228L (10.2k 0402)
B B

Two 4.7k PD on GFX_VR_ON at both EE side

28 52 +VGFX_CORE 11/24 MAXIM and PWR side. Depop PWR side 4.7k PD. Depop PR809 SD02847018L (4.7K 0402) X02

Reduce Pin33,34 and 35 of the CD3301 Change PC351 from SE00000130L (1u/0805) to SE043104M8L (0.1u/0805)
29 51 Charger 01/12 Compal surge current A00
Change PR404 from SD02800008L (0 Ohm) to SD028100B8L (1 Ohm)

A A

Title
PIR

Size Document Number Rev

C LA-5471P 1.0

5 4
WWW.AliSaler.Com
3 2
Date: Wednesday, January 20, 2010
1
Sheet 57 of 57