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DACC Assignment 1

This document contains an assignment for an Electronics and Communication Department M.Tech course on VLSI Design and Embedded Systems. It includes 11 questions related to analog CMOS circuits design. The questions cover topics such as MOS device structure and parameters, device characteristics, parasitic capacitances, device modeling, current mirrors, current amplifiers, current sinks, bandgap voltage references, and pn junction voltage references. Students are asked to answer all questions which are equally weighted and will be returned with feedback on February 13, 2021.

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Sanjay Gowda
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50 views2 pages

DACC Assignment 1

This document contains an assignment for an Electronics and Communication Department M.Tech course on VLSI Design and Embedded Systems. It includes 11 questions related to analog CMOS circuits design. The questions cover topics such as MOS device structure and parameters, device characteristics, parasitic capacitances, device modeling, current mirrors, current amplifiers, current sinks, bandgap voltage references, and pn junction voltage references. Students are asked to answer all questions which are equally weighted and will be returned with feedback on February 13, 2021.

Uploaded by

Sanjay Gowda
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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DAYANANDA SAGAR COLLEGE OF ENGINEERING,

ShavigeMalleshwara Hills, Kumaraswamy Layout, Bengaluru-560078

Electronics and Communication Department


M.Tech VLSI Design and Embedded Systems
Assignment – I
Subject: Design of Analog CMOS Circuits Sub Code:20EVS12
Assignment display date: 09.02.2021 Assignment Submission date: 13.02.2021
Faculty name: H.V.Manjunath Return of Assignment: 13.02.2021
All Questions are to be answered compulsorily and carry equal marks

Q.No Question Description Marks


1 Illustration of MOS device structure and show that the device dimensions are
very important in the performance of MOS device. What were the typical values
of Leff and tox achieved?
2 Using expressions of ID, RON and gm and showing channel length modulation in
device structure, from designer’s point of view show why W/L and Cox for a
given gate voltage play a vital role in device characteristics.
3 Explain the differences in MOS device characteristics in saturation, edge of
saturation and deep triode region. Use VDS and ID curves for different VGS values.
4 What are various parasitic capacitances due to and how they contributing to
different behavior of MOS device at high frequencies?
5 Interpret the complete MOS device model from operational point of view of low
frequency and high frequency . (Hint: High frequency model has capacitances).
6 For W/L=60/5 and ID= 0.6mA, calculate the transconductance and output
resistance of both PMOS and NMOS devices. Also find the intrinsic gain. Given
µnCox= 60µA/V , Assume any data required suitably.
7 Analyze a basic current mirror circuit.
8 For a two MOS transistor current amplifier, with L1=L2, for a ratio current error
of +/-0.025, for W2=20+/-0.01µm, find tolerance in W1, if W1=5µm. For the
same amplifier for a ratio error of +/-0.05, with same W2, find W1 and comment
on the result.
9 Develop the circuit of a standard cascade current sink circuit and interpret its
characteristic.
10 Examine the band gap voltage reference circuit.
11 Analyze a CS amplifier circuit with diode connected load.
12 Explain the working of pn junction voltage reference.
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