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Shivajees MCQ On Microprocessor (Instruction Set) - GATE

The document contains 33 multiple choice questions about microprocessor instruction sets. It tests knowledge of assembly language fundamentals like comment syntax, instruction formats, addressing modes, and the functions of instructions for the 8085 and 8086 microprocessors. The questions cover topics such as instruction encoding, assembly directives, flags, registers, and conditional branching.

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0% found this document useful (0 votes)
825 views13 pages

Shivajees MCQ On Microprocessor (Instruction Set) - GATE

The document contains 33 multiple choice questions about microprocessor instruction sets. It tests knowledge of assembly language fundamentals like comment syntax, instruction formats, addressing modes, and the functions of instructions for the 8085 and 8086 microprocessors. The questions cover topics such as instruction encoding, assembly directives, flags, registers, and conditional branching.

Uploaded by

m_tariq_hn
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Shivajees MCQ on Microprocessor(Instruction

set)
1. In Assembly language program, comment lines will start
with_______
a) "//" b) ";" c) "#" d) "/* */"

correct answer;b. The first character of a comment should be a semicolon.


example NEXT : MVI 24H ; move 24h to the accumulator

2. In assembly language program, one byte instruction will


have ____ number of operands.
a) one b) two c) zero
correct answer: c. one byte instructions such as xchg,pchl have no
operands. Please go through the "opcode vs mnemonics table" given at the
bottom to understand this point.

3. Microprocessor understands _____ language


a) High level language b) basic language c) machine
language
correct answer : c

4. _____ language uses mnemonics


a) c b) c++ c) assembly d) a and c

correct answer: c

5. ______ is needed to convert assembly language to


machine language
a) compiler b) assembler c) interpreter

correct answer: b

6. _____ is Low level language


a) machine language b) assembly language c) c d) a
and b

correct answer; d. machine language and assembly language are machine


dependent language. hence they are low level languages.

7. ______ is needed to convert a high level language to


machine language
a) compiler c) assembler d) browser e) editor
correct answer: a

8) Which are the fields in assembly language instructions?


a)label, mnemonics, b) operand c)comment d) All are
correct

Correct answer: d. instruction has four fields, label ,mnemonics, operand,


comment

9) A Label is separated by _____ from the mnemonic


a) semicolon b) colon c) fullstop d) space

correct answer : b. in the following example, next is the label.


example NEXT : MVI 24H ; move 24h to the accumulator

10. Assembler directives are not translated to machine


language by the assembler
a) true b) false

correct answer : a : example for assembly directive " BEGIN EQU 0FF0H" ;
the value 0ff0 can be referred by the name "BEGIN"

11. In 8085 instruction, _______ is used for decision


making
a) comment b) Flags

correct answer: b:flags hint: 8085 has five flags namely:Zero flag (Z),Carry
flag (CY),Sign flag (S),Parity flag (P),Auxiliary Carry flag (AC). JNC 0FF0H
means Jump to location 0FF0 if Carry=0

12. In 8085, ____Register contains the memory address


from where the next instruction is to be fetched
a) SP b)Accumulator c) PC d) Flag

correct answer: c. Program counter is a 16 bit register. it stores the address


of next instruction to be fetched. Once an instruction is fetched PC is
incremented by one.

12a) Stack pointer stores the address of Top of the Stack


a) true b) false
correct answer: a. SP is a 16 bit register and stores the address of top of
stack

13. 8085 Instruction set has 76 opcodes(eg.MOV,MVI) and


____ number of instructions
a) 200 b) 76 c) 246 d) 300
correct answer: 246. The MOV opcode itself contains 49 instructions. see the
table given below.

14. Which one is NOT a classification of 8085 instruction


set into groups?
a) Data transfer Instructions b) Arithmetic Instructions c)
Branch Instructions d) Machine Control Instructions e) Logic
& Bit manipulation f) Loop instructions.

correct answer; f.

15. which one is NOT a Logical and Bit Manipulation


instruction?
a) ANA B b) ORA B c) XRA B d) CMP B e) CMA f)RAL g)
DCR B h) ORI 24h

Correct answer: g:DCR B a)ANA B means B is ANDed with A, b) ORA B


means B is ORed with A c) XRA B means B is XORed with A, d) CMP B
means B is compared with A, CMA means complement A f)RAL means A is
rotated left by one bit. ANI 24H,ORI 24H, XRI 24h, CMI 24H

16. CMP B compares A and B and if A is less than B,


which flag will be set?
a) sign flag b) aux carry flag c) zero flag d) carry flag

correct answer; d:carry flag. If A is Less then Carry flag is set. If A=B then
zero flag will be set. if A is greater than B, then carry and zero flags will be
RESET.

17. Which one is NOT a branching operation?


a) JUMP b) CALL c) RETURN d) MOV

correct answer; d.

18. MVI 23H is a _________addressing mode


a) register b) register indirect c) Immediate d) Direct
e)Implied f) indirect

correct answer: c;immediate addressing mode. MVI 23h means Move to A,


the data is 23h

19. MOV B, A is a ________ addressing mode.


a) register b) register indirect c) Immediate d) Direct
e)Implied f) indirect

correct answer: a;register addressing mode, MOV B,A means Move to B


from A

20. LDA 1234H is a __________ addressing Mode.


a) register b) register indirect c) Immediate d) Direct
e)Implied f) indirect

correct answer: d:Direct addressing mode as the memory address 1234H is


directly given in the instruction

21. MOV A,M is a ___________ addressing mode of data


transfer.
a) register b) register indirect c) Immediate d) Direct
e)Implied f) indirect

correct answer;f: indirect addressing mode. MOV A,M means move to A,


from memory address which is mentioned in the HL Register pair.

22. RAL, CMP are of ___________ addressing mode.


a) register b) register indirect c) Immediate d) Direct
e)Implied f) indirect

correct answer; e:implied addressing mode. The operand is not given. it is


implied.
RAL means rotate the contents of A by Left by 1 bit. CMP means
complement the content of A.

23. Which one is NOT a control instruction?


a) NOP b) HLT c)DI d)EI e)SIM f) RIM g) CMP

correct answer; g;CMP.


NOP means No operation. The instruction is fetched and decoded
HLT;CpU stops further work. An interrupt or reset is required to comeout.
DI: All the interrupts except trap is disabled.
Ei : All the interrupts except trap is enabled.
RIM: Used to read the status of interrupts and Serial input data line.
SIM. Used to set the status of interrupts and Serial out data line.

24. What is the function of STC instruction?


a) Store to C Register, the value of Accumulator
b) Set Carry to 1
c) Clear the Stack pointer.

Correct answer; b> STC will set carry to 1. CMC will complement the
carry.

25. DAD is for Double ADD. DAD BC instruction in 8085 is


used for ?
a) Content of BC is added HL Result is in HL.
b) Content of BC is added to Accumulator
c) Content of BC is added to DE

correct answser: a

26. DAA instruction is used for ____.


a) Double Add Accumulator. b)Decimal Adjust
Accumulator. c)Decrement Accumulator

Correct answer: b;Decimal Adjust Accumulator


The DAA instruction (Decimal Adjust Accumulator) allows conversion of the
8-bit accumulator value to Binary Coded Decimal (BCD). If the low-order 4
bits of the accumulator are greater than 9, or the aux carry flag is set, 6 is
added to the low-order 4 bits of accumulator, then if the high-order 4 bits of
the accumulator are greater than 9, or the carry flag is set, 6 is added to the
high-order 4 bits of the accumulator.

27. What is the content of PC Register at the end of the


following program?
LXI H 8A79h
MOV A L
ADD H
DAA
MOV H A
PCHL
a) 2304 b) 6979 c) 7100 d) 8255

Correct answer:b:6979 DAA means Decimal Adjust Accumulator.


H L = 8A79 ##A=79 ###A=A+H###A=03 &CY=1,AC=1
As AC=1, DAA will add 0110 to A's higher 4bits if Cy is 1.
DAA will add 0110 to A's lower 4 bits if Ay=1, hence A=69
H=69,L=79 ,PC=6979

28. in 8086, SP and BP registers are offset address relative


to _____segment.

a) stack b) code segment c) data segment

correct answer: a; stack.


hint: SP are BP are to access data in stack segment. These are used as offset for SS.
CS - points at the segment containing the current program.
DS - generally points at segment where variables are defined.
ES - extra segment register, it's up to a coder to define its usage.
SS - points at the segment containing the stack.

29. in 8086 SI (source index register) is used in string index.


it is offset address relative to ______
a)CS b) SS c)DS d) ES

correct answer; c;DS

30. ___ is primarily used to access parameters passed via


the stack
a)Sp b)BP c)SS

correct answer; b:BP

31. in 8086 DI (destination index register) is used in string


index. it is offset address relative to ______
a)CS b) SS c)DS d) ES

correct answer; d;ES

32. "First EQU 1" is an assembly Directive. Whereever


"First" is present in the program, it will be replaced by
______
a) First b) 1 c) EQU

correct answer;b:
"END" directive is placed at the end of the program. The assembler will not process the statements after END.
DB 50h reserves 50 BYTES in memory.
DW50h reserves 50 WORDS in memory. 1 word=2 bytes
DQ reserves 4 WORDS, D

33. Which one is an Unconditional Jump Instruction?


a) JMP b)JNC c)JM
correct answer:a. see the below list of branching instructions
CALL 1234H(pc is pushed to
JMP 1234H (pc is loaded with 1234. RET (this is unconditional return.
stack and bring 1234 to pc.
this is unconditional jump) the stack comes to pc)
this is unconditional call
JC- Jump on Carry CY = 1 RC Return on Carry CY = 1
CC- Call on Carry CY = 1
JNC- Jump on no Carry CY = 0 RNC Return on no Carry CY = 0
CNC- Call on no Carry CY = 0
JP- Jump on positive S = 0 RP Return on positive S = 0
CP- Call on positive S = 0
JM- Jump on minus S = 1 RM Return on minus S = 1
CM- Call on minus S = 1
JZ- Jump on zero Z = 1 RZ Return on zero Z = 1
CZ- Call on zero Z = 1
JNZ- Jump on no zero Z = 0 RNZ Return on no zero Z = 0
CNZ- Call on no zero Z = 0
JPE- Jump on parity even P = 1 RPE Return on parity even P = 1
CPE- Call on parity even P = 1
JPO- Jump on parity odd P = 0 RPO Return on parity odd P = 0
CPO- Call on parity odd P = 0.
JXX addr, CXX addr, RXX
How CALL 1234H Instructions work?1.PC(high) =>SP-1 2. PC(low)=>
SP-2 3. SP=SP-2 4. 1234=>PC

34. What is the output at 1236,1237 for the following program?


MVI C,00 ;put 00 in C-register
MVI D,80H ; put 80h in D
MVI E,80H ; put 80H in E
MOV A,D A=80
MOV B,A ; B=80
MOV A,E ; A=80
ADD B ; A=80H+80H=100H,so A=00, Carry=1
JNC LOOP ; jump to LOOP if carry=0
INR C ; else increment c, c=1
LOOP: STA 1236 ; 1236 ==> 00
MOV A,C ; A=01
STA 1237 ; 1237=> 01
HLT

a) 00 and 01 b) 36 and 37 c) 0d and oe


correct answer: a:

35, After "XRA A" instruction is executed, what will be the


status of Zero Flag?
a)1 b) 0 c) No change
correct answer; a : Suppose the content of A register is 0000 0010, When it
is XORed with the same value ie .0000 0010, the result is 0000 0000 which
will be stored in A-Register. hence zero flag is set.

36. 8085 has _____ number of basic instructions and


_____ number of opcodes.
a) 0,0 b) 1,0 c) 80, 246 d) 246,80
correct answer; c

37. How many status flags are there in 8085 processor?


a) 6 b) 5 c) 10 d)8

correct answer: 5: c,ac,s,p,z

38. Address line for RST 3 in 8085 is ____________


a) 0020H b) 00028H c) 0018H d) 0038H

correct answer; c: 3 multiplied by 8 equal to 24(in decimal) which is equal to


18(in hexadecimal)

39. PSW(Program Status Word) refers to the content of


______
a) Flag Register b)Accumulator c) Accumulator and Flag
Register d) none

correct answer; c. When cpu wants to run an Interrupt service routine, it has
to store the present status of the currently running program. Hence it stores
the Program counter and Flags and Accumulator details in the stack.

40. How many times NOP instruction will be executed in the


following program;
MVI A, 10H ; a=10h
MVI B, 10H ; b=10h
BACK: NOP ;
ADD B ;a=20h
RLC ; rotate left the accuumlator with carry
JNC BACK ; jump if no carry ie if carry=0
HLT
a) 1 b) 2 c) 3 d)10
correct answer; c; intial c-a:0 0010 0000, 1st nop, after first rlc,ca=0 0100
0000
2nd nop, after 2nd rlc ca= 0 1000 0000, 3rd nop,after 3rd rlc ca=1 0000
0000; as the carry=0, program goes to halt. hence the answer is 3 nop
What is RLC?- Each binary bit of the accumulator is rotated left by one
position. eg. Bit D7 is placed in the position of D0 as well as in the Carry flag.
CY is modified according to bit D7.
`

40. What is the content of A-Register at the end of this


program?
XRA A ; set z=0, a=00
MVI B, F0H ; b=f0
SUB B ; 00 - f0 =10h
a) 01H b) 0FH c)F0H d)10H
correct answer; d

41. What is the content of A at the end of this program?


STC ; set cy flag=1
MVI A, 35H ; move 35 to a;
ACI 26H ; add 26 to a, then add cy
a) 2Dh b) 5Ch c) 23h d) 5B h
correct answer is b

42. What is the content of A at the end of this program?

MVI A, 06H ; a=0000 0110


RLC ; a=0000 1100=0C (see fig1 which shows how RLC
works)

MOV B, A ; b=0C
RLC ; a=0001 1000 =18
RLC ; a=0011 0000 =30
ADD B ;a=30 + 0c = 3C
a) 3Ch b)18h c)0C h d)00 h

correct answer; a

43. To save accumulator value and the flag register on to


the stack, which of the following instructions is used?
a) PUSH PSW b) PUSH A c) PUSH SP d) POP
PSW

correct answer; a; The contents of the A register is pushed onto the stack
first, followed by the Flag byte

44. What is the status of z flag, cy flag, sign flag at the end
of this program?
MVI A, 02H ; A=02H
MVI B, 03H ; B=03H
ADD B ; A=05H
XRA A ; A=0 Z=0
a) 1,0,0 b)0,1,0 c)1,0,0 d)1,0,1
correct answer: a, the instruction xra means xor with a . when a is xor-ed with
the same a , the result will become zero. As the result of accumulator
becomes zero, the zero flag is set.

45. What is the content of Register A at the end?


XRA A ; a=0
MVI B, 4DH ; b= 4d
SUI 4FH : a =b1
ANA B
HLT
a) 00h b) 01h c) 4Dh
correct answer; A=01h

46. Which is true about Interpreter software?


a)It translates one instruction at a time
b) It translates the whole program into machine language
correct answer: a
47. In 8085, HLT opcode means
a) Remain idle for 10 seconds.\
b) Remain idle for 0.1 seconds
c) End of Program

48. In 8085, SIM stands for?


a) Mobile phone connectivity
b) System Interrupt Mask
c) Set Interrupt Mask

49. What does microprocessor speed depends on?


A.Clock
B.Data bus width
C.Address bus width
D.All of these (correct answer)

E.None of these
Explanation:Factors on which the Processor speed depends
1.Processor clock speed
2.Processor pipelining
3.Width of the data and address bus, i.e. Max Data that can be fetched at
one stretch.
4.Support for floating point operations for faster floating point operations.

=========================================================

OPCODE VS MNEMONICS TABLE


A=addressing mode(da=direct addressing, imm=immediate addressing,
imp=implied addressing, ra=register addressing.
B=No.of Machine Cycles C=No.of T states
D=Total number of such instructions, F=Fetch, R=Read from mem, W=Write
to mem
bytes instruction description A B C D
4T 49
41 MOV B, C move to b, from RegisterC ra F
, .
F,
46 MOV B, M move to b, from memory=HL. ria 7T .7
R
MVI B, im F,
06,24 move to b, the data is nothing but 24h 7T 7
24H m R
MVI M, im
36,24 move to memory=HL, the data= 24h .
24H m
3A,34,1
LDA 1234H move to A, from memory =1234h da .
2
0A LDAX B move to A, from memory= BC ria
21,34,1 LXI move to HL(16bit), the address
ia .
2 H,1234H =1234h
LHLD move to HL(16bit) from
LHLD da .
1234H memory=1235,1234
32,34,1
STA 1234H MOVE FROM A, to memory=1234 da .
2
02 STAX B MOVE FROM A, to memory=BC r .
22,50,2 SHLD MOVE FROM L to memory=2550
da .. .. .
5 2550H MOVE FROM H to memory=2551
H to D & D to H, L to E and E to
EB XCHG imp . .
L
move to StackPointer, the value is in
F9 SPHL imp . .
HL
move to L, from memory=SP
E3 XTHL imp . .
move to H, from memory=SP+1
E9 PCHL move to PC(16bit) from HL(16bit) imp . .
SP is decremented and B is pushed
to that
C5 PUSH B ra . .
location. SP is decremented again
and C is pushed to that place
move to output port 22h from
D3 22 OUT 22H da . .
accumulator
move from input port no.23h to
DB,23 IN 23H da . .
accumulator
PUSH
F5 push acc and flags to stack ria . .
PSW
Register Indirect Addressing Mode?If a register pair is given. and in that register pair memory address is given,
then it is Register Indirect address mode.In this mode, the address of operand is specified by a register pair.eg
MOV A,M
Register Addressing Mode?In this mode, the operand is in general purpose register. eg MOV B,C
Immediate Addressing Mode? If the instruction opcode ended with "i", it is immediate addressing. eg MVI A, 24H
Implicit Addressing Mode? all one byte instructions are of this type.

47. What is the content of A-Register at the end of the


following program?
a) 01 b) 07 c) 00
correct answer: b
8000 3A LDA 8500
8001 00 .
8002 85 .
8003 47 MOV B,A
8004 3A LDA 8501
8005 01 .
8006 85
8007 88 ADD B
8008 32 STA 8502
8009 02
800A 85 .
800B 76 HLT
8500 04
8501 03
8502 07 .
48. LDA 8501 is of ______ Address Mode
49. MOV A, B is of _______ address mode,
50. MOV M, A is of ________ address mode
51. STC is of _________ address mode
52. MVI A, 28H is of ______ address mode.

correct answer for 48.Direct, 49)Register 50) Register Indirect 51.Implicit 52.
immediate.

53. If the DMA controller takes control of the bus and


transfer entire block of data, it is ____ transfer mode.
54. If DMA controller transfer only one byte of data and
releases the control of buses to the processor by dropping
its signal on HOLD pin, it is ________ transfer mode
55. If DMA controller recognizes that the processor does
not need the bus for several cycles, then dmac will grab the
bus and sends a byte without the knowledge of processor,
it is _____ transfer mode.
correct answer: 53: burst 54: cycle stealing, 55: hidden DMA.

In this Chapter (Instruction set) ; syllabus covered: brief idea of machine


code and assembly languages,machine codes and mnemonic
codes,Instruction format, addressing mode, concept of instruction set,
programming exercises.(BSNL JE competitive exam syllabus)
.

Posted 8th September 2016 by Unknown


Labels: Instruction set

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