RESUME
Aravind kumar Jaini
Email Id:aravindkumar.jaini@gmail.com
Phone No. +918919770149
Professional Synopsis (4 Years):
➢ Highly astute, energetic and team spirited design engineer having 4 years of insightful
experience in Electronics Hardware design engineering, Place and Route.
➢ 2 years of experience in Design, Testing, Reliability and certification of the electronic
product in railway domain.
➢ Experience in designing and testing the product according to the system requirement
specifications.
➢ Actively involved in all the activities designed for the development of the product.
➢ 2 Years of experience as Physical Design Engineer
➢ Skilled in Physical Design Procedure: Floor Planning, Placement, Clock Tree Synthesis,
Routing, Crosstalk analysis, IR drop analysis.
Technical Skills :
Scripts Known : C, VBA, Basics of TCL, Basics of Python, Basics of Verilog.
Tools : LTSPICE, Tina Spice, ORCAD, Allegro, Excel Macros,
Synopsis ICC2, Prime Time, Caliber, Anaconda- (Juypiter Notebook,
Spyder), EDA Platform.
Technologies : I2C, SPI, USB, RS-232, RS485, UART.
Academic Qualifications:
Degree Specialization University/ Board Year of Passing Percentage(%)
High School Bhashyam Public 2010 85.8
School
Intermediate Mathematics, Physics, Board Of 2012 86.8
Chemistry Intermediate
Examinations
Engineering Electronics And JNTH/BVRIT 2016 73.5
Communication
RESUME
Details of Projects:
Project: Placement and Routing (PNR)
Client Global Unichip Corp Ltd.
Role Physical design engineer
Environment Synopsys-ICC2, Primetime, caliber
Project Scope To create, optimize, route and converting NETLIST to GDS II
Technology Specifications:
Technology node : GF 28nm
Metal layers :9
Macro Count : 42
Instance Count : 1.4M
Clock frequency : 0.9GHz
Roles and Responsibilities:
➢ Analyzing the Inputs and sourcing the inputs to create the Floorplan with Macros and its guidelines.
➢ Implementation of power plan by referring the power plan team using power plan DEF.
➢ Importing the Standard cells, creating Scenarios and analyzing the max TRAN, CAP, Setup, WNS,
TNS, congestion, Utilization etc in placement stage including optimization and group pathing
➢ Building the Clock tree with defined Skew and insertion delay and analyzing the timing, congestion,
Utilization and optimization of the design.
➢ Creating the Routing and checking all the reports and analyzing the crosstalk issues.
➢ Involving in the ECO stages and optimizing the design w.r.t to the TOP level design.
➢ Minimizing the issues and generating the GDS file
Organization: Cyient Ltd, Hyderabad
Project: Placement and Routing (PNR)
Client Global Unichip Corp Ltd.
Role Physical design engineer
Environment Synopsys-ICC2, Primetime, caliber
Project Scope To create, optimize, route and converting NETLIST to GDS II
Technology Specifications:
Technology node : GF 28nm
Metal layers :5
Macro Count : 40
Instance Count : 380K
Clock frequency : 0.5GHz
RESUME
Roles and Responsibilities:
➢ Analyzing the Inputs and sourcing the inputs to create the Floorplan with Macros and its guidelines.
➢ Implementation of power plan by referring the power plan team using power plan DEF.
➢ Importing the Standard cells, creating Scenarios and analyzing the max TRAN, CAP, Setup, WNS,
TNS, congestion, Utilization etc in placement stage including optimization and group pathing
➢ Building the Clock tree with defined Skew and insertion delay and analyzing the timing, congestion,
Utilization and optimization of the design.
➢ Creating the Routing and checking all the reports and analyzing the crosstalk issues.
➢ Involving in the ECO stages and optimizing the design w.r.t to the TOP level design.
➢ Minimizing the issues and generating the GDS file
Organization: Cyient Ltd, Hyderabad
Project: Life Cycle Costing (LCC)
Client Mitsubishi
Role Design Engineer (VBA Programmer)
Team Size 2
Environment MS Excel
Project Scope To Automate the Data with the required formulae and exploring the required data
Roles & Responsibility:
➢ Analyzing the data and accordingly writing the algorithm
➢ As per the algorithm, Scripting the data in Macros Excel using VBA
➢ Testing and debugging the scripts.
➢ Optimization of scripts with less runtime and meeting the customer requirements
➢ Generating and delivering the reports with optimistic code to the customer
RESUME
Organization: Cyient Ltd, Bangalore
Project: CYCERO (CYient Cabin Emergency Response Output)
Client Cyient(Internal project)
Role Design Engineer (Component Engineer, Designer, testing and debugging).
Team Size 8
Environment LT Spice, Tina Spice, ORCAD, Allegro
Project scope Project is to design, develop and Certificate Audio Alarm unit to be used in different
locomotive platform. Development includes development of electronics hardware,
firmware and mechanical enclosure. Testing includes verification, validation and
compliance certification of CYCERO.
Roles & Responsibility:
➢ Analyzing the system design requirements as per EN50155 standards.
➢ Simulating the circuits and generating the schematics according to the specifications.
➢ Drawing up the bill of material for the procurement to build up the prototypes.
➢ Involved in the Discussions with the vendors and finalized with the PR’s and PO’s.
➢ Creation of the test procedures and test cases for the board bring up, Functional testing and design
verification of the Prototypes.
➢ Utilization of oscilloscopes, multimeters, Signal generators and soldering equipment for defining
and execution of the bring up and functional test procedures.
➢ Creation of the stress analysis and MTBF report for the designed board as per MIL standard.
➢ Execution of test procedure for the pre compliance test of the designed prototypes and created the
test report for the achieved results.
Organization: Cyient Ltd, Bangalore
Project: DDU and DMI
Client Alstom
Role Design Engineer (Testing and debugging).
Team Size 3
Environment Hardware equipment (Oscilloscope, RPS, soldering etc.).
Project scope Design and Development of DDU and DMI units for the interface between the Train
systems like TCMS, HMI, DMI to the Driver
Roles & Responsibility:
➢ Project is to design and test the functionality of the DDU and DMI units.
➢ Analyzing the system design requirements and testing the units
➢ Creating the Test report and test cases for the Board bring up and functionality test.
➢ Utilization of oscilloscopes, multimeters, Signal generators and soldering equipment for
defining and execution of the bring up and functional test procedures.
➢ Execution of Test reports with debugging the circuit and delivering the product.
RESUME
Personal Profile:
Name : Jaini Aravind Kumar
Date of Birth : 21-08-1994
Father’s Name : Jaini Harinath
Languages Known : English, Hindi & Telugu
Declaration:
I hereby declare that above information is true and correct as best of my knowledge.
(Jaini Aravind Kumar)
