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Encoder & Decoder Using Circuits

The document describes the design and implementation of an 8x3 encoder using logic gates. It provides the theory of encoders and their use in interfacing between digital systems and human operators. It includes the truth table and output equations for the encoder, with input bits D1-D7 mapping to output bits A, B, and C. The experiment's aim was to physically construct this encoder using OR gates and verify its functionality based on the truth table outputs.

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Raja Patel
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400 views2 pages

Encoder & Decoder Using Circuits

The document describes the design and implementation of an 8x3 encoder using logic gates. It provides the theory of encoders and their use in interfacing between digital systems and human operators. It includes the truth table and output equations for the encoder, with input bits D1-D7 mapping to output bits A, B, and C. The experiment's aim was to physically construct this encoder using OR gates and verify its functionality based on the truth table outputs.

Uploaded by

Raja Patel
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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EX.

NO: DESIGN & IMPLEMENTATION OF ENCODER & DECODER

DATE:
Aim:

To design & implement the 8 x 3 Encoder using logic gates.

Apparatus Required:

Sl.No Name of the Apparatus Specification Quantity

1 Digital IC trainer kit - 1

2 OR Gate IC 7432 3

3 Connecting wires - Some

THEORY

Digital Computers, Microprocessor & other digital systems are binary


operated whereas our language of communication is in decimal numbers and
alphabets only. Therefore the need arises for interfacing between digital system
and human operators. To accomplish this task the Encoder is used.
Truth Table

INPUT OUTPUT

D1 D2 D3 D4 D5 D6 D7 A B C

1 0 0 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0 0 1

0 0 1 0 0 0 0 0 1 0

0 0 0 1 0 0 0 0 1 1

0 0 0 0 1 0 0 1 0 0

0 0 0 0 0 1 0 1 0 1

0 0 0 0 0 0 1 1 1 0

0 0 0 0 0 0 0 1 1 1

OUTPUT

A= D4+D5+D6+D7

B= D2+D3+D6+D7

C=D1+D3+D5+D7

PROCEDURE:

RESULT
Thus the 8 x 3 encoder & decoder is constructed and output is verified by using logic
gates.

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