EMC analysis workflow

Antonio Ciccomancini Scogna, CST of America –

antonio.ciccomancini@cst.com

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EMC/EMI Applications

Emissions Susceptibility E3

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 Typical Emissions Issues

1 2

Image courtesy of Johnson Controls Inc .

1Slots
in ground plane Coupling between heat sink
Coupling through
radiate onto cable, DM to and connector bypasses signal
vent in enclosure
CM current conversion path through PCB

EMC design involves minimizing the noise, absorbing the noise, containing the noise (shielding) and diverting/filtering the
noise.

Stray fields/couplings/radiation are critical in EMC/EMI. Capturing these effects accurately often requires full system-level
simulation.

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USB Channel Application

3 meter radiated emissions

USB cable results

USB differential pair with intended differential mode

signals and unintended common mode signals

Several potential coupling paths that may lead to
emissions effects

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 Emissions Workflow: USB Channel

Import PCB layout into Perform detailed Use transient CM

CST PCB STUDIO and run analysis of critical nets voltage to simulate
CST BOARDCHECK to using CST Microwave radiation from USB
identify critical nets STUDIO and compute cable
transient CM voltage
Cascading approach is only valid if the system can be decoupled
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CST BOARDCHECK
EMC Rules Checking for PCB Designs 1. Deal with a
new PCB layout

5. Obtain EMC 2. Analyze PCB

rules for layout in EMC rule
engineers Design checker
Cycle

4. Perform 3. Decide which

simulations and structures need
analyze results simulation

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EMC Rule Checking Workflow
Import PCB Design
• Altium (ODB++), Cadence, Mentor Graphics, Zuken

Select EMC Rules

• Categories: Signal reference, Wiring/Crosstalk, Decoupling, Placement

Select Nets
• Tag critical nets, differential pairs, or power and ground nets

Select Components
• Tag ICs, clock drivers, stitching or decoupling capacitors, or connectors

Start EMC Rule Check

• Press one button and wait for the EMC violations to be listed
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CST BOARDCHECK: Rules
EMC rules SI rules

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 EMC Rule Check Violations
Critical Differential Net Critical Net Near I/O Net Critical Net Near Edge of
Length Matching and Spacing Reference Plane

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 Partitioning of the Model / USB Channel
choke to CM
connector pins choke

driver to
choke

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 CM Signals in Channel
Source of CM voltage at connector?
1
1. DM to CM coupling in line
2 2. coupling via neighbouring line
DM to CM coupling
in line -25 dB
S21 in dB

via neighbouring line -55 dB

frequency in GHz
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 CM Signals in Channel
DM  1
CM
Without CM choke CM voltage in V
With CM choke

Driver output skew

set to 100ps 1.5 V
Non perfect
balanced lice
increases skew and
CM conversion
80 mV

time in ns
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 Radiated Emissions Prediction (I)
Without CM choke
63 dBµV/m

Cable
shield

Convolution of impulse response with

periodic CM noise
With CM choke
34 dBµV/m

3 meter emissions scan

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System Assembly and Modeling
Schematic View Assembly View

Chassis

PCB Vented
Panel
Heat sinks

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PCB – Near Field Source Modeling
Portion of chassis
modeled to capture
reflections

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 Chassis Emissions
Baseline Case Near field source (automatically
positioned based on PCB location)

Heat sinks
Included

Heat sink
Clone block
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 Vented Panel Optimization
Vented Panel Plane wave Parametric Sweep
Task to determine
excitation optimum hole
dimensions

Chassis including
Vented Panel Optimized vented panel
positioned behind fans

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Vented Panel Optimization

Without Vented Panel With Vented Panel

Surface Current distribution @ 5GHz

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Key Features for Emissions Workflows
CST BOARDCHECK
• Identify critical nets

Integrated workflows
• PCB + connector + cable
Transient co-simulation
• Broadband response, field/circuit coupling (CM chokes etc.)

Efficient cable and aperture modeling

• CS complex cable bundles, TLM compact aperture models

Simulation of EMC test setup

• External ground plane, far-field probes, cylinder scan

System Assembly and Modeling (SAM)

• System-level simulation of design variants

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Typical Susceptibility Issues
4 1

x
Source Victim
5
3 2

Power Line (or other interconnecting cables)

Failure criteria depends on the test

A No degradation in performance, operates as intended at all times
B Degradation allowed during the test, full performance must be restored
following the test, without user intervention
C Degradation allowed during the test, and after the test, provided that
full performance can be restored automatically or by user intervention
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ESD Generator Model
The motivation for developing a detailed full
3D model of the generator is to correctly
simulate the asymmetric fields generated by
the discharge and their coupling to the system.
Discharge current
at gun tip

Induced voltage in
semi-circular loop

Time animation confirms the asymmetric

Full wave model for simulating Noiseken ESD Generator field distribution. This may affect the
Dazhao Liu; Nandy, A.; Pommerenke, D.; Soon Jae Kwon;
Ki Hyuk Kim; IEEE Symposium on EMC,17-21 Aug. 2009 coupling to the system under test
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ESD to Enclosure with Cable Entry
External Cable
Screen Bonded to
Enclosure

Bi-Directional co-simulation External

between the 3D field, cable Cable Screen
and circuit simulations allows not Bonded
the effect of cable entry to to Enclosure
be considered
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ESD Transient co-simulation

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 Modeling details/ports

Ports 3,4 Port 1

(diodes)
Reader_p tag_n
Reader_n
tag_p

Port 2
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Results/currents

Reader_n

tag_n

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Surface current

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Hybrid Cable EMI
Sensor
SMPS

Load

RS485
screen

Programmable switch mode power supply driving an intelligent

sensor with high speed RS485 communications Import measured screen
IGBT switching is used to generate Pulse Width Modulation transfer impedance
waveforms to supply the sensor

Interference between Power and Control circuits

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Cable Parameter Extraction
Analysis of mutual
capacitance between Vpos
and Vneg phase wires

C+,- = 0.0021pF/m

C+,- = 0.0021pF/m
Vpos
New curved tetrahedral
elements in EMS
Vneg electrostatic solver

CST EMS can used to design cable cross section and extract parasitic values
CST CS uses an internal 2D field solver to extract parasitic values for TL analysis

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 Interference Analysis
CST CS used to investigate CM noise for
Cable/circuit co-simulation different SMPS waveforms, cable
lengths, cable screens and terminations

CM Current in
RS485 line

Input SMPS
PWM voltage
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Typical E3 Issues
I (A) EMP E (V/m)

t
t
200kA peak 300 V/m CW field
1.5µs rise, 88 µs fall 50 kV/m peak
10 KHz to 40 GHz 1ns rise, 25 ns fall

HIRF
Lightning
channel

Lightning Strike High Intensity Radiated Fields Electromagnetic Pulse

Lightning and EMP are transient effects: peak fields and dissipated energy are critical
HIRF requires analysis over an extremely wide spectrum (10 KHz to 40 GHz)
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 Field/Cable Co-Sim.
Plane Wave
Transient EMP

Internal probe Good cable screen to chassis connection

Simulation of incident EMP and effect of

cable shield connection to enclosure
Poor cable screen to chassis connection

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 Rotorcraft EMP Simulation
Free standing curves for slots/seams

Huge difference in scale!

500nm ITO thickness vs. airframe dimensions
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Rotorcraft EMP Simulation

ITO coated canopy reduces peak electric field inside cockpit from 8 KV/m to 800 V/m
Solve time 200m on 8-core CPU / 4.3 GB RAM

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EMP Protection Assessment
Real world cable modeling True transient co-simulation

Solid and braided screens can be Non-linear transient protection

added to cable model to devices modeled by true transient
investigate shielding co-simulation
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Cosite Analysis
Powerful workflows for antenna co-site and RADHAZ analysis

Near Field Source

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 CST STUDIO to Saber Link

Model exchange thru S-parameter and

CST Studio Suite

Structural Component
Model
touchstone standard
S-Parameter

Fully automated Saber model export Computation

approach in CST Studio Suite Touchstone Exchange

Format

Easy external model integration in Saber
thru drag & drop S-Parameter Model

Saber
Block

Full support for transient & frequency

TR or AC Analysis
analysis in Saber

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Common Mode Choke Example

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 Matching the Inductance

Typical mue value for the ferrite was chosen

Number of windings was adjusted to match inductance given in datasheet
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 Fine tuning - Common Mode Impedance
Wire Resistance

Inter wire
capacitance

1e5

2000
1000

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Export into Synopsys Saber

Drag and Drop the created files

into the Saber library.

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Frequency Analysis in Saber
Place into Saber
Schematic

common mode +1V / +1V

differential mode +1V / -1V

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Hybrid Cable Example
Sensor
SMPS

Load

RS485
screen

Programmable switch mode power supply driving

an intelligent sensor with high speed RS485 Import measured screen
communications transfer impedance into
CST Cable Studio

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 S Parameters for Saber Export
Broadband S parameter output to
cover power harmonic spectrum

Cable screens grounded

Ports placed on power and
RS485 pins for coupling analysis

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Transient Analysis in Saber

Place into Saber

Schematic

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Export Circuit to Synopsys Saber
In addition to S parameter link, CABLE STUDIO can directly generate an
equivalent circuit model for Saber…

Equivalent circuit
derived from 2D
cross section field
solver and TL solver

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Conclusions
Powerful solutions for analyzing broad range of Emissions Susceptibility and E3
problems

Coupling, shielding, ESD, lightning, EMP, HIRF…
Transient solver

Direct time-domain analysis of transients such as ESD, EMP and lightning
Co-simulation

MWS+CS+DS co-simulation enables coupling between fields, cables and circuits
Compact models

Thin conducting panels, slots/gaps, joints/seams and ventilation panels
Realistic cable models

Twisted conductors, screens, connections to 3D structure

New links between CST STUDIO SUITE and Synopsys Saber provide
smooth workflow for system-level analysis

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