Ordering

Orderingnumber
number: :ENA1798D
ENA1798D

LV47004P
Monolithic Linear IC

4-Channel BTL Power Amplifier http://onsemi.com

for Car Audio Systems

Overview
The LV47004P is the IC for 4-channel BTL power amplifier that is developed for car audio system.
Pch DMOS in the upper side of the output stage and Nch DMOS in the lower side of the output stage are
complimentary. High power and high quality sound are realized by that.
This IC incorporate various functions (standby switch, muting function, and various protection circuit) necessary for
car audio system. Also, it has a self-diagnosis function.

Functions
 High output : PO max = 41W (typical) (VCC = 15.2V, f = 1kHz, RL = 4, Max power)
: PO max = 24W (typical) (VCC = 14.4V, f = 1kHz, THD = 10%, RL = 4)
: PO max = 17W (typical) (VCC = 14.4V, f = 1kHz, THD = 1%, RL = 4)
 Built-in muting function (pin 22)
 Built-in Standby switch (pin 4)
 Built-in Self-diagnosis function (pin 25) :
Signal output in case of output offset detection, shorting to VCC, shorting to ground, and load shorting.
 Electric mirror noise decrease
 Built-in various protection circuit (shorting to ground, shorting to VCC, load shorting, over voltage and thermal shut
down)
 No external anti-oscillation part necessary.

Note 1 : Please do not mistake connection.

A wrong connection may produce destruction, deterioration and damage for the IC or equipment.
Note 2 : The protective circuit function is provided to temporarily avoid abnormal state such as incorrect output
connection. But, there is no guarantee that the IC is not destroyed by the accident.
The protective function do not operate of the operation guarantee range. If the outputs are connected incorrectly,
IC destruction may occur when used outside of the operation guarantee range.
Note 3 : External parts, such as the anti-oscillation part, may become necessary depending on the set condition. Check
their necessity for each set.

Semiconductor Components Industries, LLC, 2013

May, 2013 42512SY/41812SY/O2611SY 20110930-S00012/60811SY/63010SY No.A1798-1/11
 LV47004P
Specifications
Maximum Ratings at Ta = 25C
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage VCC max1 No signal, t = 1 minute 26 V
VCC max2 During operations 18 V
Maximum output current IO peak Per channel 4.5/ch A
Allowable power dissipation Pd max With an infinity heat sink 50 W
Operating temperature Topr -40 to +85 C
Storage temperature Tstg -40 to +150 C
Thermal resistance between the junction j-c 1 C/W
and case

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

Recommended Operating Ranges at Ta = 25C

Parameter Symbol Conditions Ratings Unit
Recommended supply voltage VCC 14.4 V
Recommended load resistance RL op 4 
Operating supply voltage range VCC op A range not exceeding Pdmax 9 to 16 V

Electrical Characteristics at Ta = 25°C, VCC = 14.4V, RL = 4, f = 1kHz, Rg = 600

Ratings
Parameter Symbol Conditions Unit
min typ max
Quiescent current ICCO RL = , Rg = 0 200 400 mA
Standby current Ist Vst = 0V 10 A
Voltage gain VG VO = 0dBm 25 26 27 dB
Voltage gain difference VG -1 +1 dB
Output power PO THD = 10% 19 24 W
PO max1 Max Power 37 W
PO max2 VCC = 15.2, Max Power 41 W
Output offset voltage Vn offset Rg = 0 -150 +150 mV
Total harmonic distortion THD PO = 4W 0.03 0.2 %
Channel separation CHsep VO = 0dBm, Rg = 10k 55 65 dB
Ripple rejection ratio SVRR Rg = 0, fr = 100Hz, VCCR = 0dBm 45 65 dB
Output noise voltage VNO Rg = 0, B.P.F. = 20Hz to 20kHz 80 200 Vrms
Input resistance Ri 40 50 65 k
Mute attenuation Matt VO = 20dBm, mute : on 75 90 dB
Standby pin control voltage Vstby H Amp : on 2.5 VCC V
Vstby L Amp : off 0.0 0.5 V
Mute pin control voltage Vmute H Mute : off Open -
Vmute L Mute : on 0.0 1.0 V
Output offset detection
Detection threshold voltage Vosdet 1.2 1.8 2.4 V

* 0dBm = 0.775Vrms

No.A1798-2/11
 LV47004P
Package Dimensions
unit : mm (typ)
3236A

29.2
25.6 Pd max -- Ta
70
(22.8)

Maximum power dissipation, Pd max -- W

(8.5) ( 2.5)
4.5
60

(R1.7)
(5.0)

50
(12.3)

(14.4)
18.6 max
21.7

(11.0)
40

14.5
30
0.4
1 25

3.5
(2.6) (1.0) 0.52 4.0 4.2 20

2.0 2.0 10

0
-40 -20 0 20 40 60 80 100 120 140 160
Ambient temperature, Ta -- °C
SANYO : HZIP25

Block Diagram
VCC
+
Tab VCC1/2 VCC3/4
1 6 20

IN 1
OUT 1+
11 + + 9
RL
OUT 1-
- - 7

PWR GND1
Protective 8
circuit

IN 2
OUT 2+
12 + + 5
RL
OUT 2-
- - 3
DC Ripple
10 PWR GND2
+ Filter
2

AC GND OFFSET
16 25 DIAG

5V

PRE GND Mute Mute

13 22
circuit + Low Level
Mute ON
IN 3
OUT 3+
15 + + 17
RL
OUT 3-
- - 19

PWR GND3
Protective 18
circuit

IN 4
OUT 4+
14 + + 21
RL
- - OUT 4-
23

STBY Stand by PWR GND4

4 Switch 24
+5V
ST ON

No.A1798-3/11
 LV47004P
External Components
Part Name Recommended Value Purpose Remarks
C1 to C5 0.47F Cuts DC voltage The larger the constant value, the lower the cut-off frequency
The values of C1 to C5 must be the same
C6 22F Reduces ripples The larger the constant value, the longer the amplifier ON/OFF time
Reduces pop noise
C7 2200F Ripple filter Eliminating power supply ripples
C8 0.1F Improves oscillation stability Reducing high-frequency noise
C9 1F Reduces pop noise The larger the constant value, the longer the mute ON/OFF time
R1 10k Reduces pop noise The larger the constant value, the longer the mute ON/OFF time
R2 4.7k Pull-up resistor
* The components and constant values within the test circuit are used for confirmation of characteristics and are not guarantees that incorrect or trouble will not
occur in application equipment.

Description of Operation

1. Standby switch function (pin 4)

Threshold voltage of the pin 4 is set by about 2VBE.
The amplifier is turned on by the applied voltage of 2.5V or more. Also, the amplifier is turned off by the applied
voltage of 0.5V or less.

STBY
4
10kΩ
30kΩ

Fig1 Standby equivalent circuit

2. Muting function (pin 22)

The muted state is obtained by setting pin 22 to the ground potential, enabling audio muting.
The muting function is turned on by the applied voltage of 1V or less to the resistance of 22pin (Mute pin). And the
muting function is turn off tjis pin opens.
Also, the time constant of the muting function is determined by external capacitor and resistor constants.
It is concerned with a pop noise in amplifier ON/OFF and mute ON/OFF. After enough examination, please set it.

MUTE
about OFF ON
50μA
10kΩ MUTE
22
200Ω
18kΩ
+
1μF

about
2.5V

Fig2 Mute equivalent circuit

No.A1798-4/11
 LV47004P
3. ACGND pin (pin 16)
The capacitor of the pin 16 must use the same capacitance value as the input capacitor.
Also, connect to the same PREGND as the input capacitor.

4. Self-diagnostics function (pin 25)

By detecting the unusual state of the IC, the signal is output to the pin 25.
Also, by controlling the standby switch after the signal of the pin 25 is detected by the microcomputer, the burnout of
the speaker can be prevented.
(1) Shorting to VCC/Shorting to ground : The pin 25 becomes the low level.
(2) Load shorting : The pin 25 is alternated between the low level and the high level
according to the output signal.
(3) Output offset detection : when the output offset voltage exceeds the detection threshold voltage,
the pin 25 becomes the low level.
* Note: The output offset abnormality is thought of as the leakage current of the input capacitor.
In addition, the pin 25 has become the NPN open collector output (active low).
The pin 25 must be left open when this function is not used.

5V
OFFSET
DIAG
25

IN
OUT+
+ +
RT
AC GND
OUT-
16 - -

Output voltage
Speaker pin
output voltage

+1.8V (typical)

0V

-1.8V (typical)

time
25 pin voltage

time

Fig3 Self-diagnosis Function Diagram

No.A1798-5/11
 LV47004P
5. Sound quality (low frequencies)
By varying the value of input capacitor, low-frequency characteristic can be improved.
However, it is concerned the shock noise. Please confirm in each set when the capacitance value varies.

6. Pop noise
For pop noise prevention, it is recommended to use the muting function at the same time.
 Please turn on the muting function simultaneously with power supply on when the amplifier is turned on. Next, turn
off the muting function after the output DC potential stabilization.
 When the amplifier is turn off, turn off the power supply after turning on the muting function.

7. Oscillation stability
Pay due attention on the following points because parasitic oscillation may occur due to effects of the capacity load,
board layout, etc.

Board layout
 Provide the VCC capacitor of 0.1F in the position nearest to IC.
 PREGND must be independently wired and connected to the GND point that is as stable as possible, such as the
minus pin of the 2200F VCC capacitor.

In case of occurrence of parasitic oscillation, any one of following parts may be added as a countermeasure.
Note that the optimum capacitance must be checked for each set in the mounted state.
 Series connection of CR (0.1F and 2.2) between BTL outputs
 Series connection of CR(0.1F and 2.2) between each output pin and GND.

No.A1798-6/11
 LV47004P
ICCO -- VCC VN -- VCC
250 14

12
Quiescent current, ICCO -- mA

Output midpoint voltage, VN -- V

200

10

150
8

6
100

4
all channel is similar
50
2

0 0
6 8 10 12 14 16 18 6 8 10 12 14 16 18
Supply voltage, VCC -- V Supply voltage, VCC -- V
PO -- VCC PO -- f
50 25

40 20
Output power, PO -- W

Output power, PO -- W
all channel is similar
30 15

20 10
all channel is similar

10 5

0 0
8 10 12 14 16 18 10 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7100k
Supply voltage, VCC -- V Frequency, f -- Hz
THD -- PO THD -- PO
10 10
7 7
5 5
Total harmonic distortion, THD -- %

Total harmonic distortion, THD -- %

3 3
2 2

1 1
7 7
5 5
3 3
2 2

0.1 CH2 0.1 CH2

7 7 CH4
5 CH4 5
3 CH3 3 CH1
2 CH1 2
CH3
0.01 0.01
0.1 2 3 5 7 1 2 3 5 7 10 2 3 5 7 100 0.1 2 3 5 7 1 2 3 5 7 10 2 3 5 7 100
Output power, PO -- W Output power, PO -- W
THD -- PO THD -- f
10 10
7 7
Total harmonic distortion, THD -- %

5 5
Total harmonic distortion, THD -- %

3 3
2 2

1 1
7 7
5 5
3 3
2 2
CH2
0.1 0.1
7 CH1 7 CH3
5 5 CH2
3 3
CH4 CH3 CH1
2 2
CH4
0.01 0.01
0.1 2 3 5 7 1 2 3 5 7 10 2 3 5 7 100 10 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7100k
Output power, PO -- W Frequency, f -- Hz

No.A1798-7/11
 LV47004P
Respomse -- f VNO -- Rg
1 200

Output noise voltage, VNO -- V

0 150
Response -- dB

all channel is similar

--1 100

all channel is similar

--2 50

--3 0
10 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7100k 10 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7100k
Frequency, f -- Hz
CH.Sep -- f CH.Sep -- f
80 80

CH1 CH2
CH3 CH3
CH CH
Channel separation -- dB

60 1 60 2

Channel separation -- dB
CH CH CH
CH 4 2 4
1 CH
CH 1
40
2 40

20 20

0 0
10 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7100k 10 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7100k
Frequency, f -- Hz Frequency, f -- Hz
CH.Sep -- f CH.Sep -- f
80 80

CH4 CH3
CH
3 CH
Channel separation -- dB

60 CH 60 4
Channel separation -- dB

2 CH CH
CH3 C 4 2
H1 CH
1
CH3 CH
4
40 40

20 20

0 0
10 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7100k 10 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7100k
Frequency, f -- Hz Frequency, f -- Hz
SVRR -- VCC SVRR -- fR
80 80
Ripple rejection ratio, SVRR -- dB
Ripple rejection ratio, SVRR -- dB

60 60
all channel is similar all channel is similar

40 40

20 20

0 0
8 10 12 14 16 18 10 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7100k
Supply voltage, VCC -- V Ripple frequency, f R -- Hz

No.A1798-8/11
 LV47004P
Offset DIAG -- VCC Pd -- PO
4 60
Detection threshold voltage, Vosdet -- V

50

Power dissipation, Pd -- W
3

40

Detection Level
2 30

6V
all channel is similar =1
20 C V
VC 4.4
1 =1
C
VC
10

0 0
8 10 12 14 16 18 0.1 2 3 5 7 1 2 3 5 7 10 2 3 5 7 100
Supply voltage, VCC -- V Output power, PO -- W
ICCO -- Vst Mute ATT -- V Mute
250 100

Mute attenuation, Mute ATT -- dB

Quiescent current, ICCO -- mA

200 80

150 60

all channel is similar

100 40

50 20

0 0
0 1.0 2.0 3.0 4.0 5.0 0 1.0 2.0 3.0 4.0 5.0
Standby control voltage, Vst -- V Mute control voltage, V Mute -- V

PS No.A1798-9/11
 LV47004P
HZIP25 Heat sink attachment
Heat sinks are used to lower the semiconductor device junction temperature by leading the head generated by the device to
the outer environment and dissipating that heat.
a. Unless otherwise specified, for power ICs with tabs and power ICs with attached heat sinks, solder must not be
applied to the heat sink or tabs.

b. Heat sink attachment

· Use flat-head screws to attach heat sinks.
· Use also washer to protect the package.
· Use tightening torques in the ranges 39-59Ncm(4-6kgcm) . Binding head
machine screw
Countersunk head
mashine screw
· If tapping screws are used, do not use screws with a diameter larger
than the holes in the semiconductor device itself.
· Do not make gap, dust, or other contaminants to get between the
semiconductor device and the tab or heat sink. Heat sink

· Take care a position of via hole . gap

· Do not allow dirt, dust, or other contaminants to get between the
semiconductor device and the tab or heat sink.
· Verify that there are no press burrs or screw-hole burrs on the heat sink.
· Warping in heat sinks and printed circuit boards must be no more than
0.05 mm between screw holes, for either concave or convex warping.
· Twisting must be limited to under 0.05 mm.
Via hole
· Heat sink and semiconductor device are mounted in parallel.
Take care of electric or compressed air drivers
· The speed of these torque wrenches should never exceed 700 rpm,
and should typically be about 400 rpm.

c. Silicone grease
· Spread the silicone grease evenly when mounting heat sinks.
· Our company recommends YG-6260 (Momentive Performance Materials Japan LLC)

d. Mount
· First mount the heat sink on the semiconductor device, and then mount that assembly on the printed circuit board.
· When attaching a heat sink after mounting a semiconductor device into the printed circuit board, when tightening
up a heat sink with the screw, the mechanical stress which is impossible to the semiconductor device and the pin
doesn't hang.

e. When mounting the semiconductor device to the heat sink using jigs, etc.,
· Take care not to allow the device to ride onto the jig or positioning dowel.
· Design the jig so that no unreasonable mechanical stress is not applied to the semiconductor device.

f. Heat sink screw holes

· Be sure that chamfering and shear drop of heat sinks must not be larger than the diameter of screw head used.
· When using nuts, do not make the heat sink hole diameters larger than the diameter of the head of the screws used.
A hole diameter about 15% larger than the diameter of the screw is desirable.
· When tap screws are used, be sure that the diameter of the holes in the heat sink are not too small. A diameter about
15% smaller than the diameter of the screw is desirable.

g. There is a method to mount the semiconductor device to the heat sink by using a spring band. But this method is not
recommended because of possible displacement due to fluctuation of the spring force with time or vibration.

PS No.A1798-10/11
 LV47004P

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damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual
performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical
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PS No.A1798-11/11