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Name: Abbaas alif.M.N Reg. No. 16BEC1038

The document describes the results of 5 experiments conducted on MOSFET and CMOS inverter circuits. In Experiment 1, the IV characteristics of an NMOS transistor including drain current vs gate voltage and drain current vs drain voltage are analyzed. Experiment 2 similarly analyzes the IV characteristics of a PMOS transistor. Experiment 3 examines the transient response, voltage transfer characteristics, dynamic power, and static delay of a CMOS inverter. Experiment 4 analyzes the effects of PMOS width on a skewed inverter's characteristics. Experiment 5 cascades inverters to form a buffer, analyzes active and resistive load inverters, and measures noise margin. The purpose is to determine and verify the outputs and characteristics of various M

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54 views22 pages

Name: Abbaas alif.M.N Reg. No. 16BEC1038

The document describes the results of 5 experiments conducted on MOSFET and CMOS inverter circuits. In Experiment 1, the IV characteristics of an NMOS transistor including drain current vs gate voltage and drain current vs drain voltage are analyzed. Experiment 2 similarly analyzes the IV characteristics of a PMOS transistor. Experiment 3 examines the transient response, voltage transfer characteristics, dynamic power, and static delay of a CMOS inverter. Experiment 4 analyzes the effects of PMOS width on a skewed inverter's characteristics. Experiment 5 cascades inverters to form a buffer, analyzes active and resistive load inverters, and measures noise margin. The purpose is to determine and verify the outputs and characteristics of various M

Uploaded by

Abbaas Alif
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Name : Abbaas alif.M.

N
Reg. No. 16BEC1038

EXPERIMENT NO. 1

NMOS IV CHARACTERISTICS

Aim-To determine IV characteristics of NMOS, including the following:-


 Drain current vs gate voltage
 Drain current vs drain voltage with parametric analysis
Drain current vs gate voltage (ID vs VGS):-

Circuit Diagram:-
Graph:-

The threshold voltage comes around to be 0.25V.


Drain current vs drain voltage with parametric analysis(ID vs VDS):-
Circuit Diagram:-
Graph:-

Result-Hence, the IV characteristics for NMOS transistor have been analysed.


EXPERIMENT NO. 2

PMOS IV CHARACTERISTICS

Aim-To determine IV characteristics of PMOS, including the following:-


 Drain current vs gate voltage
 Drain current vs drain voltage with parametric analysis
Drain current vs gate voltage (ID vs VGS):-

Circuit Diagram:-
Graph:-

The threshold voltage comes around to be -0.25V.


Drain current vs drain voltage with parametric analysis(ID vs VDS):-
Circuit Diagram:-
Graph:-

Result-Hence, the IV characteristics for PMOS transistor have been analysed.

Experiment 3
Aim: To determine the following:
a) Transient analysis of cmos inverter
b) Voltage transfer characteristics of cmos inverter
c) Find the dynamic power
d) Find the static delay

a) Transient analysis of cmos inverter


Circuit:
Output:

b) Voltage transfer characteristics of cmos inverter


Circuit:

Output:
c) Find the dynamic power

Obtained value = 1.253 x 10^(-6)


d) Find the static delay
Output:

Obtained value = 27.26 x 10^(-12)


Result:
Thus, the given parameters were plotted and observed.
Experiment 4

Aim: To determine the following:


a) Skewed inverter – DC parametric sweep with width of pmos as a parameter
b) Create a symbol for inverter
c) Transient analysis of inverter (symbol)

a) DC parametric sweep of skewed inverter with width of pmos as a parameter


Circuit:
Output:

b) Create a symbol for inverter


Circuit:

Symbol:
c) Transient analysis
Output:

Result:
Thus, the given experiments were completed and the corresponding outputs observed and
verified.

Experiment 5
Aim: To perform the following:
a) cmos buffer by cascading two inverter (using symbols)
b) Voltage transfer characteristics of active load inverter
c) Voltage transfer characteristics of resistive load inverter
d) Noise margin

a) CMOS buffer by cascading 2 inverters


Circuit:

Output:
b) Voltage transfer characteristics of active load inverter
Circuit:

Output:
c) Voltage transfer characteristics of resistive load
Circuit:

Output:
d) Noise margin
Circuit:

Output:
Result:
Thus, the given experiments were completed and the corresponding outputs observed and
verified.

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