160 Rapid Prototyping of Digital Systems Chapter 10

10 Communications: Interfacaing to the PS/2 Keyboard

The Altera UP 1 and UP 1X boards support the use of either a mouse or
keyboard using a PS/2 connector on the board. This provides only the basic
electrical connections from the PS/2 cable and the FLEX chip. It is necessary to
design a hardware interface using logic in the FLEX chip to communicate with
a keyboard or a mouse. Serial-to-parallel conversion using a shift register is
required.

10.1 PS/2 Port Connections

The PS/2 port consists of 6 pins including ground, power (VDD), keyboard
data, and a keyboard clock line. The UP 1 board supplies the power to the
mouse or keyboard. Two lines are not used. The keyboard data line is pin 31 on
the FLEX chip, and the keyboard clock line is pin 30. Pins must be specified in
one of the design files. Both the clock and data lines are open collector and bi-
directional. The clock line is normally controlled by the keyboard, but it can
also be driven by the computer system or in this case the FLEX chip, when it
wants to stop data transmissions from the keyboard. Both the keyboard and the
system can drive the data line. The data line is the sole source for the data
transfer between the computer and keyboard. The keyboard and the system can
exchange several commands and messages as seen in Tables 10.1 and 10.2.
 Interfacing to the PS/2 Keyboard Port 161

10.2 Keyboard Scan Codes

Keyboards are normally encoded by placing the key switches in a matrix of
rows and columns. All rows and columns are periodically checked by the
keyboard encoder or "scanned" at a high rate to find any key state changes. Key
data is passed serially to the computer from the keyboard using what is known
as a scan code. Each keyboard key has a unique scan code based on the key
switch matrix row and column address to identify the key pressed.
There are different varieties of scan codes available to use depending on the
type of keyboard used. The PS/2 keyboard has two sets of scan codes. The
default scan code set is used upon power on unless the computer system sends a
command the keyboard to use an alternate set. The typical PC sends commands
to the keyboard on power up and it uses an alternate scan code set. To interface
the keyboard to the UP 1 board, it is simpler to use the default scan code set
since no initialization commands are required.

10.3 Make and Break Codes

The keyboard scan codes consist of 'Make' and 'Break' codes. One make code
is sent every time a key is pressed. When a key is released, a break code is sent.
For most keys, the break code is a data stream of F0 followed by the make code
for the key. Be aware that when typing, it is common to hit the next key(s)
before releasing the first key hit.
Using this configuration, the system can tell whether or not the key has been
pressed, and if more than one key is being held down, it can also distinguish
which key has been released. One example of this is when a shift key is held
down. While it is held down, the '3' key should return the value for the '#'
symbol instead of the value for the '3' symbol. Also note that if a key is held
down, the make code is continuously sent via the typematic rate until it is
released, at which time the break code is sent.

10.4 The PS/2 Serial Data Transmission Protocol

The scan codes are sent serially using 11 bits on the bi-directional data line.
When neither the keyboard nor the computer needs to send data, the data line
and the clock line are High (inactive).
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As seen in Figure 10.1, the transmission of a single key or command consists of

the following components:

1. A start bit ('0')

2. 8 data bits containing the key scan code in low to high bit order
3. Odd parity bit such that the eight data bits plus the parity bit are an odd
number of ones
4. A stop bit ('1')

The following sequence of events occur during a transmission of a command by

the keyboard:

1. The keyboard checks to ensure that both the clock and keyboard lines are
inactive. Inactive is indicated by a High state. If both are inactive, the keyboard
prepares the 'start' bit by dropping the data line Low.
2. The keyboard then drops the clock line Low for approximately 35us.
3. The keyboard will then clock out the remaining 10 bits at an approximate
rate of 70us per clock period. The keyboard drives both the data and clock line.
4. The computer is responsible for recognizing the ‘start’ bit and for receiving
the serial data. The serial data, which is 8 bits, is followed by an odd parity bit
and finally a High stop bit. If the keyboard wishes to send more data, it follows
the 12th bit immediately with the next ‘start’ bit.
This pattern repeats until the keyboard is finished sending data at which point
the clock and data lines will return to their inactive High state. In Figure 10.1
the keyboard is sending a scan code of 16 for the "1" key and it has a zero
parity bit.

Figure 10.1 Keyboard Transmission of a Scan Code.

 Interfacing to the PS/2 Keyboard Port 163

When implementing the interface code, it will be necessary to filter the slow
keyboard clock to ensure reliable operation with the fast logic inside the FLEX
chip. Whenever an electrical pulse is transmitted on a wire, electromagnetic
properties of the wire cause the pulse to be distorted and some portions of the
pulse may be reflected from the end of the wire. On some PS/2 keyboards and
mice there is a reflected pulse on the cable that is strong enough to cause
additional clocks to appear on the clock line.
Here is one approach that solves the reflected pulse problem. Feed the PS/2
clock signal into an 8-bit shift register that uses the 25Mhz clock. AND the bits
of the shift register together and use the output of the AND gate as the new
"filtered" clock. This prevents noise and ringing on the clock line from causing
occasional extra clocks during the serial-to-parallel conversion in the FLEX
chip.
A few keyboards and mice will work without the clock filter and many will not.
They all will work with the clock filter, and it is relatively easy to implement.
This circuit is included in the UP1cores for the keyboard and the mouse.

As seen in Figure 10.2, the computer system or FLEX chip sends commands to
the PS/2 keyboard as follows:

1. System drives the clock line Low for approximately 60us to inhibit any new
keyboard data transmissions. The clock line is bi-directional.
2. System drives the data line Low and then releases the clock line to signal
that it has data for the keyboard.
3. The keyboard will generate clock signals in order to clock out the remaining
serial bits in the command.
4. The system will send its 8-bit command followed by a parity bit and a stop
bit.
5. After the stop bit is driven High, the data line is released.

Upon completion of each command byte, the keyboard will send an

acknowledge (ACK) signal, FA, if it received the data successfully. If the
system does not release the data line, the keyboard will continue to generate the
clock, and upon completion, it will send a ‘re-send command’ signal, FE or FC,
to the system. A parity error or missing stop bit will also generate a re-send
command signal.
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Figure 10.2 System Transmission of a Command to PS/z Device.

10.5 Scan Code Set 2 for the PS/2 Keyboard

PS/2 keyboards are available in several languages with different characters
printed on the keys. A two-step process is required to find the scan code. A key
number is used to lookup the scan code. Key numbers needed for the scan code
table are shown in Figure 10.3 for the English language keyboard layout.

Figure 10.3 Key Numbers for Scan Code.

Each key sends out a make code when hit and a break code when released.
When several keys are hit at the same time, several make codes will be sent
before a break code.
 Interfacing to the PS/2 Keyboard Port 165

The keyboard powers up using this scan code as the default. Commands must
be sent to the keyboard to use other scan code sets. The PC sends out an
initialization command that forces the keyboard to use the other scan code.
The interface is much simpler if the default scan code is used. If the default
scan code is used, no commands will need to be sent to the keyboard. The keys
in Table 10.3 for the default scan code are typematic (i.e. they automatically
repeat the make code if held down).
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10.6 The Keyboard UP1core

The following VHDL code for the keyboard UP1core shown in Figure 10.4
reads the scan code bytes from the keyboard. In this example code, no
command is ever sent to the keyboard, so clock and data are always used as
inputs and the keyboard power-on defaults are used. To send commands, a
more complex bi-directional tri-state clock and data interface is required. The
details of such an interface are explained in the next chapter on the PS/2 mouse.
The keyboard powers up and sends the self-test code AA and 00 to the FLEX
chip before it is downloaded.
 Interfacing to the PS/2 Keyboard Port 167

Figure 10.4 Keyboard UP1 core

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY keyboard IS
PORT( keyboard_clk, keyboard_data, clock_25Mhz ,
reset, read : IN STD_LOGIC;
scan_code : OUT STD_LOGIC_VECTOR( 7 DOWNTO 0 );
scan_ready : OUT STD_LOGIC);
END keyboard;

ARCHITECTURE a OF keyboard IS
SIGNAL INCNT : STD_LOGIC_VECTOR( 3 DOWNTO 0 );
SIGNAL SHIFTIN : STD_LOGIC_VECTOR( 8 DOWNTO 0 );
SIGNAL READ_CHAR : STD_LOGIC;
SIGNAL INFLAG, ready_set : STD_LOGIC;
SIGNAL keyboard_clk_filtered : STD_LOGIC;
SIGNAL filter : STD_LOGIC_VECTOR( 7 DOWNTO 0 );

BEGIN
PROCESS ( read, ready_set )
BEGIN
IF read = '1' THEN
scan_ready <= '0';
ELSIF ready_set'EVENT AND ready_set = '1' THEN
scan_ready <= '1';
END IF;
END PROCESS;
This process filters the raw clock signal coming from the
keyboard using a shift register and two AND gates
Clock_filter:
PROCESS
BEGIN