This document contains information about an electronics circuit analysis exam for a BTech program. It includes 8 potential exam questions covering various topics:
1. Feedback amplifiers and their characteristics.
2. Transistor amplifier configurations and analysis.
3. Oscillator circuits including phase shift and Colpitts oscillators.
4. Multistage amplifiers including coupling techniques and analysis.
5. Power amplifiers including classes A, B and efficiency calculations.
6. Transistor and FET amplifier analysis and equivalent circuits.
7. Frequency response characteristics and calculations.
8. Additional circuit analysis questions involving parameters like gain.
This document contains information about an electronics circuit analysis exam for a BTech program. It includes 8 potential exam questions covering various topics:
1. Feedback amplifiers and their characteristics.
2. Transistor amplifier configurations and analysis.
3. Oscillator circuits including phase shift and Colpitts oscillators.
4. Multistage amplifiers including coupling techniques and analysis.
5. Power amplifiers including classes A, B and efficiency calculations.
6. Transistor and FET amplifier analysis and equivalent circuits.
7. Frequency response characteristics and calculations.
8. Additional circuit analysis questions involving parameters like gain.
This document contains information about an electronics circuit analysis exam for a BTech program. It includes 8 potential exam questions covering various topics:
1. Feedback amplifiers and their characteristics.
2. Transistor amplifier configurations and analysis.
3. Oscillator circuits including phase shift and Colpitts oscillators.
4. Multistage amplifiers including coupling techniques and analysis.
5. Power amplifiers including classes A, B and efficiency calculations.
6. Transistor and FET amplifier analysis and equivalent circuits.
7. Frequency response characteristics and calculations.
8. Additional circuit analysis questions involving parameters like gain.
This document contains information about an electronics circuit analysis exam for a BTech program. It includes 8 potential exam questions covering various topics:
1. Feedback amplifiers and their characteristics.
2. Transistor amplifier configurations and analysis.
3. Oscillator circuits including phase shift and Colpitts oscillators.
4. Multistage amplifiers including coupling techniques and analysis.
5. Power amplifiers including classes A, B and efficiency calculations.
6. Transistor and FET amplifier analysis and equivalent circuits.
7. Frequency response characteristics and calculations.
8. Additional circuit analysis questions involving parameters like gain.
II B.Tech II Semester Examinations,Dec/Jan -2011/2012
ELECTRONIC CIRCUIT ANALYSIS Common to ICE, E.COMP.E, ETM, EIE, ECE Time: 3 hours Max Marks: 75 Answer any FIVE Questions All Questions carry equal marks ????? 1. (a) Draw the circuit of a voltage series feedback circuit and explain it. (b) What are the possible amplifiers circuits in any feedback system? Discuss. [8+7] 2. Obtain the expressions for the voltage gain in the low frequency, medium frequency and high frequency ranges in the case of single stage amplifier. [15] 3. (a) Give the two Barkhausen conditions required in order for sinusoidal oscillations to be sustained. (b) Draw the circuit diagram of RC phase - shift oscillator and derive the expression for frequency of Oscillations & condition for sustained Oscillations. [5+10] 4. (a) Consider an emitter follower and show that as Re Ri = hie +
1+hf e hoe
(b) State WhatMiller's is the theorem maximum of Rs for which Ro differs by no more than 10 andvalue its dual. percent of its value for RS = 0 the transistor parameters are hf e = 50, hie = 1.1k hre = 2.5104 , hoe = 24A/V. [7+8] 5. (a) Why two tuned circuits are used in double tuned amplifier? (b) What are the advantages of stagger tuned amplifier? (c) Why parallel resonance circuits are used in tuned amplifiers?
[5+5+5]
6. (a) Draw the FET amplifier equivalent circuit looking into the drain and find its gain & o/p impedance? (b) Starting with the definition of gm and rd , show that if two identical FETs are connected in parallel, gm is doubled and rd is halved since = rd gm , then remains unchanged. [8+7] 7. (a) Derive the expression for the bandwidth of multistage amplifier. (b) What are the problems of Direct coupled amplifiers? (c) Why RC coupling is popular? (d) Why transformer coupling is not used in the initial stage of a multistage amplifier? [5+3+3+4] 8. (a) A single ended class A power amplifier is coupled to an 8 load, using a transformer with a turn ratio of 5:1 with a 50V supply the transistor is biased to have a quiscent collector current of 250mA. When a sinusoidal signal is 1
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applied to the base, the collector voltage varies between a maximum of 5V and maximum of 90V. Estimate the efficiency, power output & second - harmonic distortion of this stage. (b) Discuss how rectification may takes place in a power amplifier? ?????
[8+7]
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Code No: R09220402
Set No. 4
II B.Tech II Semester Examinations,Dec/Jan -2011/2012
ELECTRONIC CIRCUIT ANALYSIS Common to ICE, E.COMP.E, ETM, EIE, ECE Time: 3 hours Max Marks: 75 Answer any FIVE Questions All Questions carry equal marks ????? 1. (a) In a colpitts oscillator, C1 = 0.2F and C2 = 0.04F. If the frequency of oscillation is 10KHz, find the value if Inductor. Also, find the required gain for oscillation. (b) Determine the frequency of oscillations in a wien bridge oscillator? [8+7] 2. (a) Explain the Principle of opeartion of direct coupled amplifier and mention its advantages. (b) What is the use of transformer coupling in the output stage of multi stage amplifier? (c) Why RC coupling is mostly used for voltage amplifier.
[8+4+3]
3. For the circuit shown in figure 1, show that
h
f (a) (AV S )max = hi ho h if RL = & RS = 0 r hf
(b) Ri =
hi ho hr hf ho
if RL =
[8+7]
Figure 1: 4. (a) Draw a feedback amplifier in block diagram form and explain each block giving its function.
(b) Distinguish between regenerative and degenerative feedback in amplifiers.[10+5]
5. (a) The hybrid - parameters of the transistor at room temperature & for Ic = 1.3 mA are gm = 50 mA/V, rb0 e = 1K, rbb0 = 100 , rb0 c = 4 M, rce = 80K, Cc = 3PF & Ce = 100 PF. Using Millers theorem and the approximate analysis compute the upper 3dB frequency of the current gain and magnitude of the voltage gain at that frequency.
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(b) Consider a single - stage CE transistor amplifier with the load resistance RL shunted by a capacitance CL . Prove that the internal voltage gain K is gm RL [8+7] K 1+j(C C +CL )RL
rbe
. shown in figure 2 FET parameters are
hre =of the circuit 6. (a) Find voltage a) theShow the gain r + r be voltage bc = 24, rd = 4K and also find gain if the output impedance of the signal b) Derive the equation for gain bandwidth product. source is 50K. c) Draw and explain a simplified high frequency model [5+5+5]
Figure 2: (b) Derive an expression for voltage gain of common drain configuration & give the expression for voltage of the amplifoer. [8+7] 7. (a) Compare neutralisation and unilaterlisation methods of tuned amplifiers. (b) What are the limitations of stagger tuned amplifiers? (c) What happen when no. of stages is increased in single tuned cascaded amplifiers? [5+5+5] 8. (a) Show that the maximum conversion efficiency of the idealized class B pus pull circuit is 78.5%. (b) For an ideal class B transistor amplifier the collector supply voltage Vcc and 1 2 the effective load resistance RL1 = ( N ) RL are fixed as the base current N2 excitation is varied. Show that the collector dissipation Pc is zero at no signal, rises as Vm increses and passes through a maximum at Vm = 2Vcc /. [8+7] ?????
Code No: R09220402
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Set No. 1
II B.Tech II Semester Examinations,Dec/Jan -2011/2012
ELECTRONIC CIRCUIT ANALYSIS Common to ICE, E.COMP.E, ETM, EIE, ECE Time: 3 hours Max Marks: 75 Answer any FIVE Questions All Questions carry equal marks ????? 1. (a) A transistor in CB circuit has the following set of h parameters. hib = 20, hf b = 0.98, hrb = 3104 , hob = 0.5106 . Find the values if Ri , Ro , Ai & Av if Rs = 600 and RL = 1.5 k. (b) Draw the CE amplifier with un by passed emitter resistance and derive expression for its Ri & Av ? [8+7] 2. (a) Draw the small signal high frequency equivalent circuit for the source follower and find its voltage gain input and outputimpedances? (b) The amplifier stage shown in figure 3 having IDSS = 1mA, VP = -1V. If the quiescent drain- to - ground voltage is 10V, find R1 ? [8+7]
Figure 3: 3. (a) A transistor amplifier in CE configuration is operating at high frequency with the following specifications: fT = 6 MHz, gm = 0.04 mhos, hf e = 50, rbb0 = 100, Rs = 500, CC = 10 pF, RL = 100. Compute the voltage gain, upper 3 dB cut off frequency and gain bandwidth product. (b) Define unity gain frequency. Obtain the necessary relation using transistor frequency response. [8+7] 4. (a) For the circuit shown in figure 4, find the Vf /Vo & the frequency of oscillations.
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Figure 4: (b) Draw the colpilts oscillator circuit and explain its working.
[8+7]
5. (a) How the frequency response of doubled tuned amplifier depends on degree of coupling between two tank circuits? (b) Why the reproducibility of signal is poor at high Q values?
[8+7]
6. (a) Explain the origin of crossover distortion. Describe a method to minimize this distortion. (b) The power transistor used in the class-B push-pull circuit with R2 = 0 and -Vcc = -20V and R1L = 15. If the base voltage is sinusoidal with a peak value of 0.4V. Plot the output collector current. [8+7] 7. (a) Derive the expression for current gain for Darligton pair. (b) With a neat sketch explain the principle of operation of cascode amplifier and also expressions for its performance measure. [7+8] 8. (a) Draw the equivalent circuit for a current amplifier and what are the values of Ri & Ro for ideal amplifier? (b) For the circuit shown in figure 5, prove that Avf =
Vo Vs
= RR
1+ RR
1
Ri +R0 R + Ri R0
.
[7+8]
Figure 5:
?????
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Set No. 3
II B.Tech II Semester Examinations,Dec/Jan -2011/2012
ELECTRONIC CIRCUIT ANALYSIS Common to ICE, E.COMP.E, ETM, EIE, ECE Time: 3 hours Max Marks: 75 Answer any FIVE Questions All Questions carry equal marks ????? 1. (a) The open loop gain of an amplifier is 100. What will be the overall gain when a negative feed back of 0.5 is applied to the amplifier? (b) What are the different mixing techniques used in any feed back system? Explain. (c) State the condition in terms of (1 + A) which a feed back amplifier must satisfy in order to be stable. [4+4+7] 2. (a) How the need of high input impedance can be fullfilted using two CC configuration? (b) Find the voltage gain AV S of the amplifier shown in figure 6. Assume hie =1k, hre =104 , hf e =50, hoe =104 A/V. [7+8]
1K
Figure 6: 3. (a) Derive the equation for the lower 3dB frequency of CE configuration. (b) Draw the hybrid- model of common emitter configuration and describe each component in the -model. [7+8] 7
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4. (a) What is class B amplifier? Why is it employed? Give its circuits, design equations, characteristics & limitations. (b) A transformer coupled class A large signal amplifier has maximum and minimum values of collector to emitter voltage of 25V and 2.5V. Determine its collector efficiency. [10+5] 5. (a) Draw the equivalent circuit of double tuned amplifier and derive the expression for gain at resonance. (b) Derive the expression for effective bandwidth of cascaded tuned amplifier. [8+7] 6. (a) Derive an expression for voltage gain of a common source FET amplifier with and without source resistance included in the circuit. (b) Calculate the voltage gain of the FET amplifier shown in the figure 7, assuming blocking capacitor to be large gm = 4 mA/V and rd = 5K. [8+7]
Figure 7: 7. (a) For a common Emitter configuration, what is the maximum value of RL for which Ri differs by not more than 10% of its value at RL = 0? (b) For the circuit shown in figure 8, estimate AV and Ri . Assume h1oe is large compared with load seen by the transistor. All capacitors have negiligible reactance at the test frequency, hie = 1k, hf e = 99, hre is negligible. [7+8] 8. Design a phase - shift oscillator to operate at a frequency of 5KHz. use a MOSFET with = 55 and rd = 5.5K. The phase - shift network is not to load down the amplifier. (a) Find the minimum value of the drain - circuit resistance for which the circuit will oscillate? (b) Choose reasonable value of R and find C. 8
