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PCI Express Form Factors

Electronics

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0% found this document useful (0 votes)
233 views71 pages

PCI Express Form Factors

Electronics

Uploaded by

razvan_n
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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PCI ExpressTM Form Factors:

Card, Mini Card and ExpressCard*


Chuck Stancil
Hewlett-Packard Company
Chair, PCI Express Electromechanical WG

Copyright 2004, PCI-SIG, All Rights Reserved

Agenda
Add-in Card
Review of add-in card basics
Whats new since the CEM 1.0a spec was released?

PCI Express Mini Card


Review of basics
Whats new

ExpressCard*
Summary
Call to Action
* Other names and brands may be claimed as the property of others.
others.
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

Add-in Card

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

Simple Add-in Card Design


Follows PCI Card form factors
Standard Height Cards, 4.20 (106.7mm)
Low Profile Cards, 2.536 (64.4mm)
Half Length Cards, 6.6 (167.65mm)
Full Length Cards, 12.283 (312mm)
Uses PCI I/O Bracket

PCI Express Is Optimized for Cost


PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

Add-in Card Size Exceptions


Standard height x1 cards are limited to halflength (6.6) for desktop applications
Push towards small form factor systems
10W power limit

For server I/O needs there is allowance for


a 25W, standard height x1 card that MUST
be greater or equal to 7.0 but less than or equal
to full length

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

Low Cost Edge Card


Connector
x1 connector 36 pins vs.
PCI 120 pins
Simple Single Level Contacts
1mm Contact Spacing
Low Cost Connector Assembly

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

Scalable Connector Design


Scalable Design
allows connectors
from x1 to x16 to be
easily designed

x1
x4
x8
Use same contacts
Modular body design
Use same connector
manufacturing process

PCI-SIG APAC Developers Conference

x16

Smaller link-width
cards can plug
into larger linkwidth connectors

Copyright 2004, PCI-SIG, All Rights Reserved

Slot Placement Strategy


X1 PCI Express

I/O Connectors

x16 PCI Express Graphics

PCI

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

Routing in 4-Layer
Motherboards
PCI
Connectors

PCI Express x1 connector


(4 times PCI performance)

PCI Express x16 connector


(64 times PCI performance)

PCI Express layout and


connectors can be routed
in 4 Layers
Flexibility in routing PCI
Express and PCI
connectors on the
same board
Smaller connectors
provide more room for
routing and components
ATX 4 Layer, P4 Motherboard
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

Power Delivery
Power Rail

10W slot

25W slot

75W slot

+3.3V 9%

3A max

3A max

3A max

+12V 8%

0.5A max

2.1A max

5.5A max

+3.3Vaux 9%

375mA max

375mA max

375mA max

Notes:
3.3Vaux max current is 375mA when the add-in card
is Wake enabled and 20mA when Wake disabled.
An ECR to the CEM 1.0 spec changed the maximum slot
power from 60W to 75W
Compared to PCI and AGP:
Additional power from 12v rail
+5V, -12V requirements are eliminated
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

10

Power Rules
System MUST provide +12V and +3.3V rails to ALL PCI
Express slots in a chassis
Systems may optionally provide +3.3Vaux but if supplied
it MUST be provided to all PCI Express slots in a chassis
If the platform supports the WAKE# signal then it MUST
provide it and +3.3Vaux to all PCI Express slots in
chassis
Capacitive load rules:
+12V rail: 300F @ 10W; 1000F @ 25W; 2000F @ 75W
+3.3V rail: 1000F
+3.3Vaux rail: 150F

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

11

Power Rules (Continued)


Current slew rate: 0.1A/s
All x1 add-in cards must power up at a maximum
of 10W; once configured as a High Power
device, if applicable, a card can consume up to
25W
All x16 add-in cards must power up at a
maximum of 25W; once configured as a High
Power device, if applicable, a graphics card can
consume up to 75W

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

12

Power & Card Summary


10W: x1 cards (= 6.6 length)
25W: x1 cards (> 7.0 length), x4 cards, x8
cards, x16 low-profile graphics cards, x16 server
I/O cards
75W: x16 full-height graphics cards

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

13

Add-in Card Interoperability


Slot
Card

x1

x4

x8

x16

x1

Required

Required

Required

Required

x4

No

Required

Allowed

Allowed

x8

No

No

Required

Allowed

x16

No

No

No

Required

Up-plugging: Plugging a smaller link card into a larger link connector


is fully allowed.
Down-plugging: Plugging a larger link card into a smaller link
connector is not allowed and is physically prevented.
Down-shifting: Plugging a card into a connector that is not fully
routed for all of the lanes. In general, this is not allowed. The
exception is the x8 connector which the system designer may
choose to route only the first four lanes. A x8 card functions as a x4
card in this scenario.
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

14

Reference Clock
(REFCLK+, REFCLK-)
Differential pair
Nominal frequency of 100MHz (300ppm)
Point-to-point connection between each PCI
Express connector and the clock source
Within each differential pair the PCB trace
lengths must be within 0.005
Spread Spectrum support is optional but likely
needed to pass emissions testing!
Termination resistors located at the clock source

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

15

Lane Reversal, Polarity Inversion


The plus and minus connections from the system boards
transmit differential pair (PETp/PETn) may be reversed
Simplification for board routing
Receiver is required to support Lane Polarity Inversion

If a component does NOT support lane reversal then the


board (system or add-in card) must adhere to strict
connection ordering (i.e. Lane 0 to Lane 0, Lane 1 to Lane
1, etc) to the add-in card connector
If a component DOES support lane reversal then the same
lane ordering must be used for both the transmit and
receive pair

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

16

CEM spec updates since Revision 1.0a

Card Presence Detect


REFCLK clarification
Slot Power Limit Implementation Note
Connector color
Card retention
PERST# clarification

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

17

Card Presence Detect


Supports the hot plug solution; ALL add-in cards must implement
both gold fingers, PRSNT1# and the furthest PRSNT2#
System use is optional for non-hot plug solutions
There are multiple PRSNT2# pins on the connector this is needed
to support up-plugging
System buses them together
Add-in card connects PRSNT1# to the FURTHEST PRSNT2#
pin on its connector
PCI Express CARD

Trace on the add-in card


(actual trace routing is left up to the board designer)

45
Gold fingers

MATE LAST/BREAK FIRST

PULL-UP

Baseboard
Connector
PRSNT1#

PRSNT2#
BASEBOARD

PCI-SIG APAC Developers Conference

Hot plug
To logic on controlle
r
board

Copyright 2004, PCI-SIG, All Rights Reserved

18

REFCLK clarification
The timing budget allows for approximately 4 of
add-in card trace length
Termination resistors on the add-in card ARE
allowed but
Not covered by the CEM spec!
The nominal voltage swing, and rise & fall times will
be reduced in half!

Consider shutting off the clock to empty slots!


Additional details on REFCLK measurement
configurations and data are being provided in
the CEM 1.0a Errata document
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

19

Slot Power Implementation Note


Software Update of the Slot Power Limit System firmware must update the slot power limit to the system's
allocated value for the PCI Express add-in card (e.g. Graphics) and
ensure the completion of this update prior to invoking the option
ROM for that add-in card's PCI Express function. If the initial slot
power limit value is set by hardware initialization then any attempt by
software to change that value must be verified by that software prior
to initializing the add-in card. Subsequent updates by the system
firmware or operating system software, if any, may only increase the
slot power limit value. However, after a card is reset the initial slot
power limit value may be lower than the previous value. The
maximum power level for an add-in card must be assigned by the
system firmware during PCI Express bus configuration. For graphics
the power level assigned will be dependent on the platforms support
of the PCI Express Graphics High-End Specification (including the
supplemental power cable).

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

20

Connector Color
CEM 1.0 did not suggest or specify a color for
the add-in card connector
Approved ECN addresses this
By default the recommended color should be
black
This color hasnt been used for an add-in card
connector since ISA was around)
Avoids any confusion with PCI connectors even
though PCI and PCI Express cards are mechanically
incompatible

Other colors ARE allowed if a system OEM


requires a particular color coding scheme
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

21

Card Retention
ECN defines additional component keepout areas on
add-in cards to support system-level card retention
Focus is on full-height, x16 cards for Graphics

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

22

PERST# Clarification
ECN defines threshold windows for PERST# activation
Voltage monitoring circuitry will be able to reliably detect
a power rail condition requiring the assertion of PERST#

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

23

Add-in Card Summary


PCI Express is Optimized for Cost
Cost-effective for migration into commodity
infrastructure
Replaces PCI over time with 15+ years of life

PCI Express is Easy to Implement


Leverages existing form factors and standards
Transition with existing PCI form factors

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

24

PCI Express Mini Card

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

25

What is PCI Express Mini Card


Replacement for Mini PCI
Targeted for BTO/CTO solutions

PCI Express and USB 2.0 enabled


Optimized for communication add-ins

Card envelope: 30mm x 56mm x 5mm


Equal to width of Mini PCI Type IIIa card

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

26

Communications Centric

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

27

Targeted Applications
Wireless-Personal Area Network (W-PAN)
Bluetooth / Ultra wideband

Local Area Network (LAN)


10/100/1G/10G Ethernet

Wireless-LAN (W-LAN)
802.11b/g/a, etc.

Wide Area Network (WAN)


V.90/V.92 modem / xDSL / cable modem

Wireless-WAN (W-WAN)
GSM/GPRS / UMTS / CDMA

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

28

Half the Size of Mini PCI

51
30

PCI Express Mini PCI


Mini Card (Type IIIa)
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

29

Upgradeability / Serviceability
Angled insertion and removal
OEM optimized retention
Internal clips / screws / door
attached clip

BTO / CTO
Single connector
Multiple technologies

Field replacement by service


technicians
Reduce TCO / services costs

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

30

Mechanical Summary (1)


Cross-section

Card outline dimensioning


PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

31

Mechanical Summary (2)

I/O connector zone


Keep out zones
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

32

Mechanical Summary (3)

System
board
footprint
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

Two socket
arrangement
defined

33

Signal Summary

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

34

Pin Arrangement
52 pin solution
Arranged to
assure isolation
USB
PCI
Express
AUX

REF
Clock
CLKREQ#

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

35

Power and Thermals

+3.3V (AUX)

3W MAX power
consumption

Power Density Uniform Loading


@80% coverage

2.3W MAX
thermal
dissipation
PCI-SIG APAC Developers Conference

Bottom Side (W/Sq. cm)

0.1
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
0.095

0.115

0.135

0.155

0.175

0.195

0.215

Top Side (W/Sq. cm)

Copyright 2004, PCI-SIG, All Rights Reserved

36

Designed for Power Efficiency


Robust power management features

ACPI and PCI PM supported


In-band wake mechanisms supported
Wake# enables lowest system power solution
SMBus available for advanced features

Dual power planes


3.3V nominal voltage required for I/O drive requirements
1.5V reduces need for on-card regulation

Two power states


PRIMARY 3.3V and 1.5V fully ON
AUXILIARY 3.3VAUX available in D3HOT
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

37

Status Indicators
Three LEDs
W-PAN
W-LAN
W-WAN

Single-ended,
9 mA sink
capable
LED support via
I/O connector
Still an option
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

38

Ease of Design
Digital / Analog physical separation
RF is not as near to digital
High speed digital on host connector
Analog on I/O connectors

Spread Spectrum Reference


clock supports

ANALOG

Reduced EMI emissions

Software compatibility

DIGITAL

Per native bus definitions


PCI Express
USB 2.0
SMBus 2.0
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

39

Mini Card Summary


Higher performance and smaller F/F
replacement for Mini PCI
Optimized for communications applications
IHVs can select the serial interface appropriate for
their device
Support for LED status indicators

Outstanding power management features

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

40

ExpressCard*

* Other names and brands may be claimed as the property of others.


others.
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

41

Agenda
The motivation behind ExpressCard
technology
Key characteristic details of ExpressCard
technology
Key design considerations
ExpressCard applications opportunities

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

42

The ExpressCard
ExpressCard** Standard
PCMCIAs next
generation PC Card
technology specification
Major step to align with
platform trends
Retains the best
characteristics of
CardBus
Leverages advanced
serial bus technologies

* Other names and brands may be claimed as the property of others.


others.
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

43

Platform shifts
present opportunities, drive requirements
I/O interconnect
smaller yet higher performance
lower cost by design

fast serial links


native hot-plug

Notebook PCs

smaller yet flexible

thinner and lighter

Desktop PCs
smaller, modular
form factors

technology reuse
lower cost by volume
address growing SFF market

Establishing
e
Establishingmodule
moduleproduct
productcompatibility
compatibilityacross
acrossdesktop
desktop&&mobil
mobile
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

44

Desktop View on ExpressCard


Significant ease-of-use benefit over traditional add-in cards
Closed box I/O expansion without clutter and complexity
Lower support costs compared to traditional add-in cards

Uses native interfaces


I/O plumbing is standard feature of the base platform
No external I/O controller or bridge is required

Advanced serial interfaces vs. existing parallel interfaces


Fewer pins and more bandwidth
Lower cost interconnects (connector, cables, silicon)

Leverage a larger combined desktop / mobile market


Draw on mobile platform proven usage model

SFF
SFFdesktop
desktopmarket
marketgrowing
growingestimates
estimatesrange
range
from
from20%
20%--40%
40%market
marketshare
shareby
by2005
2005
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

45

Architectural Overview
System design based on a modular, extensible slot
model
Assumes multiple slot solutions, single slots allowed

Relies on native bus operation


PCI Express Base Specification 1.0a
USB 2.0 (low / full / high speeds)

Compliant systems must support both in slots


Compatible with existing operating system
Future OS may offer non-essential enhancements

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

46

ExpressCard/34 Module Form-Factor

security
notch

34 mm

top

finger grip

75 mm
5 mm thick
connector
alignment
feature
bottom

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

47

ExpressCard/54 Module Form-Factor


34 mm
54 mm

top

75 mm
5 mm thick
53 mm

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

48

Building a Slot
Universal slot for
both modules

Slot for 34mm


modules only

Top Cover
Top Cover

Host Connector
Left Guide Rail

Host Connector
Left Guide Rail

Right Guide Rail


Host/Daughter Card
Right Guide Rail

PCB Insulator

Host/Daughter Card
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

49

ExpressCard Connectors
Beam-on-blade, single in-line
configuration, 1mm pitch
Low-cost yet reliable and durable
5K / 10K cycle rating for module
connectors
5K cycle rating for host connectors

Two-levels of contacts in module


module connector

host connector

blade

beam
system board
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

50

System Diagram
GROUND
PETp0

26
25

PETn0
GROUND
PERp0

24
23
22

PERn0
GROUND
REFCLK+

21
20
19

REFCLKCPPE#
CLKREQ#

18
17
16

+3.3V
+3.3V
PERST#

15
14
13

+3.3VAUX
WAKE#
+1.5V

12
11
10

+1.5V
SMB_DATA
SMB_CLK

9
8
7

RESERVED
RESERVED
CPUSB#

6
5
4

USBD+
USBD-

3
2

GROUND

Clock
Request

Ref
CLK

Wake
Request

System
Reset

PETp0
PETn0
PERp0
PERn0

3.3V

Power
Switch

3.3VAUX

Host
Chip
Set

1.5V

USBD+
USBDSMBus
Controller

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

51

System Diagram

Clock
Request

GROUND
PETp0

26
25

PETn0
GROUND
PERp0

24
23
22

PERn0
GROUND
REFCLK+

21
20
19

REFCLKCPPE#
CLKREQ#

18
17
16

ExpressCard
module

+3.3V
+3.3V
PERST#

15
14
13

using PCI Express

+3.3VAUX
WAKE#
+1.5V

12
11
10

+1.5V
SMB_DATA
SMB_CLK

9
8
7

RESERVED
RESERVED
CPUSB#

6
5
4

USBD+
USBD-

3
2

GROUND

Ref
CLK

Wake
Request

System
Reset

PETp0
PETn0
PERp0
PERn0

3.3V

Power
Switch

3.3VAUX

Host
Chip
Set

1.5V

USBD+
USBDSMBus
Controller

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

52

System Diagram

ExpressCard
ExpressCard
module
module
using PCI
Express*
using
USB

Clock
Request

GROUND
PETp0

26
25

PETn0
GROUND
PERp0

24
23
22

PERn0
GROUND
REFCLK+
REFCLK-

21
20
19

REFCLKCPPE#
CLKREQ#

18
17
16

+3.3V
+3.3V
PERST#

15
14

+3.3VAUX
WAKE#
+1.5V
+1.5V
SMB_DATA
SMB_CLK
SMB_CLK
RESERVED
RESERVED
RESERVED
RESERVED
CPUSB#
CPUSB#

Ref
CLK

Wake
Request

13
12
11

System
Reset

PETp0
PETn0
PERp0
PERn0

3.3V

Power
Switch

3.3VAUX

Host
Chip
Set

1.5V

10
9
8
7
6
5

USBD+
USBD+
USBDUSBD-

4
3
2

GROUND
GROUND

USBD+
USBDSMBus
Controller

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

53

Power & Thermal Requirements


Solution balances the needs of applications with
thermal constraints of size
Thermal limits defined for inside the slot dissipation
1.3W
thermal

Slot power ratings


Supply

+3.3V

+3.3VAUX

+1.5V

2.1W
thermal
PCI-SIG APAC Developers Conference

Limits

Notes

1000 mA Average 1
1300 mA Max2

OFF in D3

250 mA Average 1
325 mA Max2

ON in D0 D3 (with
wake enabled)

5 mA Average

D3 limit when wake


disabled

500 mA Average
650 mA Max

OFF in D3

1. Sum of +3.3V & +3.3VAUX averages may not exceed 1A


2. Sum of +3.3V & +3.3VAUX maximums may not exceed 1.75A
Copyright 2004, PCI-SIG, All Rights Reserved

54

System Configurations
Location of slots vary for desktop & mobile
Based on application and accessibility needs

Platform-independent recommendations
Support multiple slots in a platform
Single slot solutions seriously
limit usage flexibility

Provide at least one slot for


ExpressCard/54 modules
Supports CF adapters,
Smart Card adapters,
larger rotating-media
drives

PCI-SIG APAC Developers Conference

PC Card on
top universal
ExpressCard
slot on bottom

Copyright 2004, PCI-SIG, All Rights Reserved

Two single
slots

Universal
Slot

Two universal
Slots

55

System Desktop Concepts


OEM-specific
riser card

PCI Express
USB Cable Cable
Power
from
system
PSU

Cabled
daughter cards

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

56

Power to the Slot


GROUND
PETp0

26
25

PETn0
GROUND
PERp0

24
23
22

PERn0
GROUND
REFCLK+

21
20
19

REFCLKCPPE#
CLKREQ#

18
17
16

+3.3V
+3.3V
PERST#

15
14
13

+3.3VAUX
WAKE#
+1.5V

12
11
10

+1.5V
SMB_DATA
SMB_CLK

9
8
7

RESERVED
RESERVED
CPUSB#

6
5
4

USBD+
USBD-

3
2

GROUND

Slot is cold when un-occupied


Module presence pins dictate when
power is needed
System
Reset

No software needed

System in sleep state (S3/S4)

3.3V
3.3VAUX

1.5V

Special case after insertion, power to


module held off until after system
returns to S0

No 5V USB bus power


Replaced with regulated 3.3V (&
1.5V)
3.3V auxiliary current on
a separate pin
Replace regulator with
rail switching in designs

Simpler
Simplersolution
solutionno
nocontroller
controller/ /software
softwareconnection
connection
PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

57

Thermals
a matter of physics

Allowable
Temp Rise [C]
Power
Dissipation
Limit
[W]

Smaller cards means


less thermal capacity

Adjacent ExpressCard|34 Power Limit

ExpressCard/34 Power Limit*

1.8
1.6
1.4
1.2
1

0.8

Use PM aggressively to
reduce thermal
contribution

0.6
0.4
0.2
0
0

10

15
20
Power
Limit
[W]
Allowable Temperature

25

30

35

Rise [C]

* 65C still air environment assumed

High source power


provided for short-term
application needs
Duty-cycle/usage profile
determines long-term
contribution to the thermal
average

Thermal
modeling
module

FLAT HEAD SCREW


#0-80, 2X
TOP, COPPER 110

CONN
HEATER, 25.4mmX50.8mm

BOTTOM,COPPER 110

PCI-SIG APAC Developers Conference

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58

Power Management
Support for PM in modules is mandatory
Active State PM (PCI Express L0s & L1)
D3 support (PCI Express & USB 2.0)

Wakeup mechanisms
PCI Express
WAKE# sideband to wake system power
PME in-band messaging

USB
USB in-band wake signaling

PCI-SIG APAC Developers Conference

Copyright 2004, PCI-SIG, All Rights Reserved

59

Modules using both PCI Express


and USB in a single instance
Current bus driver stacks: no knowledge of physical
dependency
When a request is made to remove or stop a function: one
function will be knowingly removed, the other function will
suffer surprise removal

Use ACPI legacy solution


_EJD (Eject Dependencies) cross declarations in port
descriptions

Updated driver stacks future solution


Require serial numbers be implemented in the PCI Express
Extended Configuration Space
Reflect the PCI Express serial number in USB device
configuration space under a new string descriptor

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60

Ease-of-Use Considerations
Surprise insertion and removal
HW/SW tolerant of user actions

Module extraction from the slot


Spec targeted at manual removal over need for
ejector systems

Module installation is independent of which


interface used by the application
Proper marking and labeling techniques aids in
module insertion

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ExpressCard Compliance
Will be tied to ExpressCard
logo usage for registered
products
Proposed compliance program
Combination of checklist & interop testing
Requires use of silicon that meets PCI-SIG and USB-IF
silicon compliance programs

Co-sponsored SIG events to ease participation costs

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Application Opportunities
Transition existing applications from CardBus to
ExpressCard technology
Leverage the broad range of existing USB silicon

Introduce new applications


Enabled by PCI Express and USB
New desktop platform and consumer opportunities

Designed for adapters,


rotating media, higher
power applications
1.8 HD app

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Designed as long term


form factor, fit for smaller
next generation systems

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63

Target Applications
Performance1

Target Applications

2.0 Gbps
(full-duplex)

Wired & Wireless LAN


Broadband modems
Audio/Video Steaming
TV Tuners/Decoders
I/O Adapters (e.g. 1394a/b)
Magnetic Disk Drives

USB 2.0

1 Mbps
to
480 Mbps
(half-duplex)

Wired & Wireless WAN


Wireless PAN
Flash Memory
SFF Flash Card Adapters
Security
Legacy I/O (PS2, serial, parallel)
Optical Disk Drives
GPS Receiver

SMBus2

100 Kbps
(half-duplex)

Sideband system management

Interface

PCI Express

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nominal data throughput

Copyright 2004, PCI-SIG, All Rights Reserved

optional host feature


64

ExpressCard Timeline
CardBus

PC Card 16

1990

1995

2000

ExpressCard

200X

Planned for 2003-2004


Formal specification release complete!
Publish design collaterals in progress!
Compliance program begins in progress!
PCMCIA
PCMCIAparticipation
participation==developer
developersupport
supportand
andcompliance
complianceprogram
programaccess
access
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ExpressCard Summary
The ExpressCard Standard enables modular
card solutions for PCI Express and USB
ExpressCard technology is targeted for a wide
range of platforms including mobile and desktop
PCs
ExpressCard solutions will provide the best enduser experience for PC upgrades

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ExpressCard Next Steps


Module and system developers: join and
participate in the PCMCIA
www.expresscard.org

Silicon developers: design ingredients for


ExpressCard applications emphasizing low
power and power management features
Get ExpressCard technology included on your
2004 product roadmaps

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Summary
PCI Express functions will be available in a wide
variety of form factors serving multiple market
segments
Each form factor addresses the specific
physical, power, thermal and performance needs
of the markets they are intended to serve
Each form factor has a solid transition strategy
for end-users/customers

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Call to Action
Prepare your product roadmaps to
intercept the first launch of systems, cards, and
modules
Utilize the PCI-SIG (and other industry groups,
as appropriate) for specifications and support

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Thank you for attending the


2004 PCI-SIG Asia-Pacific
Developers Conference.
For more information please go to
www.pcisig.com
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