Computer Architecture
Spring 2015
Computer Architecture
Fundamentals of Quantitative Design and Analysis
Prof. Yong Ho Song
Professor Yong Ho Song
Computer Architecture
Computer Technology
Performance improvements
Improvements in semiconductor technology
Feature size, clock speed
Improvements in computer architectures
Enabled by HLL compilers, UNIX
Lead to RISC architectures (ILP, Cache)
Together have enabled:
Lightweight computers
Productivity-based managed/interpreted programming languages
Professor Yong Ho Song
Computer Architecture
Single Processor Performance
Move to multi-processor
RISC
Professor Yong Ho Song
Computer Architecture
Current Trends in Architecture
Cannot continue to leverage Instruction-Level
parallelism (ILP)
Single processor performance improvement ended in 2003
New models for performance:
Data-level parallelism (DLP)
Thread-level parallelism (TLP)
Request-level parallelism (RLP)
These require explicit restructuring of the application
A major new burden for programmers
Professor Yong Ho Song
Computer Architecture
Classes of Computers
Personal Mobile Device (PMD)
e.g. smart phones, tablet computers
Emphasis on energy efficiency and real-time
Desktop Computing
Emphasis on price-performance
Servers
Emphasis on availability, scalability, throughput
Professor Yong Ho Song
Computer Architecture
Classes of Computers
Clusters / Warehouse Scale Computers
Used for Software as a Service (SaaS)
Emphasis on availability and price-performance
Supercomputers
WSCs
Emphasis on floatingpoint performance
Running large,
communication-intensive
batch programs
Fast internal networks
Emphasis on interactive
applications
Large-scale storage,
dependability
High Internet bandwidth
Embedded Computers
Emphasis: price
Professor Yong Ho Song
Computer Architecture
Parallelism
Classes of parallelism in applications:
Data-Level Parallelism (DLP)
Task-Level Parallelism (TLP)
Classes of architectural parallelism:
Instruction-Level Parallelism (ILP)
Vector architectures/Graphic Processor Units (GPUs)
Thread-Level Parallelism
Request-Level Parallelism
Professor Yong Ho Song
Computer Architecture
Flynns Taxonomy
Single instruction stream, single data stream (SISD)
Single instruction stream, multiple data streams (SIMD)
Vector architectures
Multimedia extensions
Graphics processor units
Multiple instruction streams, single data stream (MISD)
No commercial implementation
Multiple instruction streams, multiple data streams (MIMD)
Tightly-coupled MIMD
Loosely-coupled MIMD
Professor Yong Ho Song
Computer Architecture
Defining Computer Architecture
Old view of computer architecture:
Instruction Set Architecture (ISA) design
i.e. decisions regarding:
registers, memory addressing, addressing modes, instruction
operands, available operations, control flow instructions, instruction
encoding
Real computer architecture:
Specific requirements of the target machine
Design to maximize performance within constraints: cost, power,
and availability
Includes ISA, microarchitecture, hardware
Professor Yong Ho Song
Computer Architecture
Trends in Technology
Integrated circuit technology
Transistor density: 35%/year
Die size: 10-20%/year
Integration overall: 40-55%/year
DRAM capacity: 25-40%/year (slowing)
Flash capacity: 50-60%/year
15-20X cheaper/bit than DRAM
Magnetic disk technology: 40%/year
15-25X cheaper/bit then Flash
300-500X cheaper/bit than DRAM
Professor Yong Ho Song
Computer Architecture
Bandwidth and Latency
Bandwidth or throughput
Total work done in a given time
10,000-25,000X improvement for processors
300-1200X improvement for memory and disks
Latency or response time
Time between start and completion of an event
30-80X improvement for processors
6-8X improvement for memory and disks
Professor Yong Ho Song
Computer Architecture
Bandwidth and Latency
Log-log plot of bandwidth and latency milestones
Professor Yong Ho Song
Computer Architecture
Transistors and Wires
Feature size
Minimum size of transistor or wire in x or y dimension
10 microns in 1971 to .032 microns in 2011
Transistor performance scales linearly
Wire delay does not improve with feature size!
Integration density scales quadratically
Professor Yong Ho Song
Computer Architecture
Power and Energy
Problem: Get power in, get power out
Thermal Design Power (TDP)
Characterizes sustained power consumption
Used as target for power supply and cooling system
Lower than peak power, higher than average power consumption
Clock rate can be reduced dynamically to limit power
consumption
Energy per task is often a better measurement
Professor Yong Ho Song
Computer Architecture
Dynamic Energy and Power
Dynamic energy
Transistor switch from 0 1 or 1 0
x Capacitive load x Voltage2
Dynamic power
x Capacitive load x Voltage2 x Frequency switched
Reducing clock rate reduces power, not energy
Professor Yong Ho Song
Computer Architecture
Power
Intel 80386 consumed ~ 2 W
3.3 GHz Intel Core i7 consumes 130 W
Heat must be dissipated from 1.5 x 1.5 cm chip
This is the limit of what can be cooled by air
Professor Yong Ho Song
Computer Architecture
Reducing Power
Techniques for reducing power:
Do nothing well
Dynamic Voltage-Frequency Scaling (see figure)
Low power state for DRAM, disks
Temporary Overclocking, turning off cores
Professor Yong Ho Song
Computer Architecture
Static Power
Static power consumption
Currentstatic x Voltage
Scales with number of transistors
To reduce: power gating
Professor Yong Ho Song
Computer Architecture
Trends in Cost
Learning curve
Manufacturing costs decrease over time
Cost driven down by learning curve
Measured by Yield (% survival)
DRAM: price closely tracks cost
Microprocessors: price depends on cost & volume
10% less for each doubling of volume
Professor Yong Ho Song
Computer Architecture
Integrated Circuit Cost
Integrated circuit
Bose-Einstein formula:
Defects per unit area = 0.016-0.057 defects per square cm
(2010)
N = process-complexity factor = 11.5-15.5 (40 nm, 2010)
Professor Yong Ho Song
Computer Architecture
Dependability
Module reliability
Mean time to failure (MTTF)
Mean time to repair (MTTR)
Mean time between failures (MTBF) = MTTF + MTTR
Module availability = MTTF / MTBF
Professor Yong Ho Song
Computer Architecture
Measuring Performance
Typical performance metrics:
Response time
Throughput
Speedup of X relative to Y
Execution timeY / Execution timeX
Execution time
Wall clock time: includes all system overheads
CPU time: only computation time
Professor Yong Ho Song
Computer Architecture
Measuring Performance
Benchmarks
Kernels (e.g. matrix multiply)
Toy programs (e.g. sorting)
100-line programs from beginning programming assignments
Synthetic benchmarks (e.g. Dhrystone)
small, key pieces of real applications
fake programs invented to try to match the profile and behavior of
real applications
Benchmark suites (e.g. EEMBC, SPEC2006, TPC-C)
Characterize the relative performance of two computers
Professor Yong Ho Song
Computer Architecture
Principles of Computer Design
Take Advantage of Parallelism
Principle of Locality
e.g. multiple processors, disks, memory banks, pipelining,
multiple functional units
Reuse of data and instructions
Focus on the Common Case
Amdahls Law
Professor Yong Ho Song
Computer Architecture
Principles of Computer Design
The Processor Performance Equation
Professor Yong Ho Song
Computer Architecture
Principles of Computer Design
Different instruction types having different CPIs
Professor Yong Ho Song
Computer Architecture
End of Chapter
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Professor Yong Ho Song
