Band Gap
Band Gap
Band Gap
1 of 16
Bandgap reference
As shown in the diagram there are two voltage sources, one generated across a diode
junction ie VBE (eg the base-emitter junction on a bipolar transistor) and the other a thermal
voltage Vt.
Thus if multiply Vt by a constant K and combine with VBE it is possible to cancel the
temperature effects of each voltage source to leave a stable reference voltage VREF ie
VDD VDD
Sum
K
VBE Vref
Vt K.Vt
DC
DC
DC1
SweepVar="Tc"
BJT_Model
Start=-55
BJTM1
Stop=155
NPN=yes
Step=1
Vje=0.7
BJT_NPN I_DC
BJT2 Var
Eqn
VAR SRC1
Model=BJTM1 VAR1 Idc=100 uA
Vbe
Area=8 Tc=23
Temp=Tc
Figure 2 ADS simulation setup to determine the temperature dependence of Vbe. The
temperature variable of the BJT model Tc is sweep by the DC simulation from –55 to
155 degrees C.
Tcoeff
-1.7966 in mV
m1
800
700
m2
m1 Tc=155.000
600 Tc=-55.000 Vbe=418.3mV
Vbe=795.6mV
Vbe, mV
500
m2
400
-60 -40 -20 0 20 40 60 80 100 120 140 160
Tc
Eqn Tcoeff=1E3*(Vbe[210]-Vbe[0])/(Tc[210]-Tc[0])
We can simulate the temperature effect of VBE by using the ADS simulation shown in Figure
2. In this simulation the temperature parameter of the generic spice BJT model (TC) is sweep
by the DC simulation from –55 to 155 degrees C.
The resulting plot of Vbe vs temperature is shown in Figure 3. An equation has been added to
calculate the temperature coefficient by taking the first and last data points [0] and [210] to
calculate the slope of the graph.
⎛
⎜ VBE ⎞
⎟
⎜ ⎟
⎜⎜ Vt ⎟⎟
Ic = Is .exp ⎝ ⎠
Where
kT
Vt = Thermal Voltage given by Where Vt =
q
q = charge on electron = 1.602 x 10 -19 C
K = Boltzmanns constant = 1.3807 x 10 -23 J.K - 1
2
IS ∝ µ.K.T.n i - (1)
Where
2
n i = Intrinsic carrier concentrat ion in Silicon (1.5x10 10 cm -3 )
µ = Mobility of minority carriers
3
µ ∝ µ O .T m Where m ≈ - - (2)
2
2 ⎡ - Eg ⎤
n i ∝ T 3 .exp ⎢ ⎥ - (3) Where Eg = bandgap voltage = 1.12eV for silicon
⎣ K.T ⎦
Sheet
4 of 16
⎡ - Eg ⎤ ⎡ - Eg ⎤
IS ∝ µ O .T m .K.T.T 3 .exp ⎢ ⎥ = A.T 4 +m .exp ⎢ ⎥ Where constant A includes µ O .K
⎣ K.T ⎦ ⎣ K.T ⎦
⎛ Ic ⎞
VBE = VT .Ln⎜ ⎟
⎝ Is ⎠
∂VBE ⎛ Ic ⎞ ∂VT ⎛ Ic ⎞
of V T .Ln⎜ ⎟ .Ln⎜ ⎟
∂T ⎝ Is ⎠ ∂T ⎝ Is ⎠
1 ∂y
As Ln.ax =
x ∂x
⎡ - Eg ⎤ dy
IS = A.T 4 + m .exp ⎢ ⎥ Use ax n = anx n − 1.
⎣ K.T ⎦ dx
∂Is ⎡ - Eg ⎤ ⎡ - Eg ⎤ ⎡ - Eg ⎤
= (4 + m )A..T 3 + m .exp ⎢ ⎥ + A.T 4 + m .exp ⎢ ⎥ .⎢ 2 ⎥
∂T ⎣ K.T ⎦ ⎣ K.T ⎦ ⎣ K.T ⎦
⎡ - Eg ⎤ ⎡ - Eg ⎤ ⎡ - Eg ⎤
VT (4 + m )A.T 3 + m .exp ⎢ ⎥ VT A.T 4 + m .exp ⎢ .
VT ∂Is ⎣ K.T ⎦ ⎣ K.T ⎥⎦ ⎢⎣ K.T 2 ⎥⎦
. = +
IS ∂T ⎡ - Eg ⎤ ⎡ - Eg ⎤
A.T 4 + m .exp ⎢ ⎥ A.T 4 + m .exp ⎢ ⎥
⎣ K.T ⎦ ⎣ K.T ⎦
VT ∂Is V (4 + m ) ⎡ - Eg ⎤
. = T + VT ⎢ 2 ⎥
IS ∂T T ⎣ K.T ⎦
Sheet
5 of 16
VT ⎛ Ic ⎞ V (4 + m) ⎡ - Eg ⎤ ⎛ Ic ⎞ kT
= .Ln⎜ ⎟ + T + VT ⎢ 2⎥
VBE = VT .Ln⎜ ⎟ & Vt =
T ⎝ Is ⎠ T ⎣ K.T ⎦ ⎝ Is ⎠ q
∂VBE V V (4 + m) kT ⎡ - Eg ⎤ VBE VT (4 + m) 1 ⎡ - Eg ⎤
= BE + T + = + + ⎢
∂T T T q ⎢⎣ K.T 2 ⎥⎦ T T q ⎣ T ⎥⎦
Evaluation of dVBE/dT
3
Where Eq = Bandgap voltage (for silicon = 1.12eV) & m = -
2
and
K = Boltzmanns constant = 1.3807 x 10 - 23 J.K - 1
q = charge on electron = 1.602 x 10 -19 C
2
⎛I ⎞ q.A.n i .Dn
VBE = Vt.Ln ⎜⎜ E ⎟⎟ Where IS = Typical values are 10 -14 to 10 -16 A
⎝ IS ⎠ QB
Where
QB = W B .N A is the number of doping atoms in the base per unit area of the emitter.
(for 0.8um process NA = 3x10 16 for p - type device); W B = base width.
Dn = The average effective value for the electron diffusion constant in the base.
(Typically = 13cm 2 s -1 ).
2
n i = Intrinsic carrier concentrat ion in Silicon (1.5x10 10
cm -3 )
A = Base - Emitter area.
Sheet
6 of 16
To find a typical value for Vbe and ∆Vbe assume IE = 50uA, A = 1um 2
then
2
⎛I ⎞ q.A.n i .Dn
VBE = Vt.Ln ⎜⎜ E ⎟⎟ Where IS =
⎝ IS ⎠ QB
Is ≈
( )
2
1.602x10 -19 .1x10 -6. 1.5x10 10 .0.013
= 1.562x10 -17
A
3x10 10
⎛ 50x10 - 6 ⎞
VBE = 2 5 .8 x10 − 3.Ln ⎜⎜ -17
⎟⎟ = 0.743V
⎝ 1.562x10 ⎠
Eq
VBE - (4 + m)VT −
∂VBE q
=
∂T T
3
Where Eq = Bandgap voltage (for silicon = 1.12eV) & m = -
2
⎛ 3⎞
0.743 - ⎜ 4 - ⎟25.8 x10 −3 − 1.11
∂VBE ⎝ 2⎠
= = - 1.44mV/ oK
∂T 300
Sheet
7 of 16
VPTAT generation
The PTAT term is realised by determining the voltage difference between two forward-biased
diodes (eg VBE). MOS transistors operating in the weak inversion region can also be used to
form the diodes.
VDD
V02
VBE
V01
R
Area = A Q1 VR
Area = nA
Q2
We can simulate the variation VPTAT over temperature using the ADS simulation shown in
Figure 5.
If we run the same simulation again but this time on the results graph we calculate Vref given
that we know vbe1 and (vbe1-vbe2). Various values of K were tried until the temperature
compensation was achieved as shown in the graph of Figure 7. This now forms the basis of
the band-gap reference in a practical circuit the voltage summing and setting of K is achieved
using a resistive network and an op-amp.
Sheet
8 of 16
I_DC I_DC
SRC1 SRC2
Idc=100 uA Idc=100 uA
BJT_Model
BJTM1
NPN=yes
Vje=0.7
BJT_NPN BJT_NPN
BJT2 BJT3
DC Model=BJTM1 R Model=BJTM1
Area=1 R1 Area=2
DC Temp=Tc R=1 kOhm Temp=Tc
DC1
SweepVar="Tc"
Start=-55
Stop=155 Vbe1 Vbe2
Step=1
Var
Eqn VAR
VAR1
Tc=23
Figure 5 ADS simulation setup to analyse the variation of VPTAT over temperature. As
for the previous examples the temperature is swept in the DC simulation box. The
resulting plot is shown in Figure 6.
Sheet
9 of 16
Eqn VTAT=Vbe1-Vbe2
m1
0.026
0.024
m2
0.022 Tc=-55.000
VTAT 0.020 VTAT=0.013
0.018 m1
Tc=155.000
0.016
VTAT=0.026
0.014
m2
0.012
-60 -40 -20 0 20 40 60 80 100 120 140 160
Tc
VTAT_Temp
0.060 mV
Eqn VTAT_Temp=1e3*(VTAT[210]-VTAT[0])/(Tc[210]-Tc[0])
.
Sheet
10 of 16
Figure 4 shows how the VPTAT voltage can be realised. If we force V01 and V02 to be the
same then the voltage across the resistor R will be the difference of the two VBE’s.
⎛ q.VBE ⎞ ⎛ q.VBE ⎞
IE = A.JS e kT − 1 ≈ A.JS ⎜ e kT ⎟ When IE > 0
⎜ ⎟
⎜ ⎟ ⎜ ⎟
⎝ ⎠ ⎝ ⎠
VBE1- VBE2
IE2 ⎛ A2.JS ⎞ kT
=⎜ ⎟e vt
Where vt =
IE1 ⎜⎝ A1.JS ⎟⎠ q
VBE1- VBE2
⎛ I ⎞⎛ A ⎞ ⎛ A ⎞
e vt
= ⎜⎜ E2 ⎟⎟⎜⎜ 1 ⎟⎟ = ⎜⎜ 1 ⎟⎟ If IE1 = IE2
⎝ IE1 ⎠⎝ A2 ⎠ ⎝ A2 ⎠
VBE1- VBE2
⎛A ⎞ ⎛A ⎞
e vt
= ⎜⎜ 1 ⎟⎟ Rearrange to give VBE1 - VBE2 = vt.Ln⎜⎜ 1 ⎟⎟
⎝ A2 ⎠ ⎝ A2 ⎠
⎛A ⎞
If A 1 > A 2 then VBE2 - VBE1 = Vt.Ln⎜⎜ 1 ⎟⎟ = ∆Vbe = IE1.R1 (IE1 = IE2 )
⎝ A2 ⎠
⎛A ⎞ KT
Let n = ⎜⎜ 1 ⎟⎟ and VT =
⎝ A2 ⎠ q
KT ∂∆Vbe K dy
∴ ∆Vbe = .Ln(n) ∴ = .Ln(n) Using ax n = anx n − 1.
q ∂T q dx
Where
1.191
1.190
1.189
1.188
Vref
1.187
1.186
1.185
-60 -40 -20 0 20 40 60 80 100 120 140 160
Tc
Figure 7 Graph of the simulation shown in Figure 5. In this case we have calculated
VTAT ie vbe1-vbe2 and evaluated Vref from Vbe1+(K*VPTAT), where K = 27.
KT ⎛ JC1 ⎞ KT ⎛ A 1 ⎞
Previously we found ∆Vbe = VBE1 - VBE2 = Ln⎜⎜ ⎟⎟ = Ln⎜⎜ ⎟⎟
q ⎝ JC2 ⎠ q ⎝ A2 ⎠
∂∆Vbe VT ⎛ JC1 ⎞
and therefore = Ln⎜⎜ ⎟⎟
∂T T ⎝ JC2 ⎠
∂VBE VBE VT (4 + m) 1 ⎡ - Eg ⎤
= + + ⎢ ⎥ = - 1.44mV/ oK
∂T T T q⎣ T ⎦
Sheet
12 of 16
The temperature stable value of VREF at 300˚K is 1.262V. Therefore the value of K required is:
VREF − VBE
K= With VBE = 0.743 (Calculated earlier)
VT
KT 1.3807 x 10 -23.300
VT = = = 25.8mV
q 1.602 x 10 -19
1.262 − 0.743
K= = 20.11
25.8x10 -3
⎛A ⎞ A
The voltage across R = ∆Vbe = VBE2 - VBE1 = Vt.Ln⎜⎜ 1 ⎟⎟ Let N = 1
⎝ A2 ⎠ A2
Vt
and so I2 = .Ln(N) = I1 = I3
R
Vt
VOUT = I3 .K.R + VBE3 As I3 = I2 sub in I3 = .Ln(N)
R
Vt
VOUT = .Ln(N) .K.R + VBE3
R
KT 1.38x10-23.(273 + 23))
vt = = = 0.025V
q 1.602x10 −19
⎛ A1 ⎞ ⎛8⎞
Vt.Ln⎜ ⎟ (0.025).Ln⎜ ⎟
∆Vbe ⎝ A2 ⎠ = ⎝ 1 ⎠ = 52uA at 23 o C
I2 = = 3
R1 R1 1x10
⎛ A1 ⎞ ⎛8⎞
With ∆ ∆V = Vt.Ln⎜ ⎟ = (0.025).Ln⎜ ⎟ = 0.0536V
⎝ A2 ⎠ ⎝ 1⎠
∴K.R = 10.45KΩ
Sheet
14 of 16
VDD
M7 M8
M9
M5 M6
M10
M3 M4
Vref
M1 M2
R K.R
IE1
Vt
IE2
X Q3
Q2
Q1
X.N X.N
VEE
The Bandgap circuit of Figure 8 was entered as a schematic into ADS as shown in figure and
analysed using a DC simulation block. For the simulation, the Temperature variable was
added to the active devices and resistor and the resistor initially set to 10K was varied until
the correct compensated curve resulted.
MOSFET_PMOS MOSFET_PMOS
MOSFET_PMOS
MOSFET4 MOSFET9
MOSFET2
Model=MOSFETM2 Model=MOSFETM2
Model=MOSFETM2
V_DC Length=L um Length=L um
Length=L um
VDD Width=2.2*W um Width=2.2*W um
Width=2.2*W um
Vdc=VDD Temp=T Temp=T
Temp=T
MOSFET_PMOS MOSFET_PMOS
MOSFET7 MOSFET10
Model=MOSFETM2 MOSFET_PMOS Model=MOSFETM2
Length=L um MOSFET8 Length=L um
Width=2.2*W um Model=MOSFETM2 Width=2.2*W um
Temp=T Length=L um Temp=T
Width=2.2*W um
DC Temp=T
MOSFET_NMOS
DC MOSFET5
DC1 Model=MOSFETM1 vout
SweepVar="T" Length=L um
Start=-50 Width=W um MOSFET_NMOS
BJT_Model
Stop=125 Temp=T MOSFET3 BJTM1
Step=1 Model=MOSFETM1 NPN=no
Length=L um
Vje=0.7
Width=W um
Temp=T
MOSFET_NMOS
MOSFET1
Model=MOSFETM1
Length=L um
LEVEL1_Model MOSFET_NMOS Width=W um
LEVEL1_Model
MOSFETM1 MOSFET6
Var
Eqn
VAR Temp=T
MOSFETM2
NMOS=yes Model=MOSFETM1 VAR1
PMOS=yes
Vto=0.7 Length=L um L=1.0
Vto=-0.7
Kp=110e-6 Width=W um T=23
Kp=50e-6
Gamma=0.4 Temp=T VDD=7.5
Gamma=0.57
Phi=0.7 W=1.0 R R Phi=0.8
Lambda=0.04 R6 R7 Lambda=0.04
Cgso=220e-12 R=1 kOhm R=9 kOhm
BJT_PNP BJT_PNP Cgso=220e-12
Cgdo=220e-12 vbe Temp=T
BJT2 BJT_PNP BJT3 Cgdo=220e-12
Cgbo=700E-12
Model=BJTM1 BJT1 Model=BJTM1 Cgbo=700E-12
Cj=770e-12
Area=1 Model=BJTM1 Area=10 Cj=560e-12
Mj=0.5
Region= Area=10 Region= Mj=0.5
Cjsw=380e-12
Temp=T Region= Temp=T Cjsw=350e-12
Mjsw=0.38
Trise= Temp=T Trise= Mjsw=0.35
Tox=24.7e-4
Mode=nonlinear Trise= Mode=nonlinear Tox=24.7e-4
Mode=nonlinear
Figure 9 ADS schematic setup for analysing the bandgap example circuit. R7 was
initially set to 10K (as per the hand calculations) and then varied to optimise the
bandgap voltage vs temperature curve shown in Figure 10
Sheet
16 of 16
vout, V
1.170
1.168
1.166
1.164
1.162
-60 -40 -20 0 20 40 60 80 100 120 140
T
Figure 10 Resulting plot from the simulation shown in Figure 8. For this simulation the
temperature parameter for the active devices and resistor was varied over the
temperature range –50 to 125 deg C using the parameter sweep within the DC
simulation block.
One disadvantage of the example circuit is the headroom required on the supply rails. This is
because there are 4 VSAT+VT and a Vbe, resulting in the need to raise the supply from the
nominal +5V to +7.5V. Lower rail circuits tend to use low supply differential op-amp circuits.