New Developments for Circuit Design: Synthesis, Modeling, Simulation, and Applications

Topic Information

Dear Colleagues,

This Topic will present New Developments for Circuit Design: Synthesis, Modeling, Simulation, and Applications. These developments include modeling, simulation, and synthesis for Analog, Mixed-signal, RF (AMS/RF), and multi-domain (nanoelectronics, biological, MEMS, optoelectronics, etc.) integrated circuits and systems, as well as, emerging technologies and applications. Open-source tools and methods for IC design and experiences with modeling, simulation, and synthesis techniques in diverse application areas are also welcomed. Objective technologies include CMOS, beyond CMOS, and More-than-Moore such as MEMs, power devices, sensors, passives, etc.

This topic seeks to publish original reviews, original articles or communications. We encourage submissions of manuscripts focusing on, but not limited to, current research, novel concepts, technologies and approaches in basic and advanced aspects of Circuit Design.

1. CAD and EDA methodologies and tools for AMS systems (CAD/EDA)

Synthesis, Sizing and Optimization

• Multi-level Synthesis Methods
• Physical Synthesis Methods
• High-frequency Circuits and Systems Design
• Low-Power and Energy-Aware Design
• Parasitic-Aware Design
• Variability-aware & Reliability-Aware Design
• Sizing and Optimization Methods
• Procedural Design Methods

Modeling

• Performance Modeling
• Power and Electro-thermal Modeling
• Reliability and Variability Modeling
• RF/microwave/mm-wave Modeling
• Model Order Reduction
• Modeling for Signal Integrity / Power Integrity
• Electromagnetic Compatibility and Signal Integrity
• Electromagnetic Theory and Modeling
• Transmission Line Theory and Modeling
• Automated Model Generation

Simulation, Verification and Test

• Behavioral Simulation
• Numerical and Symbolic Simulation Methods
• RF Circuit Simulation Methods
• Multilevel Simulation Techniques
• Analysis of Variability Effects
• Simulation for Signal Integrity/Power Integrity
• Formal and Functional Verification
• Functional Safety
• Test and Design-for-Test Techniques

2. Emerging technologies and applications (ETA)

CAD for/using Emerging Technologies

• CAD for Bio-Electronic Devices, Bio-Sensors
• CAD for Multi-Domain Devices and Circuits
• CAD for Nanophotonics and Optical Devices / Interconnects
• CAD using AI and ML Algorithms
• CAD using Cloud Computing
• AMS CAS Soft and Hard IP Blocks Generating Methodologies

Emerging Devices and Paradigms

• Emerging Device Modeling (Steep-Slope, TFET, NCFET, PTM, Memristor)
• Design Strategies using Emerging Devices
• Emerging Devices in Security
• Devices, Hardware and Methods for Bio-Inspired and Neuromorphic Computing

Hardware Security

• Hardware Security primitives (PUFs, RNGs, ...)
• Attacks and Countermeasures
• Anticounterfeiting
• Methods, Architectures and Tools for Secure Design

3. AMS ICs and multi-domain design applications (DES)

Design Applications

• Internet of Everything
• Automotive Systems
• Biomedical and Bio-inspired CAS
• Low-Power Low Voltage CAS
• Sensors and Sensing Systems
• Security Systems
• Aerospace Systems
• Renewable Energy Systems

Dr. Nestor Evmorfopoulos
Prof. Dr. Alkiviadis Hatzopoulos
Prof. Dr. George I. Stamoulis
Topic Editors

Keywords

Participating Journals

Journal Name	Impact Factor	CiteScore	Launched Year	First Decision (median)	APC
Automation automation	-	2.9	2020	20.6 Days	CHF 1000	Submit
Electronics electronics	2.6	5.3	2012	16.8 Days	CHF 2400	Submit
Eng eng	-	2.1	2020	28.3 Days	CHF 1200	Submit
Hardware hardware	-	-	2023	15.0 days *	CHF 1000	Submit
Micromachines micromachines	3.0	5.2	2010	17.7 Days	CHF 2600	Submit
Signals signals	-	3.2	2020	26.1 Days	CHF 1000	Submit

* Median value for all MDPI journals in the first half of 2024.

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Published Papers (5 papers)

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All Automation Electronics Eng Hardware Micromachines Signals

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15 pages, 3105 KiB  

Open AccessArticle

Temperature Characteristics Modeling for GaN PA Based on PSO-ELM

by Qian Lin and Meiqian Wang

Micromachines 2024, 15(8), 1008; https://doi.org/10.3390/mi15081008 - 5 Aug 2024

Viewed by 347

Abstract

In order to solve the performance prediction and design optimization of power amplifiers (PAs), the performance parameters of Gallium Nitride high-electron-mobility transistor (GaN HEMT) PAs at different temperatures are modeled based on the particle swarm optimization–extreme learning machine (PSO-ELM) and extreme learning machine [...] Read more.

In order to solve the performance prediction and design optimization of power amplifiers (PAs), the performance parameters of Gallium Nitride high-electron-mobility transistor (GaN HEMT) PAs at different temperatures are modeled based on the particle swarm optimization–extreme learning machine (PSO-ELM) and extreme learning machine (ELM) in this paper. Then, it can be seen that the prediction accuracy of the PSO-ELM model is superior to that of ELM with a minimum mean square error (MSE) of 0.0006, which indicates the PSO-ELM model has a stronger generalization ability when dealing with the nonlinear relationship between temperature and PA performance. Therefore, this investigation can provide vital theoretical support for the performance optimization of PA design. Full article

(This article belongs to the Topic New Developments for Circuit Design: Synthesis, Modeling, Simulation, and Applications)

►▼ Show Figures

Figure 1

Figure 1
<p>Physical photograph of the GaN PA.</p> Full article ">Figure 2
<p>Basic structure of ELM for GaN PA.</p> Full article ">Figure 3
<p>Modeling flowchart of ELM model for GaN PA.</p> Full article ">Figure 4
<p>Modeling flowchart of PSO-ELM for GaN PA performance.</p> Full article ">Figure 5
<p>Prediction model based on ELM for GaN PA performance.</p> Full article ">Figure 6
<p>Prediction results of S-parameters based on ELM for GaN PA. (<b>a</b>) S₁₁. (<b>b</b>) S₂₁. (<b>c</b>) S₂₂.</p> Full article ">Figure 6 Cont.
<p>Prediction results of S-parameters based on ELM for GaN PA. (<b>a</b>) S₁₁. (<b>b</b>) S₂₁. (<b>c</b>) S₂₂.</p> Full article ">Figure 7
<p>Prediction results of Pout based on ELM for GaN PA.</p> Full article ">Figure 8
<p>Prediction results of Gain based on ELM for GaN PA.</p> Full article ">Figure 9
<p>Prediction results of S-parameters based on PSO-ELM for GaN PA. (<b>a</b>) S₁₁. (<b>b</b>) S₂₁. (<b>c</b>) S₂₂.</p> Full article ">Figure 9 Cont.
<p>Prediction results of S-parameters based on PSO-ELM for GaN PA. (<b>a</b>) S₁₁. (<b>b</b>) S₂₁. (<b>c</b>) S₂₂.</p> Full article ">Figure 10
<p>Prediction results of Pout based on PSO-ELM for GaN PA.</p> Full article ">Figure 11
<p>Prediction results of Gain based on PSO-ELM for GaN PA.</p> Full article ">

8 pages, 4241 KiB  

Open AccessArticle

Design of X-Band Circulator and Isolator for High-Peak-Power Applications

by Tao Tang, Xiexun Zhang, Maged A. Aldhaeebi and Thamer S. Almoneef

Micromachines 2024, 15(7), 916; https://doi.org/10.3390/mi15070916 - 16 Jul 2024

Viewed by 519

Abstract

This paper presents a design of a X-band circulator–isolator for handling high-peak-power applications. The device consists of two cascade-connected ferrite circulators, with one dedicated to transmission and the other to small-signal reception coupled with high-power signal isolation. To improve the power capacity, a [...] Read more.

This paper presents a design of a X-band circulator–isolator for handling high-peak-power applications. The device consists of two cascade-connected ferrite circulators, with one dedicated to transmission and the other to small-signal reception coupled with high-power signal isolation. To improve the power capacity, a layer of poly-tetra fluoroethylene (PTFE) film is placed above and below the circulator’s and the isolator’s center conductors. Measurement results show that the device is capable of withstanding a peak power of 7000 W, with an insertion loss of <0.3 dB at the transmitting port. Similarly, it sustains a peak power of 6000 W with an insertion loss of <0.5 dB at the reception port. Moreover, the proposed design achieved isolation between the transmitting and receiving ends of >20 dB with a VSWR < 1.2 at each port. Thermal analysis shows that the maximum relative ambient temperature rise is 15.11 ${ }^{\circ }$C. These findings show that the proposed device achieves low-loss transmission of high-peak-power signals in the transmit channel and reverse isolation of high-peak-power signals in the receive channel. Full article

(This article belongs to the Topic New Developments for Circuit Design: Synthesis, Modeling, Simulation, and Applications)

►▼ Show Figures

Figure 1

Figure 1
<p>Schematic diagram of the three-port circulator and the cascaded-connection circulator and isolator: (<b>a</b>) three-port circulator, (<b>b</b>) cascaded-connection circulator and isolator.</p> Full article ">Figure 2
<p>Structure drawing of cascaded-connection circulator and isolator: (<b>a</b>) top view of internal structure, (<b>b</b>) photos of the prototype.</p> Full article ">Figure 3
<p>VSWR of each port and isolation between receiving and transmitting ports: (<b>a</b>) VSWR, (<b>b</b>) isolation.</p> Full article ">Figure 4
<p>Insertion loss of transmission and receiving channels: (<b>a</b>) transmission channel, (<b>b</b>) receiving channel.</p> Full article ">Figure 5
<p>Electric field distribution of central conductor of the proposed design: (<b>a</b>) transmission channel, (<b>b</b>) receiving channel.</p> Full article ">Figure 6
<p>Showing both heat source distribution and temperature distribution: (<b>a</b>) main heat source, (<b>b</b>) temperature distribution.</p> Full article ">

15 pages, 8399 KiB  

Open AccessArticle

A Low Mismatch Current Charge Pump Applied to Phase-Locked Loops

by Min Guo, Lixin Wang, Shixin Wang, Jiacheng Lu and Mengyao Cui

Micromachines 2024, 15(7), 913; https://doi.org/10.3390/mi15070913 - 14 Jul 2024

Viewed by 487

Abstract

This paper presents a charge pump circuit with a wide output range and low current mismatch applied to phase-locked loops. In this designed structure, T-shaped analog switches are adopted to suppress the non-ideal effects of clock feedthrough, switching time mismatch, and charge injection. [...] Read more.

This paper presents a charge pump circuit with a wide output range and low current mismatch applied to phase-locked loops. In this designed structure, T-shaped analog switches are adopted to suppress the non-ideal effects of clock feedthrough, switching time mismatch, and charge injection. A source follower and current splitting circuits are proposed to improve the matching accuracy of the charging and discharging currents and reduce the current mismatch rate. A rail-to-rail high-gain amplifier with a negative feedback connection is introduced to suppress the charge-sharing effect of the charge pump. A cascode current mirror with a high output impedance is used to provide the charge and discharge currents for the charge pump, which not only improves the current accuracy of the charge pump but also increases the output voltage range. The proposed charge pump is designed and simulated based on a 65 nm CMOS process. The results show that when the power supply voltage is 1.2 V, the output current of the charge pump is 100 μA, the output voltage is in the range of 0.2~1 V, and the maximum current mismatch rate and current variation rate are only 0.21% and 1.4%, respectively. Full article

(This article belongs to the Topic New Developments for Circuit Design: Synthesis, Modeling, Simulation, and Applications)

►▼ Show Figures

Figure 1

Figure 1
<p>PFD with charge pump.</p> Full article ">Figure 2
<p>Traditional op-amp charge pump.</p> Full article ">Figure 3
<p>Diagram of clock feedthrough effect.</p> Full article ">Figure 4
<p>Diagram of channel charge injection effect.</p> Full article ">Figure 5
<p>Conventional source-switching charge pump.</p> Full article ">Figure 6
<p>Proposed charge pump circuit.</p> Full article ">Figure 7
<p>Current-splitting circuit.</p> Full article ">Figure 8
<p>T-shaped analog switches.</p> Full article ">Figure 9
<p>Structure of conventional current bias.</p> Full article ">Figure 10
<p>Structure of dual-feedback current mirror.</p> Full article ">Figure 11
<p>Schematic diagram of the novel charge pump.</p> Full article ">Figure 12
<p>Schematic diagram of high-gain rail-to-rail input amplifier.</p> Full article ">Figure 13
<p>Stability simulation results for high-gain rail-to-rail input amplifier.</p> Full article ">Figure 14
<p>Simulation results for current mismatch: (<b>a</b>) traditional charge pump; (<b>b</b>) novel charge pump.</p> Full article ">Figure 15
<p>Waveform diagram of charge pump input signal and output voltage VOUT: (<b>a</b>) V_UP and VOUT; (<b>b</b>) V_DN and VOUT.</p> Full article ">Figure 16
<p>Output voltage VOUT for PVT conditions: (<b>a</b>) the traditional charge pump; (<b>b</b>) the novel charge pump.</p> Full article ">Figure 17
<p>Layout of the novel charge pump.</p> Full article ">

23 pages, 29672 KiB  

Open AccessArticle

Improved Implementation of Chua’s Circuit on an Active Inductor and Non-Autonomous System

by Ziqi Zhang, Yiming Wen, Yafei Ning, Zirui Zhang, Hu Li and Yuhan Xia

Electronics 2024, 13(13), 2637; https://doi.org/10.3390/electronics13132637 - 4 Jul 2024

Viewed by 435

Abstract

Chua’s circuit is a well-established model for studying chaotic phenomena and is extensively implemented in fields like encrypted communication. However, a traditional Chua’s circuit has large volume, high component precision requirements and limited adjustable parameter range, which are not conducive to application. In [...] Read more.

Chua’s circuit is a well-established model for studying chaotic phenomena and is extensively implemented in fields like encrypted communication. However, a traditional Chua’s circuit has large volume, high component precision requirements and limited adjustable parameter range, which are not conducive to application. In order to solve these problems, we propose an improved implementation of Chua’s circuit on an active inductor and non-autonomous system. First, we adopt the strategy of using active inductors instead of traditional passive inductors, achieving the miniaturization of the circuit and improving the accuracy of inductance. In addition, we present the theory of substituting non-autonomous systems for classical autonomous systems to reduce the requirements for the accuracy of components and improve the robustness of the circuit. Lastly, we connect the extension resistor in parallel with Chua’s diode to optimize circuit structure, thereby increasing the range of the adjustable parameter. Based on the three improvements above, experiments have shown that the average maximum error tolerance of components of our improved design has been increased from 1.88% to 7.38% when generating a single vortex, and from 4.73% to 12.61% when generating a double vortex, compared with the traditional Chua’s circuit. The range of the adjustable parameter has been increased by 195.83% and 36.98%, respectively, when generating a single vortex and double vortex. In summary, our improved circuit is more practical than the traditional Chua’s circuit and has good application value. Full article

(This article belongs to the Topic New Developments for Circuit Design: Synthesis, Modeling, Simulation, and Applications)

►▼ Show Figures

Figure 1

Figure 1
<p>Traditional Chua’s circuit.</p> Full article ">Figure 2
<p>Chua’s diode <math display="inline"><semantics> <mrow> <msub> <mi>R</mi> <mi>N</mi> </msub> </mrow> </semantics></math>.</p> Full article ">Figure 3
<p>Improved implementation of Chua’s circuit on an active inductor and non-autonomous system.</p> Full article ">Figure 4
<p>Range of the adjustable parameter for different values of the extension resistor <span class="html-italic">r</span>.</p> Full article ">Figure 5
<p>Average maximum error tolerance <span class="html-italic">X</span> of components <span class="html-italic">L</span>, <math display="inline"><semantics> <mrow> <msub> <mi>C</mi> <mn>1</mn> </msub> </mrow> </semantics></math>, and <math display="inline"><semantics> <mrow> <msub> <mi>C</mi> <mn>2</mn> </msub> </mrow> </semantics></math> for different amplitudes and frequencies.</p> Full article ">Figure 6
<p>Riordan gyrator.</p> Full article ">Figure 7
<p>Maximum Lyapunov exponent in the system for different resistors <span class="html-italic">R</span>.</p> Full article ">Figure 8
<p>External test circuit.</p> Full article ">Figure 9
<p>Average maximum error tolerance <span class="html-italic">X</span> of components <span class="html-italic">L</span>, <math display="inline"><semantics> <mrow> <msub> <mi>C</mi> <mn>1</mn> </msub> </mrow> </semantics></math>, and <math display="inline"><semantics> <mrow> <msub> <mi>C</mi> <mn>2</mn> </msub> </mrow> </semantics></math> for different adjustable resistors <span class="html-italic">R</span>.</p> Full article ">Figure 10
<p>Average maximum error tolerance <span class="html-italic">X</span> of components <span class="html-italic">L</span>, <math display="inline"><semantics> <mrow> <msub> <mi>C</mi> <mn>1</mn> </msub> </mrow> </semantics></math>, and <math display="inline"><semantics> <mrow> <msub> <mi>C</mi> <mn>2</mn> </msub> </mrow> </semantics></math> for different adjustable resistors <span class="html-italic">R</span>.</p> Full article ">

13 pages, 2910 KiB  

Open AccessArticle

Deterministic Multi-Objective Optimization of Analog Circuits

by Zihan Xu, Zhenxin Zhao and Jun Liu

Electronics 2024, 13(13), 2510; https://doi.org/10.3390/electronics13132510 - 26 Jun 2024

Viewed by 883

Abstract

Stochastic optimization approaches benefit from random variance to produce a solution in a reasonable time frame that is good enough for solving the problem. Compared with them, deterministic optimization methods feature faster convergence rates and better reproducibility but may get stuck at a [...] Read more.

Stochastic optimization approaches benefit from random variance to produce a solution in a reasonable time frame that is good enough for solving the problem. Compared with them, deterministic optimization methods feature faster convergence rates and better reproducibility but may get stuck at a local optimum that is insufficient to solve the problem. In this paper, we propose a group-based deterministic optimization method, which can efficiently achieve comparable performance to heuristic optimization algorithms, such as particle swarm optimization. Moreover, the weighted sum method (WSM) is employed to further improve our deterministic optimization method to be multi-objective optimization, making it able to seek a balance among multiple conflicting circuit performance metrics. With a case study of three common analog circuits tested for our optimization methodology, the experimental results demonstrate that our proposed method can more efficiently reach a better estimation of the Pareto front compared to NSGA-II, a well-known multi-objective optimization approach. Full article

(This article belongs to the Topic New Developments for Circuit Design: Synthesis, Modeling, Simulation, and Applications)

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Figure 1

Figure 1
<p>Illustration of hypervolume with two objectives.</p> Full article ">Figure 2
<p>Schematic of the two-stage Op-Amp.</p> Full article ">Figure 3
<p>Pareto fronts generated by our method and the NSGA-II for the two-stage Op-Amp.</p> Full article ">Figure 4
<p>Schematic of the folded-Cascode Op-Amp.</p> Full article ">Figure 5
<p>Pareto front generated by our method and NSGA-II for the folded-Cascode Op-Amp.</p> Full article ">Figure 6
<p>Schematic of the three-stage Op-Amp.</p> Full article ">Figure 7
<p>Pareto front generated by our method and NSGA-II for the three-stage Op-Amp.</p> Full article ">

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