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The word epitaxy is derived from Greek and loosely means thin skin. When a crystalline substrate or wafer receives a thin crystalline overlay, it is often referred to as epitaxy. The over-layment must be ordered with a preferred or... more
The word epitaxy is derived from Greek and loosely means thin skin. When a crystalline substrate or wafer receives a thin crystalline overlay, it is often referred to as epitaxy. The over-layment must be ordered with a preferred or specific orientation as it relates to the substrate. The thin layer of crystal material usually ranges from .5 to 20 microns. If the growth orientation is random, it is non-epitaxial. When silicon is used as the over-layment material, it is termed silicon epitaxy. There are different kinds of epitaxy, homoepitaxy, heteroepitaxy, and heterotopotaxy.
Research Interests:
Effects of post‐deposition annealing temperature (400°C, 600°C, 800°C and 1000°C) onto metal‐organic decomposed cerium oxide (CeO2) precursor spin‐coated on n‐type Si substrate was carried out in nitrogen‐oxygen‐nitrogen ambient. The... more
Effects of post‐deposition annealing temperature (400°C, 600°C, 800°C and 1000°C) onto metal‐organic decomposed cerium oxide (CeO2) precursor spin‐coated on n‐type Si substrate was carried out in nitrogen‐oxygen‐nitrogen ambient. The capability of nitrogen to inhibit further oxidation of the Si surface by attaching to the oxygen vacancies sites was reported. Excessive formation of SiO2 interfacial layer however occurred at 1000°C, surpassing the thickness of the CeO2 passivation layer, leaving behind nitrogen dangling bonds that were inefficient in restricting further oxidation of the Si surface, and hence a permanent dielectric breakdown happened at an electric field of 0.98 MV/cm. The CeO2 passivation layer annealed at 800°C broke down at 4.85 MV/cm and possessed relatively low Dit, Qeff, and slow trap density with negligible formation of interfacial layer, which promoted its use as a promising high k passivation layer. The growth of metal‐organic decomposed cerium oxide passivation layer in nitrogen‐oxygen‐nitrogen ambient for application in metal‐oxide‐semiconductor capacitor was discovered in this work. The employment of nitrogen‐oxygen‐nitrogen ambient was effective in impeding the formation of interfacial layer (IL) from 400°C to 800°C, in which the interface quality was enhanced. Nonetheless, the utilization of a higher annealing temperature of 1000°C has exaggerated the formation of IL contributing to the attainment of a higher density of slow trap and degradation the dielectric breakdown.
Effects of post‐deposition annealing temperature (400°C, 600°C, 800°C and 1000°C) onto metal‐organic decomposed cerium oxide (CeO2) precursor spin‐coated on n‐type Si substrate was carried out in nitrogen‐oxygen‐nitrogen ambient. The... more
Effects of post‐deposition annealing temperature (400°C, 600°C, 800°C and 1000°C) onto metal‐organic decomposed cerium oxide (CeO2) precursor spin‐coated on n‐type Si substrate was carried out in nitrogen‐oxygen‐nitrogen ambient. The capability of nitrogen to inhibit further oxidation of the Si surface by attaching to the oxygen vacancies sites was reported. Excessive formation of SiO2 interfacial layer however occurred at 1000°C, surpassing the thickness of the CeO2 passivation layer, leaving behind nitrogen dangling bonds that were inefficient in restricting further oxidation of the Si surface, and hence a permanent dielectric breakdown happened at an electric field of 0.98 MV/cm. The CeO2 passivation layer annealed at 800°C broke down at 4.85 MV/cm and possessed relatively low Dit, Qeff, and slow trap density with negligible formation of interfacial layer, which promoted its use as a promising high k passivation layer. The growth of metal‐organic decomposed cerium oxide passivation layer in nitrogen‐oxygen‐nitrogen ambient for application in metal‐oxide‐semiconductor capacitor was discovered in this work. The employment of nitrogen‐oxygen‐nitrogen ambient was effective in impeding the formation of interfacial layer (IL) from 400°C to 800°C, in which the interface quality was enhanced. Nonetheless, the utilization of a higher annealing temperature of 1000°C has exaggerated the formation of IL contributing to the attainment of a higher density of slow trap and degradation the dielectric breakdown.
The role of an epitaxial growth technique in the performance of metal oxide semiconductor (MOS) devices was investigated. Using a pioneering method like selective epitaxy, the performance and integration of MOS devices found to be... more
The role of an epitaxial growth technique in the performance of metal oxide semiconductor (MOS) devices was investigated. Using a pioneering method like selective epitaxy, the performance and integration of MOS devices found to be improved significantly. It is also seen that epitaxy is essential for realizing modern semiconductor device like FinFETs. The cheap and improved semiconductor structure like vertical MOSFET also required service of epitaxy technique. The stringent control of the epitaxial process was necessary for achieving the superlative performance and desiredstructures.
A comparison between metal-organic decomposed GaxCeyOz and CeO2 passivation layers subjected to post-deposition annealing at 800C in oxygen ambient was presented. Mitigation in the formation of positively charged oxygen vacancies in... more
A comparison between metal-organic decomposed GaxCeyOz and CeO2 passivation layers subjected to post-deposition annealing at 800C in oxygen ambient was presented. Mitigation in the formation of positively charged oxygen vacancies in GaxCeyOz layer was disclosed by the grazing incidence X-ray diffraction characterization as well as the acquisition of a lower value of positive effective oxide charge (Qeff) than CeO2 layer. In addition, GaxCeyOz layer was able to sustain a higher electric breakdown field and a lower leakage current density due to the attainment of a lower interface trap density extracted using Terman's and high-low methods, slow trap density, and Qeff when compared with CeO2 layer.
The role of an epitaxial growth technique in the performance of metal oxide semiconductor (MOS) devices was investigated. Using a pioneering method like selective epitaxy, the performance and integration of MOS devices found to be... more
The role of an epitaxial growth technique in the performance of metal oxide semiconductor (MOS) devices was investigated. Using a pioneering method like selective epitaxy, the performance and integration of MOS devices found to be improved significantly. It is also seen that epitaxy is essential for realizing modern semiconductor device like FinFETs. The cheap and improved semiconductor structure like vertical MOSFET also required service of epitaxy technique. The stringent control of the epitaxial process was necessary for achieving the superlative performance and desiredstructures.