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Manovit et al., 2006 - Google Patents

Testing implementations of transactional memory

Manovit et al., 2006

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Document ID
9683178824756342154
Author
Manovit C
Hangal S
Chafi H
McDonald A
Kozyrakis C
Olukotun K
Publication year
Publication venue
Proceedings of the 15th international conference on Parallel architectures and compilation techniques

External Links

Snippet

Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software. Given the subtle issues involved with concurrency and atomicity, however, it is important that …
Continue reading at xenon.stanford.edu (PDF) (other versions)

Classifications

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    • G06F9/30Arrangements for executing machine-instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30076Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
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