[go: up one dir, main page]

Brakensiek et al., 2002 - Google Patents

Software radio approach for re-configurable multi-standard radios

Brakensiek et al., 2002

View PDF
Document ID
9510843047482521969
Author
Brakensiek J
Oelkrug B
Bucker M
Uffmann D
Droge A
Darianian M
Otte M
Publication year
Publication venue
The 13th IEEE International Symposium on Personal, Indoor and Mobile Radio Communications

External Links

Snippet

Next generation wireless systems will lead to an integration of existing networks, forming a heterogeneous network. Re-configurable systems will be the enabling technology sharing hardware resources for different purposes. This paper highlights the requirements of a …
Continue reading at citeseerx.ist.psu.edu (PDF) (other versions)

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored programme computers
    • G06F15/78—Architectures of general purpose stored programme computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored programme computers comprising a single central processing unit with reconfigurable architecture
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46—Multiprogramming arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored programme computers
    • G06F15/80—Architectures of general purpose stored programme computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems
    • H04L12/56—Packet switching systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATIONS NETWORKS
    • H04W88/00—Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks

Similar Documents

Publication Publication Date Title
Chamola et al. FPGA for 5G: Re-configurable hardware for next generation communication
US7325123B2 (en) Hierarchical interconnect for configuring separate interconnects for each group of fixed and diverse computational elements
US8504659B2 (en) Apparatus and method for adaptive multimedia reception and transmission in communication environments
EP1449095B1 (en) Adaptive integrated circuit having fixed computational elements and method for configuration and operation of such an integrated circuit
US7856246B2 (en) Multi-cell data processor
Brakensiek et al. Software radio approach for re-configurable multi-standard radios
Srikanteswara et al. An overview of configurable computing machines for software radio handsets
US20130304960A1 (en) Apparatus, System and Method For Configuration of Adaptive Integrated Circuitry Having Fixed, Application Specific Computational Elements
CN113485762B (en) Method and apparatus for offloading computing tasks with configurable devices to improve system performance
Smit et al. Multi-core architectures and streaming applications
Smit et al. The chameleon architecture for streaming DSP applications
US20050219251A1 (en) Filter micro-coded accelerator
Tombs et al. Mocarabe: High-performance time-multiplexed overlays for FPGAs
Srikanteswara et al. Soft radio implementations for 3G and future high data rate systems
US11043950B2 (en) Method and system for providing a configurable logic device having a programmable DSP block
Brakensiek et al. Re-configurable multi-standard terminal for heterogeneous networks
Weber et al. A Reconfigurable Network-on-Chip Datapath for Application Specific Computing
Revés et al. The cost of an abstraction layer on FPGA devices for software radio applications
Kumar et al. A FPGA partial reconfiguration design approach for RASIP SDR
Zhang et al. Cognitive Radio baseband processing on a reconfigurable platform
Suresh et al. Efficient resource sharing architecture for multistandard communication system
Kansagara et al. Dynamic Reconfigurable Architectures—A Boon for Desires of Real Time Systems
Srikanteswara et al. Designing soft radios for high data rate systems and integrated global services
Lemaire et al. A semi-distributed control system for application management in a NoC-based architecture
Zhang et al. The Reconfigurable Cell Array