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Derrien et al., 2020 - Google Patents

Toward speculative loop pipelining for high-level synthesis

Derrien et al., 2020

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Document ID
8143954212557118774
Author
Derrien S
Marty T
Rokicki S
Yuki T
Publication year
Publication venue
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

External Links

Snippet

Loop pipelining (LP) is a key optimization in modern high-level synthesis (HLS) tools for synthesizing efficient hardware datapaths. Existing techniques for automatic LP are limited by static analysis that cannot precisely analyze loops with data-dependent control flow …
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