Harada et al., 2017 - Google Patents
1200 V SiC IE-UMOSFET with low on-resistance and high threshold voltageHarada et al., 2017
- Document ID
- 6825135027315174351
- Author
- Harada S
- Kobayashi Y
- Kinoshita A
- Ohse N
- Kojima T
- Iwaya M
- Shiomi H
- Kitai H
- Kyogoku S
- Ariyoshi K
- Onishi Y
- Kimura H
- Publication year
- Publication venue
- Materials Science Forum
External Links
Snippet
A critical issue with the SiC UMOSFET is the need to develop a shielding structure for the gate oxide at the trench bottom without any increase in the JFET resistance. This study describes our new UMOSFET named IE-UMOSFET, which we developed to cope with this …
- 229910010271 silicon carbide 0 title abstract description 11
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