Rauchwerger et al., 2000 - Google Patents
SmartApps: An application centric approach to high performance computingRauchwerger et al., 2000
View PDF- Document ID
- 6579761711942040520
- Author
- Rauchwerger L
- Amato N
- Torrellas J
- Publication year
- Publication venue
- International Workshop on Languages and Compilers for Parallel Computing
External Links
Snippet
State-of-the-art run-time systems are a poor match to diverse, dynamic distributed applications because they are designed to provide support to a wide variety of applications, without much customization to individual specific requirements. Little or no guiding …
Classifications
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- G06F8/44—Encoding
- G06F8/443—Optimisation
- G06F8/4441—Reducing the execution time required by the program code
- G06F8/4442—Reducing the number of cache misses; Data prefetching
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- G06F8/445—Exploiting fine grain parallelism, i.e. parallelism at instruction level
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- G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
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- G06F11/3466—Performance evaluation by tracing or monitoring
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- G—PHYSICS
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- G06F11/3457—Performance evaluation by simulation
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