[go: up one dir, main page]

Azim et al., 2014 - Google Patents

Generation of communication schedules for multi-mode distributed real-time applications

Azim et al., 2014

View PDF
Document ID
6505065945447535069
Author
Azim A
Carvajal G
Pellizzoni R
Fischmeister S
Publication year
Publication venue
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE)

External Links

Snippet

A key problem in designing multi-mode real-time systems is the generation of schedules to reduce the complexities of transforming the model semantics to code. Moreover, distributed multi-mode applications are prone to suffer from delays incurred during mode changes. We …
Continue reading at past.date-conference.com (PDF) (other versions)

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Programme initiating; Programme switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G06F9/4887—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues involving deadlines, e.g. rate based, periodic
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogramme communication; Intertask communication
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. local area networks [LAN], wide area networks [WAN]
    • H04L12/40—Bus networks
    • H04L2012/40267—Bus for use in transportation systems
    • H04L2012/40273—Bus for use in transportation systems the transportation system being a vehicle
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. local area networks [LAN], wide area networks [WAN]
    • H04L12/40—Bus networks
    • H04L2012/40208—Bus networks characterized by the use of a particular bus standard
    • H04L2012/40215—Controller Area Network CAN
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. local area networks [LAN], wide area networks [WAN]
    • H04L12/40—Bus networks
    • H04L2012/40208—Bus networks characterized by the use of a particular bus standard
    • H04L2012/40241—Flexray
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored programme computers
    • G06F15/78—Architectures of general purpose stored programme computers comprising a single central processing unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformations of program code
    • G06F8/41—Compilation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/64—Hybrid switching systems
    • H04L12/6418—Hybrid transport
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network-specific arrangements or communication protocols supporting networked applications
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring

Similar Documents

Publication Publication Date Title
Zheng et al. Definition of task allocation and priority assignment in hard real-time distributed systems
Zhu et al. Optimization of task allocation and priority assignment in hard real-time distributed systems
Zeng et al. Schedule optimization of time-triggered systems communicating over the FlexRay static segment
Lukasiewycz et al. Modular scheduling of distributed heterogeneous time-triggered automotive systems
Mubeen et al. Communications-oriented development of component-based vehicular distributed real-time embedded systems
Pop et al. Analysis and optimization of distributed real-time embedded systems
JP2009541826A (en) System and method for executing distributed software
Thiele et al. Formal timing analysis of CAN-to-Ethernet gateway strategies in automotive networks
Meyer et al. Simulation of mixed critical in-vehicular networks
Pop et al. Bus access optimisation for FlexRay-based distributed embedded systems
Vincentelli et al. Optimizing end-to-end latencies by adaptation of the activation events in distributed automotive systems
Azim et al. Generation of communication schedules for multi-mode distributed real-time applications
Lange et al. Guaranteeing real-time message deadlines in the FlexRay static segment using a on-line scheduling approach
Pop et al. Schedulability-driven frame packing for multicluster distributed embedded systems
Carvajal et al. Integrating dynamic-TDMA communication channels into COTS Ethernet networks
Darbandi et al. Schedule construction under precedence constraints in FlexRay in-vehicle networks
Kumar et al. Efficient Utilization of Bandwidth in Static Segment of FlexRay Protocol
Kamieth et al. Design of TDMA-based in-car networks: Applying multiprocessor scheduling strategies on time-triggered switched ethernet communication
Hua et al. HOSA: Holistic scheduling and analysis for scalable fault-tolerant FlexRay design
Garibay-Martínez et al. Improved holistic analysis for fork–join distributed real-time tasks supported by the FTT-SE protocol
Jaouani et al. Hybrid task and message scheduling in hard real time distributed systems over FlexRay bus
Di Natale Design and development of component-based embedded systems for automotive applications
Ashjaei et al. Modeling, designing and analyzing resource reservations in distributed embedded systems
Hashemi Farzaneh A modeling framework to facilitate schedule synthesis of time-sensitive networking
Wey et al. Enhancement of Controller Area Network (CAN) bus arbitration mechanism