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Mori et al., 1993 - Google Patents

GaAs heteroepitaxy on an epitaxial Si surface with a low‐temperature process

Mori et al., 1993

Document ID
5790536394783060037
Author
Mori H
Tachikawa M
Sugo M
Itoh Y
Publication year
Publication venue
Applied physics letters

External Links

Snippet

This letter reports the growth of an anti‐phase‐free GaAs layer on a (100) epitaxial Si substrate offset by 0.5° without high‐temperature treatment prior to growth. Atomic force microscopy shows that the epitaxial Si surface has regular steps prior to growth. The …
Continue reading at pubs.aip.org (other versions)

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    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
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    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
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    • H01L21/02436Intermediate layers between substrates and deposited layers
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    • H01L21/02612Formation types
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    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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