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Lickly et al., 2008 - Google Patents

Predictable programming on a precision timed architecture

Lickly et al., 2008

View PDF
Document ID
5699741912672003579
Author
Lickly B
Liu I
Kim S
Patel H
Edwards S
Lee E
Publication year
Publication venue
Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems

External Links

Snippet

In a hard real-time embedded system, the time at which a result is computed is as important as the result itself. Modern processors go to extreme lengths to ensure their function is predictable, but have abandoned predictable timing in favor of average-case performance …
Continue reading at dl.acm.org (PDF) (other versions)

Classifications

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