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Bao et al., 2022 - Google Patents

An improved LDMOS-SCR design for high-voltage ESD

Bao et al., 2022

Document ID
5676625852239917938
Author
Bao X
Jin X
Publication year
Publication venue
2022 International EOS/ESD Symposium on Design and System (IEDS)

External Links

Snippet

In this paper, a 0.18-μm BCD technique was used to design an I-LDMOS-SCR with a high holding voltage. According to the results of the Transmission Line Pulse Test (TLP), the I- LDMOS-SCR has a holding voltage of up to 20.8 V, which is suitable for ESD protection …
Continue reading at ieeexplore.ieee.org (other versions)

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