[go: up one dir, main page]

Sklyarov et al., 2013 - Google Patents

Fast Regular Circuits for Network-based Parallel Data Processing.

Sklyarov et al., 2013

Document ID
5581024119434161793
Author
Sklyarov V
Skliarova I
Publication year
Publication venue
Advances in Electrical and Computer Engineering

External Links

Snippet

This paper is dedicated to the design, implementation, and evaluation of fast circuits executing operations that are frequently required in data processing which are: 1) discovering the maximum and minimum values in a given set of data; and 2) sorting data …
Continue reading at go.gale.com (other versions)

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/30—Arrangements for executing machine-instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/30—Arrangements for executing machine-instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G06F17/5009—Computer-aided design using simulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G06F17/5045—Circuit design
    • G06F17/5054—Circuit design for user-programmable logic devices, e.g. field programmable gate arrays [FPGA]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored programme computers
    • G06F15/78—Architectures of general purpose stored programme computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored programme computers comprising a single central processing unit with reconfigurable architecture
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/30—Information retrieval; Database structures therefor; File system structures therefor
    • G06F17/30861—Retrieval from the Internet, e.g. browsers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/141—Discrete Fourier transforms
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575

Similar Documents

Publication Publication Date Title
Kumar et al. Low voltage high performance hybrid full adder
US9910705B1 (en) Modular offloading for computationally intensive tasks
Sklyarov et al. High-performance implementation of regular and easily scalable sorting networks on an FPGA
Sklyarov et al. Hardware accelerators for information processing in high-performance computing systems
Zhou et al. Accelerating large-scale single-source shortest path on FPGA
Sklyarov et al. Fast Regular Circuits for Network-based Parallel Data Processing.
Chiosa et al. Skt: A one-pass multi-sketch data analytics accelerator
Ghasemi et al. Accelerating apache spark with fpgas
Verdoscia et al. A Data‐Flow Soft‐Core Processor for Accelerating Scientific Calculation on FPGAs
Antonov et al. Research of the efficiency of high-level synthesis tool for FPGA based hardware implementation of some basic algorithms for the big data analysis and management tasks
US20250271894A1 (en) System time clock synchronization on an soc with lsb sampling
Silva et al. Application‐oriented cache memory configuration for energy efficiency in multi‐cores
Feng et al. Floating-point operation based reconfigurable architecture for radar processing
Waidyasooriya et al. FPGA-accelerator for DNA sequence alignment based on an efficient data-dependent memory access scheme
Wu et al. FPGA accelerated parallel sparse matrix factorization for circuit simulations
Sklyarov et al. Hamming weight counters and comparators based on embedded DSP blocks for implementation in FPGA
Sklyarov et al. Multi-core DSP-based vector set bits counters/comparators
Sklyarov et al. Hardware accelerators for data sort in all programmable systems-on-chip
Shi Sparse matrix multiplication on a many-core platform
Sklyarov et al. On‐Chip Reconfigurable Hardware Accelerators for Popcount Computations
Antonov et al. Research of hardware implementations efficiency of sorting algorithms created by using Xilinx’s High-Level Synthesis Tool
Ghasemi A scalable heterogeneous dataflow architecture for big data analytics using fpgas
Srivastava Introduction to Asynchronous Circuit Design
Saminathan et al. Internet of things based reconfigurable SIMD processor for high-speed end devices in FPGA
Sklyarov et al. Data processing in FPGA-based systems