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Friedlander et al., 1997 - Google Patents

Using a parity-sensitive sieve to count prime values of a polynomial

Friedlander et al., 1997

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Document ID
4645277183863541496
Author
Friedlander J
Iwaniec H
Publication year
Publication venue
Proceedings of the National Academy of Sciences

External Links

Snippet

It is expected that any irreducible polynomial with integer coefficients assumes infinitely many prime values provided that it satisfies some obvious local conditions. Moreover, it is expected that the frequency of these primes obeys a simple asymptotic law. This has …
Continue reading at www.pnas.org (HTML) (other versions)

Classifications

    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes

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