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Terada, 2018 - Google Patents

Floorplan-aware high-level synthesis algorithms and their acceleration by Ising computations

Terada, 2018

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Document ID
3477846567172924657
Author
Terada K
Publication year
Publication venue
Waseda University Ph. D. thesis

External Links

Snippet

1.1 Background System LSI or system-on-a-chip (SoC) is an essential device in today's highly sophisticated information society. System LSI is already used widely in the world such as personal computers, servers, mobile phones, automobiles, and consumer electronics. In …
Continue reading at core.ac.uk (PDF) (other versions)

Classifications

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    • G06F17/5068Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
    • G06F17/5072Floorplanning, e.g. partitioning, placement
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
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    • G06F9/48Programme initiating; Programme switching, e.g. by interrupt
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    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
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    • GPHYSICS
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