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Yu et al., 2024 - Google Patents

Case study: optimization methods with TVM hybrid-op on RISC-V packed SIMD

Yu et al., 2024

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Document ID
2185950162648510863
Author
Yu M
Yuan C
Chen T
Lee J
Publication year
Publication venue
IEEE Access

External Links

Snippet

In recent years, considerable research has focused on the use of custom hardware to accelerate deep learning on edge devices. However, the end-to-end flow of deep learning includes preprocessing and postprocessing. Deep learning hardware accelerators cannot …
Continue reading at ieeexplore.ieee.org (PDF) (other versions)

Classifications

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    • G06F8/4441Reducing the execution time required by the program code
    • G06F8/4442Reducing the number of cache misses; Data prefetching
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    • G06F9/3885Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • G06F9/3889Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
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    • GPHYSICS
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    • G06F9/00Arrangements for programme control, e.g. control unit
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    • G06F9/44Arrangements for executing specific programmes
    • G06F9/455Emulation; Software simulation, i.e. virtualisation or emulation of application or operating system execution engines
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