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Yang et al., 2020 - Google Patents

A novel planar architecture for heterojunction TFETs with improved performance and its digital application as an inverter

Yang et al., 2020

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Document ID
18381888870165310689
Author
Yang S
Lv H
Lu B
Yan S
Zhang Y
Publication year
Publication venue
IEEE Access

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Snippet

A novel planar architecture is proposed for tunnel field-effect transistors (TFETs). The advantages of this architecture are exhibited, taking the InAs/Si TFET as an example, and the effects of different device parameters are analyzed in detail. Owing to the gate field being …
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    • H01L29/66Types of semiconductor device; Multistep manufacturing processes therefor
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    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
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    • H01L29/78Field effect transistors with field effect produced by an insulated gate
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    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
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    • H01L29/42312Gate electrodes for field effect devices
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