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Shehan et al., 2010 - Google Patents

Enhancing the Grid Alu processor for a better exploitation of the functional units

Shehan et al., 2010

Document ID
18308858432465927499
Author
Shehan B
Jahr R
Uhrig S
Ungerer T
Publication year
Publication venue
Proceedings of the 17th International Conference Mixed Design of Integrated Circuits and Systems-MIXDES 2010

External Links

Snippet

Current emerging reconfigurable coarse grained processors are gaining more popularity, as they introduce a new way for more dynamicity similar to FPGA and tend to achieve the performance of application specific hardware. An adaptive architecture can face the diversity …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

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    • G06F9/3891—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute organised in groups of units sharing resources, e.g. clusters
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    • G06F9/3895—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
    • G06F9/3897—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path
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