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Gibiluka et al., 2015 - Google Patents

A bundled-data asynchronous circuit synthesis flow using a commercial EDA framework

Gibiluka et al., 2015

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Document ID
1829409945406422905
Author
Gibiluka M
Moreira M
Calazans N
Publication year
Publication venue
2015 Euromicro Conference on Digital System Design

External Links

Snippet

Contemporary silicon technology enables integrating billions of transistors and allows the creation of complex systems-on-chip. At the same time, strict power dissipation budgets and growing interest in high performance battery-powered devices drive the need for energy …
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Classifications

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    • G06F17/5022—Logic simulation, e.g. for logic circuit operation
    • G06F17/5031—Timing analysis
    • G—PHYSICS
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    • G06F17/5045—Circuit design
    • G06F17/5054—Circuit design for user-programmable logic devices, e.g. field programmable gate arrays [FPGA]
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    • G06F17/5081—Layout analysis, e.g. layout verification, design rule check
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
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