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Kumar et al., 2006 - Google Patents

Hybrid transactional memory

Kumar et al., 2006

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Document ID
17282082150585984200
Author
Kumar S
Chu M
Hughes C
Kundu P
Nguyen A
Publication year
Publication venue
Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming

External Links

Snippet

High performance parallel programs are currently difficult to write and debug. One major source of difficulty is protecting concurrent accesses to shared data with an appropriate synchronization mechanism. Locks are the most common mechanism but they have a …
Continue reading at dl.acm.org (PDF) (other versions)

Classifications

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