Kahn et al., 1992 - Google Patents
The electronic design interchange format edif: present and futureKahn et al., 1992
View PDF- Document ID
- 16201066207420980856
- Author
- Kahn H
- Goldman R
- Publication year
- Publication venue
- Proceedings of the 29th ACM/IEEE Design Automation Conference
External Links
Snippet
This paper reviews the present status and current developments of the Electronic Design Interchange Format, EDIF. After a review of the role EDIF has at present, some of the new ideas being developed for inclusion in the new release of EDIF (Version 21 0) are …
- 230000018109 developmental process 0 abstract description 2
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5009—Computer-aided design using simulation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5045—Circuit design
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/30—Information retrieval; Database structures therefor; File system structures therefor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5068—Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/20—Handling natural language data
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F2217/00—Indexing scheme relating to computer aided design [CAD]
- G06F2217/74—Symbolic schematics
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T17/00—Three dimensional [3D] modelling, e.g. data description of 3D objects
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T11/00—2D [Two Dimensional] image generation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S707/00—Data processing: database and file management or data structures
- Y10S707/99941—Database schema or data structure
- Y10S707/99943—Generating database or data structure, e.g. via user interface
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6366874B1 (en) | System and method for browsing graphically an electronic design based on a hardware description language specification | |
US5050091A (en) | Integrated electric design system with automatic constraint satisfaction | |
Srivastava | Rapid prototyping of hardware and software in a unified framework | |
Lee et al. | An iconic query language for topological relationships in GIS | |
EP0676707B1 (en) | Expression promotion for hierarchical netlisting | |
CN115935872A (en) | Extensible FPGA simulation verification automation method | |
Kahn et al. | The electronic design interchange format edif: present and future | |
Anumba | Functional integration in CAD systems | |
Kamran et al. | Graphics programming independent of interaction techniques and styles | |
Howie et al. | Computer interpretation of process and instrumentation drawings | |
Rich et al. | Abstraction, Inspection and Debugging in Programming. | |
Domokos et al. | An open visualization framework for metamodel-based modeling languages | |
Eurich | A tutorial introduction to the electronic design interchange format | |
Lee et al. | Automatic verification of asynchronous circuits | |
Danieli et al. | An object oriented approach to CAD tool control | |
Wong | Technology computer-aided design frameworks and the PROSE implementation | |
Barth et al. | A structural representation for VLSI design | |
Dutton | Stanford overview in VLSI research | |
Atkinsonidl | IDL: A machine‐independent data language | |
Bechtolsheim | Interactive specification of structured designs | |
Rosenberg | Vertically integrated VLSI circuit design | |
Tung et al. | Multiple views of an executable software specification language | |
Marx | EDIF: The Standard for Workstation Intercommunication | |
Tsai | A FIRST ORDER THEORY OF SOFTWARE COMPONENT INTERCONNECTION LANGUAGES IN A MAINTENANCE ENVIRONMENT (LOGIC) | |
Finnigan et al. | Narratives of space and time: visualization for distributed applications. |