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Lu et al., 2025 - Google Patents

vtism: Efficient Tiered Memory Management for Virtual Machines with CXL

Lu et al., 2025

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Document ID
13649711604373399226
Author
Lu Z
Ou Y
Wu L
Wang Z
Lai M
Ge X
Song Z
Xie M
Publication year
Publication venue
Proceedings of the 18th ACM International Systems and Storage Conference

External Links

Snippet

Virtual machines (VMs) impose increasing memory demands, exposing the capacity and cost limitations of traditional DRAM only memory architectures. To address this problem, heterogeneous DRAM+ CXL tiered memory management systems have emerged as a …
Continue reading at dl.acm.org (PDF) (other versions)

Classifications

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    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
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    • G06F9/44—Arrangements for executing specific programmes
    • G06F9/455—Emulation; Software simulation, i.e. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533—Hypervisors; Virtual machine monitors
    • G06F9/45558—Hypervisor-specific management and integration aspects
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    • G06—COMPUTING; CALCULATING; COUNTING
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    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
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    • G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
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