Nicodimus et al., 2005 - Google Patents
Active shield circuit for digital noise suppression in mixed-signal integrated circuitsNicodimus et al., 2005
View PDF- Document ID
- 10388440326529201915
- Author
- Nicodimus R
- Takagi S
- Wada K
- Publication year
- Publication venue
- IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
External Links
Snippet
An active shield circuit which effectively reduces the substrate noise on the entire area inside the guard ring regardless of the noise source position is proposed. Simulation result shows that the proposed circuit can reduce the noise level to-85 dB while a conventional …
- 230000001629 suppression 0 title description 12
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5009—Computer-aided design using simulation
- G06F17/5036—Computer-aided design using simulation for analog modelling, e.g. for circuits, spice programme, direct methods, relaxation methods
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; Arrangements for supplying electrical power along data transmission lines
- H04L25/08—Modifications for reducing interference; Modifications for reducing effects due to line faults; Receiver end arrangements for detecting or overcoming line faults
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Garde et al. | Super class-AB recycling folded cascode OTA | |
Zhang et al. | A nano-watt MOS-only voltage reference with high-slope PTAT voltage generators | |
Asgaran et al. | Analytical modeling of MOSFETs channel noise and noise parameters | |
Seevinck et al. | CMOS translinear circuits for minimum supply voltage | |
KR101099406B1 (en) | Cascode circuit and semiconductor device | |
Abou-Allam et al. | A small-signal MOSFET model for radio frequency IC applications | |
Chen et al. | A low-power CMOS analog multiplier | |
Minch | A low-voltage MOS cascode bias circuit for all current levels | |
Yuan | Low-voltage CMOS current-mode preamplifier: Analysis and design | |
Gielen | Modeling and analysis techniques for system-level architectural design of telecom front-ends | |
Aakash et al. | Design of a low power, high speed double tail comparator | |
Badaroglu et al. | Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate | |
Nicodimus et al. | Active shield circuit for digital noise suppression in mixed-signal integrated circuits | |
Saberkari et al. | Design and comparison of flipped active inductors with high quality factors | |
Hazenboom et al. | A comparison of substrate noise coupling in lightly and heavily doped CMOS processes for 2.4-GHz LNAs | |
Masetti et al. | On the Key Role of Parasitic Capacitances in the Determination of the Susceptibility to EMI of Integrated Operational Amplifiers | |
Deng et al. | On the noise optimization of CMOS common-source low-noise amplifiers | |
Nicodimus et al. | Design optimization of active shield circuits for digital noise suppression based on average noise evaluation | |
Kondo et al. | Low voltage CMOS current mode reference circuit without operational amplifiers | |
Inoue et al. | A design of a low-voltage current-mode fully-differential analog CMOS integrator using FG-MOSFETs and its implementation | |
JP2010178094A (en) | Semiconductor integrated circuit device | |
Kondo et al. | High-PSRR, low-voltage CMOS current mode reference circuit using self-regulator with adaptive biasing technique | |
Takagi et al. | Active guard band circuit for substrate noise suppression | |
Colombo et al. | Curvature correction method based on subthreshold currents for bandgap voltage references | |
Nicodimus et al. | Design of active shield circuit with automatic tuning scheme |