WO2025191645A1 - Quantum device, spin exchange method, and quantum error correction device - Google Patents

Abstract

The present invention suppresses crosstalk between qubits, taking into account the arrangement of classical electronic equipment and wiring on a semiconductor structure. Provided is a quantum device comprising a set of qubit units and a three-way multi-electron coupler connected to the set of qubit units. Each of the qubit units in the set of qubit units includes: a semiconductor layer including a semiconductor channel disposed between a plurality of ohmic regions; an insulating layer disposed above the semiconductor layer; a set of gate electrodes disposed in the insulating layer and inducing a potential in the semiconductor channel; and a set of quantum dots. The three-way multi-electron coupler includes a plunger gate configured to implement spin exchange between any two in the set of qubit units by working together with the set of gate electrodes in each of the qubit units.

Description

Quantum device, spin exchange method and quantum error correction device

This disclosure relates to quantum devices, spin exchange methods, and quantum error correction devices.

Quantum devices fabricated from semiconductor materials have been extensively studied over the past 50 years. As the performance of these devices has improved, a number of quantum effects have been discovered that are fundamental to qubit devices that utilize quantum dot-based spin qubits, including ballistic quantization of quantum point contacts, Coulomb blockade, and spin blockade.

By scaling up qubit devices that use the above quantum effects and semiconductor logic devices, it becomes possible to build a quantum computer. Compared to ordinary (classical) calculations, quantum calculations performed on quantum computers are prone to memory errors due to decoherence and reliable gate operation is difficult, making error correction important. According to quantum error correction theory, the use of quantum error correction codes (referred to as "surface codes" in this disclosure) can reduce the probability of errors in calculation results as the amount of calculation increases.

Surface codes are a type of topological quantum error-correcting code defined on a two-dimensional manifold. In an error correction method using surface codes, a "data qubit" that actually carries the data and a "measurement qubit" that is used to check whether an error has occurred in the data qubit are placed side by side. Errors in the data qubit can be corrected by analyzing the information obtained from the measurement qubit using an external classical computer, etc. The reason for observing the adjacent measurement qubit rather than the data qubit is that quantum states such as superposition disappear when the data qubit is observed directly.

Conventionally, several proposals have been made to realize surface codes.
For example, Spiderweb Array: A Sparse Spin-Qubit Array. Physical Review Applied 18, 024053 (2022) (Non-Patent Document 1) describes a technique in which "a large 2D array of qubits is used to assign qubits as data qubits or surface code auxiliary qubits in a checkerboard pattern, and a surface code can be realized by performing single-qubit operations and nearest-neighbor two-qubit operations."

Spiderweb Array: A Sparse Spin-Qubit Array. Physical Review Applied 18, 024053 (2022)

Non-Patent Document 1 describes a method for realizing surface codes using so-called quantum bit shuttling. More specifically, in the method described in Non-Patent Document 1, in a two-dimensional array structure in which a large number of empty quantum dots are arranged between quantum bits, the quantum bits are moved to specific regions of the array, where operations such as calculations and readouts are carried out.

In general, in two-dimensional qubit structures used to realize surface codes, qubit units containing one or more qubits, qubit sensors, etc. are coupled by some kind of coupling unit (or junction element). Quantum information can be communicated between different qubit units via this coupling unit.

However, conventional two-dimensional qubit structures used to realize surface codes suffer from crosstalk (inter-qubit noise) between qubits coupled by couplings, which can cause errors in quantum computing and limit the reliability of the computational results.
However, conventional methods such as those described in Non-Patent Document 1 do not consider surface coding methods that take into account the wiring on semiconductor structures and the layout of classical electronic devices, and that are capable of suppressing crosstalk between quantum bits that are coupled by coupling portions.

The present disclosure therefore aims to provide a quantum device, spin exchange method, and quantum error correction device that can suppress crosstalk between quantum bits coupled by coupling portions, while taking into account the wiring on semiconductor structures and the layout of classical electronic devices.

In order to solve the above problem, a representative quantum device of the present invention is a quantum device comprising a set of quantum bit units and a three-way multi-electron coupler connected to the set of quantum bit units, wherein each of the quantum bit units in the set of quantum bit units comprises: a semiconductor layer including a semiconductor channel disposed between a plurality of ohmic regions; an insulating layer disposed above the semiconductor layer; a set of gate electrodes disposed in the insulating layer and inducing a potential in the semiconductor channel; and a set of quantum dots formed in the semiconductor channel along a direction of imaginary wiring passing through a center point of the three-way multi-electron coupler; and the three-way multi-electron coupler comprises a plunger gate configured to perform spin exchange between any two of the set of quantum bit units by interacting with the set of gate electrodes of each of the quantum bit units.

Furthermore, in order to solve the above-mentioned problems, a representative spin exchange method of the present invention is a spin exchange method implemented in a quantum device comprising a set of quantum bit units, a three-way multi-electron coupler connected to the set of quantum bit units, and a control unit electrically connected to the set of quantum bit units and the three-way multi-electron coupler, wherein in the quantum device, each of the quantum bit units in the set of quantum bit units comprises: a semiconductor layer including a semiconductor channel disposed between a plurality of ohmic regions; an insulating layer disposed above the semiconductor layer; a set of gate electrodes disposed in the insulating layer and inducing a potential in the semiconductor channel; and a set of quantum dots disposed in the semiconductor channel along a direction of an imaginary wiring passing through a center point of the three-way multi-electron coupler; and the three-way multi-electron coupler comprises a plunger gate configured to perform spin exchange between any two of the set of quantum bit units by interlocking with the set of gate electrodes of each of the quantum bit units; The spin exchange method includes the steps of: using the control unit to apply a first voltage to the plunger gate of the three-way multi-electron coupler for a predetermined application time such that a first energy level of the three-way multi-electron coupler satisfies a predetermined resonance condition for a first quantum bit unit and a second quantum bit unit in the set of quantum bit units; using the control unit to apply a second voltage to the set of gate electrodes of the first quantum bit unit and the second quantum bit unit for the predetermined application time such that the set of gate electrodes of the first quantum bit unit and the second quantum bit unit satisfies a predetermined open condition; and using the control unit to apply a third voltage to the set of gate electrodes of a third quantum bit unit for the predetermined application time such that the set of gate electrodes of the third quantum bit unit in the set of quantum bit units satisfies a predetermined close condition, thereby performing spin exchange between the first quantum bit unit and the second quantum bit unit.

Furthermore, in order to solve the above-mentioned problems, a representative quantum error correction device of the present invention is a quantum error correction device consisting of a plurality of composite quantum cells arranged in an NxM grid, each composite quantum cell including a first elementary quantum cell and a second elementary quantum cell coupled by a 0th multi-electron coupler, each of the first elementary quantum cell and the second elementary quantum cell including a first set of quantum bit units, a first multi-electron coupler connected to the first set of quantum bit units, a second set of quantum bit units, and a second multi-electron coupler connected to the second set of quantum bit units, and the first multi-electron coupler and the second multi-electron coupler are coupled via a central quantum bit unit shared by the first set of quantum bit units and the second set of quantum bit units.

According to the present disclosure, it is possible to provide a quantum device, a spin exchange method, and a quantum error correction apparatus that can suppress crosstalk between quantum bits coupled by coupling portions, while taking into account wiring on semiconductor structures and the layout of classical electronic devices.
Problems, configurations, and effects other than those described above will become apparent from the following description of the preferred embodiment of the invention.

FIG. 1 is a top view of a semiconductor structure of a quantum device according to an embodiment of the present disclosure. FIG. 2 is a diagram illustrating the configuration of a quantum bit unit in a quantum device according to an embodiment of the present disclosure. FIG. 3 is a diagram illustrating a gate electrode in a semiconductor structure of a quantum device according to an embodiment of the present disclosure. FIG. 4 is a diagram showing the flow of a quantum initialization method implemented in a quantum device according to an embodiment of the present disclosure. FIG. 5 is a diagram illustrating a spin exchange method in a quantum device according to an embodiment of the present disclosure. FIG. 6 is a diagram illustrating an example of the configuration of an elementary quantum cell included in a composite quantum cell that constitutes a quantum error correction device according to an embodiment of the present disclosure. FIG. 7 is a diagram illustrating an example of the configuration of a composite quantum cell that constitutes a quantum error correction device according to an embodiment of the present disclosure. FIG. 8 is a diagram illustrating a configuration of a quantum error correction device according to an embodiment of the present disclosure. FIG. 9 is a diagram illustrating an example of a surface code topology configuration according to an embodiment of the present disclosure. FIG. 10 is a diagram showing the flow of a quantum initialization method implemented in a quantum error correction device according to an embodiment of the present disclosure. FIG. 11 is a diagram illustrating an example of X-stabilizer operation and Z-stabilizer operation according to an embodiment of the present disclosure. FIG. 12 is a diagram illustrating a configuration of a quantum error correction device according to the first modification of the present disclosure. FIG. 13 is a diagram illustrating a configuration of a quantum error correction device according to the second modification of the present disclosure. FIG. 14 is a diagram illustrating a configuration of a quantum error correction device according to a third modification of the present disclosure.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings. Note that the present invention is not limited to the embodiment. In addition, in the description of the drawings, the same parts are designated by the same reference numerals.
Additionally, although terms such as "first,""second," and "third" may be used to describe various elements or components in this disclosure, it will be understood that these elements or components should not be limited by these terms. These terms are used only to distinguish one element or component from another. Thus, a first element or component discussed below could also be referred to as a second element or component without departing from the teachings of the inventive concept.

(Summary of the Disclosure)
As described above, the present disclosure relates to providing quantum devices, spin-swapping methods, and quantum error correction apparatus that can suppress crosstalk between qubits coupled by couplings, taking into account the layout of wiring on semiconductor structures and classical electronics.

More specifically, one quantum device according to an embodiment of the present disclosure has a semiconductor structure that uses a three-way multi-electron coupler (MEC). The three-way multi-electron coupler may be connected to three quantum bit units. By controlling the voltages applied to the gate electrodes of the three-way multi-electron coupler and the quantum bit units, a PSWAP operation can be performed, in which any two of the three quantum bit units exchange spins. Furthermore, as described below, by linking two quantum devices each consisting of a set of quantum bit units connected by a three-way multi-electron coupler, four-way quantum information communication becomes possible, and a two-dimensional quantum bit structure that realizes surface coding can be constructed while keeping wiring density low. Furthermore, by using a three-way multi-electron coupler to ensure that the distance between the quantum bit units is at least a certain distance, crosstalk between quantum bits can be suppressed.

(Quantum Devices)
First, an example of the configuration of a quantum device according to an embodiment of the present disclosure will be described with reference to FIGS. 1 to 3. FIG. 1 is a top view of a semiconductor structure 15 of a quantum device 10 according to an embodiment of the present disclosure. As shown in FIG. 1, the semiconductor structure 15 of the quantum device according to an embodiment of the present disclosure mainly includes three quantum bit units QU1, QU2, and QU3, and a three-way multi-electron coupler 12 connected to each of the quantum bit units QU1, QU2, and QU3. Furthermore, a plurality of gate electrodes G are formed in the semiconductor structure 15 for controlling the voltages of the quantum bit units QU1, QU2, and QU3 and the three-way multi-electron coupler 12.
The gate electrode G may include various types of gate electrodes such as a barrier gate, a plunger gate, a confinement gate, etc. Each gate electrode will be described below, but when there is no need to particularly distinguish between them, they will be collectively referred to as "gate electrode G." Although not shown in Figures 1 to 3, the gate electrode G may be connected to a control unit 78 (see Figure 7) that supplies a voltage using, for example, a multiplexing system.

The three-way multi-electron coupler 12 (sometimes referred to as "MEC" in the drawings) is an electron coupler for communicating quantum information (e.g., spin, etc.) between multiple quantum bit units. As shown in FIG. 1 , the three-way multi-electron coupler 12 is connected to each of the quantum bit units QU1, QU2, and QU3. In one embodiment, the three-way multi-electron coupler 12 may separate the quantum bit units QU1, QU2, and QU3 by a distance (second distance) greater than the distance (first distance) between adjacent barrier gates in a single quantum bit unit. This makes it possible to suppress crosstalk between the quantum bit units.
As an example, three-way multi-electron coupler 12 may have a width of 100 to 500 nm, which separates quantum bit units QU1, QU2, and QU3 by a distance of 200 nm or more, thereby suppressing crosstalk between the quantum bit units.
For ease of explanation, the drawings show a circular three-way multi-electron coupler 12 as an example, but the shape and dimensions of the three-way multi-electron coupler 12 are not particularly limited and may be freely set depending on the application form of the quantum device 10.

The quantum bit units QU1, QU2, and QU3 are computing elements for performing quantum computation. As shown in FIG. 1 , in one embodiment, the quantum bit units QU1, QU2, and QU3 may be arranged at positions separated from one another by 110 to 130 degrees (e.g., 120 degrees). Also, as shown in FIG. 1 , each of the quantum bit units QU1, QU2, and QU3 includes a plurality of quantum dots arranged along the direction of an imaginary wiring passing through the center point of the three-way multi-electron coupler 12, and a quantum dot sensor arranged adjacent to the quantum dots to measure the state of the quantum dot (e.g., spin up, spin down).
More specifically, quantum bit unit QU1 includes quantum dots QU1QD1 and QU1QD2 and a quantum dot sensor QU1QDS. Quantum bit unit QU2 includes quantum dots QU2QD1 and QU2QD2 and a quantum dot sensor QU2QDS. Quantum bit unit QU3 includes quantum dots QU3QD1 and QU3QD2 and a quantum dot sensor QU3QDS. In this disclosure, unless a distinction is required, quantum dots will be collectively referred to as "quantum dot QDs" and quantum dot sensors will be collectively referred to as "quantum dot sensors QDSs."

FIG. 2 is a diagram illustrating the configuration of a quantum bit unit in a quantum device according to an embodiment of the present disclosure.
2A is a top view of a single quantum bit unit QU1 in a quantum device 10 according to an embodiment of the present disclosure. As shown in FIG. 2A , quantum dots QU1QD1 and QU1QD2 and a quantum dot sensor QU1QDS are arranged in the quantum bit unit QU1. The quantum dot sensor QU1QDS is configured to measure the quantum states of the quantum dots QU1QD1 and QU1QD2. Furthermore, charged regions C1, C2, and C3 (black regions in FIG. 2A ) are formed in the quantum dots QU1QD1 and QU1QD2 and the quantum dot sensor QU1QDS by a voltage applied to a gate electrode G.

2B is a cross-sectional view of the quantum device 10 according to an embodiment of the present disclosure taken along the cutting line A shown in FIG. 2B . As shown in FIG. 2B , the quantum device 10 according to an embodiment of the present disclosure is mainly composed of an insulating layer 1 made of an oxide and a semiconductor layer 3 disposed below the insulating layer 1. The semiconductor layer 3 may be made of, for example, Si, Ge, As, Ga, In, Sb, or a combination of these materials. In the semiconductor layer 3, quantum dots QU1QD1 and QU1QD2 of the quantum bit unit QU1 and quantum dots QU2QD1 and QU2QD2 of the quantum bit unit QU2 are formed on both sides of the three-way multi-electron coupler 12.
Furthermore, the semiconductor layer 3 may include a plurality of ohmic regions O as ohmic contacts that form electrical contact and have low electrical resistance. Furthermore, a semiconductor channel 3s is formed between the plurality of ohmic regions O. This semiconductor channel 3s is a conductive path for passing a current and generating a potential in the semiconductor layer 3.
In this disclosure, the ohmic regions may be specified as "ohmic regions OAX, OBX, OCX" or the like in order to distinguish the positions, etc. of the ohmic regions. However, when there is no need to particularly distinguish between the ohmic regions, they will be collectively referred to as "ohmic region O."

2B, barrier gates are provided in the insulating layer 1 of the quantum device 10 as gate electrodes G for controlling the electrostatic potential in the semiconductor layer 3. These gate electrodes may be connected to a control unit that supplies voltage using a multiplexing system (not shown).
Furthermore, by supplying a voltage to these gate electrodes G, a potential 7 can be generated in the semiconductor layer 3 .
Furthermore, in some embodiments, a microwave antenna or a micromagnet may be disposed above the gate electrode G. By disposing the microwave antenna or the micromagnet, a time-dependent magnetic field can be generated to control the spin of electrons.

FIG. 2C is a diagram showing the waveform of the potential 7 generated in the quantum dot QD of a single quantum bit unit QU1 in the quantum device 10 according to an embodiment of the present disclosure. As shown in FIG. 2C, at each of the minimum values of the potential 7 generated in the semiconductor layer 3, a quantum dot QD for confining a single electron is formed in the semiconductor channel 3s. The quantum dot QD that confines a single electron can be used as a quantum bit for performing quantum computation.

FIG. 3 is a diagram illustrating gate electrodes in the semiconductor structure 15 of the quantum device 10 according to an embodiment of the present disclosure. As described above, the semiconductor structure 15 of the quantum device 10 according to an embodiment of the present disclosure has multiple gate electrodes GA1-GA10 formed therein for controlling the voltages of the quantum bit units QU1, QU2, and QU3 (not shown in FIG. 3 for ease of explanation) and the three-way multi-electron coupler 12 (not shown in FIG. 3 for ease of explanation).

More specifically, in the semiconductor structure 15, to control the voltages of the three-way multi-electron coupler 12, the quantum bit units QU1, QU2, and QU3, and the quantum dot sensors QU1QDS, QU2QDS, and QU3QDS,
Plunger gate GA1 for three-way multi-electron coupler 12;
a confinement gate GA2a for the three-way multi-electron coupler 12 and the quantum bit unit QU1;
a confinement gate GA2b for the three-way multi-electron coupler 12 and quantum bit unit QU2;
a confinement gate GA2c for the three-way multi-electron coupler 12 and quantum bit unit QU3;
Barrier gates GA3a, GA5a, and GA7a for quantum bit unit QU1,
Barrier gates GA3b, GA5b, and GA7b for quantum bit unit QU2,
Barrier gates GA3c, GA5c, and GA7c for quantum bit unit QU3;
Plunger gates GA4a and GA6a for quantum bit unit QU1,
Plunger gates GA4b and GA6b for quantum bit unit QU2,
Plunger gates GA4c and GA6c for quantum bit unit QU3,
Barrier gates GA8a and GA10a for quantum dot sensor QU1QDS,
Barrier gates GA8b and GA10b for quantum dot sensor QU2QDS,
Barrier gates GA8c and GA10c for quantum dot sensor QU3QDS,
Plunger gate GA9a for quantum dot sensor QU1QDS,
A plunger gate GA9b for the quantum dot sensor QU2QDS and a plunger gate GA9c for the quantum dot sensor QU3QDS are provided.
It should be noted that in this disclosure, when reference is made to "GA3" etc., it includes "GA3a, GA3b and GA3c."

By using the gate electrode G described above, a confinement potential can be generated in the semiconductor layer 3 of the semiconductor structure 15 to confine a single electron to each quantum dot QD of each quantum bit unit QU1, QU2, and QU3. The electrons to be confined to the quantum dot QD may be attracted, for example, from each of the ohmic regions OA1, OA2, OA3, OA4, OA5, and OA6 provided in the semiconductor structure 15.

More specifically, by applying a voltage to gate electrodes GA1, GA2, and GA3, a binding potential is formed in the three-way multi-electron coupler 12, and by applying a voltage to gate electrodes GA3 to GA10, a binding potential can be formed in each of the quantum dots QU1QD1, QU1QD2, QU2QD1, QU2QD2, QU3QD1, and QU3QD2 and the quantum dot sensors QU1QDS, QU2QDS, and QU3QDS.

At this time, electrons confined in the quantum dot sensors QU1QDS, QU2QDS, and QU3QDS are attracted from the ohmic regions OA2, OA4, and OA6, and electrons confined in the three-way multi-electron coupler 12 and quantum dots QU1QD1, QU1QD2, QU2QD1, QU2QD2, QU3QD1, and QU3QD2 are attracted from the ohmic regions OA1, OA3, and OA5.
3, the three-way multi-electron coupler 12 may separate the quantum bit units QU1, QU2, and QU3 by a distance d2 (second distance) that is greater than the distance d1 (first distance) between adjacent barrier gates in a single quantum bit unit, thereby suppressing crosstalk between the quantum bit units.

Next, a quantum initialization method implemented in a quantum device according to an embodiment of the present disclosure will be described with reference to FIG.
4 is a diagram showing the flow of a quantum initialization method 40 performed in the quantum device 10 according to an embodiment of the present disclosure. This quantum initialization method 40 is a process for initializing each of the three-way multi-electron coupler, the quantum dot sensor, and the quantum dot in the quantum device 10, and bringing the quantum device 10 into a state in which quantum computation is possible.

First, in step S41, the control unit connected to the gate electrodes (see Figure 7, etc.) supplies a voltage to each gate electrode G in the quantum error correction device.

Next, in step S42, the control unit applies a predetermined voltage to the barrier gates GA8 to GA10 and plunger gate GA9 shown in Figures 1 and 3, thereby attracting electrons from the ohmic regions O2, O4, and O6 and confining a single electron in each of the quantum dot sensors QU1QDS, QU2QDS, and QU3QDS of the quantum bit units QU1, QU2, and QU3.

Next, in step S43, the control unit applies a predetermined voltage to the plunger gates GA1, GA4, GA6 and the barrier gates GA3, GA5, GA7 shown in Figures 1 and 3, thereby attracting electrons from the ohmic regions OA1, OA3, OA5 shown in Figure 3, accumulating an even number of electrons in the three-way multi-electron coupler 12, and confining a single electron in each of the quantum dots QU1QD1, QU1QD2, QU2QD1, QU2QD2, QU3QD1 of the quantum bit units QU1, QU2, and QU3.
Here, the reason why an even number of electrons are stored in the three-way multi-electron coupler 12 is that the sum of the electron spins becomes "0".
Here, a predetermined electron shuttling technique may be used to confine a single electron in each of the three-way multi-electron coupler 12 and the quantum dot QD of the quantum bit unit QU.

Next, in step S44, the control unit uses the quantum dot sensor QDS initialized in step S42 to confirm that an even number of electrons have been accumulated in the three-way multi-electron coupler 12 and that a single electron is confined in each of the quantum dots QU1QD1, QU1QD2, QU2QD1, QU2QD2, and QU3QD1 of the quantum bit units QU1, QU2, and QU3. If an even number of electrons have not been accumulated in the three-way multi-electron coupler 12 or if a single electron is not confined in any of the quantum dots QU1QD1, QU1QD2, Q2QD1, Q2QD2, and Q3QD1, this process may be repeated by returning to step S43.
In this way, the charge amounts of the three-way multi-electron coupler 12, the quantum dot sensor QDS, and the quantum dot QD in the quantum device 10 can be adjusted to bring the quantum device 10 into a state where quantum computing is possible.

In the quantum initialization method 40 described above, the use of the three-way multi-electron coupler 12 makes it possible to individually adjust the charge amounts of the quantum dot sensor and the quantum dots, thereby suppressing crosstalk between quantum dots and bringing the quantum device 10 into a state where quantum computation is possible.

After the above-described quantum initialization method 40 is performed on the quantum device 10, quantum computation can be performed in each of the quantum bit units QU1, QU2, and QU3 using the quantum device 10. The quantum computation in each of the quantum bit units QU1, QU2, and QU3 can be performed, for example, by the following operations.
Initialization: First, the quantum bit unit QU is initialized to a singlet state using the plunger gate of the quantum bit unit, and then the voltage applied to the plunger gates GA4 and GA6 is increased.
Single-qubit operation: Tuning the spin frequency of a quantum dot to drive the rotation of a single qubit.
Two-qubit operations: using the barrier gate of the qubit unit to perform so-called CPHASE, CNOT, or PSWAP operations, where the barrier gate may be used in combination with a microwave drive.
Readout: The qubit state is read out by measuring the Pauli spin blockade using the qubit unit plunger gate.

Next, with reference to Figure 5, a spin exchange method in a quantum device according to an embodiment of the present disclosure will be described.

FIG. 5 is a diagram illustrating a spin exchange method 50 in a quantum device according to an embodiment of the present disclosure. The spin exchange method 50 in a quantum device according to an embodiment of the present disclosure is a method for exchanging spins between any two of the quantum bit units QU1, QU2, and QU3 using the three-way multi-electron coupler 12 described above.

First, as shown in FIG. 5A, in step S51, the control unit applies a predetermined voltage to each gate electrode G so that the energy level of the three-way multi-electron coupler 12 is in a rest state lower than the energy levels of the quantum bit units QU1, QU2, and QU3.
As shown in FIG. 5A, at this stage, the quantum dot QU1D1 of the quantum bit unit QU1 is in an upward state, and the quantum dot QU3D1 of the quantum bit unit QU3 is in a downward state.

Next, as shown in FIG. 5B, in step S52, the control unit applies a predetermined voltage (first voltage) to the plunger gate GA1 of the three-way multi-electron coupler 12 so that the energy level of the three-way multi-electron coupler 12 satisfies a predetermined resonance condition with respect to the two quantum bit units (here, quantum bit unit QU1 and quantum bit unit QU3) that are the subject of spin exchange. The resonance condition here may be, for example, a range of energy levels that is specified so that the energy level of the three-way multi-electron coupler 12 has a predetermined resonance strength with respect to the two quantum bit units that are the subject of spin exchange.

Furthermore, as shown in FIG. 5B, the control unit applies a predetermined voltage (second voltage) to the barrier gates GA3a and GA3c of the two quantum bit units (here, quantum bit unit QU1 and quantum bit unit QU3) that are the subject of spin exchange, so that the barrier gates GA3a and GA3c satisfy a predetermined opening condition. The opening condition here is a criterion that specifies that the barrier gates GA3a and GA3c of the two quantum bit units that are the subject of spin exchange are opened, and Heisenberg exchange becomes possible between the two quantum bit units via the three-way multi-electron coupler 12.

Furthermore, as shown in FIG. 5B, the control unit applies a predetermined voltage (third voltage) to the barrier gate GA3b of a quantum bit unit other than the two quantum bit units that are the subject of spin exchange (here, quantum bit unit QU2) so that the barrier gate GA3b satisfies a predetermined closing condition. The closing condition here is a criterion that stipulates that the barrier gates GA3b of the two quantum bit units that are the subject of spin exchange are closed and Heisenberg exchange cannot occur.

The control unit applies the first voltage, the second voltage, and the third voltage to the plunger gate GA1 and the barrier gates GA3a, GA3b, and GA3c for a predetermined application time t _PSWAP , thereby causing Heisenberg exchange between the quantum bit unit QU1 and the quantum bit unit QU3, as shown by the arrows in FIG. 5B, and exchanging the spin states. For example, in the example described here, the up-state spin of the quantum dot QU1D1 in the quantum bit unit QU1 and the down-state spin of the quantum dot QU3D1 in the quantum bit unit QU3 are exchanged with each other. Meanwhile, the spin state of the quantum dot in the quantum bit unit QU2 remains unchanged.
The rotation phase of the spin exchange can be controlled by adjusting the voltage application time t _PSWAP and the barrier heights of the barrier gates GA3a and GA3c.

Next, as shown in FIG. 5C, the control unit applies a predetermined voltage to each gate electrode G so that the energy level of the three-way multi-electron coupler 12 returns to a rest state that is lower than the energy levels of the quantum bit units QU1, QU2, and QU3.
As a result of the spin exchange, quantum dot QU1D1 in quantum bit unit QU1 is in a downward state, and quantum dot QU3D1 in quantum bit unit QU3 is in an upward state.

Figure 5D shows the potential waveforms at the plunger gate GA1 of the three-way multi-electron coupler 12 and the barrier gates GA3a and GA3c of the two quantum bit units QU1 and QU3 that are the target of spin exchange, in each of the above-mentioned steps S51 to S53. As shown in Figure 5D, in step S51, the energy level of the three-way multi-electron coupler 12 reaches a stationary state lower than the energy levels of the quantum bit units QU1, QU2, and QU3. In step S502, the up-spin state of quantum dot QU1D1 in quantum bit unit QU1 and the down-spin state of quantum dot QU3D1 in quantum bit unit QU3 are exchanged with each other. In step S503, the three-way multi-electron coupler 12 and quantum bit units QU1, Q2, and QU3 return to a stationary state.

The above describes the spin exchange method 50 according to an embodiment of the present disclosure. In one embodiment, the spin exchange method 50 may be implemented by a PSWAP operation (Power of Swap Operation). The PSWAP operation is described below.

For the state space of two qubits with ground states |00＞, |01＞, |10＞, and |11＞, the exchange interaction can be expressed as the Heisenberg Hamiltonian shown below:
Here, α represents coupling strength. The coupling strength α in the three-way multi-electron coupler 12 can be controlled by the barrier gate of the three-way multi-electron coupler 12, and the coupling strength α in the quantum bit unit can be controlled by the barrier gate of the quantum bit unit.

In the basis |00>, |01>, |10>, |11>, the Hamiltonian can be expressed by the following matrix: This defines the following time evolution operator:

By fixing the time and coupling strength so that αt=φ, we can define the PSWAP operation as follows:

According to the spin exchange method 50 described above, by using the three-way multi-electron coupler 12, spins can be exchanged between any two of the quantum bit units QU1, QU2, and QU3. In this spin exchange method 500, when spin exchange is performed between two quantum bit units that are the subject of spin exchange, the barrier gates of quantum bit units other than the two quantum bit units that are the subject of spin exchange are closed, so the spin state does not change. This makes it possible to communicate quantum information between any two quantum bit units while suppressing crosstalk between quantum bits. Furthermore, as will be described later, this configuration makes it possible to construct a two-dimensional quantum bit structure that realizes surface codes.

(Quantum error correction device)
Next, the configuration of a quantum error correction device according to an embodiment of the present disclosure will be described with reference to FIGS.

As mentioned above, so-called surface codes are used to correct errors caused by decoherence and other factors in quantum computations performed on quantum computers. Surface codes are a type of topological quantum error-correcting code defined on a two-dimensional manifold, and generally consist of a two-dimensional quantum bit structure. Below, we explain the architectural configuration of a quantum error-correcting device for realizing surface codes.

A quantum error correction device according to an embodiment of the present disclosure is composed of multiple composite quantum cells arranged in an NxM grid. Each composite quantum cell is composed of two elementary quantum cells coupled by a multi-electron coupler.

FIG. 6 is a diagram showing an example of the configuration of an elementary quantum cell 60 included in a composite quantum cell that constitutes a quantum error correction device according to an embodiment of the present disclosure. As shown in FIG. 6, the elementary quantum cell 60 according to an embodiment of the present disclosure has a configuration in which two quantum devices 10 described with reference to FIGS. 1 to 3 are coupled via a quantum bit unit.

6, basic quantum cell 60 includes first quantum device 10-1 consisting of quantum bit units QU1 and QU2 connected to first three-way multi-electron coupler 12-1, and second quantum device 10-2 consisting of quantum bit units QU3 and QU4 connected to second three-way multi-electron coupler 12-2. First quantum device 10-1 and second quantum device 10-2 are coupled via central quantum bit unit CQU.
Note that the first quantum device 10-1 and the second quantum device 10-2 have substantially the same configuration as the quantum device 10 described with reference to Figures 1 to 3, and therefore, for the sake of convenience, duplicated explanations will be omitted here.

As shown in FIG. 6, in order to control the voltages of the quantum bit units QU1, QU2, QU3, QU4, and CQU, the first three-way multi-electron coupler 12-1, and the second three-way multi-electron coupler 12-2,
a plunger gate GB1 for the first three-way multi-electron coupler 12-1 and the second three-way multi-electron coupler 12-2;
a first three-way multi-electron coupler 12-1 and a second three-way multi-electron coupler 12-2, and a confinement gate GB2 for quantum bit units QU1, QU2, QU3, and QU4;
a barrier gate GB3 separating the quantum bit units QU1, QU2, QU3, and QU4 from the first three-way multi-electron coupler 12-1 and the second three-way multi-electron coupler 12-2;
Barrier gate GB4 for quantum bit units QU1, QU2, QU3, and QU4;
Plunger gate GB5 for quantum bit units QU1, QU2, QU3, and QU4;
A barrier gate GB6 for the quantum dot sensor and a barrier gate GB7 for the quantum dot sensor are provided.

Furthermore, the electrons confined in the quantum dots of the quantum bit units QU1, QU2, QU3, QU4, and CQU may be attracted, for example, from each of the ohmic regions OB1 to OB14 provided in the basic quantum cell 60.

As shown in Figure 6, in the basic quantum cell 60, the central quantum bit unit CQU is connected to four quantum bit units QU1, QU2, QU3, and QU4 via a first three-way multi-electron coupler 12-1 and a second three-way multi-electron coupler 12-2. In this way, by coupling two three-way multi-electron couplers, each connected to two quantum bit units, via the central quantum bit unit, four-way quantum information communication, required for a two-dimensional quantum bit structure to realize a surface code, becomes possible.

FIG. 7 is a diagram showing an example of the configuration of a composite quantum cell 75 constituting a quantum error correction device according to an embodiment of the present disclosure. As shown in FIG. 7, the composite quantum cell 75 according to the embodiment of the present disclosure has a configuration in which two elementary quantum cells 60 described with reference to FIG. 6 are coupled via a two-way multi-electron coupler.

More specifically, the composite quantum cell 75 includes a first elementary quantum cell 60-1 and a second elementary quantum cell 60-2, which are connected to each other via a two-way multi-electron coupler 76.
When performing quantum error correction processing using a quantum error correction device consisting of multiple composite quantum cells 75, the central quantum bit unit CQU2 in the second basic quantum cell 60-2 functions as a "data quantum bit" that actually carries quantum data, and the central quantum bit unit CQU1 in the first basic quantum cell 60-1 functions as a "measurement quantum bit" that is used to confirm whether an error has occurred in the central quantum bit unit CQU2.
It should be noted that the first elementary quantum cell 60-1 and the second elementary quantum cell 60-2 have substantially the same configuration as the elementary quantum cell 60 described with reference to FIG. 6, and therefore, for the sake of convenience, a duplicated description will be omitted here.

Furthermore, as shown in FIG. 7, in the composite quantum cell 75, a control region 77 is defined by multiple composite quantum cells for arranging electronic components such as a control unit 78 for supplying voltage to the quantum bit units included in each of the basic quantum cells. Furthermore, this control region 77 may also be provided with ohmic regions OC1 to OC13 (second ohmic regions) for attracting electrons for the quantum dot sensors of the quantum bit units included in each of the basic quantum cells.

As explained with reference to Figure 7, a two-dimensional quantum bit structure for realizing surface codes can be constructed by combining multiple composite quantum cells in which two basic quantum cells 60 are coupled via a two-way multi-electron coupler.

FIG. 8 is a diagram showing the configuration of a quantum error correction device 80 according to an embodiment of the present disclosure. As described above, the quantum error correction device 80 according to an embodiment of the present disclosure is composed of multiple composite quantum cells arranged in an NxM grid.

8 shows six composite quantum cells 75-1, 75-2, 75-3, 75-4, 75-5, and 75-6 arranged in a 3x2 grid as an example of the configuration of quantum error correction device 80. Each of composite quantum cells 75-1, 75-2, 75-3, 75-4, 75-5, and 75-6 may be coupled via two-way multi-electron coupling.
With this configuration, the central quantum bit unit (a quantum bit unit that functions as a data quantum bit or a measurement quantum bit when performing quantum error correction processing) in each basic cell included in each composite quantum cell is connected to four quantum bit units, thereby enabling four-way quantum information communication required for a two-dimensional quantum bit structure to realize a surface code.
The composite quantum cells 75-1, 75-2, 75-3, 75-4, 75-5, and 75-6 have substantially the same configuration as the composite quantum cell 75 described with reference to FIG. 7, and therefore, for the sake of convenience, a duplicated description will be omitted here.

As described above, each of the composite quantum cells 75-1, 75-2, 75-3, 75-4, 75-5, and 75-6 that make up the quantum error correction device 80 has a control region 77 defined by multiple composite quantum cells, in which electronic components such as a control unit for supplying voltage to the quantum bit unit are placed.

The configuration of the quantum error correction device 80 described above makes it possible to realize a quantum error correction device that can suppress crosstalk between quantum bits coupled by coupling portions, while taking into account the wiring on the semiconductor structure and the layout of classical electronic devices.

Next, referring to FIG. 9, a surface code topology according to an embodiment of the present disclosure will be described.
9A and 9B illustrate an example of a surface code topology configuration according to an embodiment of the present disclosure. Fig. 9A shows a 5x5 surface code topology 94 for implementing a surface code. In Fig. 9A, open circles represent measurement qubits and closed circles represent data qubits. Dark grey regions represent regions where Z-stabilizer operation is applied, and light grey regions represent regions where X-stabilizer operation is applied.

Figure 9B shows a surface code topology 96 in which the 5x5 surface code topology 94 shown in Figure 9A is mapped onto the semiconductor structure (see Figure 8) of a quantum error correction device according to an embodiment of the present disclosure. Quantum bit units QU0 to QU24 are arranged in this surface code topology 96. As in Figure 9A, in Figure 9B, white circles indicate measurement qubits, black circles indicate data qubits, dark gray areas are areas where Z-stabilizer operation is applied, and light gray areas are areas where X-stabilizer operation is applied.

As shown in Figure 9, by embedding a 5x5 topology for realizing a surface code into the semiconductor structure of a quantum error correction device according to an embodiment of the present disclosure, X-stabilizer operation and Z-stabilizer operation can be performed, thereby realizing a surface code for quantum error correction.

Next, with reference to Figure 10, we will explain the quantum initialization method implemented in a quantum error correction device according to an embodiment of the present disclosure.

FIG. 10 is a diagram showing the flow of a quantum initialization method 100 implemented in a quantum error correction device according to an embodiment of the present disclosure. This quantum initialization method 100 is a process for initializing each quantum device included in the quantum error correction device and bringing it into a state where quantum computation is possible.

First, in step S101, the control unit described above (for example, control unit 78 arranged in control region 77 in FIG. 8) supplies a voltage to each gate electrode of each quantum device in the quantum error correction device.

Next, in step S102, the control unit applies a predetermined voltage to the quantum dot sensor barrier gate GB6 and the quantum dot sensor barrier gate GB7 shown in FIG. 6, thereby attracting electrons from the ohmic regions OC2, OC4, OC5, OC6, OC7, OC10, OC11, etc. arranged in the control region 77 shown in FIG. 6, and confining a single electron in each of the quantum dot sensors of the quantum bit unit.

Next, in step S103, the control unit applies a predetermined voltage to the plunger gate GB1 for the three-way multi-electron couplers 12-1 and 12-2, the plunger gate GB5 for the quantum bit unit, and the barrier gates GB3 and GB4 for the quantum bit unit shown in FIG. 6, thereby attracting electrons from the ohmic regions O1 to O14 shown in FIG. 6, causing an even number of electrons to accumulate in the three-way multi-electron couplers 12-1 and 12-2, and confining a single electron in each of the quantum dots of the quantum bit unit.
As described above, the reason why an even number of electrons are stored in the three-way multi-electron coupler is that the sum of the electron spins becomes "0".
Here, a predetermined electron shuttling technique may be used to confine a single electron in each of the three-way multi-electron coupler and the quantum dot of the quantum bit unit.

Next, in step S104, using the quantum dot sensor initialized in step S102, it is confirmed that an even number of electrons are accumulated in the three-way multi-electron couplers 12-1 and 12-2 and that a single electron is confined in each of the quantum dots of the quantum bit unit.
If an even number of electrons are not stored in the three-way multi-electron coupler or if a single electron is not confined in each of the quantum dots of the quantum bit unit, the control unit may perform step S103 again.
In this way, by adjusting the charge amounts of the three-way multi-electron coupler, quantum dot sensor, and quantum dot in the quantum error correction device, each quantum device included in the quantum error correction device can be made capable of quantum computing.

In the quantum initialization method 100 described above, the use of a three-way multi-electron coupler makes it possible to individually adjust the charge amounts of the quantum dot sensor and the quantum dot, thereby suppressing crosstalk between quantum dots and bringing the quantum device into a state where quantum computation is possible.
It should be noted that in the above-described quantum initialization method 100, electrons stored in the three-way multi-electron coupler and the quantum dot of the quantum bit unit are attracted from the ohmic region (first ohmic region) located in the above-described basic quantum cell, whereas electrons stored in the quantum dot sensor are attracted from the ohmic region (second ohmic region) located in the control region of the composite quantum cell. This allows each of the multi-electron coupler, the quantum dot, and the quantum dot sensor to attract electrons from nearby ohmic regions, thereby suppressing electrical interference.

After performing the above-described quantum initialization method 100, quantum computation can be performed in each quantum bit unit using the quantum device. The quantum computation in each quantum bit unit can be performed, for example, by the following operations.
Initialization: First, the plunger gate of the quantum bit unit is used to initialize the quantum bit unit to a singlet state, and then the voltage applied to the plunger gate is increased.
Single-qubit operation: Tuning the spin frequency of a quantum dot to drive the rotation of a single qubit.
Two-qubit operations: using the barrier gate of the qubit unit to perform so-called CPHASE, CNOT, or PSWAP operations, where the barrier gate may be used in combination with a microwave drive.
Readout: The qubit state is read out by measuring the Pauli spin blockade using the qubit unit plunger gate.
MECPSWAP: As described above, quantum information such as spin can be exchanged between any two quantum bits by implementing the spin exchange method described with reference to FIG.

Next, an example of a surface coding operation according to an embodiment of the present disclosure will be described with reference to FIG.
In the case of the L×L topology shown in Fig. 9, the quantum error correction device is initialized as described with reference to Fig. 10, and each quantum dot in the quantum error correction device is initialized. After that, an X-stabilizer operation and a Z-stabilizer operation are performed on the measurement qubit and the data qubit using a CNOT gate, thereby realizing a surface code and performing quantum error correction. Below, the X-stabilizer operation and the Z-stabilizer operation in the quantum error correction device according to an embodiment of the present disclosure will be described with reference to Fig. 11.

FIG. 11 is a diagram illustrating an example of X-stabilizer operation and Z-stabilizer operation according to an embodiment of the present disclosure.
In general, the X-stabilizer operation and the Z-stabilizer operation are operations performed to detect and correct errors in a quantum bit. More specifically, the X-stabilizer performs a parity check in the X basis to detect whether a bit flip error has occurred in the X basis. Furthermore, the Z-stabilizer performs a parity check in the Z basis to detect whether a phase error has occurred in the Z basis. By performing the X-stabilizer operation and the Z-stabilizer operation, it is possible to detect whether an error has occurred in the X basis and the Z basis of a quantum bit and correct the error.

Figure 11A shows the qubit units QU0 to QU24 used for Z-stabilizer operation in the surface code topology 96 shown in Figure 9. As shown in Figure 11A, qubit units QU3, QU5, QU6, and QU8 are measurement qubits, and qubit unit QU18 is a data qubit.

Figure 11B shows the quantum bit units QU0 to QU24 used for X-stabilizer operation in the surface code topology 96 shown in Figure 9. As shown in Figure 11B, quantum bit units QU6, QU8, QU9, and QU11 are measurement quantum bits, and quantum bit unit QU21 is a data quantum bit.

FIG. 11C is a quantum circuit illustrating Z-stabilizer operation performed between qubit units QU3, QU5, QU6, and QU8 used as measurement qubits and qubit unit QU18 used as a data qubit.
FIG. 11D is a quantum circuit illustrating the X-stabilizer operation performed between qubit units QU6, QU8, QU9, and QU11 used as measurement qubits and qubit unit QU21 used as a data qubit.

The operations shown in Figures 11C and 11D enable one-qubit operations to be performed. On the other hand, for two-qubit operations such as a CNOT gate, since the measurement qubit and data qubit are not nearest neighbors, it is desirable to follow the procedures shown in Figures 11E and 11F to perform the operation of a CNOT gate.

Figure 11E shows a quantum circuit for performing a CNOT gate operation on quantum bit units QU18 and QU6, and Figure 11F shows a quantum circuit for performing a CNOT gate operation on quantum bit unit QU21 and quantum bit unit QU9.

First, as shown in Figures 11E and 11F, respectively, a series of PSWAP operations (standard PSWAP operations within the qubit unit and the PSWAP operations of the multi-electron coupler described with reference to Figure 5) are used to transfer the information of the computation qubits of the data qubit unit and the measurement qubit unit to one qubit unit.
Next, the computation qubits of the data qubit unit and the measurement qubit unit perform CNOT gate operations on adjacent qubit units, as shown in Figures 11E and 11F, respectively.
Next, as shown in Figures 11E and 11F, respectively, standard PSWAP operations within the qubit unit and the PSWAP operations of the multi-electron coupler described with reference to Figure 5 are used to transfer the information of the computation qubit back to the original computation qubit in the data qubit unit and measurement qubit unit, respectively.

As described above, by implementing X-stabilizer operation and Z-stabilizer operation on the surface code topology of the quantum error correction device according to the embodiment of the present disclosure, it is possible to realize a surface code for quantum error correction.

(Modification)
Next, modified examples of the configuration of the quantum error correction device according to the embodiment of the present disclosure will be described with reference to FIGS.

(Variation 1)
FIG. 12 is a diagram illustrating a configuration of a quantum error correction device according to the first modification of the present disclosure.
In the above, with reference to Figures 1 to 11, an example has been described in which three quantum bit units connected to a three-way multi-electron coupler in a quantum device are arranged at positions separated by 110 to 130 degrees (e.g., 120 degrees). However, the present disclosure is not limited to this, and three quantum bits connected to a three-way multi-electron coupler in a quantum device may also be arranged at positions separated by, for example, 80 to 100 degrees (e.g., 90 degrees).

Figure 12A shows an example of the configuration of a composite quantum cell in a quantum device where three quantum bits connected to a three-way multi-electron coupler are arranged at positions separated by 90 degrees. Figure 12B shows a quantum error correction device configured by arranging multiple composite quantum cells in an NxM grid, where three quantum bits connected to a three-way multi-electron coupler are arranged at positions separated by 90 degrees.

As shown in Figures 12A and 12B, the three quantum bit units QU1, QU2, and QU3 connected to the three-way multi-electron coupler 12 in the quantum device are positioned at 90-degree intervals. In this way, the composite quantum cell and quantum error correction device have a more rectangular shape.

Since rectangular shapes are considered preferable in microelectronics manufacturing, by making the composite quantum cell in a quantum error correction device have a more square configuration, as shown in Figure 12, it is possible to simplify the manufacturing process and improve the ease of design and degree of integration.

(Variation 2)
13 and 14 are diagrams showing the configuration of a quantum error correction device according to the second modification of the present disclosure.
While the composite quantum cell (see FIG. 7 ) having a configuration in which three-way multi-electron couplers in multiple elementary quantum cells are coupled by a two-way multi-electron coupler has been described above with reference to FIGS. 6 to 8 , the present disclosure is not limited thereto, and the composite quantum cell may be composed of elementary quantum cells coupled via two two-way multi-electron couplers connected by one or more spacer qubit units.

13A is a diagram showing an example of a configuration in which spacer qubit units are provided in the horizontal direction of a composite quantum cell according to Variation 2 of the present disclosure, and FIG. 13B is a diagram showing a quantum error correction device configured by arranging a plurality of composite quantum cells, each having spacer qubit units provided in the horizontal direction, in an N×M grid.
As shown in Figures 13A and 13B, in each elementary quantum cell included in the composite quantum cell, the two-way multi-electron coupler 13-1 connected to the three-way multi-electron coupler 12-1 of the first quantum device 10-1 and the two-way multi-electron coupler 13-2 connected to the three-way multi-electron coupler 12-2 of the second quantum device 10-2 are coupled via a spacer quantum bit unit SQU.

(Variation 3)
Figure 14A shows an example of a configuration in which spacer qubit units are provided in the horizontal and vertical directions of a composite quantum cell according to Variation 3 of the present disclosure, and Figure 14BD shows a quantum error correction device configured by arranging a plurality of composite quantum cells, each having spacer qubit units provided in the horizontal and vertical directions, in an NxM grid.
14A and 14B, in each elementary quantum cell included in the composite quantum cell, two-way multi-electron coupler 13-1 connected to three-way multi-electron coupler 12-1 of first quantum device 10-1 and two-way multi-electron coupler 13-2 connected to three-way multi-electron coupler 12-2 of second quantum device 10-2 are coupled via spacer quantum bit unit QUS1. Also, two-way multi-electron coupler 13-3 connected to three-way multi-electron coupler 12-2 of second quantum device 10-2 and two-way multi-electron coupler 13-4 connected to three-way multi-electron coupler 12-3 of third quantum device 10-3 are coupled via spacer quantum bit unit QUS2.

In this way, by providing spacer qubit units in the horizontal or vertical direction (or both) of the composite quantum cell, a larger area can be secured for the control region 77 in which classical electronic components such as a control unit are placed, as shown in Figures 14A and 14B. Defining a larger control region 77 also makes it possible to install components for performing functions such as so-called magic state distillation. Furthermore, by securing a larger area for the control region 77, the distance between the measurement qubit and the data qubit increases, which enables quantum error decorrelation and more reliable identification of quantum errors.

As described above, a quantum device according to an embodiment of the present disclosure includes a three-way multi-electron coupler to which three quantum bit units are connected. Each quantum bit unit includes a set of quantum bits and a quantum bit sensor that measures the state of the set of quantum bits. Barrier gates that control the potential of the quantum dots that serve as quantum bits are located on both sides of the set of quantum bits and between the quantum bits. Furthermore, a plunger gate is located for the three-way multi-electron coupler. By controlling the voltages applied to the gate electrodes of the multi-electron coupler and the quantum bit units, a PSWAP operation can be performed to exchange spins between any three of the three quantum bit units.
Furthermore, by using a three-way multi-electron coupler to set the distance between quantum bit units to a certain distance or more, crosstalk between quantum bits can be suppressed.

Furthermore, by linking two quantum devices each consisting of a set of quantum bit units connected by a three-way multi-electron coupler, it is possible to construct a basic quantum cell that enables four-way communication of quantum information. By using a composite quantum cell in which two basic quantum cells configured in this way are coupled by a two-way multi-electron coupler, it is possible to obtain spin information from four data quantum bit units with a single measurement quantum bit unit through the spin exchange operation of the multi-electron coupler. By arranging composite quantum cells configured in this way in an NxM grid, it is possible to construct a quantum error correction device with a two-dimensional quantum bit structure that realizes a surface code for identifying and correcting errors in quantum computations by the quantum bit units.

Furthermore, in this quantum error correction device, by arranging control units such as multiplexing systems that supply voltage to the quantum bit units, as well as classical electronic components, in an area defined by the composite quantum cell, it is possible to efficiently control each quantum bit unit while minimizing the dimensions of the quantum device and the complexity of the wiring.

In this way, it is possible to provide a quantum device, spin exchange method, and quantum error correction device that can suppress crosstalk between quantum bits, while taking into account the wiring on the semiconductor structure and the layout of classical electronic devices.

As described above, the quantum device, spin exchange method, and quantum error correction apparatus according to the embodiments of the present disclosure include the following aspects.

(Aspect 1)
A quantum device comprising a set of qubit units and a three-way multi-electron coupler connected to the set of qubit units,
Each of the qubit units in the set of qubit units
a semiconductor layer including a semiconductor channel disposed between a plurality of ohmic regions;
an insulating layer disposed above the semiconductor layer;
a set of gate electrodes disposed in the insulating layer to induce an electric potential in the semiconductor channel;
a set of quantum dots formed in the semiconductor channel along an imaginary wiring direction passing through a center point of the three-way multi-electron coupler;
The three-way multi-electron coupler comprises:
a plunger gate configured to interface with the set of gate electrodes of each of the qubit units to effect spin exchange between any two of the set of qubit units;
A quantum device characterized by:

(Aspect 2)
Each of the qubit units in the set of qubit units
further comprising a quantum dot sensor disposed adjacent to the set of quantum dots to measure a state of the set of quantum dots.
2. The quantum device according to claim 1,

(Aspect 3)
3. The quantum device of claim 1, wherein the three-way multi-electron coupler separates the quantum bit units in the set of quantum bit units by a second distance that is greater than a first distance between adjacent barrier gates in a set of gate electrodes arranged on a single quantum bit unit.

(Aspect 4)
4. The quantum device according to any one of aspects 1 to 3, wherein the quantum bit units included in the set of quantum bit units are arranged at positions separated from each other by 110 degrees to 130 degrees.

(Aspect 5)
5. The quantum device according to any one of aspects 1 to 4, wherein the quantum bit units included in the set of quantum bit units are arranged at positions separated from each other by 80 degrees to 100 degrees.

(Aspect 6)
The quantum device is
a control unit connected to the set of gate electrodes of the qubit unit and the plunger gate of the three-way multi-electron coupler;
The control unit
applying voltages to the set of gate electrodes of the qubit unit and to a plunger gate of the three-way multi-electron coupler to bind a single electron in each quantum dot in the set of quantum dots and to bind an even number of electrons in the three-way multi-electron coupler;
6. The quantum device according to any one of aspects 1 to 5.

(Aspect 7)
The control unit
applying a first voltage to the plunger gate of the three-way multi-electron coupler for a predetermined application time such that a first energy level of the three-way multi-electron coupler satisfies a predetermined resonance condition for a first qubit unit and a second qubit unit in the set of qubit units;
applying a second voltage to the sets of gate electrodes of the first quantum bit unit and the second quantum bit unit so that the sets of gate electrodes of the first quantum bit unit and the second quantum bit unit satisfy a predetermined open condition during the predetermined application time;
performing spin exchange between the first qubit unit and the second qubit unit by applying a third voltage to the set of gate electrodes of a third qubit unit in the set of qubit units for the predetermined application time such that the set of gate electrodes of the third qubit unit satisfies a predetermined closing condition;
7. The quantum device according to claim 6.

(Aspect 8)
1. A spin exchange method implemented in a quantum device comprising: a set of quantum bit units; a three-way multi-electron coupler connected to the set of quantum bit units; and a controller electrically connected to the set of quantum bit units and the three-way multi-electron coupler,
In the quantum device,
Each of the qubit units in the set of qubit units
a semiconductor layer including a semiconductor channel disposed between a plurality of ohmic regions;
an insulating layer disposed above the semiconductor layer;
a set of gate electrodes disposed in the insulating layer to induce an electric potential in the semiconductor channel;
a set of quantum dots arranged in the semiconductor channel along a direction of an imaginary wiring passing through a center point of the three-way multi-electron coupler;
The three-way multi-electron coupler comprises:
a plunger gate configured to interface with the set of gate electrodes of each of the qubit units to effect spin exchange between any two of the set of qubit units;
The spin exchange method comprises:
applying, using the control unit, a first voltage to the plunger gate of the three-way multi-electron coupler for a predetermined application time such that a first energy level of the three-way multi-electron coupler satisfies a predetermined resonance condition for a first quantum bit unit and a second quantum bit unit in the set of quantum bit units;
applying, using the control unit, a second voltage to the set of gate electrodes of the first quantum bit unit and the second quantum bit unit for the predetermined application time such that the set of gate electrodes of the first quantum bit unit and the second quantum bit unit satisfy a predetermined open condition;
using the control unit to apply a third voltage to the set of gate electrodes of a third quantum bit unit in the set of quantum bit units for the predetermined application time, such that the set of gate electrodes of the third quantum bit unit satisfies a predetermined closing condition, thereby performing spin exchange between the first quantum bit unit and the second quantum bit unit;
A spin exchange method comprising:

(Aspect 9)
1. A quantum error correction device comprising a plurality of composite quantum cells arranged in an NxM grid,
each composite quantum cell includes a first elementary quantum cell and a second elementary quantum cell coupled by a zeroth multi-electron coupler;
Each of the first elementary quantum cell and the second elementary quantum cell comprises:
a first set of qubit units; and
a first multi-electron coupler connected to the first set of qubit units;
a second set of qubit units; and
a second multi-electron coupler connected to the second set of qubit units;
the first multi-electron coupler and the second multi-electron coupler are coupled via a central qubit unit shared by the first set of qubit units and the second set of qubit units;
A quantum error correction device characterized by:

(Aspect 10)
Each of the qubit units in the first set of qubit units and the second set of qubit units comprises:
a semiconductor layer including a semiconductor channel disposed between a plurality of first ohmic regions;
an insulating layer disposed above the semiconductor layer;
a set of gate electrodes disposed in the insulating layer to induce an electric potential in the semiconductor channel;
a set of quantum dots arranged in the semiconductor channel along a direction of an imaginary wiring passing through a center point of the first multi-electron coupler or the second multi-electron coupler;
The first multi-electron coupler or the second multi-electron coupler is
a plunger gate configured to interface with the set of gate electrodes of each of the qubit units to effect spin exchange between any two of the set of qubit units;
10. The quantum error correction device according to aspect 9.

(Aspect 11)
Each of the qubit units in the set of qubit units
further comprising a quantum dot sensor disposed adjacent to the set of quantum dots to measure a state of the set of quantum dots.
11. The quantum error correction device according to aspect 10.

(Aspect 12)
In the quantum error correction device, a control unit for supplying a voltage to each of the composite quantum cells is arranged in a control region defined by the plurality of composite quantum cells;
the control region includes a second ohmic region;
The control unit
applying a voltage to the set of gate electrodes of the quantum dot sensor to initialize the quantum dot sensor by attracting electrons from the second ohmic region;
applying a voltage to the set of gate electrodes of the qubit unit to attract electrons from the first ohmic regions, thereby binding a single electron within each quantum dot in the set of quantum dots;
applying a voltage to the plunger gate of each of the first multi-electron coupler and the second multi-electron coupler to attract electrons from the first ohmic region, thereby binding an even number of electrons to each of the first multi-electron coupler and the second multi-electron coupler;
12. The quantum error correction device according to aspect 11.

(Aspect 13)
The quantum error correction device
performing quantum error correction by performing an X-stabilizer operation and a Z-stabilizer operation on each of the first set of qubit units in the first elementary quantum cell and the second set of qubit units in the second elementary quantum cell;
13. The quantum error correction device according to aspect 12.

(Aspect 14)
the first multi-electron coupler is a three-way multi-electron coupler;
the second multi-electron coupler is a three-way multi-electron coupler;
the zeroth multi-electron coupler is a two-way multi-electron coupler for coupling the three-way multi-electron couplers of the first elementary quantum cell and the second elementary quantum cell via a quantum bit unit;
14. The quantum error correction device according to any one of aspects 9 to 13.

(Aspect 15)
the first multi-electron coupler is a three-way multi-electron coupler;
the second multi-electron coupler is a two-way multi-electron coupler;
the first elementary quantum cell and the second elementary quantum cell are coupled by respective two-way multi-electron couplers of the first elementary quantum cell and the second elementary quantum cell;
each of the two-way multi-electron couplers is coupled to another via a spacer qubit unit;
15. The quantum error correction device according to any one of aspects 9 to 14.

The above describes an embodiment of the present invention, but the present invention is not limited to the above embodiment, and various modifications are possible without departing from the spirit of the present invention.

10 Quantum device 12 Three-way multi-electron coupler 15 Semiconductor structure G Gate electrodes QU1, QU2, QU3 Quantum bit units QU1D1, QU1D2, QU2D1, QU2D2, QU3D1, QU3D2 Quantum dots QU1QDS, QU2QDS, QU3QDS Quantum dot sensor

Claims (15)

A quantum device comprising a set of qubit units and a three-way multi-electron coupler connected to the set of qubit units,
Each of the qubit units in the set of qubit units
a semiconductor layer including a semiconductor channel disposed between a plurality of ohmic regions;
an insulating layer disposed above the semiconductor layer;
a set of gate electrodes disposed in the insulating layer to induce an electric potential in the semiconductor channel;
a set of quantum dots formed in the semiconductor channel along an imaginary wiring direction passing through a center point of the three-way multi-electron coupler;
The three-way multi-electron coupler comprises:
a plunger gate configured to interface with the set of gate electrodes of each of the qubit units to effect spin exchange between any two of the set of qubit units;
A quantum device characterized by: Each of the qubit units in the set of qubit units
a quantum dot sensor disposed adjacent to the set of quantum dots and configured to measure a state of the set of quantum dots;
The quantum device according to claim 1 . The quantum device of claim 1, wherein the three-way multi-electron coupler separates the quantum bit units in the set of quantum bit units by a second distance greater than a first distance between adjacent barrier gates in a set of gate electrodes arranged on a single quantum bit unit. The quantum device of claim 1, wherein each of the quantum bit units included in the set of quantum bit units is positioned at positions separated from each other by 110 degrees to 130 degrees. The quantum device of claim 1, wherein each of the quantum bit units included in the set of quantum bit units is positioned at positions separated from each other by 80 to 100 degrees. The quantum device is
a control unit connected to the set of gate electrodes of the qubit unit and the plunger gate of the three-way multi-electron coupler;
The control unit
applying voltages to the set of gate electrodes of the qubit unit and to the plunger gate of the three-way multi-electron coupler to bind a single electron in each quantum dot in the set of quantum dots and to bind an even number of electrons in the three-way multi-electron coupler;
The quantum device according to claim 1 . The control unit
applying a first voltage to the plunger gate of the three-way multi-electron coupler for a predetermined application time such that a first energy level of the three-way multi-electron coupler satisfies a predetermined resonance condition for a first qubit unit and a second qubit unit in the set of qubit units;
applying a second voltage to the sets of gate electrodes of the first quantum bit unit and the second quantum bit unit so that the sets of gate electrodes of the first quantum bit unit and the second quantum bit unit satisfy a predetermined opening condition during the predetermined application time;
performing spin exchange between the first qubit unit and the second qubit unit by applying a third voltage to the set of gate electrodes of a third qubit unit in the set of qubit units for the predetermined application time such that the set of gate electrodes of the third qubit unit satisfies a predetermined closing condition;
7. The quantum device according to claim 6. 1. A spin exchange method implemented in a quantum device comprising: a set of quantum bit units; a three-way multi-electron coupler connected to the set of quantum bit units; and a controller electrically connected to the set of quantum bit units and the three-way multi-electron coupler,
In the quantum device,
Each of the qubit units in the set of qubit units
a semiconductor layer including a semiconductor channel disposed between a plurality of ohmic regions;
an insulating layer disposed above the semiconductor layer;
a set of gate electrodes disposed in the insulating layer to induce an electric potential in the semiconductor channel;
a set of quantum dots arranged in the semiconductor channel along a direction of an imaginary wiring passing through a center point of the three-way multi-electron coupler;
The three-way multi-electron coupler comprises:
a plunger gate configured to interface with the set of gate electrodes of each of the qubit units to effect spin exchange between any two of the set of qubit units;
The spin exchange method comprises:
applying, using the control unit, a first voltage to the plunger gate of the three-way multi-electron coupler for a predetermined application time such that a first energy level of the three-way multi-electron coupler satisfies a predetermined resonance condition for a first quantum bit unit and a second quantum bit unit in the set of quantum bit units;
applying, using the control unit, a second voltage to the set of gate electrodes of the first quantum bit unit and the second quantum bit unit for the predetermined application time such that the set of gate electrodes of the first quantum bit unit and the second quantum bit unit satisfy a predetermined open condition;
using the control unit to apply a third voltage to the set of gate electrodes of a third quantum bit unit in the set of quantum bit units for the predetermined application time, such that the set of gate electrodes of the third quantum bit unit satisfies a predetermined closing condition, thereby performing spin exchange between the first quantum bit unit and the second quantum bit unit;
A spin exchange method comprising: 1. A quantum error correction device comprising a plurality of composite quantum cells arranged in an NxM grid,
each composite quantum cell includes a first elementary quantum cell and a second elementary quantum cell coupled by a zeroth multi-electron coupler;
Each of the first elementary quantum cell and the second elementary quantum cell comprises:
a first set of qubit units; and
a first multi-electron coupler connected to the first set of qubit units;
a second set of qubit units; and
a second multi-electron coupler connected to the second set of qubit units;
the first multi-electron coupler and the second multi-electron coupler are coupled via a central qubit unit shared by the first set of qubit units and the second set of qubit units;
A quantum error correction device characterized by: Each of the qubit units in the first set of qubit units and the second set of qubit units comprises:
a semiconductor layer including a semiconductor channel disposed between a plurality of first ohmic regions;
an insulating layer disposed above the semiconductor layer;
a set of gate electrodes disposed in the insulating layer to induce an electric potential in the semiconductor channel;
a set of quantum dots arranged in the semiconductor channel along a direction of an imaginary wiring passing through a center point of the first multi-electron coupler or the second multi-electron coupler;
The first multi-electron coupler or the second multi-electron coupler is
a plunger gate configured to interface with the set of gate electrodes of each of the qubit units to effect spin exchange between any two of the set of qubit units;
10. The quantum error correction device according to claim 9. Each of the qubit units in the set of qubit units
a quantum dot sensor disposed adjacent to the set of quantum dots and configured to measure a state of the set of quantum dots;
11. The quantum error correction device according to claim 10. In the quantum error correction device, a control unit for supplying a voltage to each of the composite quantum cells is arranged in a control region defined by the plurality of composite quantum cells;
the control region includes a second ohmic region;
The control unit
applying a voltage to the set of gate electrodes of the quantum dot sensor to initialize the quantum dot sensor by attracting electrons from the second ohmic region;
applying a voltage to the set of gate electrodes of the qubit unit to attract electrons from the first ohmic regions, thereby binding a single electron within each quantum dot in the set of quantum dots;
applying a voltage to the plunger gate of each of the first multi-electron coupler and the second multi-electron coupler to attract electrons from the first ohmic region, thereby binding an even number of electrons to each of the first multi-electron coupler and the second multi-electron coupler;
12. The quantum error correction device according to claim 11. The quantum error correction device
performing quantum error correction by performing an X-stabilizer operation and a Z-stabilizer operation on each of the first set of qubit units in the first elementary quantum cell and the second set of qubit units in the second elementary quantum cell;
13. The quantum error correction device according to claim 12. the first multi-electron coupler is a three-way multi-electron coupler;
the second multi-electron coupler is a three-way multi-electron coupler;
the zeroth multi-electron coupler is a two-way multi-electron coupler for coupling the three-way multi-electron couplers of the first elementary quantum cell and the second elementary quantum cell via a quantum bit unit;
10. The quantum error correction device according to claim 9. the first multi-electron coupler is a three-way multi-electron coupler;
the second multi-electron coupler is a two-way multi-electron coupler;
the first elementary quantum cell and the second elementary quantum cell are coupled by respective two-way multi-electron couplers of the first elementary quantum cell and the second elementary quantum cell;
each of the two-way multi-electron couplers is coupled to another via a spacer qubit unit;
10. The quantum error correction device according to claim 9.