WO2025011343A1 - 一种封装结构、激光器和光学元件 - Google Patents
一种封装结构、激光器和光学元件 Download PDFInfo
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- WO2025011343A1 WO2025011343A1 PCT/CN2024/101780 CN2024101780W WO2025011343A1 WO 2025011343 A1 WO2025011343 A1 WO 2025011343A1 CN 2024101780 W CN2024101780 W CN 2024101780W WO 2025011343 A1 WO2025011343 A1 WO 2025011343A1
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- chip
- pcb board
- light
- packaging structure
- electrode blocks
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 42
- 230000003287 optical effect Effects 0.000 title claims abstract description 21
- 238000003466 welding Methods 0.000 claims description 8
- 239000000853 adhesive Substances 0.000 claims description 3
- 238000004026 adhesive bonding Methods 0.000 claims description 3
- 230000001070 adhesive effect Effects 0.000 claims description 3
- 230000003071 parasitic effect Effects 0.000 abstract description 14
- 230000017525 heat dissipation Effects 0.000 abstract description 9
- 230000001668 ameliorated effect Effects 0.000 abstract 1
- 230000005693 optoelectronics Effects 0.000 description 17
- 238000000034 method Methods 0.000 description 16
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 7
- 238000007493 shaping process Methods 0.000 description 7
- 238000013461 design Methods 0.000 description 6
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- 238000012858 packaging process Methods 0.000 description 3
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- 230000008054 signal transmission Effects 0.000 description 3
- 101100012902 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) FIG2 gene Proteins 0.000 description 2
- 101100233916 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) KAR5 gene Proteins 0.000 description 2
- 230000001965 increasing effect Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/022—Mountings; Housings
- H01S5/023—Mount members, e.g. sub-mount members
- H01S5/02325—Mechanically integrated components on mount members or optical micro-benches
- H01S5/02326—Arrangements for relative positioning of laser diodes and optical components, e.g. grooves in the mount to fix optical fibres or lenses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/022—Mountings; Housings
- H01S5/023—Mount members, e.g. sub-mount members
- H01S5/02315—Support members, e.g. bases or carriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/024—Arrangements for thermal management
- H01S5/02469—Passive cooling, e.g. where heat is removed by the housing as a whole or by a heat pipe without any active cooling element like a TEC
Definitions
- the present invention relates to the field of lasers, and in particular to a packaging structure, a laser and an optical element.
- optoelectronic modules need to meet the growing demand for data communications, including the rapid development of the Internet of Things, big data and cloud computing.
- chip design needs to adopt advanced high-speed circuit design technology.
- Technical measures such as optimizing signal transmission paths, reducing signal loss and reducing crosstalk are adopted to ensure fast transmission and accurate reception of signals at high frequencies.
- the packaging of optoelectronic devices is crucial to the performance of optoelectronic modules.
- the packaging design needs to consider high-frequency response characteristics, low loss and high stability.
- high-quality material selection and precise packaging technology can minimize the impact of electrical parasitic phenomena such as resistance, capacitance and inductance.
- reasonable thermal management and protection measures also need to be considered to ensure the long-term stability and reliability of the optoelectronic module.
- module assembly technology also plays an important role in the performance of optoelectronic modules.
- High-density and high-integration module assembly can achieve optoelectronic modules with smaller size, higher performance and lower power consumption.
- the use of advanced micro-nano processing technology and micro-assembly technology such as chip-level packaging, fiber alignment and micro-welding, can achieve high integration and efficient connection of optoelectronic modules, and improve overall performance and reliability.
- optoelectronic modules require continuous efforts in chip design and development, optoelectronic device packaging and module assembly.
- optoelectronic modules can better meet the growing demand for data communications and promote high-speed, efficient and reliable information transmission.
- the embodiment of the present invention is expected to provide a packaging structure, a laser and an optical element.
- the structure can reduce parasitic inductance, enhance heat dissipation capability, reduce the risk of chip deformation, reduce micro-deformation between the light source and the optical shaping device, and also improve the difficulty of mechanical assembly, thereby enhancing assembly flexibility.
- an embodiment of the present invention provides a packaging structure, which includes a PCB board and at least one light-emitting module, wherein the light-emitting module includes: at least two electrode blocks, which are directly connected to the PCB board; at least one chip, which is arranged between the two electrode blocks, and both sides of the chip are held by the electrode blocks to fix the chip, and the light-emitting module is constructed so that the electrode blocks hold the chip at an angle to the plane where the PCB board is located, so that the light-emitting direction of the chip is not parallel to the plane where the PCB board is located.
- the light emitting module is constructed such that a single electrode block and a single chip are arranged at intervals.
- the electrode block and the chip are fixed by welding, bonding with conductive adhesive, or directly abutting.
- the electrode block is fixed to the PCB board by welding or bonding with conductive adhesive.
- the electrode block is fixed to the PCB board in a manner perpendicular to the plane where the PCB board is located.
- an embodiment of the present invention provides a laser, wherein the laser includes the above-mentioned packaging structure.
- an embodiment of the present invention provides an optical element, which includes the above-mentioned laser, and the optical element is used in fields such as automotive radar and optical communications.
- the packaging structure reduces parasitic inductance by directly packaging the light-emitting module on the PCB board, achieving electrical performance of narrow pulse width and high peak power.
- the electrode block inside the light-emitting module fixes the chip in a manner of holding the two sides of the chip, and keeps the chip at an angle with the plane where the PCB board is located, so that the light-emitting direction is not parallel to the PCB board, thereby better controlling the propagation direction of light and providing better light output effects, and enriching the possibilities of PCB board surface arrangement.
- the packaging structure can
- the light emitting module comprises a plurality of the light emitting modules, and a single light emitting module can connect a plurality of chips in series, thereby improving the integration of the photoelectric module, reducing the size and reducing the cost.
- FIG1 is a schematic diagram of a COB packaging structure in the prior art
- FIG2 is a top view of a packaging structure according to an embodiment of the present invention.
- FIG3 is a top view of a packaging structure according to another embodiment of the present invention, wherein the packaging structure includes three light-emitting modules;
- FIG4 is a top view of the structure of a light emitting module in another embodiment of the present invention.
- FIG5 is a top view of another packaging structure in another embodiment of the present invention, wherein the light emitting module and the PCB board form an angle of 60°.
- the packaging of light-emitting chips often adopts COB (Chip-on-Board) packaging technology.
- COB Chip-on-Board
- this packaging method directly sticks the chip on the substrate and connects the chip to the pins of the substrate through gold wire bonding.
- parasitic inductance is generated due to the coil-like structure formed by the gold wire between the chip and the substrate. This will cause inductance loss and crosstalk during signal transmission, thereby affecting the high-frequency response and signal quality of the module.
- One common method is to wire as much as possible or use ribbon leads for wire bonding during the packaging process of optoelectronic devices. By increasing the number of gold wires or using ribbon leads for connection, the length of the gold wire can be effectively reduced, thereby reducing the impact of parasitic inductance.
- Another common method is that the chip can first be connected to a ceramic board by welding or bonding technology, and then the ceramic board is connected to the substrate. This method can effectively reduce the length of the gold wire between the chip and the substrate, thereby reducing the impact of parasitic inductance.
- the gold wires usually used have a small diameter and a long length, which will introduce relatively high inductance. Even if the number of gold wires is increased to 16 by multi-wire bonding, the total inductance is still large. This is because in optoelectronic modules, the requirements for high-frequency signal transmission and fast signal response are very strict, and the impact of inductance is more sensitive.
- Formula 1 establishes a wire inductance model, where L represents the value of inductance, d represents the length of the gold wire, and r represents the diameter of the gold wire. Another method is to reduce the length of the wire bonding by using a ceramic plate transition.
- edge mounting also has an adverse effect on the flexibility of subsequent optical and mechanical assembly. Since the chip is located in the edge area, it is difficult to communicate with other components. The spatial relationship of the components or assemblies is limited, which complicates the layout and adjustment of subsequent optical shaping devices (such as lenses, polarizers, etc.). At the same time, during the mechanical assembly process, edge-mounted chips are easily affected by external physical forces and environmental conditions, which may increase the difficulty and risk of assembly.
- the chip is affected by the thermal deformation of the PCB board, and stretching, compression or bending, etc., which is reflected in the effect of the deflection of the light emission angle of the chip. It becomes more and more obvious, resulting in the inability to align the chip with the optical shaping device or damage to the metal wires and transistors.
- the limiting factors of the heat dissipation path include the contact area between the chip and the PCB board and the thermal conductivity of the heat dissipation medium. These limitations lead to relatively low heat dissipation efficiency. Inefficient heat dissipation may cause the junction temperature of the chip to increase, thereby reducing the photoelectric conversion efficiency and shortening the working life of the chip.
- current technology often uses heat sinks, radiators and other devices to improve the heat dissipation problem, but their effects are mixed and still cannot improve the problem of chip shape deformation and position deformation caused by heating of the PCB board.
- an embodiment of the present invention provides a packaging structure 10, referring to FIG2, wherein the packaging structure 10 includes a PCB board 1 and a light-emitting module 2, wherein the PCB board 1 is made of insulating material, and a conductive path is printed on the surface for supporting and connecting electronic components, and the light-emitting module 2 is directly mounted on the PCB board 1 and electrically connected to the conductive path to excite itself to generate laser.
- the light-emitting module 2 effectively reduces electrical parasitics by being directly mounted on the PCB board 1.
- the light-emitting module 2 can be modularly made into a plurality of modules arranged on the PCB board 1 to improve the design and simple expansibility of the packaging structure 10, and the plurality of light-emitting modules 2 can be independently controlled or integratedly controlled on the PCB board 1, thereby realizing flexible adjustment and expansion of system functions and performances.
- the number of the light-emitting modules 2 is three, and three light-emitting modules 2 are arranged on the PCB board 1, and each of the light-emitting modules 2 can be independently controlled.
- the three light-emitting modules 2 can be uniformly controlled by the circuit control element on the PCB board 1.
- the light emitting module 2 includes at least two electrode blocks 21 and at least one chip 22.
- the number of the electrode blocks 21 is two, and the number of the chip 22 is one.
- the chip 22 is arranged between the two electrode blocks 21.
- the electrode block 21 is fixedly connected to the side of the chip 22, so that the chip 22 is clamped and fixed by the two electrode blocks 21.
- the electrode block 21 is directly connected to the circuit on the PCB board 1 to form a current path.
- the electrode blocks 21 arranged on both sides of the chip 22 serve as the positive and negative electrodes of the chip 22, and excite the chip 22 to generate laser.
- the electrode block 21 holds the chip 22 by clamping, so that the plane where the chip 22 is located is at an angle to the plane where the PCB board 1 is located.
- at an angle means that the plane where the chip 22 is located and the plane where the PCB board 1 are located have an angle of 0°-180° (excluding 0° and 180°).
- the purpose of the above-mentioned "the plane where the chip 22 is located is at an angle to the plane where the PCB board 1 is located” is to make the light emitting direction of the chip 22 non-parallel to the plane where the PCB board 1 is located.
- the emitting light direction of the light emitting module 2 is shown by the arrow P in the figure, wherein the two electrode blocks 21 are perpendicular to the PCB board 1, and the chip 22 is held perpendicular to the PCB board 1, so that the light emitting direction of the chip 22 is perpendicular to the plane where the PCB board 1 is located.
- FIG5 it shows a front view of the packaging structure 10 in another embodiment of the present invention, wherein the chip 22 is still clamped by the electrode blocks 21 on both sides, and the plane where the chip 22 is located and the plane where the PCB board 1 is located are at an angle ⁇ , referring to FIG5, the angle ⁇ is 60°. Under this configuration, the light emission direction of the chip 22 is at an angle of 60° with the plane where the PCB board 1 is located.
- the chip 22 is clamped by the electrode block 21, and the clamped chip 22 has an angle with the plane where the PCB board 1 is located, so that the light-emitting surface of the chip 22 is not perpendicular to the PCB board 1, and the light-emitting direction of the chip 22 is not parallel to the PCB board 1.
- the chip 22 is fixed and held by the electrode block 21 directly connected to the PCB board 1, and is also electrically connected to the PCB board 1 through the electrode block 21.
- the structure packaged in the above manner can effectively reduce electrical parasitics. See Formula 2. Since two electrode blocks are used in the above packaging configuration, it is closer to the inductance calculation model of the PCB board wiring.
- Formula 2 uses the calculation model of the circuit board wiring inductance, where L is the length of the electrode block. It can be seen that the parasitic inductance introduced in this embodiment is reduced by nearly 14% compared with the ordinary COB package, thereby obtaining a narrower pulse width, a smaller rise and fall time, and a higher peak power in the pulse for the same average power.
- the light emitting direction of the chip 22 is not parallel to the plane where the PCB board 1 is located, and there is no need to worry about the components on the PCB board 1 affecting the light path. Therefore, the light emitting module 2 does not need to be set in the edge area of the PCB board 1.
- the light emitting module 2 can emit light in a manner that is not parallel to the plane where the PCB board 1 is located, and the emitted light is not affected by the components on the PCB board 1. Therefore, the light emitting module 2 can be set at any position on the PCB board 1 so that a compact layout of multiple chips 22 can be achieved on the PCB board 1. Further, the size of the optoelectronic module can also be reduced.
- the light emitting module 2 can be set at any position on the PCB board 1 without restriction, other optical devices on the PCB board 1 for receiving and processing light can also be flexibly arranged, reducing the difficulty of layout and assembly.
- both sides of the chip 22 can dissipate heat to enhance the heat dissipation effect of the package structure 10, thereby improving the reliability and service life of the chip 22.
- the package structure 10 makes the relative deformation between the chip 22 and the optical shaping device smaller, reducing the sensitivity of the deformation between the chip 22 and the light source.
- a single light-emitting module 2 includes at least one chip 22 and at least two electrode blocks 21.
- the number of the chips 22 is three
- the number of the electrode blocks 21 is four
- the chips 22 and the electrode blocks 21 are arranged at intervals
- the series connection of multiple chips 22 is achieved through the above configuration, wherein a common electrode block 21 is arranged between two adjacent chips 22, and the common electrode block 21 is used to provide current to the above two adjacent chips 22 at the same time.
- the chip 22 emits light in a manner perpendicular to the plane where the PCB board 1 is located.
- the electrode block 21 is fixed to the upper surface of the PCB board 1 in a manner perpendicular to the plane where the PCB board 1 is located.
- the two electrode blocks 21 clamp the chip 22, so that the plane where the chip 22 is located is parallel to the clamping surface of the electrode block 21, and thus perpendicular to the plane where the PCB board 1 is located, the light emitting surface of the chip 22 is parallel to the PCB, and the emitted light of the chip 22 is perpendicular to the PCB board 1.
- the propagation direction of the light can be better controlled and a better light output effect can be provided.
- the clamping of the electrode block 21 on the chip 22 enables both surfaces of the chip 22 to be firmly clamped, ensuring the stability of current transmission.
- the electrical connection between the electrode block 21 and the PCB board 1 can be established by conductive adhesive bonding or welding.
- the above method can ensure a more stable and reliable packaging structure 10, and can also achieve electrical connection.
- the electrode block 21 and the chip 22 are also electrically connected by the above conductive adhesive bonding or welding.
- the electrode block 21 and the chip 22 can also be fixed and electrically connected by directly clamping, using two electrode blocks 21 to abut the two sides of the chip 22. The method of directly abutting the two sides of the chip 22 is conducive to assembly, can simplify the difficulty of assembly, and also helps to excite the laser.
- an embodiment of the present invention further provides a laser, which includes the packaging structure 10 according to the first aspect.
- an embodiment of the present invention further provides an optical element, comprising the laser according to the second aspect.
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Abstract
一种封装结构(10)、激光器和光学元件,封装结构(10)包括PCB板(1)和至少一个发光模块(2),发光模块(2)包括:至少两个电极块(21),电极块(21)直接与PCB板(1)连接;至少一个芯片(22),芯片(22)设置在两个电极块(21)之间,芯片(22)两侧均由电极块(21)保持以固定芯片(22),发光模块(2)经构造成电极块(21)将芯片(22)以与PCB板(1)所在平面呈夹角的方式保持,以使得芯片(22)的出光方向与PCB板(1)所在平面不平行。通过封装结构(10)能够降低寄生电感、增强散热能力以及降低芯片变形风险,另外还能改善机械装配难度,从而增强装配的灵活度。
Description
本发明涉及激光器领域,尤其涉及一种封装结构、激光器和光学元件。
在芯片设计与开发方面,光电模块需要满足日益增长的数据通信需求,包括物联网、大数据和云计算等领域的快速发展。为了实现高带宽、高速率和大数据传输,芯片设计需要采用先进的高速电路设计技术。优化信号传输路径、降低信号损耗和减少串扰等技术措施被采用,以确保信号在高频率下的快速传输和准确接收。
光电子器件的封装对于光电模块的性能至关重要。封装设计需要考虑高频响应特性、低损耗和高稳定性。在封装过程中,高质量的材料选择和精密的封装工艺能够最大程度地减少电学寄生现象的影响,如电阻、电容和电感等。同时,合理的热管理和防护措施也需要考虑,以确保光电模块的长期稳定性和可靠性。此外,模块组装技术也对光电模块的性能起着重要作用。高密度、高集成度的模块组装可以实现更小体积、更高性能和更低功耗的光电模块。采用先进的微纳加工技术和微组装技术,如芯片级封装、光纤对准和微焊接等,能够实现光电模块的高度集成和高效连接,提升整体性能和可靠性。
综上所述,光电模块的优化开发需要在芯片设计与开发、光电子器件封装和模块组装等方面不断努力。通过采用先进的技术和工艺,不断改进设计和制造流程,光电模块能够更好地满足日益增长的数据通信需求,推动信息传输的高速、高效和可靠。
发明内容
本发明实施例期望提供一种封装结构、激光器和光学元件,通过所述封装
结构能够降低寄生电感、增强散热能力以及降低芯片变形风险,降低光源与光学整形器件之间的微形变,另外还能改善机械装配难度,从而增强装配的灵活度。
本发明的技术方案是这样实现的:
第一方面,本发明实施例提供了一种封装结构,所述封装结构包括PCB板和至少一个发光模块,所述发光模块包括:至少两个电极块,所述电极块直接与所述PCB板连接;至少一个芯片,所述芯片设置在两个所述电极块之间,所述芯片两侧均由所述电极块保持以固定所述芯片,所述发光模块经构造成所述电极块将所述芯片以与所述PCB板所在平面呈夹角的方式保持,以使得所述芯片的出光方向与所述PCB板所在平面不平行。
优选地,所述发光模块构造成:单个所述电极块与单个所述芯片间隔设置。
优选地,所述电极块和所述芯片通过焊接或导电胶粘接或直接抵接的方式固定。
优选地,所述电极块以焊接或导电胶粘接的方式固定至所述PCB板。
优选地,所述电极块以垂直于所述PCB板所在平面的方式固定至所述PCB板。
第二方面,本发明实施例提供了一种激光器,所述激光器包括上述封装结构。
第三方面,本发明实施例提供了一种光学元件,所述光学元件包括上述激光器,所述光学元件应用于例如汽车雷达、光通讯等领域。
所述封装结构通过将发光模块直接封装在PCB板上,降低了寄生电感,实现了窄脉宽和高峰值功率的电学表现,同时所述发光模块内部的电极块以保持芯片两侧面的方式固定所述芯片,将所述芯片保持成与所述PCB板所在平面呈夹角,使得所述出光方向不与所述PCB板平行,从而可以更好地控制光的传播方向,并提供更好的光输出效果,还能丰富PCB板表面排布的可能性,当所述芯片与所述PCB板所在平面垂直时,能够避免所述电路板变形对芯片的影响,防止芯片的光学指向的精度受到PCB板变形的影响。另外,所述封装结构能够
包括多个所述发光模块,单个所述发光模块能够串联多个芯片,从而提高光电模块集成度,减小尺寸减少成本。
图1为现有技术中COB封装结构的示意图;
图2为本发明实施例中一种封装结构的俯视图;
图3为本发明另一实施例中一种封装结构的俯视图,所述封装结构包括3个发光模块;
图4为本发明另一实施例中发光模块的结构俯视图;
图5为本发明另一实施例中另一种封装结构的俯视图,所述发光模块与PCB板呈60°的夹角。
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述。
现有技术中在光电模块领域,特别是对于光学元件发射模块和光通信有源模块,发光芯片的封装常采用COB(Chip-on-Board)封装技术。参见附图1,这种封装方式将芯片直接粘贴在基板上,通过金线键合将芯片与基板的引脚连接起来。然而,这种封装方式存在一个问题,即寄生电感的产生。寄生电感是由于金线在芯片和基板之间形成的线圈状结构而产生的。这会导致信号传输时的电感损耗和串扰,从而影响模块的高频响应和信号质量。为了减小寄生电感,在现有技术中采取了一系列工艺优化措施,其中一种常见的方法是在光电子器件封装过程中尽可能多打线或采用带状引线进行引线键合。通过增加金线的数量或使用带状引线进行连接,可以有效减小金线的长度,从而降低寄生电感的影响。另一种常见的方法是,芯片可以首先通过焊接或键合技术连接到陶瓷板上,然后再将陶瓷板与基板连接。这种方式可以有效地减小芯片到基板之间的金线长度,从而降低寄生电感的影响。
需要注意的是,上述工艺虽然可以在一定程度上减小寄生电感,但收益效果有限,而且工艺复杂,需要更高的制造精度和成本投入,并且由于封装工艺本身的局限性和限制,无法完全消除寄生电感,通过下列公式1至公式2的理论计算可以得出,在光电子器件封装中,即使通过多打线的方式来降低电感,也存在一定的限制。假设我们采用了多打线的方式,通过16根金线来连接芯片和基板。
在光电模块封装中,通常使用的金线直径较小,长度较长,因此会引入相对较高的电感。即使通过多打线的方式,将金线的数量增加到16根,总电感仍然较大。这是因为在光电模块中,对于高频信号传输和快速信号响应的要求非常严格,对电感的影响更为敏感。
其中,该公式用于计算空心圆柱形电感的近似公式,常规封装为引线键合,通过打线进行电气连接,因此公式1建立的是导线电感模型,其中L表示电感的值,d表示金线的长度,r表示金线的直径。另一种方法是通过使用陶瓷板转接来减小打线的长度。
其次,参见附图1,COB封装方式的激光器芯片由于边发射光的特性,为了避免边缘出射光被PCB板挡住或产生阻挡效应,激光器芯片通常需要贴装在PCB的边缘区域,以使得光线沿附图1中的箭头所示的方向出射。这种边缘贴装的限制导致了一些问题,首先,这种布局方式限制了芯片的二维集成能力,在COB封装方式中,每个芯片需要占据一定的空间,并且需要留出边缘区域以确保出射光的自由传播,因此,在PCB板的表面上无法实现多个芯片的紧凑布局,限制了光电模块的集成度和尺寸的进一步缩小。此外,边缘贴装还对后续的光学和机械组装灵活性产生不利影响,由于芯片位于边缘区域,与其他元器
件或组件的空间关系受限,使得后续的光学整形器件(如透镜、偏振器等)的布局和调整变得复杂。同时,在机械组装过程中,边缘贴装的芯片容易受到外界物理力和环境条件的影响,可能增加组装的难度和风险。
在COB封装方式中,另外需要考虑的是芯片的散热问题。由于激光器芯片在运行时会产生大量的热量,随着热量积累,边缘贴装的芯片与光学整形器件的相对形变敏感度会提高,设置在边缘的芯片沿着PCB所在射出光线,出射光线需要与光学整形器件对准才能得到期望的整形,由于芯片的排布位置,热量越高PCB板的变形程度越大,PCB板会受到热量影响,导致板材发生热胀冷缩,也就是所谓的热变形,芯片受到PCB板热变形的影响,发生拉伸、压缩或弯曲等体现在所述芯片光线出射角度偏转的效果也就愈发明显,从而导致芯片的与光学整形器件不能够对准或者金属线和晶体管的损坏。其中,散热路径的限制因素包括芯片和PCB板之间的接触面积以及散热介质的热导率等,这些限制导致散热效率相对较低。低效的散热可能会导致芯片的结温升高,从而降低光电转换效率并缩短芯片的工作寿命。另外,现在技术中常使用热沉、散热器的等设备改善散热问题,但是其效果交差,仍无法改善PCB板受热导致芯片形状变形和位置变形问题。
第一方面,基于上述技术问题,本发明实施例提供了一种封装结构10,参见附图2,所述封装结构10包括PCB板1和发光模块2,所述PCB板1由绝缘材料制成,表面印刷有导电路径,用于支承和连接电子元件,所述发光模块2直接安装在所述PCB板1上与上述导电路径电连接,以激发自身产生激光。所述发光模块2通过直接装配在所述PCB板1上有效的减小了电学寄生。所述发光模块2可以模块化制成多个设置在所述PCB板1上以提高封装结构10的设计性和简单扩展性,多个发光模块2在所述PCB板1上能够独立控制也能够集成控制,实现了对系统功能和性能的灵活调整和扩展,示例性地,参见附图3,所述发光模块2的数量是三个,所述PCB板1上设置有3个发光模块2,每个所述发光模块2能够独立的控制,在本发明另一实施例中,三个所述发光模块2能够由PCB板1上的电路控制元件统一控制。
具体地,参见附图2至附图5,所述发光模块2包括至少两个电极块21和至少一个芯片22,参见附图2,其示出了所述封装结构10的俯视图,所述电极块21的数量是两个,所述芯片22的数量是一个。所述芯片22设置在两个所述电极块21中间,同时,所述电极块21与所述芯片22的侧面固定连接,以使得所述芯片22由两个电极块21夹持固定,所述电极块21直接与所述PCB板1上的电路连接形成电流通路,在上述构型下,设置在所述芯片22两侧的电极块21作为所述芯片22的正极和负极,激发所述芯片22产生激光。参见附图2至附图5,所述电极块21通过夹持的方式保持所述芯片22,使得所述芯片22所在平面与所述PCB板1所在平面呈夹角,需要注意的是,此处,“呈夹角”指的是,所述芯片22所在的平面和所述PCB板1所在的平面之间具有0°-180°的夹角(不包括0°和180°),可以理解的是,上述“所述芯片22所在平面与所述PCB板1所在平面呈夹角”的目的在于使得所述芯片22的出光方向与所述PCB板1所在的平面不平行,参见附图2,在附图2所示出的发光模块2的构型中,发光模块2的出射光方向如图中箭头P所示,其中,两个电极块21垂直于所述PCB板1,所述芯片22被保持呈垂直于所述PCB板1,以使得所述芯片22的出光方向垂直于所述PCB板1所在的平面。
示例性地,参见附图5,其示出了本发明另一实施例中所述封装结构10的主视图,其中所述芯片22两侧仍由所述电极块21夹持,所述芯片22所在平面与所述PCB板1所在平面夹角为α,参见附图5,所述夹角α为60°,在该构型下,所述芯片22的光出射方向与所述PCB板1所在平面夹角为60°。
上述构型中,通过所述电极块21夹持所述芯片22,被夹持后的芯片22与所述PCB板1所在平面具有夹角,使得所述芯片22的出光面与所述PCB板1不垂直,所述芯片22的出光方向与所述PCB板1不平行,所述芯片22由与所述PCB板1直接连接的电极块21固定并保持,还通过所述电极块21与所述PCB板1实现电连接。通过上述方式进行封装的结构能够有效地减小电学寄生,参见公式2,由于在上述封装构型中采用两个电极块,更接近PCB板走线的电感计算模型,因此公式2采用电路板走线电感的计算模型,其中L为电极块长
度,W为电极块宽度。可以看出本实施例中所引入的寄生电感相比于普通的COB封装降低了将近14%,从而获得更窄的脉宽,更小的上升、下降沿时间,对于相同的平均功率可以获得更高的脉冲内峰值功率,
通过上述构型,使得所述芯片22的出光方向不与所述PCB板1所在的平面平行,不用担心PCB板1上的元件影响光路,因此所述发光模块2便不用设置在所述PCB板1的边缘区域,所述发光模块2能够以与所述PCB板1所在平面不平行的方式将光线射出,出射光线不受PCB板1上的元件影响,因此发光模块2能够设置在所述PCB板1上的任意位置以使得,在PCB板1上实现多个芯片22的紧凑布局,进一步地,还能够减小光电模块的尺寸。另外,由于发光模块2能够不受限制地设置在所述PCB板1上的任意位置,所述PCB板1上用于接收并处理光线的其它光学器件也能够灵活排布,降低布局难度和装配难度。
通过上述构型,所述芯片22的两个侧面均能够散热,以增强所述封装结构10的散热效果,从而提高所述芯片22的可靠性和使用寿命。相比较于平行贴片光源构造的封装结构,所述封装结构10使得所述芯片22与光学整形器件之间的相对形变较小,降低了所述芯片22与光源之间形变的敏感度。
在本发明另一实施例中,单个所述发光模块2包括至少一个芯片22和至少两个电极块21,示例性地,参见附图4,所述芯片22的数量是三个,所述电极块21的数量是四个,所述芯片22和所述电极块21间隔设置,通过上述构型实现多个芯片22的串联,其中,相邻两个芯片22中间设置有一个共用电极块21,所述公用电极块21用于同时向上述相邻的两个芯片22提供电流。
在本发明优选实施例中,所述芯片22以垂直于所述PCB板1所在平面的方式射出光线,参见附图2至附图4,所述电极块21以垂直于所述PCB板1所在平面,固定在所述PCB板1的上表面,两个所述电极块21夹持所述芯片
22,以使得所述芯片22所在平面与所述电极块21的夹持面平行,从而与所述PCB板1所在平面垂直,所述芯片22的出光面与所述PCB平行,所述芯片22的射出光线与所述PCB板1垂直。通过使所述芯片22的出光方向垂直于PCB板1的平面,可以更好地控制光的传播方向,并提供更好的光输出效果。所述电极块21于所述芯片22的夹持使得所述芯片22的两个表面都能够被牢固夹持,确保电流传输的稳定性。
此外,电极块21与所述PCB板1之间建立电连接的方式可以采用导电胶粘接或焊接的方式,上述方式能够保证更稳定和可靠的封装结构10,同时还能够实现电连接。同理,所述电极块21和所述芯片22之间也通过上述导电胶粘接或焊接的方式建立电连接,在本发明另一实施例中,所述电极块21和所述芯片22还能通过直接夹持的方式,使用两个电极块21抵接所述芯片22的两个侧面,实现固定和电连接。直接抵接所述芯片22两个侧面的方式利于装配,能够简化装配难度,同时也有助于激发激光。
第二方面,本发明实施例还提供了一种激光器,所述激光器包括根据第一方面的封装结构10。
第三方面,本发明实施例还提供了一种光学元件,所述光学元件包括根据第二方面的激光器。
需要说明的是:本发明实施例所记载的技术方案之间,在不冲突的情况下,可以任意组合。
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以所述权利要求的保护范围为准。
Claims (7)
- 一种封装结构,所述封装结构包括PCB板和至少一个发光模块,其特征在于,所述发光模块包括:至少两个电极块,所述电极块直接与所述PCB板连接;至少一个芯片,所述芯片设置在两个所述电极块之间,所述芯片两侧均由所述电极块保持以固定所述芯片,所述发光模块经构造成所述电极块将所述芯片以与所述PCB板所在平面呈夹角的方式保持,以使得所述芯片的出光方向与所述PCB板所在平面不平行。
- 根据权利要求1所述的封装结构,其特征在于,所述发光模块构造成:单个所述电极块与单个所述芯片间隔设置。
- 根据权利要求1所述的封装结构,其特征在于,所述电极块和所述芯片通过焊接或导电胶粘接或直接抵接的方式固定。
- 根据权利要求1所述的封装结构,其特征在于,所述电极块以焊接或导电胶粘接的方式固定至所述PCB板。
- 根据权利要求1所述的封装结构,其特征在于,所述电极块以垂直于所述PCB板所在平面的方式固定至所述PCB板。
- 一种激光器,其特征在于,所述激光器包括权利要求1至5任一项所述的封装结构。
- 一种光学元件,其特征在于,所述光学元件包括权利要求6所述的激光器。
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CN116960727A (zh) * | 2023-06-16 | 2023-10-27 | 西安炬光科技股份有限公司 | 一种封装结构、激光器和光学元件 |
CN220456883U (zh) * | 2023-06-16 | 2024-02-06 | 西安炬光科技股份有限公司 | 一种封装结构、激光器和光学元件 |
CN220492415U (zh) * | 2023-06-29 | 2024-02-13 | 西安炬光科技股份有限公司 | 一种激光模组和激光器 |
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