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WO2024205619A1 - Predictive model with soft, per-example invariances through probabilistic modeling - Google Patents

Predictive model with soft, per-example invariances through probabilistic modeling Download PDF

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Publication number
WO2024205619A1
WO2024205619A1 PCT/US2023/031769 US2023031769W WO2024205619A1 WO 2024205619 A1 WO2024205619 A1 WO 2024205619A1 US 2023031769 W US2023031769 W US 2023031769W WO 2024205619 A1 WO2024205619 A1 WO 2024205619A1
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input
ann
transformation
processor
image
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Bruno Kacper MLODOZENIEC
Christos LOUIZOS
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Qualcomm Inc
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Qualcomm Inc
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology
    • G06N3/045Combinations of networks
    • G06N3/0455Auto-encoder networks; Encoder-decoder networks
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology
    • G06N3/044Recurrent networks, e.g. Hopfield networks
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology
    • G06N3/0464Convolutional networks [CNN, ConvNet]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology
    • G06N3/047Probabilistic or stochastic networks
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology
    • G06N3/0475Generative networks
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/08Learning methods
    • G06N3/088Non-supervised learning, e.g. competitive learning
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/08Learning methods
    • G06N3/09Supervised learning
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/08Learning methods
    • G06N3/098Distributed learning, e.g. federated learning
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N7/00Computing arrangements based on specific mathematical models
    • G06N7/01Probabilistic graphical models, e.g. probabilistic networks
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/08Learning methods
    • G06N3/084Backpropagation, e.g. using gradient descent

Definitions

  • aspects of the present disclosure generally relate to artificial neural networks, and more specifically to predictive models.
  • Artificial neural networks may comprise interconnected groups of artificial neurons (e.g., neuron models).
  • the artificial neural network may be a computational device or be represented as a method to be performed by a computational device.
  • Convolutional neural networks are a type of feed-forward artificial neural network.
  • Convolutional neural networks may include collections of neurons that each have a receptive field and that collectively tile an input space.
  • Convolutional neural networks such as deep convolutional neural networks (DCNs) have numerous applications.
  • these neural network architectures are used in various technologies, such as image recognition, speech recognition, acoustic scene classification, keyword spotting, autonomous driving, and other classification tasks.
  • Deep neural networks have grown in popularity because of their ability to solve complex problems. As such, deep learning deployment on edge devices for real time inference may be an area of interest. Unfortunately, the model size and thus memory consumption and complexity may be prohibitively large with millions of parameters.
  • Neural network models may be trained using a set of labeled training data. Given the set of training data, the neural network model may learn to make inferences based on the training data. In general, with more labeled training data, the neural network model accuracy may be improved. Additionally, the more labeled training data, the more likely that model generalization may be achieved. However, labelling data may be time consuming.
  • Data augmentation has become a popular technique to address to this issue.
  • data augmentations may embed neural networks with some invariance to such augmentations, which may make downstream classification tasks more challenging.
  • a processor-implemented method performed by one or more processors includes receiving, by an artificial neural network (ANN), an input.
  • the processor-implemented method also includes selectively performing, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations.
  • the processor-implemented method further includes generating, by the ANN, an inference based on the reconstructed input.
  • an apparatus including means for receiving, by an artificial neural network (ANN), an input.
  • the apparatus further includes means for selectively performing, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations.
  • the apparatus still further includes means for generating, by the ANN, an inference based on the reconstructed input.
  • ANN artificial neural network
  • a non-transitory computer- readable medium with program code recorded thereon is disclosed.
  • the program code is executed by a processor and includes program code to receive, by an artificial neural network (ANN), an input.
  • the program code further includes program code to selectively perform, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations.
  • the program code still further includes program code to generate, by the ANN, an inference based on the reconstructed input.
  • the processor(s) is configured to receive, by an artificial neural network (ANN), an input.
  • the processor(s) is further configured to selectively perform, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations.
  • the processor(s) is still further configured to generate, by the ANN, an inference based on the reconstructed input.
  • FIGURE 1 illustrates an example implementation of a neural network using a system-on-a-chip (SOC), including a general-purpose processor, in accordance with certain aspects of the present disclosure.
  • SOC system-on-a-chip
  • FIGURES 2A, 2B, and 2C are diagrams illustrating a neural network, in accordance with various aspects of the present disclosure.
  • FIGURE 2D is a diagram illustrating an exemplary deep convolutional network (DCN), in accordance with various aspects of the present disclosure.
  • FIGURE 3 is a block diagram illustrating an exemplary deep convolutional network (DCN), in accordance with various aspects of the present disclosure.
  • DCN deep convolutional network
  • FIGURE 4 is a block diagram illustrating an exemplary software architecture that may modularize artificial intelligence (Al) functions, in accordance with various aspects of the present disclosure.
  • FIGURE 5 is a diagram illustrating an example graphical model for embedding soft, per-example invariance, in accordance with various aspects of the present disclosure.
  • FIGURES 6A and 6B are radial graphs illustrating a comparison of classification using a conventional model and classification using an example soft, per- example invariance model, in accordance with various aspects of the present disclosure.
  • FIGURE 7 is a flow diagram illustrating a processor-implemented method for soft, per-example invariance, in accordance with various aspects of the present disclosure.
  • ANNs artificial neural networks
  • convolutional architectures e.g., convolutional neural networks (CNNs)
  • CNNs convolutional neural networks
  • SoTA state-of-the-art
  • data augmentations embed neural networks with some invariance to those augmentations.
  • full invariance may not desired.
  • Full invariance is a property in which an outcome remains unchanged regardless of transformations or changes in conditions of a measurement with respect to an object. For example, being fully invariant to rotations would make distinguishing images of a canonical “6” from a canonical “9” difficult.
  • Soft invariance from data augmentations may be one approach to address such challenges.
  • conventional approaches have failed to provide accurate results.
  • a small transformation e.g., rotation
  • images may be augmented with random rotations up to some maximum angle.
  • conventional approaches may have the effect of smoothing the predictions across rotations for all examples.
  • aspects of the present disclosure are directed to predictive models with soft, per-example invariances through probabilistic modeling.
  • Predictive models analyze patterns in data and observe trends within certain conditions to estimate an outcome.
  • Probabilistic models utilize the effect of random occurrences of actions to determine a likelihood of a future result.
  • small perturbations may be embedded into a probabilistic model of a data generation process.
  • the small perturbations may represent slight image variations (e.g., 1-10- degree rotations of an image).
  • images of handwritten canonical “9” by different people may appear different due to natural variations in hand movements, paper orientation, distortions in scanning hardware or other reasons, for example.
  • the actual digit may be considered a perturbed version of the canonical “9.”
  • FIGURE 1 illustrates an example implementation of a system-on-a-chip (SOC) 100, which may include a central processing unit (CPU) 102 or a multi-core CPU configured for implementing a predictive model with soft, per-example invariance through probabilistic modeling.
  • SOC system-on-a-chip
  • CPU central processing unit
  • multi-core CPU configured for implementing a predictive model with soft, per-example invariance through probabilistic modeling.
  • Variables e.g., neural signals and synaptic weights
  • system parameters associated with a computational device e.g., neural network with weights
  • delays e.g., frequency bin information, and task information
  • NPU neural processing unit
  • GPU graphics processing unit
  • DSP digital signal processor
  • Instructions executed at the CPU 102 may be loaded from a program memory associated with the CPU 102 or may be loaded from a memory block 118.
  • the SOC 100 may also include additional processing blocks tailored to specific functions, such as a GPU 104, a DSP 106, a connectivity block 110, which may include fifth generation (5G) connectivity, fourth generation long term evolution (4G LTE) connectivity, Wi-Fi connectivity, USB connectivity, Bluetooth connectivity, and the like, and a multimedia processor 112 that may, for example, detect and recognize gestures.
  • the NPU 108 is implemented in the CPU 102, DSP 106, and/or GPU 104.
  • the SOC 100 may also include a sensor processor 114, image signal processors (ISPs) 116, and/or navigation module 120, which may include a global positioning system.
  • ISPs image signal processors
  • the SOC 100 may be based on an ARM instruction set.
  • the instructions loaded into the general -purpose processor 102 may include code to receive, by an artificial neural network (ANN), an input.
  • the general- purpose processor 102 may also include code to selectively perform, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations.
  • the general -purpose processor 102 may further include code to generate, by the ANN, an inference based on the reconstructed input.
  • Deep learning architectures may perform an object recognition task by learning to represent inputs at successively higher levels of abstraction in each layer, thereby building up a useful feature representation of the input data. In this way, deep learning addresses a major bottleneck of traditional machine learning.
  • a shallow classifier may be a two-class linear classifier, for example, in which a weighted sum of the feature vector components may be compared with a threshold to predict to which class the input belongs.
  • Human engineered features may be templates or kernels tailored to a specific problem domain by engineers with domain expertise. Deep learning architectures, in contrast, may learn to represent features that are similar to what a human engineer might design, but through training. Furthermore, a deep network may learn to represent and recognize new types of features that a human might not have considered.
  • a deep learning architecture may learn a hierarchy of features. If presented with visual data, for example, the first layer may learn to recognize relatively simple features, such as edges, in the input stream. In another example, if presented with auditory data, the first layer may learn to recognize spectral power in specific frequencies. The second layer, taking the output of the first layer as input, may learn to recognize combinations of features, such as simple shapes for visual data or combinations of sounds for auditory data. For instance, higher layers may learn to represent complex shapes in visual data or words in auditory data. Still higher layers may learn to recognize common visual objects or spoken phrases.
  • Deep learning architectures may perform especially well when applied to problems that have a natural hierarchical structure.
  • the classification of motorized vehicles may benefit from first learning to recognize wheels, windshields, and other features. These features may be combined at higher layers in different ways to recognize cars, trucks, and airplanes.
  • Neural networks may be designed with a variety of connectivity patterns.
  • feed-forward networks information is passed from lower to higher layers, with each neuron in a given layer communicating to neurons in higher layers.
  • a hierarchical representation may be built up in successive layers of a feed-forward network, as described above.
  • Neural networks may also have recurrent or feedback (also called top- down) connections. In a recurrent connection, the output from a neuron in a given layer may be communicated to another neuron in the same layer.
  • a recurrent architecture may be helpful in recognizing patterns that span more than one of the input data chunks that are delivered to the neural network in a sequence.
  • a connection from a neuron in a given layer to a neuron in a lower layer may be called a feedback (or top-down) connection.
  • a network with many feedback connections may be helpful when the recognition of a high-level concept may aid in discriminating the particular low-level features of an input.
  • FIGURE 2A illustrates an example of a fully connected neural network 202.
  • a neuron in a first layer may communicate its output to every neuron in a second layer, so that each neuron in the second layer will receive input from every neuron in the first layer.
  • FIGURE 2B illustrates an example of a locally connected neural network 204.
  • a neuron in a first layer may be connected to a limited number of neurons in the second layer.
  • a locally connected layer of the locally connected neural network 204 may be configured so that each neuron in a layer will have the same or a similar connectivity pattern, but with connections strengths that may have different values (e.g., 210, 212, 214, and 216).
  • the locally connected connectivity pattern may give rise to spatially distinct receptive fields in a higher layer because the higher layer neurons in a given region may receive inputs that are tuned through training to the properties of a restricted portion of the total input to the network.
  • FIGURE 2C illustrates an example of a convolutional neural network 206.
  • the convolutional neural network 206 may be configured such that the connection strengths associated with the inputs for each neuron in the second layer are shared (e.g., 208).
  • Convolutional neural networks may be well suited to problems in which the spatial location of inputs is meaningful.
  • FIGURE 2D illustrates a detailed example of a DCN 200 designed to recognize visual features from an image 226 input from an image capturing device 230, such as a car-mounted camera.
  • the DCN 200 of the current example may be trained to identify traffic signs and a number provided on the traffic sign. Of course, the DCN 200 may be trained for other tasks, such as identifying lane markings or identifying traffic lights.
  • the DCN 200 may be trained with supervised learning. During training, the DCN 200 may be presented with an image, such as the image 226 of a speed limit sign, and a forward pass may then be computed to produce an output 222.
  • the DCN 200 may include a feature extraction section and a classification section.
  • a convolutional layer 232 may apply convolutional kernels (not shown) to the image 226 to generate a first set of feature maps 218.
  • the convolutional kernel for the convolutional layer 232 may be a 5x5 kernel that generates 28x28 feature maps.
  • the convolutional kernels may also be referred to as filters or convolutional filters.
  • the first set of feature maps 218 may be subsampled by a max pooling layer (not shown) to generate a second set of feature maps 220.
  • the max pooling layer reduces the size of the first set of feature maps 218. That is, a size of the second set of feature maps 220, such as 14x14, is less than the size of the first set of feature maps 218, such as 28x28.
  • the reduced size provides similar information to a subsequent layer while reducing memory consumption.
  • the second set of feature maps 220 may be further convolved via one or more subsequent convolutional layers (not shown) to generate one or more subsequent sets of feature maps (not shown).
  • the second set of feature maps 220 may be convolved to generate a first feature vector 224. Furthermore, the first feature vector 224 may be further convolved to generate a second feature vector 228. Each feature of the second feature vector 228 may include a number that corresponds to a possible feature of the image 226, such as “sign,” “60,” and “100.” A softmax function (not shown) may convert the numbers in the second feature vector 228 to a probability. As such, an output 222 of the DCN 200 may be a probability of the image 226 including one or more features.
  • the probabilities in the output 222 for “sign” and “60” are higher than the probabilities of the others of the output 222, such as “30,” “40,” “50,” “70,” “80,” “90,” and “100”.
  • the output 222 produced by the DCN 200 may likely be incorrect.
  • an error may be calculated between the output 222 and a target output.
  • the target output may be the ground truth of the image 226 (e.g., “sign” and “60”).
  • the weights of the DCN 200 may then be adjusted so the output 222 of the DCN 200 may be more closely aligned with the target output.
  • a learning algorithm may compute a gradient vector for the weights.
  • the gradient may indicate an amount that an error would increase or decrease if the weight were adjusted.
  • the gradient may correspond directly to the value of a weight connecting an activated neuron in the penultimate layer and a neuron in the output layer.
  • the gradient may depend on the value of the weights and on the computed error gradients of the higher layers.
  • the weights may then be adjusted to reduce the error. This manner of adjusting the weights may be referred to as “back propagation” as it involves a “backward pass” through the neural network.
  • the error gradient of weights may be calculated over a small number of examples, so that the calculated gradient approximates the true error gradient.
  • This approximation method may be referred to as “stochastic gradient descent.” Stochastic gradient descent may be repeated until the achievable error rate of the entire system has stopped decreasing or until the error rate has reached a target level.
  • the DCN 200 may be presented with new images and a forward pass through the DCN 200 may yield an output 222( that may be considered an inference or a prediction of the DCN 200.
  • Deep belief networks are probabilistic models comprising multiple layers of hidden nodes. DBNs may be used to extract a hierarchical representation of training data sets. A DBN may be obtained by stacking up layers of Restricted Boltzmann Machines (RBMs).
  • RBM Restricted Boltzmann Machines
  • An RBM is a type of artificial neural network that can learn a probability distribution over a set of inputs. Because RBMs can learn a probability distribution in the absence of information about the class to which each input should be categorized, RBMs are often used in unsupervised learning.
  • DCNs are networks of convolutional networks, configured with additional pooling and normalization layers. DCNs have achieved state-of-the-art performance on many tasks. DCNs can be trained using supervised learning in which both the input and output targets are known for many exemplars and are used to modify the weights of the network by use of gradient descent methods.
  • DCNs may be feed-forward networks.
  • the connections from a neuron in a first layer of a DCN to a group of neurons in the next higher layer are shared across the neurons in the first layer.
  • the feed-forward and shared connections of DCNs may be exploited for fast processing.
  • the computational burden of a DCN may be much less, for example, than that of a similarly sized neural network that comprises recurrent or feedback connections.
  • each layer of a convolutional network may be considered a spatially invariant template or basis projection. If the input is first decomposed into multiple channels, such as the red, green, and blue channels of a color image, then the convolutional network trained on that input may be considered three-dimensional, with two spatial dimensions along the axes of the image and a third dimension capturing color information.
  • the outputs of the convolutional connections may be considered to form a feature map in the subsequent layer, with each element of the feature map (e.g., 220) receiving input from a range of neurons in the previous layer (e.g., feature maps 218) and from each of the multiple channels.
  • the values in the feature map may be further processed with a non-linearity, such as a rectification, max(0, x). Values from adjacent neurons may be further pooled, which corresponds to down sampling, and may provide additional local invariance and dimensionality reduction. Normalization, which corresponds to whitening, may also be applied through lateral inhibition between neurons in the feature map.
  • a non-linearity such as a rectification, max(0, x).
  • Values from adjacent neurons may be further pooled, which corresponds to down sampling, and may provide additional local invariance and dimensionality reduction. Normalization, which corresponds to whitening, may also be applied through lateral inhibition between neurons in the feature map.
  • FIGURE 3 is a block diagram illustrating a DCN 350.
  • the DCN 350 may include multiple different types of layers based on connectivity and weight sharing.
  • the DCN 350 includes the convolution blocks 354A, 354B.
  • Each of the convolution blocks 354 A, 354B may be configured with a convolution layer (CONV) 356, a normalization layer (LNorm) 358, and a max pooling layer (MAX POOL) 360.
  • CONV convolution layer
  • LNorm normalization layer
  • MAX POOL max pooling layer
  • the convolution layers 356 may include one or more convolutional filters, which may be applied to the input data to generate a feature map.
  • the normalization layer 358 may normalize the output of the convolution filters. For example, the normalization layer 358 may provide whitening or lateral inhibition.
  • the max pooling layers 360 may provide down sampling aggregation over space for local invariance and dimensionality reduction.
  • the parallel filter banks for example, of a DCN may be loaded on a CPU 102 or GPU 104 of an SOC 100 (e.g., FIGURE 1) to achieve high performance and low power consumption.
  • the parallel filter banks may be loaded on the DSP 106 or an ISP 116 of an SOC 100.
  • the DCN 350 may access other processing blocks that may be present on the SOC 100, such as sensor processor 114 and navigation module 120, dedicated, respectively, to sensors and navigation.
  • the DCN 350 may also include one or more fully connected layers 362 (FC1 and FC2).
  • the DCN 350 may further include a logistic regression (LR) layer 364.
  • LR logistic regression
  • each layer 356, 358, 360, 362, 364 of the DCN 350 are weights (not shown) that are to be updated.
  • the output of each of the layers may serve as an input of a succeeding one of the layers (e.g., 356, 358, 360, 362, 364) in the DCN 350 to learn hierarchical feature representations from input data 352 (e.g., images, audio, video, sensor data and/or other input data) supplied at the first of the convolution blocks 354A.
  • the output of the DCN 350 is a classification score 366 for the input data 352.
  • the classification score 366 may be a set of probabilities, where each probability is the probability of the input data including a feature from a set of features.
  • FIGURE 4 is a block diagram illustrating an exemplary software architecture 400 that may modularize artificial intelligence (Al) functions.
  • applications may be designed that may cause various processing blocks of an SOC 420 (for example a CPU 422, a DSP 424, a GPU 426 and/or an NPU 428) (which may be similar to SOC 100 of FIGURE 1) to support predictive modeling with soft, per- example invariance through probabilistic modeling for an Al application 402, according to aspects of the present disclosure.
  • the architecture 400 may, for example, be included in a computational device, such as a smartphone.
  • the Al application 402 may be configured to call functions defined in a user space 404 that may, for example, provide for the detection and recognition of a scene indicative of the location at which the computational device including the architecture 400 currently operates.
  • the Al application 402 may, for example, configure a microphone and a camera differently depending on whether the recognized scene is an office, a lecture hall, a restaurant, or an outdoor setting such as a lake.
  • the Al application 402 may make a request to compiled program code associated with a library defined in an Al function application programming interface (API) 406. The request may ultimately rely on the output of a deep neural network configured to provide an inference response based on video and positioning data, for example.
  • API Al function application programming interface
  • the Al application 402 may cause the run-time engine 408, for example, to request an inference at a particular time interval or triggered by an event detected by the user interface of the application 402.
  • the run-time engine 408 may in turn send a signal to an operating system in an operating system (OS) space 410, such as a kernel 412, running on the SOC 420.
  • OS operating system
  • the Kernel 412 may be a Linux kernel.
  • the operating system may cause a continuous relaxation of quantization to be performed on the CPU 422, the DSP 424, the GPU 426, the NPU 428, or some combination thereof.
  • the CPU 422 may be accessed directly by the operating system, and other processing blocks may be accessed through a driver, such as a driver 414, 416, or 418 for, respectively, the DSP 424, the GPU 426, or the NPU 428.
  • the deep neural network may be configured to run on a combination of processing blocks, such as the CPU 422, the DSP 424, and the GPU 426, or may be run on the NPU 428.
  • FIGURE 5 is a diagram illustrating an example graphical model 500 for embedding soft, per-example invariance, in accordance with various aspects of the present disclosure.
  • the graphical model 500 takes a label y 502.
  • the graphical model 500 may generate an object in a canonical position x 504.
  • the graphical model 500 may sample a perturbation T 506 to generate an observation x 508.
  • the observation x 508, may be an image, for example.
  • the perturbations may, for instance, be a rotation of the observation x 508 (e.g., an image), a change in pixel values (e.g., intensity), shearing (e.g., a transformation that slants the shape of an object in an image), an affine augmentation, or other transformation.
  • a rotation of the observation x 508 e.g., an image
  • a change in pixel values e.g., intensity
  • shearing e.g., a transformation that slants the shape of an object in an image
  • an affine augmentation e.g., an affine augmentation
  • a probabilistic model for predictions may be given by: where E is the expectation (expected value), and det is the determinant of the Jacobian of the transformation.
  • the model may estimate a label y from an unperturbed image (e.g., with an ANN), which may be weighted by the degree to which the unperturbed image matches a canonical prototype. That is, for a given input x, the model may determine an inverse transformation over a set of possible transformations.
  • the model may be embedded with an example-dependent soft invariance. In doing so, the model may bring back the canonical form and then generate an inference.
  • Equation 1 small perturbations may be embedded into a model (e.g., a probabilistic model) of the data generating process and may thus impose such structure on an ANN model so that a level of invariance may be achieved. That is, the expression of Equation 1 may embed the model with per-example invariance because for a given input x, only augmentations (e.g., perturbation T 506) that have a higher probability under the density model for a canonical space may be considered.
  • augmentations e.g., perturbation T 506
  • the soft, per-example invariance model may be trained by optimizing the conditional probability (e.g., the probability of a label y given an input x,
  • the soft, per-example invariance model may also be trained by maximizing a joint probability, as follows:
  • the soft, per-example invariance model may be implemented using a variational autoencoder or using an energy model, for instance.
  • a variational autoencoder or using an energy model, for instance.
  • a single neural network may be employed for modelling
  • x) may also be employed, where q corresponds to a parametrized distribution.
  • the approximate encoder q may take an input x and may generate parameters of a distribution over the transformation T.
  • the soft, per-example invariance model may be jointly trained using the evidence lower bound (ELBO).
  • the ELBO is a lower bound for the log-likelihood of observed data, which enables the use of gradient-based techniques for training the soft, per-example invariance model.
  • FIGURES 6A and 6B are radial graphs illustrating a comparison of classification using a conventional model 600 and classification using an example soft, per-example invariance model 650, respectively, in accordance with various aspects of the present disclosure.
  • the conventional model 600 when presented with various rotational variances of an image 602 of the canonical “9,” generates several different classifications (e.g., 606a-g) that have the highest probability.
  • the model For instance, if the image 602 of the canonical “9” is rotated 50 degrees, the model generates a classification (e.g., 606f) of the input as “7.” If the image 602 of the canonical “9” is rotated 110 degrees, the conventional model generates a classification (e.g., 606e) of the input as “1.” Further, if the image 602 of the canonical “9” is rotated between 270 degrees and 315 degrees, the conventional model generates a classification (e.g., 606b)of the input as “2.” Likewise, the conventional model 600, when presented with various rotational variances of an image 604 of the canonical “1,” generates several different classifications (e.g., 608a-g) that have the highest [0069] On the other hand, referring to FIGURE 6B, the example soft, per-example invariance model 650, when presented with various rotational variances of the image 602 of the canonical “9” primarily indicate
  • the model For instance, if the image 602 of the canonical “9” is rotated between 45 degrees and -110 degrees, the model generates a classification (e.g., 652a) of the input as “9.” Otherwise, the soft, per-example invariance model 650 generates a classification (e.g., 652b) of the input as “6.” Similarly, when presented an image 604 of a canonical “1” the example soft, per-example invariance model 650 generates a classification (e.g., 654) of the input as “1” for all rotational variances.
  • a classification e.g., 652a
  • FIGURE 7 is a flow diagram illustrating a processor-implemented method 700 for soft, per-example invariance, in accordance with various aspects of the present disclosure.
  • the processor-implemented method 700 may be performed by one or more processors such as the CPU (e.g., 102, 422), GPU (e.g., 104, 426), and/or other processing units (e.g., DSP 106, 424 or NPU 108, 428), for example.
  • the processor-implemented method 700 may be implemented using an artificial neural network (ANN).
  • ANN artificial neural network
  • the ANN receives an input.
  • the ANN may, for example, comprise a variational autoencoder or an energy model.
  • the input may comprise an image, for example.
  • the ANN selectively performs a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations.
  • the model may determine an inverse transformation over a set of possible transformations.
  • the transformations may include rotation of the input x (e.g., an image), a change in pixel values (e.g., intensity) of the input x, shearing the appearance of the input x, an affine augmentation, or other transformation, for example.
  • the ANN generates an inference based on the reconstructed input. For instance, as described in Equation 1, the model may predict a label y from an unperturbed image (e.g., with an ANN), which is weighted by the degree to which the unperturbed image matches a canonical prototype.
  • rnn74i Tmnl pmpntatinn a tuples are described in the following numbered clauses: 1.
  • a processor-implemented method performed by one or more processors comprising: receiving, by an artificial neural network (ANN), an input; selectively performing, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations; and generating, by the ANN, an inference based on the reconstructed input.
  • ANN artificial neural network
  • An apparatus comprising: at least one memory; and at least one processor coupled to the at least one memory, the at least one processor configured to: receive, by an artificial neural network (ANN), an input; selectively perform, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of generate, by the ANN, an inference based on the reconstructed input.
  • ANN artificial neural network
  • a non-transitory computer-readable medium having program code recorded thereon, the program code executed by one or more processors and comprising: program code to receive, by an artificial neural network (ANN), an input; program code to selectively perform, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations; and program code to generate, by the ANN, an inference based on the reconstructed input.
  • ANN artificial neural network
  • the receiving means, performing means, and/or generating means may be the CPU 102, GPU 104, NPU 108, program memory associated with the CPU 102, GPU 104 or NPU 108, fully connected layers 362, NPU 428 and or the routing connection processing unit 216 configured to perform the functions recited.
  • the aforementioned means may be any module or any apparatus configured to perform the functions recited by the aforementioned means.
  • the various operations of methods described above may be performed by any suitable means capable of performing the corresponding functions.
  • the means may include various hardware and/or software component(s) and/or module(s), including, but not limited to, a circuit, an application specific integrated circuit (ASIC), or processor.
  • ASIC application specific integrated circuit
  • determining encompasses a wide variety of actions. For example, “determining” may include calculating, computing, processing, deriving, investigating, looking up (e.g., looking up in a table, a database, or another data structure), ascertaining and the like. Additionally, “determining” may include receiving (e.g., receiving information), accessing (e.g., accessing data in a memory) and the like. Furthermore, “determining” may include resolving, selecting, choosing, establishing, and the like.
  • a phrase referring to “at least one of’ a list of items refers to any combination of those items, including single members.
  • “at least one of: a, b, or c” is intended to cover: a, b, c, a-b, a-c, b-c, and a-b-c.
  • DSP digital signal processor
  • ASIC application specific integrated circuit
  • FPGA field programmable gate array signal
  • PLD programmable logic device
  • a general-purpose processor may be a microprocessor, but in the alternative, the processor may be any commercially available processor, controller, microcontroller, or state machine.
  • a processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
  • a software module may reside in any form of storage medium that is known in the art. Some examples of storage media that may be used include random access memory (RAM), read only memory (ROM), flash memory, erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, a hard disk, a removable disk, a CD-ROM and so forth.
  • RAM random access memory
  • ROM read only memory
  • EPROM erasable programmable read-only memory
  • EEPROM electrically erasable programmable read-only memory
  • registers a hard disk, a removable disk, a CD-ROM and so forth.
  • a software module may comprise a single instruction, or many instructions, and may be distributed over several different code segments, among different programs, and across multiple storage media.
  • a storage medium may be coupled to a processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor.
  • the methods disclosed comprise one or more steps or actions for achieving the described method.
  • the method steps and/or actions may be interchanged with one another without departing from the scope of the claims.
  • the order and/or use of specific steps and/or actions may be modified without departing from the scope of the claims.
  • an example hardware configuration may comprise a processing system in a device.
  • the processing system may be implemented with a bus architecture.
  • the bus may include any number of interconnecting buses and bridges depending on the specific application of the processing system and the overall design constraints.
  • the bus may link together various circuits including a processor, machine-readable media, and a bus interface.
  • the bus interface may be used to connect a network adapter, among other things, to the processing system via the bus.
  • the network adapter may be used to implement signal processing functions.
  • a user interface e.g., keypad, display, mouse, joystick, etc.
  • the bus may also link various other circuits such as timing sources, peripherals, voltage regulators, power management circuits, and the like, which are well known in the art, and therefore, will not be described any further.
  • the processor may be responsible for managing the bus and general processing, including the execution of software stored on the machine-readable media.
  • the processor may be implemented with one or more general-purpose and/or specialpurpose processors. Examples include microprocessors, microcontrollers, DSP processors, and other circuitry that can execute software.
  • Software shall be construed broadly to mean instructions, data, or any combination thereof, whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise.
  • Machine-readable media may include, by way of example, random access memory (RAM), flash memory, read only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable Read-only memory (EEPROM), registers, magnetic disks, optical disks, hard drives, or any other suitable storage medium, or any combination thereof.
  • RAM random access memory
  • ROM read only memory
  • PROM programmable read-only memory
  • EPROM erasable programmable read-only memory
  • EEPROM electrically erasable programmable Read-only memory
  • registers magnetic disks, optical disks, hard drives, or any other suitable storage medium, or any combination thereof.
  • the machine-readable media may be embodied in a computer-program product.
  • the computer-program product may comprise packaging materials.
  • the machine-readable media may be part of the processing system separate from the processor.
  • the machine-readable media, or any portion thereof may be external to the processing system.
  • the machine-readable media may include a transmission line, a carrier wave modulated by data, and/or a computer product separate from the device, all which may be accessed by the processor through the bus interface.
  • the machine-readable media, or any portion thereof may be integrated into the processor, such as the case may be with cache and/or general register files.
  • the various components discussed may be described as having a specific location, such as a local component, they may also be configured in various ways, such as certain components being configured as part of a distributed computing system.
  • the processing system may be configured as a general-purpose processing system with one or more microprocessors providing the processor functionality and external memory providing at least a portion of the machine-readable media, all linked together with other supporting circuitry through an external bus architecture.
  • the processing system may comprise one or more neuromorphic processors for implementing the neuron models and models of neural systems described.
  • the processing system may be implemented with an application specific integrated circuit (ASIC) with the processor, the bus interface, the user interface, supporting circuitry, and at least a portion of the machine-readable media integrated into a single chip, or with one or more field programmable gate arrays (FPGAs), programmable logic devices (PLDs), controllers, state machines, gated logic, discrete hardware components, or any other suitable circuitry, or any combination of circuits that can perform the various functionality described throughout this disclosure.
  • ASIC application specific integrated circuit
  • FPGAs field programmable gate arrays
  • PLDs programmable logic devices
  • controllers state machines, gated logic, discrete hardware components, or any other suitable circuitry, or any combination of circuits that can perform the various functionality described throughout this disclosure.
  • the machine-readable media may comprise a number of software modules.
  • the software modules include instructions that, when executed by the processor, cause the processing system to perform various functions.
  • the software modules may include a transmission module and a receiving module.
  • Each software module may reside in a single storage device or be distributed across multiple storage devices.
  • a software module may be loaded into RAM from a hard drive when a triggering event occurs.
  • the processor may load some of the instructions into cache to increase access speed.
  • One or more cache lines may then be loaded into a general register file for execution by the processor.
  • Computer- readable media include both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another.
  • a storage medium may be any available medium that can be accessed by a computer.
  • such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. Additionally, any connection is properly termed a computer-readable medium.
  • computer-readable media may comprise non-transitory computer- readable media (e.g., tangible media).
  • computer-readable media may comprise transitory computer- readable media (e.g., a signal). Combinations of the above should also be included within the scope of computer-readable media.
  • certain aspects may comprise a computer program product for performing the operations presented.
  • a computer program product may comprise a computer-readable medium having instructions stored (and/or encoded) thereon, the instructions being executable by one or more processors to perform the operations described.
  • the computer program product may include packaging material.
  • various methods described can be provided via storage means (e.g., RAM, ROM, a physical storage medium such as a compact disc (CD) or floppy disk, etc.), such that a user terminal and/or base station can obtain the various methods upon coupling or providing the storage means to the device.
  • storage means e.g., RAM, ROM, a physical storage medium such as a compact disc (CD) or floppy disk, etc.
  • CD compact disc
  • floppy disk etc.
  • any other suitable technique for providing the methods and techniques described to a device can be utilized.

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Abstract

A processor-implemented method for soft, per-example invariance includes receiving, by an artificial neural network (ANN), an input. The ANN selectively performs a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations. The ANN generates an inference based on the reconstructed input.

Description

PREDICTIVE MODEL WITH SOFT, PER-EXAMPLE INVARIANCES
THROUGH PROBABILISTIC MODELING
CROSS-REFERENCE TO RELATED APPLICATION
[0001] The present application claims the benefit of Greece Application No. 20230100249, filed on March 24, 2023, and titled “PREDICTIVE MODEL WITH SOFT PER-EXAMPLE INVARIANCES THROUGH PROBABILISTIC MODELING,” the disclosure of which is expressly incorporated by reference in its entirety.
FIELD OF THE DISCLOSURE
[0002] Aspects of the present disclosure generally relate to artificial neural networks, and more specifically to predictive models.
BACKGROUND
[0003] Artificial neural networks may comprise interconnected groups of artificial neurons (e.g., neuron models). The artificial neural network may be a computational device or be represented as a method to be performed by a computational device. Convolutional neural networks (CNNs) are a type of feed-forward artificial neural network. Convolutional neural networks may include collections of neurons that each have a receptive field and that collectively tile an input space. Convolutional neural networks, such as deep convolutional neural networks (DCNs), have numerous applications. In particular, these neural network architectures are used in various technologies, such as image recognition, speech recognition, acoustic scene classification, keyword spotting, autonomous driving, and other classification tasks.
[0004] Deep neural networks have grown in popularity because of their ability to solve complex problems. As such, deep learning deployment on edge devices for real time inference may be an area of interest. Unfortunately, the model size and thus memory consumption and complexity may be prohibitively large with millions of parameters.
[0005] Neural network models may be trained using a set of labeled training data. Given the set of training data, the neural network model may learn to make inferences based on the training data. In general, with more labeled training data, the neural network model accuracy may be improved. Additionally, the more labeled training data, the more likely that model generalization may be achieved. However, labelling data may be time consuming.
[0006] Incorporating data from multiple training domains may provide more labelled data. However, doing so may be expensive and, in some cases, prohibited due to privacy restrictions.
[0007] Data augmentation has become a popular technique to address to this issue. However, data augmentations may embed neural networks with some invariance to such augmentations, which may make downstream classification tasks more challenging.
SUMMARY
[0008] The present disclosure is set forth in the independent claims, respectively. Some aspects of the disclosure are described in the dependent claims.
[0009] In various aspects of the present disclosure, a processor-implemented method performed by one or more processors includes receiving, by an artificial neural network (ANN), an input. The processor-implemented method also includes selectively performing, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations. The processor-implemented method further includes generating, by the ANN, an inference based on the reconstructed input.
[0010] Other aspects of the present disclosure are directed to an apparatus including means for receiving, by an artificial neural network (ANN), an input. The apparatus further includes means for selectively performing, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations. The apparatus still further includes means for generating, by the ANN, an inference based on the reconstructed input.
[0011] In various other aspects of the present disclosure, a non-transitory computer- readable medium with program code recorded thereon is disclosed. The program code is executed by a processor and includes program code to receive, by an artificial neural network (ANN), an input. The program code further includes program code to selectively perform, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations. The program code still further includes program code to generate, by the ANN, an inference based on the reconstructed input.
[0012] Other aspects of the present disclosure are directed to an apparatus having a memory and one or more processors coupled to the memory. The processor(s) is configured to receive, by an artificial neural network (ANN), an input. The processor(s) is further configured to selectively perform, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations. The processor(s) is still further configured to generate, by the ANN, an inference based on the reconstructed input.
[0013] Additional features and advantages of the disclosure will be described below. It should be appreciated by those skilled in the art that this disclosure may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present disclosure. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the teachings of the disclosure as set forth in the appended claims. The novel features, which are believed to be characteristic of the disclosure, both as to its organization and method of operation, together with further objects and advantages, will be better understood from the following description when considered in connection with the accompanying figures. It is to be expressly understood, however, that each of the figures is provided for the purpose of illustration and description only and is not intended as a definition of the limits of the present disclosure.
BRIEF DESCRIPTION OF THE DRAWINGS
[0014] The features, nature, and advantages of the present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings in which like reference characters identify correspondingly throughout. [0015] FIGURE 1 illustrates an example implementation of a neural network using a system-on-a-chip (SOC), including a general-purpose processor, in accordance with certain aspects of the present disclosure.
[0016] FIGURES 2A, 2B, and 2C are diagrams illustrating a neural network, in accordance with various aspects of the present disclosure.
[0017] FIGURE 2D is a diagram illustrating an exemplary deep convolutional network (DCN), in accordance with various aspects of the present disclosure.
[0018] FIGURE 3 is a block diagram illustrating an exemplary deep convolutional network (DCN), in accordance with various aspects of the present disclosure.
[0019] FIGURE 4 is a block diagram illustrating an exemplary software architecture that may modularize artificial intelligence (Al) functions, in accordance with various aspects of the present disclosure.
[0020] FIGURE 5 is a diagram illustrating an example graphical model for embedding soft, per-example invariance, in accordance with various aspects of the present disclosure.
[0021] FIGURES 6A and 6B are radial graphs illustrating a comparison of classification using a conventional model and classification using an example soft, per- example invariance model, in accordance with various aspects of the present disclosure.
[0022] FIGURE 7 is a flow diagram illustrating a processor-implemented method for soft, per-example invariance, in accordance with various aspects of the present disclosure.
DETAILED DESCRIPTION
[0023] The detailed description set forth below, in connection with the appended drawings, is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of the various concepts. However, it will be apparent to those skilled in the art that these concepts may be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form in order to avoid obscuring such concepts.
[0024] Based on the teachings, one skilled in the art should appreciate that the scope of the disclosure is intended to cover any aspect of the disclosure, whether implemented independently of or combined with any other aspect of the disclosure. For example, an apparatus may be implemented or a method may be practiced using any number of the aspects set forth. In addition, the scope of the disclosure is intended to cover such an apparatus or method practiced using other structure, functionality, or structure and functionality in addition to or other than the various aspects of the disclosure set forth. It should be understood that any aspect of the disclosure disclosed may be embodied by one or more elements of a claim.
[0025] The word “exemplary” is used to mean “serving as an example, instance, or illustration.” Any aspect described as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects.
[0026] Although particular aspects are described, many variations and permutations of these aspects fall within the scope of the disclosure. Although some benefits and advantages of the preferred aspects are mentioned, the scope of the disclosure is not intended to be limited to particular benefits, uses or objectives. Rather, aspects of the disclosure are intended to be broadly applicable to different technologies, system configurations, networks, and protocols, some of which are illustrated by way of example in the figures and in the following description of the preferred aspects. The detailed description and drawings are merely illustrative of the disclosure rather than limiting, the scope of the disclosure being defined by the appended claims and equivalents thereof.
[0027] As described, deep neural networks have grown in popularity because of their ability to solve complex problems. As such, deep learning deployment on edge devices for real time inference may be an area of interest. Unfortunately, the model size and thus memory consumption and complexity may be prohibitively large with millions of parameters.
[0028] Making artificial neural networks (ANNs) invariant to certain transformations can inwrove robustness and performance. For example, convolutional architectures (e.g., convolutional neural networks (CNNs)) may embed ANNs with translation invariance and are state-of-the-art (SoTA) on many computer vision tasks. In addition, data augmentations embed neural networks with some invariance to those augmentations. However, in many tasks, full invariance may not desired. Full invariance is a property in which an outcome remains unchanged regardless of transformations or changes in conditions of a measurement with respect to an object. For example, being fully invariant to rotations would make distinguishing images of a canonical “6” from a canonical “9” difficult.
[0029] Soft invariance from data augmentations may be one approach to address such challenges. However, conventional approaches have failed to provide accurate results. In soft invariance, a small transformation (e.g., rotation) of an input image may result in the same class label as an input image without the small transformation. For example, in one conventional approach, images may be augmented with random rotations up to some maximum angle. However, conventional approaches may have the effect of smoothing the predictions across rotations for all examples.
[0030] To address these and other challenges, aspects of the present disclosure are directed to predictive models with soft, per-example invariances through probabilistic modeling. Predictive models analyze patterns in data and observe trends within certain conditions to estimate an outcome. Probabilistic models utilize the effect of random occurrences of actions to determine a likelihood of a future result.
[0031] In accordance with various aspects of the present disclosure, small perturbations may be embedded into a probabilistic model of a data generation process. The small perturbations, for example, may represent slight image variations (e.g., 1-10- degree rotations of an image). For instance, images of handwritten canonical “9” by different people may appear different due to natural variations in hand movements, paper orientation, distortions in scanning hardware or other reasons, for example. The actual digit may be considered a perturbed version of the canonical “9.”
[0032] Furthermore, aspects of the present disclosure may enable learning a devicespecific perturbation to align data at different user devices. Thus, aspects of the present disclosure may beneficially find application in the areas of computer vision and federated learning, for example. [0033] FIGURE 1 illustrates an example implementation of a system-on-a-chip (SOC) 100, which may include a central processing unit (CPU) 102 or a multi-core CPU configured for implementing a predictive model with soft, per-example invariance through probabilistic modeling. Variables (e.g., neural signals and synaptic weights), system parameters associated with a computational device (e.g., neural network with weights), delays, frequency bin information, and task information may be stored in a memory block associated with a neural processing unit (NPU) 108, in a memory block associated with a CPU 102, in a memory block associated with a graphics processing unit (GPU) 104, in a memory block associated with a digital signal processor (DSP) 106, in a memory block 118, or may be distributed across multiple blocks. Instructions executed at the CPU 102 may be loaded from a program memory associated with the CPU 102 or may be loaded from a memory block 118.
[0034] The SOC 100 may also include additional processing blocks tailored to specific functions, such as a GPU 104, a DSP 106, a connectivity block 110, which may include fifth generation (5G) connectivity, fourth generation long term evolution (4G LTE) connectivity, Wi-Fi connectivity, USB connectivity, Bluetooth connectivity, and the like, and a multimedia processor 112 that may, for example, detect and recognize gestures. In one implementation, the NPU 108 is implemented in the CPU 102, DSP 106, and/or GPU 104. The SOC 100 may also include a sensor processor 114, image signal processors (ISPs) 116, and/or navigation module 120, which may include a global positioning system.
[0035] The SOC 100 may be based on an ARM instruction set. In an aspect of the present disclosure, the instructions loaded into the general -purpose processor 102 may include code to receive, by an artificial neural network (ANN), an input. The general- purpose processor 102 may also include code to selectively perform, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations. The general -purpose processor 102 may further include code to generate, by the ANN, an inference based on the reconstructed input.
[0036] Deep learning architectures may perform an object recognition task by learning to represent inputs at successively higher levels of abstraction in each layer, thereby building up a useful feature representation of the input data. In this way, deep learning addresses a major bottleneck of traditional machine learning. Prior to the advent of deep learning, a machine learning approach to an object recognition problem may have relied heavily on human engineered features, perhaps in combination with a shallow classifier. A shallow classifier may be a two-class linear classifier, for example, in which a weighted sum of the feature vector components may be compared with a threshold to predict to which class the input belongs. Human engineered features may be templates or kernels tailored to a specific problem domain by engineers with domain expertise. Deep learning architectures, in contrast, may learn to represent features that are similar to what a human engineer might design, but through training. Furthermore, a deep network may learn to represent and recognize new types of features that a human might not have considered.
[0037] A deep learning architecture may learn a hierarchy of features. If presented with visual data, for example, the first layer may learn to recognize relatively simple features, such as edges, in the input stream. In another example, if presented with auditory data, the first layer may learn to recognize spectral power in specific frequencies. The second layer, taking the output of the first layer as input, may learn to recognize combinations of features, such as simple shapes for visual data or combinations of sounds for auditory data. For instance, higher layers may learn to represent complex shapes in visual data or words in auditory data. Still higher layers may learn to recognize common visual objects or spoken phrases.
[0038] Deep learning architectures may perform especially well when applied to problems that have a natural hierarchical structure. For example, the classification of motorized vehicles may benefit from first learning to recognize wheels, windshields, and other features. These features may be combined at higher layers in different ways to recognize cars, trucks, and airplanes.
[0039] Neural networks may be designed with a variety of connectivity patterns. In feed-forward networks, information is passed from lower to higher layers, with each neuron in a given layer communicating to neurons in higher layers. A hierarchical representation may be built up in successive layers of a feed-forward network, as described above. Neural networks may also have recurrent or feedback (also called top- down) connections. In a recurrent connection, the output from a neuron in a given layer may be communicated to another neuron in the same layer. A recurrent architecture may be helpful in recognizing patterns that span more than one of the input data chunks that are delivered to the neural network in a sequence. A connection from a neuron in a given layer to a neuron in a lower layer may be called a feedback (or top-down) connection. A network with many feedback connections may be helpful when the recognition of a high-level concept may aid in discriminating the particular low-level features of an input.
[0040] The connections between layers of a neural network may be fully connected or locally connected. FIGURE 2A illustrates an example of a fully connected neural network 202. In a fully connected neural network 202, a neuron in a first layer may communicate its output to every neuron in a second layer, so that each neuron in the second layer will receive input from every neuron in the first layer. FIGURE 2B illustrates an example of a locally connected neural network 204. In a locally connected neural network 204, a neuron in a first layer may be connected to a limited number of neurons in the second layer. More generally, a locally connected layer of the locally connected neural network 204 may be configured so that each neuron in a layer will have the same or a similar connectivity pattern, but with connections strengths that may have different values (e.g., 210, 212, 214, and 216). The locally connected connectivity pattern may give rise to spatially distinct receptive fields in a higher layer because the higher layer neurons in a given region may receive inputs that are tuned through training to the properties of a restricted portion of the total input to the network.
[0041] One example of a locally connected neural network is a convolutional neural network. FIGURE 2C illustrates an example of a convolutional neural network 206. The convolutional neural network 206 may be configured such that the connection strengths associated with the inputs for each neuron in the second layer are shared (e.g., 208). Convolutional neural networks may be well suited to problems in which the spatial location of inputs is meaningful.
[0042] One type of convolutional neural network is a deep convolutional network (DCN). FIGURE 2D illustrates a detailed example of a DCN 200 designed to recognize visual features from an image 226 input from an image capturing device 230, such as a car-mounted camera. The DCN 200 of the current example may be trained to identify traffic signs and a number provided on the traffic sign. Of course, the DCN 200 may be trained for other tasks, such as identifying lane markings or identifying traffic lights. [0043] The DCN 200 may be trained with supervised learning. During training, the DCN 200 may be presented with an image, such as the image 226 of a speed limit sign, and a forward pass may then be computed to produce an output 222. The DCN 200 may include a feature extraction section and a classification section. Upon receiving the image 226, a convolutional layer 232 may apply convolutional kernels (not shown) to the image 226 to generate a first set of feature maps 218. As an example, the convolutional kernel for the convolutional layer 232 may be a 5x5 kernel that generates 28x28 feature maps. In the present example, because four different feature maps are generated in the first set of feature maps 218, four different convolutional kernels were applied to the image 226 at the convolutional layer 232. The convolutional kernels may also be referred to as filters or convolutional filters.
[0044] The first set of feature maps 218 may be subsampled by a max pooling layer (not shown) to generate a second set of feature maps 220. The max pooling layer reduces the size of the first set of feature maps 218. That is, a size of the second set of feature maps 220, such as 14x14, is less than the size of the first set of feature maps 218, such as 28x28. The reduced size provides similar information to a subsequent layer while reducing memory consumption. The second set of feature maps 220 may be further convolved via one or more subsequent convolutional layers (not shown) to generate one or more subsequent sets of feature maps (not shown).
[0045] In the example of FIGURE 2D, the second set of feature maps 220 may be convolved to generate a first feature vector 224. Furthermore, the first feature vector 224 may be further convolved to generate a second feature vector 228. Each feature of the second feature vector 228 may include a number that corresponds to a possible feature of the image 226, such as “sign,” “60,” and “100.” A softmax function (not shown) may convert the numbers in the second feature vector 228 to a probability. As such, an output 222 of the DCN 200 may be a probability of the image 226 including one or more features.
[0046] In the present example, the probabilities in the output 222 for “sign” and “60” are higher than the probabilities of the others of the output 222, such as “30,” “40,” “50,” “70,” “80,” “90,” and “100”. Before training, the output 222 produced by the DCN 200 may likely be incorrect. Thus, an error may be calculated between the output 222 and a target output. The target output may be the ground truth of the image 226 (e.g., “sign” and “60”). The weights of the DCN 200 may then be adjusted so the output 222 of the DCN 200 may be more closely aligned with the target output.
[0047] To adjust the weights, a learning algorithm may compute a gradient vector for the weights. The gradient may indicate an amount that an error would increase or decrease if the weight were adjusted. At the top layer, the gradient may correspond directly to the value of a weight connecting an activated neuron in the penultimate layer and a neuron in the output layer. In lower layers, the gradient may depend on the value of the weights and on the computed error gradients of the higher layers. The weights may then be adjusted to reduce the error. This manner of adjusting the weights may be referred to as “back propagation” as it involves a “backward pass” through the neural network.
[0048] In practice, the error gradient of weights may be calculated over a small number of examples, so that the calculated gradient approximates the true error gradient. This approximation method may be referred to as “stochastic gradient descent.” Stochastic gradient descent may be repeated until the achievable error rate of the entire system has stopped decreasing or until the error rate has reached a target level. After learning, the DCN 200 may be presented with new images and a forward pass through the DCN 200 may yield an output 222( that may be considered an inference or a prediction of the DCN 200.
[0049] Deep belief networks (DBNs) are probabilistic models comprising multiple layers of hidden nodes. DBNs may be used to extract a hierarchical representation of training data sets. A DBN may be obtained by stacking up layers of Restricted Boltzmann Machines (RBMs). An RBM is a type of artificial neural network that can learn a probability distribution over a set of inputs. Because RBMs can learn a probability distribution in the absence of information about the class to which each input should be categorized, RBMs are often used in unsupervised learning. Using a hybrid unsupervised and supervised paradigm, the bottom RBMs of a DBN may be trained in an unsupervised manner and may serve as feature extractors, and the top RBM may be trained in a supervised manner (on a joint distribution of inputs from the previous layer and target classes) and may serve as a classifier. [0050] DCNs are networks of convolutional networks, configured with additional pooling and normalization layers. DCNs have achieved state-of-the-art performance on many tasks. DCNs can be trained using supervised learning in which both the input and output targets are known for many exemplars and are used to modify the weights of the network by use of gradient descent methods.
[0051] DCNs may be feed-forward networks. In addition, as described above, the connections from a neuron in a first layer of a DCN to a group of neurons in the next higher layer are shared across the neurons in the first layer. The feed-forward and shared connections of DCNs may be exploited for fast processing. The computational burden of a DCN may be much less, for example, than that of a similarly sized neural network that comprises recurrent or feedback connections.
[0052] The processing of each layer of a convolutional network may be considered a spatially invariant template or basis projection. If the input is first decomposed into multiple channels, such as the red, green, and blue channels of a color image, then the convolutional network trained on that input may be considered three-dimensional, with two spatial dimensions along the axes of the image and a third dimension capturing color information. The outputs of the convolutional connections may be considered to form a feature map in the subsequent layer, with each element of the feature map (e.g., 220) receiving input from a range of neurons in the previous layer (e.g., feature maps 218) and from each of the multiple channels. The values in the feature map may be further processed with a non-linearity, such as a rectification, max(0, x). Values from adjacent neurons may be further pooled, which corresponds to down sampling, and may provide additional local invariance and dimensionality reduction. Normalization, which corresponds to whitening, may also be applied through lateral inhibition between neurons in the feature map.
[0053] FIGURE 3 is a block diagram illustrating a DCN 350. The DCN 350 may include multiple different types of layers based on connectivity and weight sharing. As shown in FIGURE 3, the DCN 350 includes the convolution blocks 354A, 354B. Each of the convolution blocks 354 A, 354B may be configured with a convolution layer (CONV) 356, a normalization layer (LNorm) 358, and a max pooling layer (MAX POOL) 360. [0054] Although only two of the convolution blocks 354 A, 354B are shown, the present disclosure is not so limiting, and instead, any number of the convolution blocks 354A, 354B may be included in the DCN 350 according to design preference.
[0055] The convolution layers 356 may include one or more convolutional filters, which may be applied to the input data to generate a feature map. The normalization layer 358 may normalize the output of the convolution filters. For example, the normalization layer 358 may provide whitening or lateral inhibition. The max pooling layers 360 may provide down sampling aggregation over space for local invariance and dimensionality reduction.
[0056] The parallel filter banks, for example, of a DCN may be loaded on a CPU 102 or GPU 104 of an SOC 100 (e.g., FIGURE 1) to achieve high performance and low power consumption. In alternative embodiments, the parallel filter banks may be loaded on the DSP 106 or an ISP 116 of an SOC 100. In addition, the DCN 350 may access other processing blocks that may be present on the SOC 100, such as sensor processor 114 and navigation module 120, dedicated, respectively, to sensors and navigation.
[0057] The DCN 350 may also include one or more fully connected layers 362 (FC1 and FC2). The DCN 350 may further include a logistic regression (LR) layer 364.
Between each layer 356, 358, 360, 362, 364 of the DCN 350 are weights (not shown) that are to be updated. The output of each of the layers (e.g., 356, 358, 360, 362, 364) may serve as an input of a succeeding one of the layers (e.g., 356, 358, 360, 362, 364) in the DCN 350 to learn hierarchical feature representations from input data 352 (e.g., images, audio, video, sensor data and/or other input data) supplied at the first of the convolution blocks 354A. The output of the DCN 350 is a classification score 366 for the input data 352. The classification score 366 may be a set of probabilities, where each probability is the probability of the input data including a feature from a set of features.
[0058] FIGURE 4 is a block diagram illustrating an exemplary software architecture 400 that may modularize artificial intelligence (Al) functions. Using the architecture 400, applications may be designed that may cause various processing blocks of an SOC 420 (for example a CPU 422, a DSP 424, a GPU 426 and/or an NPU 428) (which may be similar to SOC 100 of FIGURE 1) to support predictive modeling with soft, per- example invariance through probabilistic modeling for an Al application 402, according to aspects of the present disclosure. The architecture 400 may, for example, be included in a computational device, such as a smartphone.
[0059] The Al application 402 may be configured to call functions defined in a user space 404 that may, for example, provide for the detection and recognition of a scene indicative of the location at which the computational device including the architecture 400 currently operates. The Al application 402 may, for example, configure a microphone and a camera differently depending on whether the recognized scene is an office, a lecture hall, a restaurant, or an outdoor setting such as a lake. The Al application 402 may make a request to compiled program code associated with a library defined in an Al function application programming interface (API) 406. The request may ultimately rely on the output of a deep neural network configured to provide an inference response based on video and positioning data, for example.
[0060] A run-time engine 408, which may be compiled code of a runtime framework, may be further accessible to the Al application 402. The Al application 402 may cause the run-time engine 408, for example, to request an inference at a particular time interval or triggered by an event detected by the user interface of the application 402. When caused to provide an inference response, the run-time engine 408 may in turn send a signal to an operating system in an operating system (OS) space 410, such as a kernel 412, running on the SOC 420. In some examples, the Kernel 412 may be a Linux kernel. The operating system, in turn, may cause a continuous relaxation of quantization to be performed on the CPU 422, the DSP 424, the GPU 426, the NPU 428, or some combination thereof. The CPU 422 may be accessed directly by the operating system, and other processing blocks may be accessed through a driver, such as a driver 414, 416, or 418 for, respectively, the DSP 424, the GPU 426, or the NPU 428. In the exemplary example, the deep neural network may be configured to run on a combination of processing blocks, such as the CPU 422, the DSP 424, and the GPU 426, or may be run on the NPU 428.
[0061] As described, aspects of the present disclosure are directed to predictive models with soft, per-example, invariances through probabilistic modeling. [0062] FIGURE 5 is a diagram illustrating an example graphical model 500 for embedding soft, per-example invariance, in accordance with various aspects of the present disclosure. Referring to FIGURE 5, the graphical model 500 takes a label y 502. The graphical model 500 may generate an object in a canonical position x 504. The graphical model 500 may sample a perturbation T 506 to generate an observation x 508. The observation x 508, may be an image, for example. The perturbations may, for instance, be a rotation of the observation x 508 (e.g., an image), a change in pixel values (e.g., intensity), shearing (e.g., a transformation that slants the shape of an object in an image), an affine augmentation, or other transformation.
[0063] In accordance with aspects of the present disclosure, a probabilistic model for predictions may be given by:
Figure imgf000017_0001
where E is the expectation (expected value), and det is the determinant of the Jacobian of the transformation. In Equation 1, the model may estimate a label y from an unperturbed image (e.g., with an ANN), which may be weighted by the degree to which the unperturbed image matches a canonical prototype. That is, for a given input x, the model may determine an inverse transformation over a set of possible transformations. By adding a generative model of the canonicalized images, and taking a weighted average over estimated labels, the model may be embedded with an example-dependent soft invariance. In doing so, the model may bring back the canonical form and then generate an inference.
[0064] Using Equation 1, small perturbations may be embedded into a model (e.g., a probabilistic model) of the data generating process and may thus impose such structure on an ANN model so that a level of invariance may be achieved. That is, the expression of Equation 1 may embed the model with per-example invariance because for a given input x, only augmentations (e.g., perturbation T 506) that have a higher probability under the density model for a canonical space may be considered. For example, if an input x is a number “9” for which the image is rotated and thus resembles a number “6,” then the weighted prediction term py may indicate a lower probability for the class y, such that the probability of selecting such an orientation may likewise be smaller. [0065] The soft, per-example invariance model may be trained by optimizing the conditional probability (e.g., the probability of a label y given an input x,
Figure imgf000018_0001
The soft, per-example invariance model may also be trained by maximizing a joint probability, as follows:
Figure imgf000018_0002
[0066] In various aspects, the soft, per-example invariance model may be implemented using a variational autoencoder or using an energy model, for instance. For example, by using a joint energy -based model, a single neural network may be employed for modelling
Figure imgf000018_0003
[0067] An approximate encoder q(T\x) « p( |x) may also be employed, where q corresponds to a parametrized distribution. In this example, the approximate encoder q may take an input x and may generate parameters of a distribution over the transformation T. Accordingly, the soft, per-example invariance model may be jointly trained using the evidence lower bound (ELBO). The ELBO is a lower bound for the log-likelihood of observed data, which enables the use of gradient-based techniques for training the soft, per-example invariance model.
[0068] FIGURES 6A and 6B are radial graphs illustrating a comparison of classification using a conventional model 600 and classification using an example soft, per-example invariance model 650, respectively, in accordance with various aspects of the present disclosure. As shown in FIGURE 6A, the conventional model 600, when presented with various rotational variances of an image 602 of the canonical “9,” generates several different classifications (e.g., 606a-g) that have the highest probability. For instance, if the image 602 of the canonical “9” is rotated 50 degrees, the model generates a classification (e.g., 606f) of the input as “7.” If the image 602 of the canonical “9” is rotated 110 degrees, the conventional model generates a classification (e.g., 606e) of the input as “1.” Further, if the image 602 of the canonical “9” is rotated between 270 degrees and 315 degrees, the conventional model generates a classification (e.g., 606b)of the input as “2.” Likewise, the conventional model 600, when presented with various rotational variances of an image 604 of the canonical “1,” generates several different classifications (e.g., 608a-g) that have the highest [0069] On the other hand, referring to FIGURE 6B, the example soft, per-example invariance model 650, when presented with various rotational variances of the image 602 of the canonical “9” primarily indicate that two different classifications (652a and 652b) that have the highest probability. For instance, if the image 602 of the canonical “9” is rotated between 45 degrees and -110 degrees, the model generates a classification (e.g., 652a) of the input as “9.” Otherwise, the soft, per-example invariance model 650 generates a classification (e.g., 652b) of the input as “6.” Similarly, when presented an image 604 of a canonical “1” the example soft, per-example invariance model 650 generates a classification (e.g., 654) of the input as “1” for all rotational variances.
[0070] FIGURE 7 is a flow diagram illustrating a processor-implemented method 700 for soft, per-example invariance, in accordance with various aspects of the present disclosure. The processor-implemented method 700 may be performed by one or more processors such as the CPU (e.g., 102, 422), GPU (e.g., 104, 426), and/or other processing units (e.g., DSP 106, 424 or NPU 108, 428), for example. In some aspects, the processor-implemented method 700 may be implemented using an artificial neural network (ANN).
[0071] As shown in FIGURE 7, at block 702, the ANN receives an input. The ANN may, for example, comprise a variational autoencoder or an energy model. The input may comprise an image, for example.
[0072] At block 704, the ANN selectively performs a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations. For example, as described with respect to the model of Equation 1, for a given input x, the model may determine an inverse transformation over a set of possible transformations. The transformations may include rotation of the input x (e.g., an image), a change in pixel values (e.g., intensity) of the input x, shearing the appearance of the input x, an affine augmentation, or other transformation, for example.
[0073] At block 706, the ANN generates an inference based on the reconstructed input. For instance, as described in Equation 1, the model may predict a label y from an unperturbed image (e.g., with an ANN), which is weighted by the degree to which the unperturbed image matches a canonical prototype. rnn74i Tmnl pmpntatinn a tuples are described in the following numbered clauses: 1. A processor-implemented method performed by one or more processors, the processor-implemented method comprising: receiving, by an artificial neural network (ANN), an input; selectively performing, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations; and generating, by the ANN, an inference based on the reconstructed input.
2. The processor-implemented method of clause 1, in which the transformation is selectively performed based on a weighted average over estimated labels of the input.
3. The processor-implemented method of clause 1 or 2, in which the input is an image.
4. The processor-implemented method of any of clauses 1-3, in which the transformation on the input is selectively performed based on a weighted estimation of a degree to which the image matches a canonical example.
5. The processor-implemented method of any of clauses 1-4, in which the ANN comprises one of an energy model or a variational autoencoder.
6. The processor-implemented method of any of clauses 1-5, further comprising training the ANN according to an optimization process based on a conditional probability.
7. The processor-implemented method of any of clauses 1-6, in which the ANN learns a device-specific transformation to align data at different user devices.
8. An apparatus, comprising: at least one memory; and at least one processor coupled to the at least one memory, the at least one processor configured to: receive, by an artificial neural network (ANN), an input; selectively perform, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of generate, by the ANN, an inference based on the reconstructed input.
9. The apparatus of clause 8, in which the transformation is selectively performed based on a weighted average over estimated labels of the input.
10. The apparatus of clause 8 or 9, in which the input is an image.
11. The apparatus of any of clauses 8-10, in which the transformation on the input is selectively performed based on a weighted estimation of a degree to which the image matches a canonical example.
12. The apparatus of any of clauses 8-11, in which the ANN comprises one of an energy model or a variational autoencoder.
13. The apparatus of any of clauses 8-12, in which the at least one processor is further configured to train the ANN according to an optimization process based on a conditional probability.
14. The apparatus of any of clauses 8-13, in which the ANN learns a device-specific transformation to align data at different user devices.
15. A non-transitory computer-readable medium having program code recorded thereon, the program code executed by one or more processors and comprising: program code to receive, by an artificial neural network (ANN), an input; program code to selectively perform, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations; and program code to generate, by the ANN, an inference based on the reconstructed input.
16. The non-transitory computer-readable medium of clause 15, in which the transformation is selectively performed based on a weighted average over estimated labels of the input. 17. The non-transitory computer-readable medium of clause 15 or 16, in which the input is an image.
18. The non-transitory computer-readable medium of any of clauses 15-17, in which the transformation on the input is selectively performed based on a weighted estimation of a degree to which the image matches a canonical example.
19. The non-transitory computer-readable medium of any of clauses 15-18, in which the ANN comprises one of an energy model or a variational autoencoder.
20. The non-transitory computer-readable medium of any of clauses 15-19, in which the program code further comprises program code to train the ANN according to an optimization process based on a conditional probability.
21. The non-transitory computer-readable medium of any of clauses 15-20, in which the ANN learns a device-specific transformation to align data at different user devices.
22. An apparatus, comprising: means for receiving, by an artificial neural network (ANN), an input; means for selectively performing, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations; and means for generating, by the ANN, an inference based on the reconstructed input.
23. The apparatus of clause 22, in which the transformation is selectively performed based on a weighted average over estimated labels of the input.
24. The apparatus of clause 22 or 23, in which the input is an image.
25. The apparatus of any of clauses 22-24, in which the transformation on the input is selectively performed based on a weighted estimation of a degree to which the image matches a canonical example. 26. The apparatus of any of clauses 22-25, in which the ANN comprises one of an energy model or a variational autoencoder.
27. The apparatus of any of clauses 22-26, further comprising means for training the ANN according to an optimization process based on a conditional probability.
28. The apparatus of any of clauses 22-27, in which the ANN learns a devicespecific transformation to align data at different user devices.
[0075] In one aspect, the receiving means, performing means, and/or generating means may be the CPU 102, GPU 104, NPU 108, program memory associated with the CPU 102, GPU 104 or NPU 108, fully connected layers 362, NPU 428 and or the routing connection processing unit 216 configured to perform the functions recited. In another configuration, the aforementioned means may be any module or any apparatus configured to perform the functions recited by the aforementioned means.
[0076] The various operations of methods described above may be performed by any suitable means capable of performing the corresponding functions. The means may include various hardware and/or software component(s) and/or module(s), including, but not limited to, a circuit, an application specific integrated circuit (ASIC), or processor. Generally, where there are operations illustrated in the figures, those operations may have corresponding counterpart means-plus-function components with similar numbering.
[0077] As used, the term “determining” encompasses a wide variety of actions. For example, “determining” may include calculating, computing, processing, deriving, investigating, looking up (e.g., looking up in a table, a database, or another data structure), ascertaining and the like. Additionally, “determining” may include receiving (e.g., receiving information), accessing (e.g., accessing data in a memory) and the like. Furthermore, “determining” may include resolving, selecting, choosing, establishing, and the like.
[0078] As used, a phrase referring to “at least one of’ a list of items refers to any combination of those items, including single members. As an example, “at least one of: a, b, or c” is intended to cover: a, b, c, a-b, a-c, b-c, and a-b-c. [0079] The various illustrative logical blocks, modules and circuits described in connection with the present disclosure may be implemented or performed with a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array signal (FPGA) or other programmable logic device (PLD), discrete gate or transistor logic, discrete hardware components or any combination thereof designed to perform the functions described. A general-purpose processor may be a microprocessor, but in the alternative, the processor may be any commercially available processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
[0080] The steps of a method or algorithm described in connection with the present disclosure may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in any form of storage medium that is known in the art. Some examples of storage media that may be used include random access memory (RAM), read only memory (ROM), flash memory, erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, a hard disk, a removable disk, a CD-ROM and so forth. A software module may comprise a single instruction, or many instructions, and may be distributed over several different code segments, among different programs, and across multiple storage media. A storage medium may be coupled to a processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor.
[0081] The methods disclosed comprise one or more steps or actions for achieving the described method. The method steps and/or actions may be interchanged with one another without departing from the scope of the claims. In other words, unless a specific order of steps or actions is specified, the order and/or use of specific steps and/or actions may be modified without departing from the scope of the claims.
[0082] The functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in hardware, an example hardware configuration may comprise a processing system in a device. The processing system may be implemented with a bus architecture. The bus may include any number of interconnecting buses and bridges depending on the specific application of the processing system and the overall design constraints. The bus may link together various circuits including a processor, machine-readable media, and a bus interface. The bus interface may be used to connect a network adapter, among other things, to the processing system via the bus. The network adapter may be used to implement signal processing functions. For certain aspects, a user interface (e.g., keypad, display, mouse, joystick, etc.) may also be connected to the bus. The bus may also link various other circuits such as timing sources, peripherals, voltage regulators, power management circuits, and the like, which are well known in the art, and therefore, will not be described any further.
[0083] The processor may be responsible for managing the bus and general processing, including the execution of software stored on the machine-readable media. The processor may be implemented with one or more general-purpose and/or specialpurpose processors. Examples include microprocessors, microcontrollers, DSP processors, and other circuitry that can execute software. Software shall be construed broadly to mean instructions, data, or any combination thereof, whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. Machine-readable media may include, by way of example, random access memory (RAM), flash memory, read only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable Read-only memory (EEPROM), registers, magnetic disks, optical disks, hard drives, or any other suitable storage medium, or any combination thereof. The machine-readable media may be embodied in a computer-program product. The computer-program product may comprise packaging materials.
[0084] In a hardware implementation, the machine-readable media may be part of the processing system separate from the processor. However, as those skilled in the art will readily appreciate, the machine-readable media, or any portion thereof, may be external to the processing system. By way of example, the machine-readable media may include a transmission line, a carrier wave modulated by data, and/or a computer product separate from the device, all which may be accessed by the processor through the bus interface. Alternatively, or in addition, the machine-readable media, or any portion thereof, may be integrated into the processor, such as the case may be with cache and/or general register files. Although the various components discussed may be described as having a specific location, such as a local component, they may also be configured in various ways, such as certain components being configured as part of a distributed computing system.
[0085] The processing system may be configured as a general-purpose processing system with one or more microprocessors providing the processor functionality and external memory providing at least a portion of the machine-readable media, all linked together with other supporting circuitry through an external bus architecture. Alternatively, the processing system may comprise one or more neuromorphic processors for implementing the neuron models and models of neural systems described. As another alternative, the processing system may be implemented with an application specific integrated circuit (ASIC) with the processor, the bus interface, the user interface, supporting circuitry, and at least a portion of the machine-readable media integrated into a single chip, or with one or more field programmable gate arrays (FPGAs), programmable logic devices (PLDs), controllers, state machines, gated logic, discrete hardware components, or any other suitable circuitry, or any combination of circuits that can perform the various functionality described throughout this disclosure. Those skilled in the art will recognize how best to implement the described functionality for the processing system depending on the particular application and the overall design constraints imposed on the overall system.
[0086] The machine-readable media may comprise a number of software modules. The software modules include instructions that, when executed by the processor, cause the processing system to perform various functions. The software modules may include a transmission module and a receiving module. Each software module may reside in a single storage device or be distributed across multiple storage devices. By way of example, a software module may be loaded into RAM from a hard drive when a triggering event occurs. During execution of the software module, the processor may load some of the instructions into cache to increase access speed. One or more cache lines may then be loaded into a general register file for execution by the processor. When referring to the functionality of a software module below, it will be understood that such functionality is implemented by the processor when executing instructions from that software module. Furthermore, it should be appreciated that aspects of the present disclosure result in improvements to the functioning of the processor, computer, machine, or other system implementing such aspects.
[0087] If implemented in software, the functions may be stored or transmitted over as one or more instructions or code on a computer-readable medium. Computer- readable media include both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage medium may be any available medium that can be accessed by a computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. Additionally, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared (IR), radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used, include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk, and Blu-ray® disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Thus, in some aspects, computer-readable media may comprise non-transitory computer- readable media (e.g., tangible media). In addition, for other aspects computer-readable media may comprise transitory computer- readable media (e.g., a signal). Combinations of the above should also be included within the scope of computer-readable media.
[0088] Thus, certain aspects may comprise a computer program product for performing the operations presented. For example, such a computer program product may comprise a computer-readable medium having instructions stored (and/or encoded) thereon, the instructions being executable by one or more processors to perform the operations described. For certain aspects, the computer program product may include packaging material. [0089] Further, it should be appreciated that modules and/or other appropriate means for performing the methods and techniques described can be downloaded and/or otherwise obtained by a user terminal and/or base station as applicable. For example, such a device can be coupled to a server to facilitate the transfer of means for performing the methods described. Alternatively, various methods described can be provided via storage means (e.g., RAM, ROM, a physical storage medium such as a compact disc (CD) or floppy disk, etc.), such that a user terminal and/or base station can obtain the various methods upon coupling or providing the storage means to the device. Moreover, any other suitable technique for providing the methods and techniques described to a device can be utilized.
[0090] It is to be understood that the claims are not limited to the precise configuration and components illustrated above. Various modifications, changes, and variations may be made in the arrangement, operation, and details of the methods and apparatus described above without departing from the scope of the claims.

Claims

CLAIMS WHAT IS CLAIMED IS:
1. A processor-implemented method performed by one or more processors, the processor-implemented comprising: receiving, by an artificial neural network (ANN), an input; selectively performing, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations; and generating, by the ANN, an inference based on the reconstructed input.
2. The processor-implemented method of claim 1, in which the transformation is selectively performed based on a weighted average over estimated labels of the input.
3. The processor-implemented method of claim 1, in which the input is an image.
4. The processor-implemented method of claim 3, in which the transformation on the input is selectively performed based on a weighted estimation of a degree to which the image matches a canonical example.
5. The processor-implemented method of claim 1, in which the ANN comprises one of an energy model or a variational autoencoder.
6. The processor-implemented method of claim 1, further comprising training the ANN according to an optimization process based on a conditional probability.
7. The processor-implemented method of claim 1, in which the ANN learns a device-specific transformation to align data at different user devices.
8. An apparatus, comprising: at least one memory; and at least one processor coupled to the at least one memory, the at least one processor configured to: receive, by an artificial neural network (ANN), an input; selectively perform, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations; and generate, by the ANN, an inference based on the reconstructed input.
9. The apparatus of claim 8, in which the transformation is selectively performed based on a weighted average over estimated labels of the input.
10. The apparatus of claim 8, in which the input is an image.
11. The apparatus of claim 10, in which the transformation on the input is selectively performed based on a weighted estimation of a degree to which the image matches a canonical example.
12. The apparatus of claim 8, in which the ANN comprises one of an energy model or a variational autoencoder.
13. The apparatus of claim 8, in which the at least one processor is further configured to train the ANN according to an optimization process based on a conditional probability.
14. The apparatus of claim 8, in which the ANN learns a device-specific transformation to align data at different user devices.
15. A non-transitory computer-readable medium having program code recorded thereon, the program code executed by one or more processors and comprising: program code to receive, by an artificial neural network (ANN), an input; program code to selectively perform, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations; and program code to generate, by the ANN, an inference based on the reconstructed input.
16. The non-transitory computer-readable medium of claim 15, in which the transformation is selectively performed based on a weighted average over estimated labels of the input.
17. The non-transitory computer-readable medium of claim 15, in which the input is an image.
18. The non-transitory computer-readable medium of claim 17, in which the transformation on the input is selectively performed based on a weighted estimation of a degree to which the image matches a canonical example.
19. The non-transitory computer-readable medium of claim 15, in which the ANN comprises one of an energy model or a variational autoencoder.
20. The non-transitory computer-readable medium of claim 15, in which the program code further comprises program code to train the ANN according to an optimization process based on a conditional probability.
21. The non-transitory computer-readable medium of claim 15, in which the ANN learns a device-specific transformation to align data at different user devices.
22. An apparatus, comprising: means for receiving, by an artificial neural network (ANN), an input; means for selectively performing, by the ANN, a transformation on the input to generate a reconstructed input that is invariant to a subset of a set of transformations; and means for generating, by the ANN, an inference based on the reconstructed input.
23. The apparatus of claim 22, in which the transformation is selectively performed based on a weighted average over estimated labels of the input.
24. The apparatus of claim 22, in which the input is an image.
25. The apparatus of claim 24, in which the transformation on the input is selectively performed based on a weighted estimation of a degree to which the image matches a canonical example.
26. The apparatus of claim 22, in which the ANN comprises one of an energy model or a variational autoencoder.
27. The apparatus of claim 22, further comprising means for training the ANN according to an optimization process based on a conditional probability.
28. The apparatus of claim 22, in which the ANN learns a device-specific transformation to align data at different user devices.
PCT/US2023/031769 2023-03-24 2023-08-31 Predictive model with soft, per-example invariances through probabilistic modeling Ceased WO2024205619A1 (en)

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Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
KANG JIAN ET AL: "Rotation-Invariant Deep Embedding for Remote Sensing Images", IEEE TRANSACTIONS ON GEOSCIENCE AND REMOTE SENSING, IEEE, USA, vol. 60, 28 June 2021 (2021-06-28), pages 1 - 13, XP011897424, ISSN: 0196-2892, [retrieved on 20220112], DOI: 10.1109/TGRS.2021.3088398 *
SOHN KIHYUK ET AL: "Learning Invariant Representations with Local Transformations", ARXIV (CORNELL UNIVERSITY), 27 June 2012 (2012-06-27), Ithaca, XP093108085, Retrieved from the Internet <URL:https://arxiv.org/ftp/arxiv/papers/1206/1206.6418.pdf> [retrieved on 20231201], DOI: 10.48550/arxiv.1206.6418 *

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