WO2024198211A1 - Insertion loss calculation model construction method and apparatus, device, and storage medium - Google Patents
Insertion loss calculation model construction method and apparatus, device, and storage medium Download PDFInfo
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- WO2024198211A1 WO2024198211A1 PCT/CN2023/114379 CN2023114379W WO2024198211A1 WO 2024198211 A1 WO2024198211 A1 WO 2024198211A1 CN 2023114379 W CN2023114379 W CN 2023114379W WO 2024198211 A1 WO2024198211 A1 WO 2024198211A1
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- Prior art keywords
- insertion loss
- microstrip line
- calculation model
- roughness
- metal foil
- Prior art date
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- 238000003780 insertion Methods 0.000 title claims abstract description 131
- 230000037431 insertion Effects 0.000 title claims abstract description 131
- 238000004364 calculation method Methods 0.000 title claims abstract description 102
- 238000003860 storage Methods 0.000 title claims abstract description 21
- 238000010276 construction Methods 0.000 title claims abstract description 20
- 229910052751 metal Inorganic materials 0.000 claims abstract description 115
- 239000002184 metal Substances 0.000 claims abstract description 115
- 239000011888 foil Substances 0.000 claims abstract description 112
- 239000002313 adhesive film Substances 0.000 claims abstract description 65
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- 238000004519 manufacturing process Methods 0.000 claims abstract description 29
- 230000003746 surface roughness Effects 0.000 claims description 19
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 8
- 239000011889 copper foil Substances 0.000 claims description 8
- 238000004381 surface treatment Methods 0.000 abstract description 29
- 238000010586 diagram Methods 0.000 description 18
- 238000004590 computer program Methods 0.000 description 17
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- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
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- XQUPVDVFXZDTLT-UHFFFAOYSA-N 1-[4-[[4-(2,5-dioxopyrrol-1-yl)phenyl]methyl]phenyl]pyrrole-2,5-dione Chemical compound O=C1C=CC(=O)N1C(C=C1)=CC=C1CC1=CC=C(N2C(C=CC2=O)=O)C=C1 XQUPVDVFXZDTLT-UHFFFAOYSA-N 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0005—Apparatus or processes for manufacturing printed circuits for designing circuits by computer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/20—Design optimisation, verification or simulation
-
- G—PHYSICS
- G16—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR SPECIFIC APPLICATION FIELDS
- G16C—COMPUTATIONAL CHEMISTRY; CHEMOINFORMATICS; COMPUTATIONAL MATERIALS SCIENCE
- G16C60/00—Computational materials science, i.e. ICT specially adapted for investigating the physical or chemical properties of materials or phenomena associated with their design, synthesis, processing, characterisation or utilisation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
- G06F2119/02—Reliability analysis or reliability optimisation; Failure analysis, e.g. worst case scenario performance, failure mode and effects analysis [FMEA]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
- G06F2119/14—Force analysis or force optimisation, e.g. static or dynamic forces
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
Definitions
- the present application relates to the field of communication technology, and for example, to a method, device, equipment and storage medium for constructing an insertion loss calculation model.
- the present application provides a method, device, equipment and storage medium for constructing an insertion loss calculation model, which can accurately describe the insertion loss effect on the surface of a metal foil and improve the accuracy of the insertion loss calculation model.
- the present application provides a method for constructing an insertion loss calculation model, including:
- An insertion loss calculation model is constructed based on the equivalent roughness of the metal foil.
- obtaining the dielectric loss factor of the adhesive film layer includes:
- the insertion loss of the second microstrip line and the surface roughness of the metal foil are substituted into the roughness calculation model to infer the dielectric loss factor of the adhesive film layer.
- the insertion loss calculation model construction method further includes:
- An insertion loss calculation model is constructed based on the dielectric loss factor of the dielectric layer and the equivalent roughness of the metal foil after surface treatment.
- the roughness calculation model is a Hammerstad model, a hemisphere model or a Huray model.
- the metal foil is a copper foil.
- the present application also provides a device for constructing an insertion loss calculation model, comprising:
- a dielectric loss factor acquisition module configured to acquire a dielectric loss factor of the adhesive film layer
- a first manufacturing module is configured to form a surface-treated metal foil on both sides of the adhesive film layer to obtain a first circuit board precursor
- a second manufacturing module is configured to manufacture a first microstrip line using the first circuit board precursor and measure the insertion loss of the first microstrip line;
- An equivalent roughness calculation module is configured to substitute the insertion loss of the first microstrip line and the dielectric loss factor of the adhesive film layer into a roughness calculation model to calculate the equivalent roughness of the metal foil after surface treatment;
- the present application also provides an electronic device, including:
- a memory configured to store one or more programs
- the present application also provides a computer-readable storage medium, in which computer-executable instructions are stored.
- computer-executable instructions are executed by a processor, they are used to implement the insertion loss calculation model construction method provided in the present application.
- FIG1 is a flow chart of a method for constructing an insertion loss calculation model provided in an embodiment of the present application
- FIG2 is a schematic diagram of a structure in which metal foil is formed on both sides of the adhesive film layer
- FIG3 is a schematic diagram of the structure of a microstrip line provided in an embodiment of the present application.
- FIG4 is a schematic diagram of the structure of the metal foil after the surface treatment is formed on both sides of the film layer
- FIG5 is a flow chart of another method for constructing an insertion loss calculation model provided in an embodiment of the present application.
- FIG6 is a schematic diagram of a structure in which a film layer is formed on both sides of a dielectric layer
- FIG7 is a schematic diagram of a structure in which metal foils are respectively formed on the adhesive film layers on both sides of the dielectric layer;
- FIG8 is a schematic diagram of the structure of the metal foil after surface treatment formed on both sides of the dielectric layer
- FIG9 is a schematic diagram of the structure of an insertion loss calculation model building device provided in an embodiment of the present application.
- FIG. 10 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application.
- FIG1 is a flow chart of a method for constructing an insertion loss calculation model provided in an embodiment of the present application.
- This embodiment can be applied to extracting the equivalent roughness of a metal foil after surface treatment and constructing an insertion loss calculation model based on the equivalent roughness.
- the method can be executed by an insertion loss calculation model construction device provided in an embodiment of the present application.
- the device can be implemented by software and/or hardware and is usually configured in an electronic device.
- the insertion loss calculation model construction method includes the following steps.
- the adhesive film layer can be an adhesive film used to attach the metal foil.
- the material of the adhesive film layer can be a thermosetting acrylic adhesive film. During the application process, it is only necessary to tear off the release film on the surface, and then the metal foil can be attached to the adhesive film layer by hot pressing.
- the dielectric loss factor (Df) of the adhesive film layer can be a pre-known parameter, or can be calculated by the following method, which is not limited in the present embodiment.
- the dielectric loss factor is the ratio of the energy lost in the insulating plate in the signal line to the energy still in the line.
- obtaining the dielectric loss factor of the adhesive film layer includes the following sub-steps.
- FIG2 is a schematic diagram of a structure in which metal foil is formed on both sides of the adhesive film layer.
- metal foil 120 is formed on both sides of the adhesive film layer 110 to obtain a second circuit board precursor, wherein the second circuit board precursor is used to prepare a circuit board, for example, a microstrip line is prepared using the second circuit board precursor.
- the surface roughness of the metal foil 120 is known.
- the metal foil 120 may be a pure copper foil.
- the metal foil 120 may be attached to the adhesive film layer 110 by hot pressing.
- the second microstrip line is made by using the second circuit board precursor.
- FIG3 is a schematic diagram of the structure of a microstrip line provided in the embodiment of the present application.
- the microstrip line is a strip conductor (signal line) which is isolated from the ground plane by a dielectric.
- the metal foil 120 on one side of the adhesive film layer 110 is etched to obtain a strip conductor 121, and the metal foil 120 on the other side is used as the ground plane, and the strip conductor 121 is isolated from the ground plane by the adhesive film layer 110.
- Insertion loss is usually defined as the ratio of the power Pl received by the output port to the source power Pi of the input port, and is usually expressed in decibels (Decibel, dB).
- an electrical signal is applied to the second microstrip line, and the ratio of the power of the electrical signal output by the second microstrip line to the power of the electrical signal input to the second microstrip line is calculated as the insertion loss of the second microstrip line.
- the roughness calculation model can be a hammerstad model, a hemisphere model or a Huray model, which is not limited in the embodiments of the present application.
- the hammerstad model has a good simulation of the low roughness model. The model is based on the form of sawtooth and assumes that the signal propagates along the surface. It is not actually sawtoothed when viewed through an optical microscope.
- the signal will not propagate along the sawtooth surface, but propagates along the nearest peak.
- the low roughness model has a good fit, but the fit to the high roughness copper foil is poor.
- the hemisphere model fits better in the high frequency band, but worse in the low frequency.
- the Huray model is more detailed. The model uses small ball stacking to approach the actual situation and fits better.
- FIG4 is a schematic diagram of a structure in which a surface-treated metal foil is formed on both sides of the adhesive film layer.
- the same adhesive film layer 110 as in the above is taken, and then a surface-treated metal foil 130 is formed on both sides of the adhesive film layer 110 to obtain a first circuit board precursor.
- the surface-treated metal foil 130 can be attached to the adhesive film layer 110 by hot pressing.
- the metal foil 130 is a metal foil obtained by surface-treating the metal foil 120, and the surface treatment may include doping, adding some other metals, such as nickel, chromium, etc., to enhance the adhesion between the metal foil and the adhesive film layer.
- S103 Use the first circuit board precursor to make a first microstrip line, and measure the insertion loss of the first microstrip line.
- the first microstrip line is made using the first circuit board precursor, and the insertion loss of the first microstrip line is measured.
- the process of making the first microstrip line is similar to the process of making the second microstrip line, and the embodiment of the present application will not be repeated here.
- the insertion loss of the first microstrip line and the dielectric loss factor of the adhesive film layer are substituted into the roughness calculation model to calculate the equivalent roughness of the metal foil after surface treatment.
- the equivalent roughness is used to characterize the influence of roughness and surface treatment on the insertion loss.
- the roughness calculation model can be a hammerstad model, a hemisphere model or a Huray model, which is not limited in the embodiments of the present application.
- an insertion loss calculation model is constructed based on the equivalent roughness of the second metal foil.
- the equivalent roughness is used to characterize the influence of roughness and surface treatment on insertion loss, so that the insertion loss calculation model constructed based on the equivalent roughness of the metal foil can accurately describe the influence of the metal foil surface on insertion loss, thereby improving the accuracy of the insertion loss calculation model.
- the insertion loss calculation model construction method includes: obtaining the dielectric loss factor of the adhesive film layer, forming a surface-treated metal foil on both sides of the adhesive film layer to obtain a first circuit board precursor, and using A first microstrip line is made using a first circuit board precursor, and the insertion loss of the first microstrip line is measured.
- the insertion loss of the first microstrip line and the dielectric loss factor of the adhesive film layer are substituted into a roughness calculation model to calculate the equivalent roughness of the metal foil after surface treatment.
- An insertion loss calculation model is constructed based on the equivalent roughness of the metal foil.
- FIG5 is a flow chart of another method for constructing an insertion loss calculation model provided in an embodiment of the present application. As shown in FIG5 , the method includes the following steps.
- the dielectric loss factor of the adhesive film layer may be a pre-known parameter, or may be calculated by the method in the aforementioned embodiment, and the embodiment of the present application is not limited thereto.
- FIG6 is a schematic diagram of a structure in which an adhesive film layer is formed on both sides of a dielectric layer.
- an adhesive film layer 110 is formed on both sides of a dielectric layer 140.
- the adhesive film layer 110 can be attached to the dielectric layer 140 by hot pressing.
- the dielectric layer 140 is a substrate of a circuit board, and its material can be a resin, for example, phenolic resin, epoxy resin, polyimide resin, polyester resin, polyphenylene ether resin, cyanate resin, polytetrafluoroethylene resin, and bismaleimide triazine resin, etc., which is not limited in the embodiments of the present application.
- FIG7 is a schematic diagram of a structure in which metal foils are formed on the adhesive film layers on both sides of the dielectric layer. As shown in FIG7 , metal foils 120 are formed on the adhesive film layers 110 on both sides of the dielectric layer 140.
- the metal foils 120 may be pure copper foils with known surface roughness.
- S204 Use the third circuit board precursor to make a third microstrip line, and measure the insertion loss of the third microstrip line.
- a third microstrip line is made using a third circuit board precursor, and the insertion loss of the third microstrip line is measured.
- the process of making the third microstrip line is similar to the process of making the second microstrip line, and the embodiment of the present application will not be repeated here.
- the insertion loss of the third microstrip line, the dielectric loss factor of the film layer and the surface roughness of the metal foil are substituted into the roughness calculation model to infer the dielectric loss factor of the dielectric layer.
- the roughness calculation model is a Hammerstad model, a hemisphere model or a Huray model, which is not limited in the embodiment of the present application.
- FIG8 is a schematic diagram of a structure in which a surface-treated metal foil is formed on both sides of a dielectric layer.
- the same dielectric layer 140 and the surface-treated metal foil 130 as in the previous embodiment are taken, and then the surface-treated metal foil 130 is formed on both sides of the dielectric layer 140 to obtain a fourth circuit board precursor.
- the surface-treated metal foil 130 can be pressed onto the dielectric layer 140 by hot pressing.
- a fourth microstrip line is manufactured using a fourth circuit board precursor, and the insertion loss of the fourth microstrip line is measured.
- the process of manufacturing the fourth microstrip line is similar to the process of manufacturing the second microstrip line, and the embodiment of the present application will not be repeated here.
- the insertion loss of the fourth microstrip line and the dielectric loss factor of the dielectric layer are substituted into the roughness calculation model to calculate the equivalent roughness of the metal foil after surface treatment.
- the equivalent roughness is used to characterize the influence of roughness and surface treatment on insertion loss.
- the roughness calculation model is the Hammerstad model, the hemisphere model or the Huray model, which is not limited in the embodiment of the present application.
- an insertion loss calculation model is constructed based on the dielectric loss factor of the dielectric layer and the equivalent roughness of the metal foil after surface treatment.
- the dielectric loss factor of the dielectric layer is often affected by the uncertainty of the metal foil surface loss factor and cannot be accurately obtained. This is because the total insertion loss is caused by factors such as the resistance of the metal foil (including skin effect), roughness, surface treatment and dielectric loss factor.
- the resistance of the metal foil (including skin effect) is known, and the roughness can be measured, but the other two factors are often uncertain for the circuit board factory (the method of measuring the dielectric loss factor of the dielectric layer often requires the dielectric layer to have a certain thickness and the frequency point is limited).
- the dielectric loss factor of the dielectric layer is inferred based on the dielectric loss factor of the film layer and the surface roughness of the metal foil, and the equivalent roughness of the metal foil after surface treatment is calculated based on the dielectric loss factor of the dielectric layer.
- an insertion loss calculation model is constructed based on the dielectric loss factor of the dielectric layer and the equivalent roughness of the metal foil after surface treatment, thereby improving the accuracy of the insertion loss calculation model.
- FIG. 9 is a diagram of an embodiment of the present application.
- a structural schematic diagram of an insertion loss calculation model construction device is provided, as shown in FIG9 , and the insertion loss calculation model construction device includes the following modules.
- a dielectric loss factor acquisition module 301 configured to acquire a dielectric loss factor of the adhesive film layer
- a first manufacturing module 302 is configured to form a surface-treated metal foil on both sides of the adhesive film layer to obtain a first circuit board precursor;
- a second manufacturing module 303 is configured to manufacture a first microstrip line using the first circuit board precursor and measure the insertion loss of the first microstrip line;
- An equivalent roughness calculation module 304 is configured to substitute the insertion loss of the first microstrip line and the dielectric loss factor of the adhesive film layer into a roughness calculation model to calculate an equivalent roughness of the metal foil after surface treatment;
- the insertion loss calculation model building module 305 is configured to build an insertion loss calculation model based on the equivalent roughness of the metal foil.
- the dielectric loss factor acquisition module 301 includes:
- a first manufacturing unit is configured to form metal foil on both sides of the adhesive film layer to obtain a second circuit board precursor, wherein the surface roughness of the metal foil is known;
- a second manufacturing unit is configured to manufacture a second microstrip line using the second circuit board precursor and measure the insertion loss of the second microstrip line;
- the first loss factor calculation unit is configured to substitute the insertion loss of the second microstrip line and the surface roughness of the metal foil into a roughness calculation model to infer the dielectric loss factor of the adhesive film layer.
- the insertion loss calculation model building device further includes:
- a third manufacturing unit is configured to form a glue film layer on both sides of the dielectric layer
- a fourth manufacturing unit is configured to form metal foils on the adhesive film layers on both sides of the dielectric layer to obtain a third circuit board precursor
- a fifth manufacturing unit configured to manufacture a third microstrip line using the third circuit board precursor, and measure the insertion loss of the third microstrip line
- a second loss factor calculation unit is configured to substitute the insertion loss of the third microstrip line, the dielectric loss factor of the adhesive film layer and the surface roughness of the metal foil into the roughness calculation model to reversely deduce the dielectric loss factor of the dielectric layer;
- a sixth manufacturing unit is configured to form a surface-treated metal foil on both sides of the dielectric layer to obtain a fourth circuit board precursor
- a seventh manufacturing unit configured to manufacture a fourth microstrip line using the fourth circuit board precursor, and measure the insertion loss of the fourth microstrip line
- an equivalent roughness calculation unit configured to substitute the insertion loss of the fourth microstrip line and the dielectric loss factor of the dielectric layer into the roughness calculation model to calculate the equivalent roughness of the metal foil after surface treatment
- the insertion loss calculation model building unit is configured to build an insertion loss calculation model based on the dielectric loss factor of the dielectric layer and the equivalent roughness of the metal foil after surface treatment.
- the roughness calculation model is a Hammerstad model, a hemisphere model or a Huray model.
- the metal foil is copper foil.
- the above-mentioned insertion loss calculation model construction device can execute the insertion loss calculation model construction method provided in any embodiment of the present application, and has the corresponding functional modules and effects for executing the insertion loss calculation model construction method.
- Figure 10 is a schematic diagram of the structure of an electronic device provided by an embodiment of the present application.
- the electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workbenches, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers.
- the electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices.
- the components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present application described and/or required herein.
- the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform a variety of appropriate actions and processes according to the computer program stored in the ROM 12 or the computer program loaded from the storage unit 18 to the RAM 13.
- the RAM 13 a variety of programs and data required for the operation of the electronic device 10 can also be stored.
- the processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14.
- An input/output (I/O) interface 15 is also connected to the bus 14.
- a number of components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc.
- the communication unit 19 allows the electronic device 10 to exchange information/data with other devices through a computer network such as the Internet and/or various telecommunication networks.
- the processor 11 may be a variety of general and/or special processing components with processing and computing capabilities. Some examples of the processor 11 include a central processing unit (CPU), a graphics processing unit (GPU), a variety of special artificial intelligence (AI), and a variety of other processors.
- the processor 11 may include a plurality of processors for running machine learning model algorithms, a plurality of processors for running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc.
- the processor 11 executes the plurality of methods and processes described above, such as the insertion loss calculation model construction method.
- the insertion loss calculation model construction method may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18.
- part or all of the computer program may be loaded and/or installed on the electronic device 10 via the ROM 12 and/or the communication unit 19.
- the processor 11 may be configured to execute the insertion loss calculation model construction method in any other appropriate manner (e.g., by means of firmware).
- Various embodiments of the systems and techniques described above herein may be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard parts (ASSPs), system on chip systems (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof.
- FPGAs field programmable gate arrays
- ASICs application specific integrated circuits
- ASSPs application specific standard parts
- SOCs system on chip systems
- CPLDs complex programmable logic devices
- These various embodiments may include: being implemented in one or more computer programs that are executable and/or interpreted on a programmable system including at least one programmable processor that may be a special purpose or general purpose programmable processor that may receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
- a programmable processor that may be a special purpose or general purpose programmable processor that may receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
- Computer programs for implementing the methods of the present application may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions/operations specified in the flow chart and/or block diagram are implemented.
- the computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.
- a computer readable storage medium may be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device.
- a computer readable storage medium may include an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing.
- a computer readable storage medium may be a machine readable signal medium.
- a machine readable storage medium includes an electrical connection based on one or more wires, a portable computer disk, a hard disk, a RAM, a ROM, Erasable Programmable Read-Only Memory (EPROM), flash memory), optical fiber, compact disc read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination of the above.
- the storage medium can be a non-transitory storage medium.
- the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a cathode ray tube (CRT) or a liquid crystal display (LCD) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device.
- a display device e.g., a cathode ray tube (CRT) or a liquid crystal display (LCD) monitor
- a keyboard and pointing device e.g., a mouse or trackball
- Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).
- the systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components.
- the components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: Local Area Network (LAN), Wide Area Network (WAN), blockchain network, and the Internet.
- a computing system may include a client and a server.
- the client and the server are generally remote from each other and usually interact through a communication network.
- the client and server relationship is generated by computer programs running on the respective computers and having a client-server relationship with each other.
- the server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and virtual private servers (VPS) services.
- VPN virtual private servers
- An embodiment of the present application further provides a computer program product, including a computer program, which, when executed by a processor, implements the insertion loss calculation model construction method provided in any embodiment of the present application.
- the computer program code for performing the operation of the present application can be written in one or more programming languages or a combination thereof, including object-oriented programming languages such as Java, Smalltalk, C++, and conventional procedural programming languages such as "C" language or similar programming languages.
- the program code can be completely executed on the user's computer.
- the program may be executed partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server.
- the remote computer may be connected to the user's computer through any type of network, including a LAN or WAN, or may be connected to an external computer (e.g., through the Internet using an Internet service provider).
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Abstract
Description
本申请要求在2023年03月31日提交中国专利局、申请号为202310341613.0的中国专利申请的优先权,该申请的全部内容通过引用结合在本申请中。This application claims the priority of the Chinese patent application filed with the China Patent Office on March 31, 2023, with application number 202310341613.0, the entire contents of which are incorporated by reference into this application.
本申请涉及通信技术领域,例如涉及一种插损计算模型构建方法、装置、设备及存储介质。The present application relates to the field of communication technology, and for example, to a method, device, equipment and storage medium for constructing an insertion loss calculation model.
电路板设计过程中金属箔(例如铜箔)的表面粗糙度对传输线的插损在高频场合有很大的影响。如何提取并仿真计算粗糙度对插损的影响成为业界热点。During the design of circuit boards, the surface roughness of metal foil (such as copper foil) has a great impact on the insertion loss of transmission lines in high-frequency applications. How to extract and simulate the impact of roughness on insertion loss has become a hot topic in the industry.
相关技术大多基于纯金属箔的表面粗糙度的分析计算,但是实际的高频材料中由于介质层的介质损耗因子较低,导致分子极性弱,因而造成金属箔与介质的附着力变差,因此,部分铜箔生产厂家要在金属箔表面做表面处理,加入一些其他金属,比如镍以及铬等来增强金属箔与介质的附着力。而这些加入的金属可能会增加插损,这使得插损计算模型无法对金属箔表面的插损影响进行精确描述,计算结果偏差较大。Most of the related technologies are based on the analysis and calculation of the surface roughness of pure metal foils. However, in actual high-frequency materials, the dielectric loss factor of the dielectric layer is low, resulting in weak molecular polarity, which causes the adhesion between the metal foil and the dielectric to deteriorate. Therefore, some copper foil manufacturers need to perform surface treatment on the surface of the metal foil and add some other metals, such as nickel and chromium, to enhance the adhesion between the metal foil and the dielectric. These added metals may increase the insertion loss, which makes it impossible for the insertion loss calculation model to accurately describe the insertion loss effect of the metal foil surface, and the calculation results have large deviations.
发明内容Summary of the invention
本申请提供一种插损计算模型构建方法、装置、设备及存储介质,能够对金属箔表面的插损影响进行精确描述,提高插损计算模型的准确度。The present application provides a method, device, equipment and storage medium for constructing an insertion loss calculation model, which can accurately describe the insertion loss effect on the surface of a metal foil and improve the accuracy of the insertion loss calculation model.
本申请提供了一种插损计算模型构建方法,包括:The present application provides a method for constructing an insertion loss calculation model, including:
获取胶膜层的介质损耗因子;Obtaining the dielectric loss factor of the film layer;
在所述胶膜层的两侧形成表面处理后的金属箔,得到第一电路板前体;Forming surface-treated metal foil on both sides of the adhesive film layer to obtain a first circuit board precursor;
利用所述第一电路板前体制作第一微带线,并测量所述第一微带线的插损;Using the first circuit board precursor to manufacture a first microstrip line, and measuring the insertion loss of the first microstrip line;
将所述第一微带线的插损和所述胶膜层的介质损耗因子代入粗糙度计算模型中计算表面处理后的金属箔的等效粗糙度;Substituting the insertion loss of the first microstrip line and the dielectric loss factor of the adhesive film layer into the roughness calculation model to calculate the equivalent roughness of the metal foil after surface treatment;
基于所述金属箔的等效粗糙度构建插损计算模型。An insertion loss calculation model is constructed based on the equivalent roughness of the metal foil.
在一个或多个实施例中,获取胶膜层的介质损耗因子,包括:In one or more embodiments, obtaining the dielectric loss factor of the adhesive film layer includes:
在胶膜层的两侧形成金属箔,得到第二电路板前体,其中,所述金属箔的表面粗糙度为已知的; Forming metal foil on both sides of the adhesive film layer to obtain a second circuit board precursor, wherein the surface roughness of the metal foil is known;
利用所述第二电路板前体制作第二微带线,并测量所述第二微带线的插损;Using the second circuit board precursor to manufacture a second microstrip line, and measuring the insertion loss of the second microstrip line;
将所述第二微带线的插损和金属箔的表面粗糙度代入粗糙度计算模型中,反推出所述胶膜层的介质损耗因子。The insertion loss of the second microstrip line and the surface roughness of the metal foil are substituted into the roughness calculation model to infer the dielectric loss factor of the adhesive film layer.
在一个或多个实施例中,插损计算模型构建方法还包括:In one or more embodiments, the insertion loss calculation model construction method further includes:
在介质层的两侧形成胶膜层;forming a film layer on both sides of the dielectric layer;
在所述介质层的两侧的胶膜层上分别形成金属箔,得到第三电路板前体;Forming metal foils on the adhesive film layers on both sides of the dielectric layer respectively to obtain a third circuit board precursor;
利用所述第三电路板前体制作第三微带线,并测量所述第三微带线的插损;Making a third microstrip line using the third circuit board precursor, and measuring the insertion loss of the third microstrip line;
将所述第三微带线的插损、所述胶膜层的介质损耗因子和所述金属箔的表面粗糙度代入所述粗糙度计算模型中,反推所述介质层的介质损耗因子;Substituting the insertion loss of the third microstrip line, the dielectric loss factor of the adhesive film layer and the surface roughness of the metal foil into the roughness calculation model, and inversely calculating the dielectric loss factor of the dielectric layer;
在所述介质层的两侧形成表面处理后的金属箔,得到第四电路板前体;forming surface-treated metal foils on both sides of the dielectric layer to obtain a fourth circuit board precursor;
利用所述第四电路板前体制作第四微带线,并测量所述第四微带线的插损;Using the fourth circuit board precursor to manufacture a fourth microstrip line, and measuring the insertion loss of the fourth microstrip line;
将所述第四微带线的插损和所述介质层的介质损耗因子代入所述粗糙度计算模型中计算表面处理后的金属箔的等效粗糙度;Substituting the insertion loss of the fourth microstrip line and the dielectric loss factor of the dielectric layer into the roughness calculation model to calculate the equivalent roughness of the metal foil after surface treatment;
基于所述介质层的介质损耗因子和表面处理后的金属箔的等效粗糙度构建插损计算模型。An insertion loss calculation model is constructed based on the dielectric loss factor of the dielectric layer and the equivalent roughness of the metal foil after surface treatment.
在一个或多个实施例中,所述粗糙度计算模型为hammerstad模型、hemisphere模型或huray模型。In one or more embodiments, the roughness calculation model is a Hammerstad model, a hemisphere model or a Huray model.
在一个或多个实施例中,所述金属箔为铜箔。In one or more embodiments, the metal foil is a copper foil.
本申请还提供了一种插损计算模型构建装置,包括:The present application also provides a device for constructing an insertion loss calculation model, comprising:
介质损耗因子获取模块,设置为获取胶膜层的介质损耗因子;A dielectric loss factor acquisition module, configured to acquire a dielectric loss factor of the adhesive film layer;
第一制作模块,设置为在所述胶膜层的两侧形成表面处理后的金属箔,得到第一电路板前体;A first manufacturing module is configured to form a surface-treated metal foil on both sides of the adhesive film layer to obtain a first circuit board precursor;
第二制作模块,设置为利用所述第一电路板前体制作第一微带线,并测量所述第一微带线的插损;A second manufacturing module is configured to manufacture a first microstrip line using the first circuit board precursor and measure the insertion loss of the first microstrip line;
等效粗糙度计算模块,设置为将所述第一微带线的插损和所述胶膜层的介质损耗因子代入粗糙度计算模型中计算表面处理后的金属箔的等效粗糙度;An equivalent roughness calculation module is configured to substitute the insertion loss of the first microstrip line and the dielectric loss factor of the adhesive film layer into a roughness calculation model to calculate the equivalent roughness of the metal foil after surface treatment;
插损计算模型构建模块,设置为基于所述金属箔的等效粗糙度构建插损计算模型。The insertion loss calculation model building module is configured to build an insertion loss calculation model based on the equivalent roughness of the metal foil.
本申请还提供了一种电子设备,包括:The present application also provides an electronic device, including:
一个或多个处理器; one or more processors;
存储器,设置为存储一个或多个程序;a memory configured to store one or more programs;
当所述一个或多个程序被所述一个或多个处理器执行,使得所述一个或多个处理器实现如本申请提供的插损计算模型构建方法。When the one or more programs are executed by the one or more processors, the one or more processors implement the insertion loss calculation model construction method provided in the present application.
本申请还提供了一种计算机可读存储介质,所述计算机可读存储介质中存储有计算机执行指令,所述计算机执行指令被处理器执行时用于实现如本申请提供的插损计算模型构建方法。The present application also provides a computer-readable storage medium, in which computer-executable instructions are stored. When the computer-executable instructions are executed by a processor, they are used to implement the insertion loss calculation model construction method provided in the present application.
图1为本申请实施例提供的插损计算模型构建方法的流程图;FIG1 is a flow chart of a method for constructing an insertion loss calculation model provided in an embodiment of the present application;
图2为在胶膜层两侧形成金属箔的结构示意图;FIG2 is a schematic diagram of a structure in which metal foil is formed on both sides of the adhesive film layer;
图3为本申请实施例提供的一种微带线的结构示意图;FIG3 is a schematic diagram of the structure of a microstrip line provided in an embodiment of the present application;
图4为在胶膜层两侧形成表面处理后的金属箔的结构示意图;FIG4 is a schematic diagram of the structure of the metal foil after the surface treatment is formed on both sides of the film layer;
图5为本申请实施例提供的另一种插损计算模型构建方法的流程图;FIG5 is a flow chart of another method for constructing an insertion loss calculation model provided in an embodiment of the present application;
图6为在介质层两侧形成胶膜层的结构示意图;FIG6 is a schematic diagram of a structure in which a film layer is formed on both sides of a dielectric layer;
图7为在介质层的两侧的胶膜层上分别形成金属箔的结构示意图;FIG7 is a schematic diagram of a structure in which metal foils are respectively formed on the adhesive film layers on both sides of the dielectric layer;
图8为在介质层两侧形成表面处理后的金属箔的结构示意图;FIG8 is a schematic diagram of the structure of the metal foil after surface treatment formed on both sides of the dielectric layer;
图9为本申请实施例提供的一种插损计算模型构建装置的结构示意图;FIG9 is a schematic diagram of the structure of an insertion loss calculation model building device provided in an embodiment of the present application;
图10为本申请的实施例提供的一种电子设备的结构示意图。FIG. 10 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application.
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行描述,所描述的实施例仅仅是本申请一部分的实施例,而不是全部的实施例。。The following will describe the technical solutions in the embodiments of the present application in conjunction with the drawings in the embodiments of the present application. The described embodiments are only part of the embodiments of the present application, not all of the embodiments.
本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象,而不必用于描述特定的顺序或先后次序。这样使用的数据在适当情况下可以互换,以便这里描述的本申请的实施例能够以除了在这里图示或描述的那些以外的顺序实施。此外,术语“包括”和“具有”以及他们的任何变形,意图在于覆盖不排他的包含,例如,包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元,而是可包括没有列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。The terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. The data used in this way can be interchanged where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not listed or inherent to these processes, methods, products or devices.
图1为本申请实施例提供的插损计算模型构建方法的流程图,本实施例可适用于提取表面处理后的金属箔的等效粗糙度,并基于等效粗糙度构建插损计 算模型的情况,该方法可以由本申请实施例提供的插损计算模型构建装置来执行,该装置可以由软件和/或硬件的方式实现,通常配置于电子设备中,如图1所示,插损计算模型构建方法包括如下步骤。FIG1 is a flow chart of a method for constructing an insertion loss calculation model provided in an embodiment of the present application. This embodiment can be applied to extracting the equivalent roughness of a metal foil after surface treatment and constructing an insertion loss calculation model based on the equivalent roughness. In the case of an insertion loss calculation model, the method can be executed by an insertion loss calculation model construction device provided in an embodiment of the present application. The device can be implemented by software and/or hardware and is usually configured in an electronic device. As shown in FIG1, the insertion loss calculation model construction method includes the following steps.
S101、获取胶膜层的介质损耗因子。S101, obtaining a dielectric loss factor of a film layer.
在本申请实施例,胶膜层可以是用于贴附金属箔的,具有粘附作用的胶膜,示例性的,胶膜层的材质可以是热固化型丙烯酸酯类粘合胶膜,在应用过程中,只需撕掉表面的离型膜,然后金属箔通过热压的方式贴附到胶膜层上即可。In an embodiment of the present application, the adhesive film layer can be an adhesive film used to attach the metal foil. For example, the material of the adhesive film layer can be a thermosetting acrylic adhesive film. During the application process, it is only necessary to tear off the release film on the surface, and then the metal foil can be attached to the adhesive film layer by hot pressing.
示例性的,胶膜层的介质损耗因子(Dissipation factor,Df)可以是预先已知的参数,也可以通过下文的方法计算出来,本申请实施例在此不做限定。其中,介质损耗因子为信号线中已漏失在绝缘板材中的能量,与尚存在线中能量的比值。For example, the dielectric loss factor (Df) of the adhesive film layer can be a pre-known parameter, or can be calculated by the following method, which is not limited in the present embodiment. The dielectric loss factor is the ratio of the energy lost in the insulating plate in the signal line to the energy still in the line.
示例性的,在本申请的一些实施例中,获取胶膜层的介质损耗因子,包括如下子步骤。Illustratively, in some embodiments of the present application, obtaining the dielectric loss factor of the adhesive film layer includes the following sub-steps.
1、在胶膜层的两侧形成金属箔,得到第二电路板前体,其中,金属箔的表面粗糙度为已知的。1. Forming metal foils on both sides of the adhesive film layer to obtain a second circuit board precursor, wherein the surface roughness of the metal foils is known.
图2为在胶膜层两侧形成金属箔的结构示意图,如图2所示,在胶膜层110的两侧形成金属箔120,得到第二电路板前体,其中,第二电路板前体用于制备电路板,例如,利用第二电路板前体制备微带线。金属箔120的表面粗糙度为已知的。示例性的,在本申请实施例中,金属箔120可以是纯铜箔。在本申请实施例中,金属箔120可以通过热压的方式贴附到胶膜层110上。FIG2 is a schematic diagram of a structure in which metal foil is formed on both sides of the adhesive film layer. As shown in FIG2 , metal foil 120 is formed on both sides of the adhesive film layer 110 to obtain a second circuit board precursor, wherein the second circuit board precursor is used to prepare a circuit board, for example, a microstrip line is prepared using the second circuit board precursor. The surface roughness of the metal foil 120 is known. Exemplarily, in the embodiment of the present application, the metal foil 120 may be a pure copper foil. In the embodiment of the present application, the metal foil 120 may be attached to the adhesive film layer 110 by hot pressing.
2、利用第二电路板前体制作第二微带线,并测量第二微带线的插损。2. Use the second circuit board precursor to make a second microstrip line, and measure the insertion loss of the second microstrip line.
在本申请实施例中,利用第二电路板前体制作第二微带线。图3为本申请实施例提供的一种微带线的结构示意图,如图3所示,微带线是一根带状导线(信号线),与地平面之间用一种电介质隔离开。在本申请实施例中,对胶膜层110的其中一侧的金属箔120进行蚀刻,得到带状导线121,另一侧的金属箔120作为地平面,带状导线121与地平面之间用胶膜层110隔离开。In the embodiment of the present application, the second microstrip line is made by using the second circuit board precursor. FIG3 is a schematic diagram of the structure of a microstrip line provided in the embodiment of the present application. As shown in FIG3, the microstrip line is a strip conductor (signal line) which is isolated from the ground plane by a dielectric. In the embodiment of the present application, the metal foil 120 on one side of the adhesive film layer 110 is etched to obtain a strip conductor 121, and the metal foil 120 on the other side is used as the ground plane, and the strip conductor 121 is isolated from the ground plane by the adhesive film layer 110.
在得到第二微带线之后,测量第二微带线的插损(插入损耗)。插损通常定义为输出端口所接收到的功率Pl与输入端口的源功率Pi之比,常用分贝(Decibel,dB)表示。在本申请实施例中,对第二微带线施加电信号,计算第二微带线输出的电信号的功率与第二微带线输入的电信号的功率的比值作为第二微带线的插损。After obtaining the second microstrip line, the insertion loss (insertion loss) of the second microstrip line is measured. Insertion loss is usually defined as the ratio of the power Pl received by the output port to the source power Pi of the input port, and is usually expressed in decibels (Decibel, dB). In the embodiment of the present application, an electrical signal is applied to the second microstrip line, and the ratio of the power of the electrical signal output by the second microstrip line to the power of the electrical signal input to the second microstrip line is calculated as the insertion loss of the second microstrip line.
3、将第二微带线的插损和金属箔的表面粗糙度代入粗糙度计算模型中,反推出胶膜层的介质损耗因子。 3. Substitute the insertion loss of the second microstrip line and the surface roughness of the metal foil into the roughness calculation model to infer the dielectric loss factor of the film layer.
在测量第二微带线的插损之后,将第二微带线的插损和金属箔的表面粗糙度代入粗糙度计算模型中,反推出胶膜层的介质损耗因子。其中,粗糙度计算模型可以是hammerstad模型、hemisphere模型或huray模型,本申请实施例在此不做限定。其中,harmmerstad模型对低粗糙度模型有较好的模拟,该模型是基于锯齿的形式,同时假设信号沿着表面传播,经过光显微镜看到,实际并不是锯齿状,同时信号也不会沿着锯齿表面传播,而是就近尖峰传播,虽然前提假设有错误,但是低粗糙度模型的拟合度较好,但是对高粗糙度铜箔拟合较差。hemisphere模型在高频段拟合较好,但是在低频则较差。而huray模型则更为细致,模型使用小球堆叠接近实际情况,拟合的较好。After measuring the insertion loss of the second microstrip line, the insertion loss of the second microstrip line and the surface roughness of the metal foil are substituted into the roughness calculation model to infer the dielectric loss factor of the film layer. Among them, the roughness calculation model can be a hammerstad model, a hemisphere model or a Huray model, which is not limited in the embodiments of the present application. Among them, the hammerstad model has a good simulation of the low roughness model. The model is based on the form of sawtooth and assumes that the signal propagates along the surface. It is not actually sawtoothed when viewed through an optical microscope. At the same time, the signal will not propagate along the sawtooth surface, but propagates along the nearest peak. Although the premise assumption is wrong, the low roughness model has a good fit, but the fit to the high roughness copper foil is poor. The hemisphere model fits better in the high frequency band, but worse in the low frequency. The Huray model is more detailed. The model uses small ball stacking to approach the actual situation and fits better.
S102、在胶膜层的两侧形成表面处理后的金属箔,得到第一电路板前体。S102, forming a surface-treated metal foil on both sides of the adhesive film layer to obtain a first circuit board precursor.
图4为在胶膜层两侧形成表面处理后的金属箔的结构示意图,如图4所示,在本申请实施例中,取前文中相同的胶膜层110,然后在胶膜层110的两侧形成表面处理后的金属箔130,得到第一电路板前体。示例性的,表面处理后的金属箔130可以通过热压的方式贴附到胶膜层110上。示例性的,金属箔130为金属箔120经表面处理后得到的金属箔,表面处理可以包括掺杂,加入一些其他金属,例如,镍、铬等来增强金属箔与胶膜层的附着力。FIG4 is a schematic diagram of a structure in which a surface-treated metal foil is formed on both sides of the adhesive film layer. As shown in FIG4 , in the embodiment of the present application, the same adhesive film layer 110 as in the above is taken, and then a surface-treated metal foil 130 is formed on both sides of the adhesive film layer 110 to obtain a first circuit board precursor. Exemplarily, the surface-treated metal foil 130 can be attached to the adhesive film layer 110 by hot pressing. Exemplarily, the metal foil 130 is a metal foil obtained by surface-treating the metal foil 120, and the surface treatment may include doping, adding some other metals, such as nickel, chromium, etc., to enhance the adhesion between the metal foil and the adhesive film layer.
S103、利用第一电路板前体制作第一微带线,并测量第一微带线的插损。S103: Use the first circuit board precursor to make a first microstrip line, and measure the insertion loss of the first microstrip line.
在本申请实施例中,利用第一电路板前体制作第一微带线,并测量第一微带线的插损。制作第一微带线的过程与制作第二微带线的过程类似,本申请实施例在此不再赘述。In the embodiment of the present application, the first microstrip line is made using the first circuit board precursor, and the insertion loss of the first microstrip line is measured. The process of making the first microstrip line is similar to the process of making the second microstrip line, and the embodiment of the present application will not be repeated here.
S104、将第一微带线的插损和胶膜层的介质损耗因子代入粗糙度计算模型中计算表面处理后的金属箔的等效粗糙度。S104, substituting the insertion loss of the first microstrip line and the dielectric loss factor of the adhesive film layer into a roughness calculation model to calculate the equivalent roughness of the metal foil after the surface treatment.
在得到第一微带线的插损之后,将第一微带线的插损和胶膜层的介质损耗因子代入粗糙度计算模型中计算表面处理后的金属箔的等效粗糙度。其中,等效粗糙度用于表征粗糙度和表面处理对插损的影响。粗糙度计算模型可为hammerstad模型、hemisphere模型或huray模型,本申请实施例在此不做限定。After obtaining the insertion loss of the first microstrip line, the insertion loss of the first microstrip line and the dielectric loss factor of the adhesive film layer are substituted into the roughness calculation model to calculate the equivalent roughness of the metal foil after surface treatment. The equivalent roughness is used to characterize the influence of roughness and surface treatment on the insertion loss. The roughness calculation model can be a hammerstad model, a hemisphere model or a Huray model, which is not limited in the embodiments of the present application.
S105、基于金属箔的等效粗糙度构建插损计算模型。S105. Construct an insertion loss calculation model based on the equivalent roughness of the metal foil.
在本申请实施例中,基于第二金属箔的等效粗糙度构建插损计算模型。等效粗糙度用于表征粗糙度和表面处理对插损的影响,从而基于金属箔的等效粗糙度构建插损计算模型能够对金属箔表面的插损影响进行精确描述,提高插损计算模型的准确度。In the embodiment of the present application, an insertion loss calculation model is constructed based on the equivalent roughness of the second metal foil. The equivalent roughness is used to characterize the influence of roughness and surface treatment on insertion loss, so that the insertion loss calculation model constructed based on the equivalent roughness of the metal foil can accurately describe the influence of the metal foil surface on insertion loss, thereby improving the accuracy of the insertion loss calculation model.
本申请实施例提供的插损计算模型构建方法,包括:获取胶膜层的介质损耗因子,在胶膜层的两侧形成表面处理后的金属箔,得到第一电路板前体,利 用第一电路板前体制作第一微带线,并测量第一微带线的插损,将第一微带线的插损和胶膜层的介质损耗因子代入粗糙度计算模型中计算表面处理后的金属箔的等效粗糙度,基于金属箔的等效粗糙度构建插损计算模型,由于等效粗糙度用于表征粗糙度和表面处理对插损的影响,从而基于金属箔的等效粗糙度构建插损计算模型能够对金属箔表面的插损影响进行精确描述,提高插损计算模型的准确度。The insertion loss calculation model construction method provided in the embodiment of the present application includes: obtaining the dielectric loss factor of the adhesive film layer, forming a surface-treated metal foil on both sides of the adhesive film layer to obtain a first circuit board precursor, and using A first microstrip line is made using a first circuit board precursor, and the insertion loss of the first microstrip line is measured. The insertion loss of the first microstrip line and the dielectric loss factor of the adhesive film layer are substituted into a roughness calculation model to calculate the equivalent roughness of the metal foil after surface treatment. An insertion loss calculation model is constructed based on the equivalent roughness of the metal foil. Since the equivalent roughness is used to characterize the influence of roughness and surface treatment on the insertion loss, constructing an insertion loss calculation model based on the equivalent roughness of the metal foil can accurately describe the influence of the metal foil surface on the insertion loss, thereby improving the accuracy of the insertion loss calculation model.
图5为本申请实施例提供的另一种插损计算模型构建方法的流程图,如图5所示,该方法包括以下步骤。FIG5 is a flow chart of another method for constructing an insertion loss calculation model provided in an embodiment of the present application. As shown in FIG5 , the method includes the following steps.
S201、获取胶膜层的介质损耗因子。S201, obtaining a dielectric loss factor of the film layer.
在本申请实施例中,胶膜层的介质损耗因子可以是预先已知的参数,也可以通过前述实施例中的方法计算得到,本申请实施例在此不做限定。In the embodiment of the present application, the dielectric loss factor of the adhesive film layer may be a pre-known parameter, or may be calculated by the method in the aforementioned embodiment, and the embodiment of the present application is not limited thereto.
S202、在介质层的两侧形成胶膜层。S202, forming an adhesive film layer on both sides of the dielectric layer.
图6为在介质层两侧形成胶膜层的结构示意图,如图6所示,在介质层140的两侧形成胶膜层110。示例性的,胶膜层110可以通过热压的方式贴附到介质层140上。介质层140为线路板的基板,其材料可以是树脂,例如,酚醛树脂、环氧树脂、聚酰亚胺树脂、聚酯树脂、聚苯醚树脂、氰酸酯树脂、聚四氟乙烯树脂、以及双马来酰亚胺三嗪树脂等,本申请实施例在此不做限定。FIG6 is a schematic diagram of a structure in which an adhesive film layer is formed on both sides of a dielectric layer. As shown in FIG6 , an adhesive film layer 110 is formed on both sides of a dielectric layer 140. Exemplarily, the adhesive film layer 110 can be attached to the dielectric layer 140 by hot pressing. The dielectric layer 140 is a substrate of a circuit board, and its material can be a resin, for example, phenolic resin, epoxy resin, polyimide resin, polyester resin, polyphenylene ether resin, cyanate resin, polytetrafluoroethylene resin, and bismaleimide triazine resin, etc., which is not limited in the embodiments of the present application.
S203、在介质层的两侧的胶膜层上分别形成金属箔,得到第三电路板前体。S203, forming metal foils on the adhesive film layers on both sides of the dielectric layer respectively to obtain a third circuit board precursor.
图7为在介质层的两侧的胶膜层上分别形成金属箔的结构示意图,如图7所示,在介质层140的两侧的胶膜层110上分别形成金属箔120,金属箔120可以是纯铜箔,且表面粗糙度为已知的。FIG7 is a schematic diagram of a structure in which metal foils are formed on the adhesive film layers on both sides of the dielectric layer. As shown in FIG7 , metal foils 120 are formed on the adhesive film layers 110 on both sides of the dielectric layer 140. The metal foils 120 may be pure copper foils with known surface roughness.
S204、利用第三电路板前体制作第三微带线,并测量第三微带线的插损。S204: Use the third circuit board precursor to make a third microstrip line, and measure the insertion loss of the third microstrip line.
在本申请实施例中,利用第三电路板前体制作第三微带线,并测量第三微带线的插损。制作第三微带线的过程与制作第二微带线的过程类似,本申请实施例在此不再赘述。In the embodiment of the present application, a third microstrip line is made using a third circuit board precursor, and the insertion loss of the third microstrip line is measured. The process of making the third microstrip line is similar to the process of making the second microstrip line, and the embodiment of the present application will not be repeated here.
S205、将第三微带线的插损、胶膜层的介质损耗因子和金属箔的表面粗糙度代入粗糙度计算模型中,反推介质层的介质损耗因子。S205 , substituting the insertion loss of the third microstrip line, the dielectric loss factor of the adhesive film layer, and the surface roughness of the metal foil into a roughness calculation model to reversely infer the dielectric loss factor of the dielectric layer.
在本申请实施例中,将第三微带线的插损、胶膜层的介质损耗因子和金属箔的表面粗糙度代入粗糙度计算模型中,反推介质层的介质损耗因子。粗糙度计算模型为hammerstad模型、hemisphere模型或huray模型,本申请实施例在此不做限定。In the embodiment of the present application, the insertion loss of the third microstrip line, the dielectric loss factor of the film layer and the surface roughness of the metal foil are substituted into the roughness calculation model to infer the dielectric loss factor of the dielectric layer. The roughness calculation model is a Hammerstad model, a hemisphere model or a Huray model, which is not limited in the embodiment of the present application.
S206、在介质层的两侧形成表面处理后的金属箔,得到第四电路板前体。 S206, forming surface-treated metal foils on both sides of the dielectric layer to obtain a fourth circuit board precursor.
图8为在介质层两侧形成表面处理后的金属箔的结构示意图,如图8所示,在本申请实施例中,取前述实施例中相同的介质层140和表面处理后的金属箔130,然后在介质层140的两侧形成表面处理后的金属箔130,得到第四电路板前体。表面处理后的金属箔130可以通过热压的方式压合到介质层140上。FIG8 is a schematic diagram of a structure in which a surface-treated metal foil is formed on both sides of a dielectric layer. As shown in FIG8 , in the embodiment of the present application, the same dielectric layer 140 and the surface-treated metal foil 130 as in the previous embodiment are taken, and then the surface-treated metal foil 130 is formed on both sides of the dielectric layer 140 to obtain a fourth circuit board precursor. The surface-treated metal foil 130 can be pressed onto the dielectric layer 140 by hot pressing.
S207、利用第四电路板前体制作第四微带线,并测量第四微带线的插损。S207 , using the fourth circuit board precursor to manufacture a fourth microstrip line, and measuring the insertion loss of the fourth microstrip line.
在本申请实施例中,利用第四电路板前体制作第四微带线,并测量第四微带线的插损。制作第四微带线的过程与制作第二微带线的过程类似,本申请实施例在此不再赘述。In the embodiment of the present application, a fourth microstrip line is manufactured using a fourth circuit board precursor, and the insertion loss of the fourth microstrip line is measured. The process of manufacturing the fourth microstrip line is similar to the process of manufacturing the second microstrip line, and the embodiment of the present application will not be repeated here.
S208、将第四微带线的插损和介质层的介质损耗因子代入粗糙度计算模型中计算表面处理后的金属箔的等效粗糙度。S208 , substituting the insertion loss of the fourth microstrip line and the dielectric loss factor of the dielectric layer into the roughness calculation model to calculate the equivalent roughness of the metal foil after the surface treatment.
在本申请实施例中,在得到第四微带线的插损之后,将第四微带线的插损和介质层的介质损耗因子代入粗糙度计算模型中计算表面处理后的金属箔的等效粗糙度。其中,等效粗糙度用于表征粗糙度和表面处理对插损的影响。粗糙度计算模型为hammerstad模型、hemisphere模型或huray模型,本申请实施例在此不做限定。In the embodiment of the present application, after the insertion loss of the fourth microstrip line is obtained, the insertion loss of the fourth microstrip line and the dielectric loss factor of the dielectric layer are substituted into the roughness calculation model to calculate the equivalent roughness of the metal foil after surface treatment. Among them, the equivalent roughness is used to characterize the influence of roughness and surface treatment on insertion loss. The roughness calculation model is the Hammerstad model, the hemisphere model or the Huray model, which is not limited in the embodiment of the present application.
S209、基于介质层的介质损耗因子和表面处理后的金属箔的等效粗糙度构建插损计算模型。S209, constructing an insertion loss calculation model based on the dielectric loss factor of the dielectric layer and the equivalent roughness of the metal foil after surface treatment.
在本申请实施例中,基于介质层的介质损耗因子和表面处理后的金属箔的等效粗糙度构建插损计算模型。In the embodiment of the present application, an insertion loss calculation model is constructed based on the dielectric loss factor of the dielectric layer and the equivalent roughness of the metal foil after surface treatment.
在相关技术中的插损计算模型中,在计算介质层的介质损耗因子时,不会考虑金属箔表面损耗的影响。然而,介质层的介质损耗因子往往会受到金属箔表面损耗因素不确定的影响而无法准确获取,这是因为总插损是由金属箔的电阻(包括趋肤效应)、粗糙度、表面处理以及介质损耗因子等因素共同造成的,金属箔的电阻(包括趋肤效应)是已知的,粗糙度是可以测量得到的,但是另外两个因素对于电路板工厂往往是不确定的(测量介质层的介质损耗因子的办法往往需要介质层要有一定的厚度,且频点受限),这样就会无法准确提取金属箔表面处理和介质层的介质损耗因子对插损的影响,造成插损计算模型偏差较大。本申请实施例中,根据胶膜层的介质损耗因子和金属箔的表面粗糙度反推介质层的介质损耗因子,基于介质层的介质损耗因子计算表面处理后的金属箔的等效粗糙度,在得到精确的介质层的介质损耗因子和表征粗糙度与表面处理对插损的影响的等效粗糙度之后,基于介质层的介质损耗因子和表面处理后的金属箔的等效粗糙度构建插损计算模型,提高了插损计算模型的准确度。In the insertion loss calculation model in the related art, when calculating the dielectric loss factor of the dielectric layer, the influence of the surface loss of the metal foil is not considered. However, the dielectric loss factor of the dielectric layer is often affected by the uncertainty of the metal foil surface loss factor and cannot be accurately obtained. This is because the total insertion loss is caused by factors such as the resistance of the metal foil (including skin effect), roughness, surface treatment and dielectric loss factor. The resistance of the metal foil (including skin effect) is known, and the roughness can be measured, but the other two factors are often uncertain for the circuit board factory (the method of measuring the dielectric loss factor of the dielectric layer often requires the dielectric layer to have a certain thickness and the frequency point is limited). In this way, it is impossible to accurately extract the influence of the metal foil surface treatment and the dielectric loss factor of the dielectric layer on the insertion loss, resulting in a large deviation in the insertion loss calculation model. In the embodiment of the present application, the dielectric loss factor of the dielectric layer is inferred based on the dielectric loss factor of the film layer and the surface roughness of the metal foil, and the equivalent roughness of the metal foil after surface treatment is calculated based on the dielectric loss factor of the dielectric layer. After obtaining the accurate dielectric loss factor of the dielectric layer and the equivalent roughness that characterizes the influence of roughness and surface treatment on insertion loss, an insertion loss calculation model is constructed based on the dielectric loss factor of the dielectric layer and the equivalent roughness of the metal foil after surface treatment, thereby improving the accuracy of the insertion loss calculation model.
本申请实施例还提供了一种插损计算模型构建装置,图9为本申请实施例 提供的一种插损计算模型构建装置的结构示意图,如图9所示,插损计算模型构建装置包括以下模块。The present application also provides a device for constructing an insertion loss calculation model. FIG. 9 is a diagram of an embodiment of the present application. A structural schematic diagram of an insertion loss calculation model construction device is provided, as shown in FIG9 , and the insertion loss calculation model construction device includes the following modules.
介质损耗因子获取模块301,设置为获取胶膜层的介质损耗因子;A dielectric loss factor acquisition module 301, configured to acquire a dielectric loss factor of the adhesive film layer;
第一制作模块302,设置为在所述胶膜层的两侧形成表面处理后的金属箔,得到第一电路板前体;A first manufacturing module 302 is configured to form a surface-treated metal foil on both sides of the adhesive film layer to obtain a first circuit board precursor;
第二制作模块303,设置为利用所述第一电路板前体制作第一微带线,并测量所述第一微带线的插损;A second manufacturing module 303 is configured to manufacture a first microstrip line using the first circuit board precursor and measure the insertion loss of the first microstrip line;
等效粗糙度计算模块304,设置为将所述第一微带线的插损和所述胶膜层的介质损耗因子代入粗糙度计算模型中计算表面处理后的金属箔的等效粗糙度;An equivalent roughness calculation module 304 is configured to substitute the insertion loss of the first microstrip line and the dielectric loss factor of the adhesive film layer into a roughness calculation model to calculate an equivalent roughness of the metal foil after surface treatment;
插损计算模型构建模块305,设置为基于所述金属箔的等效粗糙度构建插损计算模型。The insertion loss calculation model building module 305 is configured to build an insertion loss calculation model based on the equivalent roughness of the metal foil.
在本申请的一些实施例中,介质损耗因子获取模块301包括:In some embodiments of the present application, the dielectric loss factor acquisition module 301 includes:
第一制作单元,设置为在胶膜层的两侧形成金属箔,得到第二电路板前体,其中,所述金属箔的表面粗糙度为已知的;A first manufacturing unit is configured to form metal foil on both sides of the adhesive film layer to obtain a second circuit board precursor, wherein the surface roughness of the metal foil is known;
第二制作单元,设置为利用所述第二电路板前体制作第二微带线,并测量所述第二微带线的插损;A second manufacturing unit is configured to manufacture a second microstrip line using the second circuit board precursor and measure the insertion loss of the second microstrip line;
第一损耗因子计算单元,设置为将所述第二微带线的插损和金属箔的表面粗糙度代入粗糙度计算模型中,反推出所述胶膜层的介质损耗因子。The first loss factor calculation unit is configured to substitute the insertion loss of the second microstrip line and the surface roughness of the metal foil into a roughness calculation model to infer the dielectric loss factor of the adhesive film layer.
在本申请的一些实施例中,插损计算模型构建装置还包括:In some embodiments of the present application, the insertion loss calculation model building device further includes:
第三制作单元,设置为在介质层的两侧形成胶膜层;A third manufacturing unit is configured to form a glue film layer on both sides of the dielectric layer;
第四制作单元,设置为在所述介质层的两侧的胶膜层上分别形成金属箔,得到第三电路板前体;A fourth manufacturing unit is configured to form metal foils on the adhesive film layers on both sides of the dielectric layer to obtain a third circuit board precursor;
第五制作单元,设置为利用所述第三电路板前体制作第三微带线,并测量所述第三微带线的插损;a fifth manufacturing unit, configured to manufacture a third microstrip line using the third circuit board precursor, and measure the insertion loss of the third microstrip line;
第二损耗因子计算单元,设置为将所述第三微带线的插损、所述胶膜层的介质损耗因子和所述金属箔的表面粗糙度代入所述粗糙度计算模型中,反推所述介质层的介质损耗因子;A second loss factor calculation unit is configured to substitute the insertion loss of the third microstrip line, the dielectric loss factor of the adhesive film layer and the surface roughness of the metal foil into the roughness calculation model to reversely deduce the dielectric loss factor of the dielectric layer;
第六制作单元,设置为在所述介质层的两侧形成表面处理后的金属箔,得到第四电路板前体;A sixth manufacturing unit is configured to form a surface-treated metal foil on both sides of the dielectric layer to obtain a fourth circuit board precursor;
第七制作单元,设置为利用所述第四电路板前体制作第四微带线,并测量所述第四微带线的插损; a seventh manufacturing unit, configured to manufacture a fourth microstrip line using the fourth circuit board precursor, and measure the insertion loss of the fourth microstrip line;
等效粗糙度计算单元,设置为将所述第四微带线的插损和所述介质层的介质损耗因子代入所述粗糙度计算模型中计算表面处理后的金属箔的等效粗糙度;an equivalent roughness calculation unit, configured to substitute the insertion loss of the fourth microstrip line and the dielectric loss factor of the dielectric layer into the roughness calculation model to calculate the equivalent roughness of the metal foil after surface treatment;
插损计算模型构建单元,设置为基于所述介质层的介质损耗因子和表面处理后的金属箔的等效粗糙度构建插损计算模型。The insertion loss calculation model building unit is configured to build an insertion loss calculation model based on the dielectric loss factor of the dielectric layer and the equivalent roughness of the metal foil after surface treatment.
在本申请的一些实施例中,所述粗糙度计算模型为hammerstad模型、hemisphere模型或huray模型。In some embodiments of the present application, the roughness calculation model is a Hammerstad model, a hemisphere model or a Huray model.
在本申请的一些实施例中,所述金属箔为铜箔。In some embodiments of the present application, the metal foil is copper foil.
上述插损计算模型构建装置可执行本申请任意实施例所提供的插损计算模型构建方法,具备执行插损计算模型构建方法相应的功能模块和效果。The above-mentioned insertion loss calculation model construction device can execute the insertion loss calculation model construction method provided in any embodiment of the present application, and has the corresponding functional modules and effects for executing the insertion loss calculation model construction method.
图10为本申请的实施例提供的一种电子设备的结构示意图。电子设备旨在表示多种形式的数字计算机,诸如,膝上型计算机、台式计算机、工作台、个人数字助理、服务器、刀片式服务器、大型计算机、和其它适合的计算机。电子设备还可以表示多种形式的移动装置,诸如,个人数字处理、蜂窝电话、智能电话、可穿戴设备(如头盔、眼镜、手表等)和其它类似的计算装置。本文所示的部件、它们的连接和关系、以及它们的功能仅仅作为示例,并且不意在限制本文中描述的和/或者要求的本申请的实现。Figure 10 is a schematic diagram of the structure of an electronic device provided by an embodiment of the present application. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workbenches, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present application described and/or required herein.
如图10所示,电子设备10包括至少一个处理器11,以及与至少一个处理器11通信连接的存储器,如只读存储器(Read-Only Memory,ROM)12、随机访问存储器(Random Access Memory,RAM)13等,其中,存储器存储有可被至少一个处理器执行的计算机程序,处理器11可以根据存储在ROM12中的计算机程序或者从存储单元18加载到RAM13中的计算机程序,来执行多种适当的动作和处理。在RAM 13中,还可存储电子设备10操作所需的多种程序和数据。处理器11、ROM 12以及RAM 13通过总线14彼此相连。输入/输出(Input/Output,I/O)接口15也连接至总线14。As shown in FIG. 10 , the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform a variety of appropriate actions and processes according to the computer program stored in the ROM 12 or the computer program loaded from the storage unit 18 to the RAM 13. In the RAM 13, a variety of programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input/output (I/O) interface 15 is also connected to the bus 14.
电子设备10中的多个部件连接至I/O接口15,包括:输入单元16,例如键盘、鼠标等;输出单元17,例如多种类型的显示器、扬声器等;存储单元18,例如磁盘、光盘等;以及通信单元19,例如网卡、调制解调器、无线通信收发机等。通信单元19允许电子设备10通过诸如因特网的计算机网络和/或多种电信网络与其他设备交换信息/数据。A number of components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information/data with other devices through a computer network such as the Internet and/or various telecommunication networks.
处理器11可以是多种具有处理和计算能力的通用和/或专用处理组件。处理器11的一些示例包括中央处理单元(Central Processing Unit,CPU)、图形处理单元(Graphics Processing Unit,GPU)、多种专用的人工智能(Artificial Intelligence,AI)计算芯片、多种运行机器学习模型算法的处理器、数字信号处理器(Digital Signal Processor,DSP)、以及任何适当的处理器、控制器、微控制器等。处理器11执行上文所描述的多个方法和处理,例如插损计算模型构建方法。The processor 11 may be a variety of general and/or special processing components with processing and computing capabilities. Some examples of the processor 11 include a central processing unit (CPU), a graphics processing unit (GPU), a variety of special artificial intelligence (AI), and a variety of other processors. The processor 11 may include a plurality of processors for running machine learning model algorithms, a plurality of processors for running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The processor 11 executes the plurality of methods and processes described above, such as the insertion loss calculation model construction method.
在一些实施例中,插损计算模型构建方法可被实现为计算机程序,其被有形地包含于计算机可读存储介质,例如存储单元18。在一些实施例中,计算机程序的部分或者全部可以经由ROM 12和/或通信单元19而被载入和/或安装到电子设备10上。当计算机程序加载到RAM 13并由处理器11执行时,可以执行上文描述的插损计算模型构建方法的一个或多个步骤。备选地,在其他实施例中,处理器11可以通过其他任何适当的方式(例如,借助于固件)而被配置为执行插损计算模型构建方法。In some embodiments, the insertion loss calculation model construction method may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed on the electronic device 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the insertion loss calculation model construction method described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to execute the insertion loss calculation model construction method in any other appropriate manner (e.g., by means of firmware).
本文中以上描述的系统和技术的多种实施方式可以在数字电子电路系统、集成电路系统、场可编程门阵列(Field Programmable Gate Array,FPGA)、专用集成电路(Application Specific Integrated Circuit,ASIC)、专用标准产品(Application Specific Standard Parts,ASSP)、芯片上系统的系统(System on Chip,SOC)、负载可编程逻辑设备(Complex Programmable Logic Device,CPLD)、计算机硬件、固件、软件、和/或它们的组合中实现。这些多种实施方式可以包括:实施在一个或者多个计算机程序中,该一个或者多个计算机程序可在包括至少一个可编程处理器的可编程系统上执行和/或解释,该可编程处理器可以是专用或者通用可编程处理器,可以从存储系统、至少一个输入装置、和至少一个输出装置接收数据和指令,并且将数据和指令传输至该存储系统、该至少一个输入装置、和该至少一个输出装置。Various embodiments of the systems and techniques described above herein may be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard parts (ASSPs), system on chip systems (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: being implemented in one or more computer programs that are executable and/or interpreted on a programmable system including at least one programmable processor that may be a special purpose or general purpose programmable processor that may receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
用于实施本申请的方法的计算机程序可以采用一个或多个编程语言的任何组合来编写。这些计算机程序可以提供给通用计算机、专用计算机或其他可编程数据处理装置的处理器,使得计算机程序当由处理器执行时使流程图和/或框图中所规定的功能/操作被实施。计算机程序可以完全在机器上执行、部分地在机器上执行,作为独立软件包部分地在机器上执行且部分地在远程机器上执行或完全在远程机器或服务器上执行。Computer programs for implementing the methods of the present application may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions/operations specified in the flow chart and/or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.
在本申请的上下文中,计算机可读存储介质可以是有形的介质,其可以包含或存储以供指令执行系统、装置或设备使用或与指令执行系统、装置或设备结合地使用的计算机程序。计算机可读存储介质可以包括电子的、磁性的、光学的、电磁的、红外的、或半导体系统、装置或设备,或者上述内容的任何合适组合。备选地,计算机可读存储介质可以是机器可读信号介质。机器可读存储介质包括基于一个或多个线的电气连接、便携式计算机盘、硬盘、RAM、ROM、 可擦除可编程只读存储器(Erasable Programmable Read-Only Memory,EPROM)、快闪存储器)、光纤、便捷式紧凑盘只读存储器(Compact Disc Read-Only Memory,CD-ROM)、光学储存设备、磁储存设备、或上述内容的任何合适组合。存储介质可以是非暂态(non-transitory)存储介质。In the context of this application, a computer readable storage medium may be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer readable storage medium may include an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, a computer readable storage medium may be a machine readable signal medium. A machine readable storage medium includes an electrical connection based on one or more wires, a portable computer disk, a hard disk, a RAM, a ROM, Erasable Programmable Read-Only Memory (EPROM), flash memory), optical fiber, compact disc read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination of the above. The storage medium can be a non-transitory storage medium.
为了提供与用户的交互,可以在电子设备上实施此处描述的系统和技术,该电子设备具有:用于向用户显示信息的显示装置(例如,阴极射线管(Cathode Ray Tube,CRT)或者液晶显示器(Liquid Crystal Display,LCD)监视器);以及键盘和指向装置(例如,鼠标或者轨迹球),用户可以通过该键盘和该指向装置来将输入提供给电子设备。其它种类的装置还可以用于提供与用户的交互;例如,提供给用户的反馈可以是任何形式的传感反馈(例如,视觉反馈、听觉反馈、或者触觉反馈);并且可以用任何形式(包括声输入、语音输入或者、触觉输入)来接收来自用户的输入。To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a cathode ray tube (CRT) or a liquid crystal display (LCD) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).
可以将此处描述的系统和技术实施在包括后台部件的计算系统(例如,作为数据服务器)、或者包括中间件部件的计算系统(例如,应用服务器)、或者包括前端部件的计算系统(例如,具有图形用户界面或者网络浏览器的用户计算机,用户可以通过该图形用户界面或者该网络浏览器来与此处描述的系统和技术的实施方式交互)、或者包括这种后台部件、中间件部件、或者前端部件的任何组合的计算系统中。可以通过任何形式或者介质的数字数据通信(例如,通信网络)来将系统的部件相互连接。通信网络的示例包括:局域网(Local Area Network,LAN)、广域网(Wide Area Network,WAN)、区块链网络和互联网。The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: Local Area Network (LAN), Wide Area Network (WAN), blockchain network, and the Internet.
计算系统可以包括客户端和服务器。客户端和服务器一般远离彼此并且通常通过通信网络进行交互。通过在相应的计算机上运行并且彼此具有客户端-服务器关系的计算机程序来产生客户端和服务器的关系。服务器可以是云服务器,又称为云计算服务器或云主机,是云计算服务体系中的一项主机产品,以解决了传统物理主机与虚拟专用服务器(Virtual Private Server,VPS)服务中,存在的管理难度大,业务扩展性弱的缺陷。A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the respective computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and virtual private servers (VPS) services.
本申请实施例还提供了一种计算机程序产品,包括计算机程序,该计算机程序在被处理器执行时实现如本申请任意实施例所提供的插损计算模型构建方法。An embodiment of the present application further provides a computer program product, including a computer program, which, when executed by a processor, implements the insertion loss calculation model construction method provided in any embodiment of the present application.
计算机程序产品在实现的过程中,可以以一种或多种程序设计语言或其组合来编写用于执行本申请操作的计算机程序代码,程序设计语言包括面向对象的程序设计语言,诸如Java、Smalltalk、C++,还包括常规的过程式程序设计语言,诸如“C”语言或类似的程序设计语言。程序代码可以完全地在用户计算机 上执行、部分地在用户计算机上执行、作为一个独立的软件包执行、部分在用户计算机上部分在远程计算机上执行、或者完全在远程计算机或服务器上执行。在涉及远程计算机的情形中,远程计算机可以通过任意种类的网络——包括LAN或WAN—连接到用户计算机,或者,可以连接到外部计算机(例如利用因特网服务提供商来通过因特网连接)。In the process of implementing the computer program product, the computer program code for performing the operation of the present application can be written in one or more programming languages or a combination thereof, including object-oriented programming languages such as Java, Smalltalk, C++, and conventional procedural programming languages such as "C" language or similar programming languages. The program code can be completely executed on the user's computer. The program may be executed partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a LAN or WAN, or may be connected to an external computer (e.g., through the Internet using an Internet service provider).
可以使用上面所示的多种形式的流程,重新排序、增加或删除步骤。例如,本申请中记载的多个步骤可以并行地执行也可以顺序地执行也可以不同的次序执行,只要能够实现本申请的技术方案所期望的结果,本文在此不进行限制。 The various forms of processes shown above can be used to reorder, add or delete steps. For example, the multiple steps recorded in this application can be executed in parallel, sequentially or in different orders, as long as the expected results of the technical solution of this application can be achieved, and this document is not limited here.
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