WO2024182913A1 - 阵列基板以及显示装置 - Google Patents
阵列基板以及显示装置 Download PDFInfo
- Publication number
- WO2024182913A1 WO2024182913A1 PCT/CN2023/079449 CN2023079449W WO2024182913A1 WO 2024182913 A1 WO2024182913 A1 WO 2024182913A1 CN 2023079449 W CN2023079449 W CN 2023079449W WO 2024182913 A1 WO2024182913 A1 WO 2024182913A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- pixel
- sub
- pixels
- array substrate
- color
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
Definitions
- Embodiments of the present disclosure relate to an array substrate and a display device.
- liquid crystal display devices are widely used in people's lives.
- Large-size liquid crystal television products have increasingly higher requirements for display characteristic indicators such as resolution, white balance and transmittance.
- Embodiments of the present disclosure provide an array substrate and a display device.
- the array substrate provided by the embodiment of the present disclosure includes: a substrate; a plurality of sub-pixels, located on the substrate, and arranged in an array along a first direction and a second direction, wherein the first direction intersects the second direction.
- the array substrate includes a plurality of pixel regions, each pixel region includes sub-pixels of different colors arranged along the first direction, and the areas of different pixel regions are the same; in the same pixel region, the sub-pixel regions of at least two sub-pixels of different colors have different sizes in the first direction, and the ratio of the sizes of the sub-pixel regions of the at least two sub-pixels of different colors in the first direction is 1 to 2, and the sub-pixel region includes an effective light emitting region.
- the array substrate further includes: a plurality of data lines arranged along the first direction; and a plurality of gate lines arranged along the second direction.
- the plurality of data lines and the plurality of gate lines are arranged to cross each other to surround the effective light emitting areas of the plurality of sub-pixels.
- each sub-pixel includes a pixel electrode and a common electrode that are stacked, and in the same pixel area, the pixel electrodes of the at least two sub-pixels of different colors have different sizes in the first direction.
- the plurality of data lines are non-uniformly distributed in the first direction, and the plurality of gate lines are uniformly distributed in the second direction.
- the ratio of the sizes of the pixel electrodes of the at least two sub-pixels of different colors in the first direction is no more than 2.
- the ratio of the sizes of the sub-pixel areas of the at least two sub-pixels of different colors in the second direction is 0.9 to 1.1.
- each pixel region includes a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel; in the same pixel region, the sub-pixel region of the second color sub-pixel has the largest size in the first direction.
- the pixel electrode of the second color sub-pixel has the largest size in the first direction.
- the ratio of the size of the sub-pixel area of the first color sub-pixel to the size of the sub-pixel area of the third color sub-pixel in the first direction is 0.9-1.1.
- a ratio of the sizes of the pixel electrode of the first color sub-pixel and the pixel electrode of the third color sub-pixel in the first direction is 0.9 to 1.1.
- each sub-pixel also includes a transistor, and the first electrode of the transistor is connected to the pixel electrode;
- the array substrate also includes a common electrode line electrically connected to the common electrode, and the first electrode of the transistor of each sub-pixel overlaps with the common electrode line on a plane perpendicular to the base substrate, and the overlapping area between the first electrode of the transistor of the second color sub-pixel and the common electrode line is smaller than the overlapping area between the first electrode of the transistor of other color sub-pixels and the common electrode line.
- the first portion of the common electrode line that overlaps with the first electrode of the transistor extends along the second direction, and the size of the overlapping portion of the first electrode of the transistor of the second color sub-pixel with the first portion in the second direction is smaller than the size of the overlapping portion of the first electrode of the transistor of other color sub-pixels with the first portion in the second direction.
- the first portion of the common electrode line and the data line are alternately arranged along the first direction, the first electrode of the transistor is arranged in the same layer as the data line, and the first portion is arranged in the same layer as the pixel electrode.
- the plurality of sub-pixels are arranged as multiple rows and columns of sub-pixels, the sub-pixels in the same row are arranged along the first direction, the sub-pixels in the same column are arranged along the second direction, two gate lines are arranged between two adjacent rows of sub-pixels, and two columns of sub-pixels are arranged between two adjacent data lines. pixels; the second portion of the common electrode line located between the two columns of sub-pixels is arranged in the same layer as the gate line, and the first portion of the common electrode line overlaps the gate line.
- the two gate lines form a gate line pair
- the plurality of gate lines include a plurality of gate line pairs
- the plurality of gate line pairs are evenly distributed in the second direction.
- each pixel region includes a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel; in the same pixel region, the pixel electrode of the first color sub-pixel has the largest size in the first direction.
- the size of the pixel electrode of the second color sub-pixel is larger than the size of the pixel electrode of the third color sub-pixel, and the difference between the pixel electrode of the first color sub-pixel and the pixel electrode of the second color sub-pixel is a first difference, and the difference between the pixel electrode of the second color sub-pixel and the pixel electrode of the third color sub-pixel is a second difference, and the ratio of the first difference to the second difference is 0.9 to 1.1.
- the multiple sub-pixels are arranged into multiple rows and columns of sub-pixels, the sub-pixels in the same row are arranged along the first direction, the sub-pixels in the same column are arranged along the second direction, a gate line is set between two adjacent rows of sub-pixels, and a data line is set between two adjacent columns of sub-pixels.
- the first color sub-pixel is a red sub-pixel
- the second color sub-pixel is a green sub-pixel
- the third color sub-pixel is a blue sub-pixel
- Another embodiment of the present disclosure provides a display device, comprising any of the above array substrates; an opposing substrate disposed opposite to the array substrate, and the opposing substrate comprising a color filter; a liquid crystal layer located between the array substrate and the opposing substrate; and a backlight source located on a side of the array substrate away from the liquid crystal layer.
- the ratio of the sizes of the sub-pixel areas of the at least two sub-pixels of different colors in the pixel area in the first direction is 1 to 2 so that the white light emitted by the display device meets the preset white balance coordinates without color temperature correction adjustment.
- the backlight source includes quantum dot material or fluorescent material.
- the backlight source includes quantum dot material
- the spectrum of the backlight source includes a red light peak, a green light peak and a blue light peak
- the peak value of the red light peak is higher than the peak value of the green light peak.
- the ratio of the peak value of the blue light peak to the peak value of the red light peak is 1.8 to 2.8.
- the backlight source includes a fluorescent material
- the spectrum of the backlight source is It includes a red light peak, a green light peak and a blue light peak, wherein the peak value ratio of the blue light peak to the red light peak is 0.7-0.9, and the peak value ratio of the green light peak to the red light peak is 0.15-0.28.
- FIG. 1 is a schematic diagram of a partial structure of an array substrate provided according to an embodiment of the present disclosure.
- FIG. 2 is a schematic diagram of a portion of sub-pixels and signal lines in the example shown in FIG. 1 .
- FIG. 3 is a schematic diagram of a partial structure of a sub-pixel and a signal line shown in FIG. 2 .
- FIG. 4 is a schematic diagram of a portion of sub-pixels and signal lines in another example shown in FIG. 1 .
- FIG. 5 is a schematic diagram of a partial structure of a sub-pixel and a signal line shown in FIG. 4 .
- FIG. 6 is a comparison diagram of the spectrum of the backlight source used when the array substrate shown in FIG. 2 is applied to a display device and the spectrum of the backlight source used when the array substrate shown in FIG. 4 is applied to a display device.
- FIG. 7 is a spectrum diagram of another backlight source.
- Figure 8 is a spectrum comparison chart of different color films.
- FIG. 9 is a schematic diagram of a partial structure of an array substrate provided according to another example of an embodiment of the present disclosure.
- FIG. 10 is a schematic diagram of the sub-pixel shown in FIG. 9 before the size of the sub-pixel region is adjusted.
- FIG. 11 is a schematic diagram of the sub-pixel shown in FIG. 9 after the size of the sub-pixel region is adjusted.
- FIG. 12 is a schematic diagram of a partial structure of a display device provided according to another embodiment of the present disclosure.
- “approximately” can be expressed as within one or more standard deviations, or within 10% or 5% of the value.
- the number of a component is not specifically indicated in the following embodiments of the present disclosure, it means that the component can be one or more, or can be understood as at least one.
- “At least one” refers to one or more, and “multiple” refers to at least two.
- the “same-layer arrangement” referred to in the present disclosure refers to a structure formed by two (or more) structures formed by the same deposition process and patterned by the same patterning process, and their materials can be the same or different.
- the "integrated structure” in the present disclosure refers to a structure formed by two (or more) structures being formed by the same deposition process and patterned by the same composition process to form a structure connected to each other, and their materials may be the same or different.
- the sub-pixel areas i.e., pixel dots, dot
- the original aperture ratio of each sub-pixel can be defined as the ratio of the area of the effective light-emitting area to the area of the sub-pixel area.
- the original aperture ratio setting of each sub-pixel cannot perfectly match the characteristics of the color film and the backlight.
- the pixel structure in which the sub-pixel areas have the same size in the row direction cannot use certain high-transmittance color films, resulting in limited improvement in the transmittance of the display panel.
- ACC debugging is required to make the color distribution more uniform. ACC is used to correct the color temperature according to requirements to make the picture more natural. Generally, after the gamma curve of the panel is adjusted, ACC debugging is used to fine-tune the color coordinates and Gamma more delicately, and the color temperature and Gamma curve meet the requirements through the ratio of red, green and blue (RGB) at different grayscales.
- RGB red, green and blue
- the present invention provides an array substrate and a display device.
- the array substrate includes a base substrate and a A plurality of sub-pixels on a substrate.
- the plurality of sub-pixels are arranged in an array along a first direction and a second direction, and the first direction intersects the second direction.
- the array substrate includes a plurality of pixel areas, each pixel area includes sub-pixels of different colors arranged along a first direction, and the areas of different pixel areas are the same; in the same pixel area, the sub-pixel areas of at least two sub-pixels of different colors have different sizes in the first direction, and the ratio of the sizes of the sub-pixel areas of at least two sub-pixels of different colors in the first direction is 1 to 2, and the sub-pixel area includes an effective light-emitting area.
- the array substrate provided in the present disclosure can set the ratio of the sizes of the sub-pixel areas of sub-pixels of different colors in the first direction, so that a display device including the array substrate can make the emitted light meet the required white balance without ACC debugging, so that the transmittance of the array substrate can be increased by at least 10% when applied to a display device.
- Fig. 1 is a schematic diagram of a partial structure of an array substrate provided according to an embodiment of the present disclosure.
- Fig. 2 is a schematic diagram of a portion of sub-pixels and signal lines in an example shown in Fig. 1.
- Fig. 3 is a schematic diagram of a partial structure of sub-pixels and signal lines shown in Fig. 2.
- the array substrate includes a base substrate 10 and a plurality of sub-pixels 100 located on the base substrate 10.
- the plurality of sub-pixels 100 are arranged in an array along a first direction and a second direction, and the first direction intersects with the second direction.
- the first direction may be the X direction shown in FIG. 1
- the second direction may be the Y direction shown in FIG. 1
- the first direction and the second direction may be interchangeable.
- the angle between the first direction and the second direction may be 80 to 100 degrees.
- the angle between the first direction and the second direction may be 85 to 95 degrees.
- the first direction is perpendicular to the second direction.
- the first direction may be a row direction
- the second direction may be a column direction.
- the region where the multiple sub-pixels 100 are located may be a display area in the array substrate for displaying images, and the array substrate further includes a peripheral area surrounding the display area.
- the array substrate includes a plurality of pixel areas 20, each pixel area 20 includes sub-pixels 100 of different colors arranged along a first direction, and the areas of different pixel areas 20 are the same.
- the plurality of pixel areas 20 may be arranged in an array along the first direction and the second direction.
- the number of sub-pixels 100 included in different pixel areas 20 is the same, such as three sub-pixels 100 of different colors.
- each sub-pixel 100 may be a sub-pixel area 1001, i.e., a pixel dot
- each pixel area 20 includes a plurality of sub-pixel areas 1001, such as the area of each pixel area 20 may be the sum of the areas of the plurality of sub-pixel areas 1000 included therein, and the area of the pixel area 20 may be set to a certain value.
- the total pixel aperture ratio of the pixel area 20 may be the ratio of the sum of the effective light emitting areas of the sub-pixels 100 to the area of the pixel area 20
- the pixel aperture ratio of each sub-pixel 100 may be the ratio of the area of the effective light emitting area 101 of each sub-pixel 100 to the area of the pixel area 20.
- the definition of pixel aperture ratio here is different from the definition of the original aperture ratio mentioned above.
- the above-mentioned effective light emitting area 101 can be the area shown by the black box in Figure 2, and the area outside the effective light emitting area 101 is provided with a black matrix 1002.
- the sub-pixel area 1001 includes the effective light emitting area 101 and the non-light emitting area surrounding the effective light emitting area 101, and the non-light emitting area is opposite to the black matrix.
- the above-mentioned effective light emitting area refers to the opening area of the sub-pixel, such as the opening area of the sub-pixel through which light can pass.
- the sub-pixel regions 1001 of at least two sub-pixels 100 of different colors have different sizes in the first direction, and the ratio of the sizes of the sub-pixel regions 1001 of at least two sub-pixels 100 of different colors in the first direction is 1 to 2.
- the ratio of the sizes of the sub-pixel regions 1001 of at least two sub-pixels 100 of different colors in the first direction is 1.01 to 1.99, or 1.1 to 1.7, or 1.2 to 1.9, or 1.3 to 1.5, or 1.4 to 1.8, etc.
- the effective light emitting areas 101 of at least two sub-pixels 100 of different colors have different sizes in the first direction
- the size ratio of the effective light emitting areas 101 of at least two sub-pixels of different colors 100 in the first direction is 1 to 2.
- the size ratio of the effective light emitting areas 101 of at least two sub-pixels of different colors 100 in the first direction is 1.01 to 1.99, or 1.1 to 1.7, or 1.2 to 1.9, or 1.3 to 1.5, or 1.4 to 1.8, etc.
- the total pixel aperture ratio is guaranteed to remain unchanged, the lengths of different sub-pixel areas are unchanged (such as the size of the sub-pixel area in the column direction), and the widths of different sub-pixel areas are changed (such as the size of the sub-pixel area in the row direction).
- the sub-pixel area widths are differentiated by design, so that the ratio of the widths of different sub-pixel areas is between 1 and 2.
- the red sub-pixels and green sub-pixels can be reallocated according to the characteristics of the backlight and the color film.
- the pixel aperture ratio of the blue sub-pixel and the blue sub-pixel respectively makes it perfectly match any color film and backlight solution.
- the white point coordinate can be adjusted to the Spec value without ACC debugging, which is conducive to maximizing the transmittance. For example, the transmittance can be increased by 10%.
- the present disclosure sets the sub-pixel areas of different color sub-pixels to have different sizes in the first direction, and sets them between 1 and 2, so that the array substrate can make the emitted light meet the required white balance without ACC debugging, so that the transmittance of the array substrate can be improved by at least 10% when applied to a display device.
- the array substrate can effectively solve the problem of large transmittance loss of 8k resolution TV products after ACC is performed on the panel.
- the array substrate further includes a plurality of data lines 210 arranged along a first direction and a plurality of gate lines 220 arranged along a second direction.
- the plurality of data lines 210 and the plurality of gate lines 220 are arranged to cross each other to surround the effective light emitting areas 101 of the plurality of sub-pixels 100 .
- multiple sub-pixels 100 are arranged into multiple rows and columns of sub-pixels 100, the sub-pixels 100 in the same row are arranged along a first direction, the sub-pixels 100 in the same column are arranged along a second direction, two gate lines 220 are arranged between two adjacent rows of sub-pixels 100, and two columns of sub-pixels 100 are arranged between two adjacent data lines 210.
- two gate lines 220 form a gate line pair 222
- the plurality of gate lines 220 includes a plurality of gate line pairs 222 .
- each sub-pixel 100 includes a stacked pixel electrode 102 and a common electrode 103.
- one of the pixel electrode 102 and the common electrode 103 may be a plate electrode, and the other may include a slit electrode, such as a plurality of strip electrodes.
- the array substrate further includes a common electrode line 230 electrically connected to the common electrode 103.
- the array substrate includes a plurality of common electrode lines 230, and the plurality of common electrode lines 230 and the plurality of data lines 210 are alternately arranged along the first direction.
- the sub-pixel region of each sub-pixel 100 may be a region surrounded by the center line of the common electrode line 230 , the center line of the data line 210 , and the center line of the gate line pair 222 .
- the sub-pixel area of each sub-pixel mentioned above may be an area surrounded by a center line of a data line and a center line of a gate line.
- the data lines, common electrode lines and gate lines are called signal lines.
- the center line is the center line of the signal lines.
- the center line can be the line with the shortest distance passing through the bent lines.
- a line is formed by connecting the midpoints of the two edges that are farther away from each other, and the two edges extend in the overall extension direction of the bending line.
- a plurality of data lines 210 are non-uniformly distributed in a first direction, and a plurality of gate line pairs 222 are uniformly distributed in a second direction.
- a plurality of common electrode lines 230 are non-uniformly distributed in a first direction.
- the size ratio of the sub-pixel regions 1001 of at least two different color sub-pixels 100 in the second direction is 0.9 to 1.1.
- the sizes of the sub-pixel regions 1001 of the different color sub-pixels 100 in the second direction may be equal.
- the size and resolution of the display screen determine that the size of each pixel area 20 in the first direction and the size of each pixel area 20 in the second direction are both constant values. Since only one sub-pixel 100 is arranged in the pixel area 20 in the second direction, and multiple sub-pixels 100 are arranged in the pixel area 20 in the first direction, the size of the sub-pixel area of the sub-pixel 100 in the second direction remains unchanged. By adjusting the sizes of different sub-pixel areas in the first direction, the output light can meet the required white balance without ACC debugging, so as to improve the transmittance of the array substrate when it is applied to a display device.
- the pixel electrodes 102 of at least two sub-pixels 100 of different colors have different sizes in the first direction to accommodate different sizes of different sub-pixel regions in the first direction.
- the ratio of the sizes of the pixel electrodes 102 of at least two sub-pixels 100 of different colors in the first direction is not greater than 2.
- the ratio of the sizes of the pixel electrodes 102 of at least two sub-pixels 100 of different colors in the first direction may be 1.01 to 1.99, or 1.1 to 1.5, or 1.2 to 1.9, or 1.3 to 1.7, or 1.4 to 1.8, etc.
- the ratio of the sizes of the pixel electrodes 102 of the sub-pixels 100 of different colors in the first direction may be the same as or different from the ratio of the sizes of the sub-pixel region 1001 where the sub-pixels 100 of different colors are located. If the ratio is different, the ratio of the difference between the two to one is not greater than 10%.
- each pixel region 20 includes a first color sub-pixel 110, a second color sub-pixel 120, and a third color sub-pixel 130; in the same pixel region 20, the sub-pixel region 1001 of the second color sub-pixel 120 has the largest size in the first direction.
- the effective light emitting area 101 of the second color sub-pixel 120 has the largest size in the first direction.
- the second color sub-pixel may be the sub-pixel that has the greatest influence on the transmittance of the array substrate.
- the second color sub-pixel 120 has the largest pixel aperture ratio.
- the pixel electrode 102 of the second color sub-pixel 120 has the largest size in the first direction.
- the size of the pixel area in the array substrate provided by the present disclosure in the first direction remains unchanged.
- the size ratio of the sub-pixel region 1001 of the first color sub-pixel 110 to the sub-pixel region 1001 of the third color sub-pixel 130 in the first direction is 0.9 to 1.1.
- the size of the sub-pixel region 1001 of the first color sub-pixel 110 and the sub-pixel region 1001 of the third color sub-pixel 130 in the first direction may be the same, which is conducive to facilitating the adjustment and compensation of the subsequent charging pull voltage.
- the ratio of the size of the sub-pixel region 1001 of the second color sub-pixel 120 to the size of the sub-pixel region 1001 of the first color sub-pixel 110 in the first direction may be 1.13.
- the ratio of the size of the pixel electrode 102 of the first color sub-pixel 110 to the size of the pixel electrode 102 of the third color sub-pixel 130 in the first direction is 0.9 to 1.1.
- the size of the pixel electrode 102 of the first color sub-pixel 110 and the size of the pixel electrode 102 of the third color sub-pixel 130 in the first direction may be the same.
- the ratio of the size of the sub-pixel area of the first color sub-pixel 110 to the effective light emitting area of the third color sub-pixel 130 in the first direction is 0.9 to 1.1.
- the size of the sub-pixel area of the first color sub-pixel 110 to the effective light emitting area of the third color sub-pixel 130 in the first direction is the same.
- the first color sub-pixel 110 is a red sub-pixel
- the second color sub-pixel 120 is a green sub-pixel
- the third color sub-pixel 130 is a blue sub-pixel.
- the embodiments of the present disclosure are not limited thereto, and the colors of the first color sub-pixel and the third color sub-pixel can be interchanged.
- the embodiments of the present disclosure schematically use the second color sub-pixel as a green sub-pixel, but are not limited thereto.
- the second color sub-pixel can also be other sub-pixels that have the greatest impact on the transmittance of the array substrate, or can be the sub-pixel with the highest power consumption, or the sub-pixel that the human eye is most sensitive to, and other sub-pixels that require a larger aperture ratio.
- the sub-pixels of the red sub-pixel (R) and the blue sub-pixel (B) The size of the region 1001 in the first direction (the size marked by the black arrow in the figure) can be 59.45 microns, and the size of the sub-pixel region 1001 of the green sub-pixel (G) in the first direction (the size marked by the black arrow in the figure) can be 67.09 microns.
- the pixel opening ratio of the red sub-pixel, the pixel opening ratio of the green sub-pixel, and the pixel opening ratio of the blue sub-pixel are 13.86%, 13.86%, and 13.86%, respectively, and the transmittance of the array substrate before and after ACC debugging is 3.31% and 3.18%, respectively, which is a decrease of 4%.
- the pixel opening ratios of different color sub-pixels in the same pixel area are reset by using the scheme provided in FIG3, the pixel opening ratios of the red sub-pixel, the pixel opening ratios of the green sub-pixel, and the pixel opening ratios of the blue sub-pixel are 13.13%, 15.26%, and 13.17%, respectively, which can perfectly match the characteristics of the color filter and the backlight, and can meet the preset white point balance coordinates without ACC debugging.
- the transmittance is about 3.50%, which can be increased by 10.1% compared with the transmittance after ACC debugging.
- the color filter and backlight do not change before and after the above-mentioned pixel aperture ratio is reset.
- the color filter adopts the red light spectrum corresponding to 03R as shown in Figure 8, the green light spectrum corresponding to G6800 and the blue light spectrum corresponding to 100B, and the backlight adopts a quantum dot backlight source, and the spectrum of the quantum dot backlight source is the first spectrum shown in Figure 6.
- each sub-pixel 100 further includes a transistor 140, and a first electrode 141 of the transistor 140 is connected to the pixel electrode 102.
- the transistor 140 includes a second electrode 142 and a control electrode 143, the second electrode 142 of the transistor 140 is connected to the data line 210, and the control electrode 143 of the transistor 140 is connected to the gate line 220.
- the first electrode 141 of the transistor 140 of each sub-pixel 100 overlaps with the common electrode line 230, and the overlapping area of the first electrode 141 of the transistor 140 of the second color sub-pixel 120 and the common electrode line 230 is smaller than the overlapping area of the first electrode 141 of the transistor 140 of other color sub-pixels and the common electrode line 230.
- the other color sub-pixels may be red sub-pixels and blue sub-pixels.
- the overlapping area of the first electrode 141 of the transistor 140 of the first color sub-pixel 110 and the common electrode line 230 is equal to the overlapping area of the first electrode 141 of the transistor 140 of the third color sub-pixel 130 and the common electrode line 230.
- the array substrate provided by the present disclosure increases the overlapping area between the first pole of the transistor and the common electrode line in the red sub-pixel and the blue sub-pixel to achieve that the above-mentioned overlapping area of the green sub-pixel is smaller than the above-mentioned overlapping areas of the other color sub-pixels.
- the overlapping area of the transistors in the red sub-pixel and the overlapping area of the transistors in the green sub-pixel The ratio is 2 to 2.5.
- the storage capacitance refers to the capacitance between the pixel electrode and the common electrode, and the lateral electric field formed between the pixel electrode and the common electrode forms the above-mentioned liquid crystal capacitance through the liquid crystal.
- the charging pull voltage mentioned above may refer to that at the beginning of period T1, the gate line potential rises to Vgh, the transistor is turned on, and the positive polarity voltage data Vp transmitted on the data line charges the liquid crystal capacitor and the storage capacitor; at the end of period T1, the gate line potential drops to a low level Vgl, and at the moment when the transistor is turned off, the positive polarity voltage data Vp drops by ⁇ Vp, and ⁇ Vp is related to the above three capacitance values.
- the value of ⁇ Vp cannot be too large, and the difference in ⁇ Vp between sub-pixels of different colors cannot be too large.
- the overlapping area between the first electrode of the transistor and the common electrode line in the second color sub-pixel With a larger sub-pixel area size to be smaller than the overlapping area between the first electrode of the transistor and the common electrode line in other color sub-pixels, it is beneficial to increase the storage capacitance of other color sub-pixels and reduce the charging pull voltage of other color sub-pixels.
- the value of ⁇ Vp can be reduced as much as possible and the charging pull voltages of sub-pixels of different colors can be kept basically consistent, avoiding the risk of screen flickering.
- the ratio of the charge pull voltage ⁇ Vp of any two sub-pixels 100 of different colors is 0.9-1.1.
- the charge pull voltage ⁇ Vp of any two sub-pixels 100 of different colors is the same.
- the charge pull voltage ⁇ Vp of the red sub-pixel is 2.58V
- the charge pull voltage ⁇ Vp of the green sub-pixel is 1.83V
- the charge pull voltage ⁇ Vp of the blue sub-pixel is 2.58V
- the charge pull voltage ⁇ Vp of the red sub-pixel is 1.83V
- the charge pull voltage ⁇ Vp of the green sub-pixel is 1.83V
- the charge pull voltage ⁇ Vp of the blue sub-pixel is 1.83V.
- the charge pull voltage ⁇ Vp of each sub-pixel can be made consistent to avoid the risk of screen flickering, while minimizing the charge pull voltage and reducing the influence of the gate line voltage switch on the sub-pixel.
- the difference in charge pull voltage before and after compensation is about 29%.
- Adjusting the size of the sub-pixel areas of different color sub-pixels in the first direction may easily lead to different sub-pixels having different
- the problem of screen flickering caused by inconsistent charging pull voltage of pixels can be alleviated by setting the overlapping area of the first electrode of the transistor and the common electrode line.
- the difference of charging pull voltage by adjusting the overlapping area needs to be guaranteed within a certain proportion, such as within 35%, otherwise the charging pull voltage of sub-pixels of different colors will be difficult to compensate to be consistent. Therefore, when adjusting the size ratio of the sub-pixel area of sub-pixels of different colors in the first direction, it is also necessary to consider that the difference of charging pull voltage before and after compensation should be guaranteed within a certain proportion.
- a first portion of the common electrode line 230 that overlaps the first electrode 141 of the transistor 140 extends along the second direction
- a second portion of the common electrode line 230 that is disposed between two columns of sub-pixels 100 is disposed in the same layer as the gate line 220
- a first portion of the common electrode line 230 overlaps the gate line 220.
- the first portion of the common electrode line 230 may be disposed in the same layer as the pixel electrode 102.
- the first portion of the common electrode line 230 is alternately arranged with the data line 210 along the first direction, the first electrode 141 of the transistor 140 is arranged in the same layer as the data line 210, and the first portion of the common electrode line 230 is arranged in the same layer as the pixel electrode 102.
- the stacking relationship among the common electrode line, the data line, the first electrode of the transistor and the gate line is set to prevent the common electrode line from interfering with the gate line and the first electrode of the transistor.
- the size of the overlapping portion of the first electrode 141 of the transistor 140 of the second color sub-pixel 120 and the first portion of the common electrode line 230 in the second direction is smaller than the size of the overlapping portion of the first electrode 141 of the transistor 140 of other color sub-pixels and the first portion of the common electrode line 230 in the second direction.
- FIG4 is a schematic diagram of some sub-pixels and signal lines in another example shown in FIG1.
- FIG5 is a schematic diagram of the partial structure of the sub-pixels and signal lines shown in FIG4.
- FIG6 is a spectrum comparison diagram of the backlight source used when the array substrate shown in FIG2 is applied to a display device and the spectrum comparison diagram of the backlight source used when the array substrate shown in FIG4 is applied to a display device.
- FIG7 is a spectrum diagram of another backlight source.
- FIG8 is a spectrum comparison diagram of different color filters.
- the spectrum shown in FIG6 may be the spectrum of a quantum dot (QD) backlight source
- the spectrum shown in FIG7 may be the spectrum of a fluorescent backlight source.
- the backlight source may include a light-emitting chip that emits a first color of light, and the quantum dot material or fluorescent material is excited by the first color of light to emit light of other colors.
- the source may include a variety of quantum dot materials, the light-emitting chip emits blue light, and different quantum dot materials are excited by the blue light to emit red light and green light to form white light.
- the difference between the array substrate in the example shown in FIG4 and the array substrate shown in FIG2 is that the sizes of the sub-pixel areas of each color sub-pixel in the first direction are different.
- the size difference of the sub-pixel areas of different color sub-pixels in the array substrate shown in FIG4 in the first direction is greater than the size difference of the sub-pixel areas of different color sub-pixels in the array substrate shown in FIG2 in the first direction.
- the size of the pixel area 20 in the first direction may be a certain value, such as about 186 microns.
- the size of the sub-pixel area of the red sub-pixel (R) and the blue sub-pixel (B) in the first direction may both be 50.65 microns, and the size of the sub-pixel area of the green sub-pixel (G) in the first direction may be 84.7 microns.
- the array substrates shown in FIG. 2 and FIG. 4 can both be applied to a display device having a 65-inch display screen.
- the size of the pixel area 20 in the first direction is constant, the size of the sub-pixel area of the green sub-pixel in the first direction is adjusted to become larger, while the size of the sub-pixel area of the blue sub-pixel and the red sub-pixel in the first direction is adjusted to become smaller.
- the ratio of the size of the sub-pixel area of the second color sub-pixel 120 to the size of the sub-pixel area of the first color sub-pixel 110 in the first direction may be 1.67.
- the setting method of the sub-pixel area size in the array substrate shown in Figures 4 and 5 will also lead to differences in the storage capacitance of sub-pixels of different colors, which in turn leads to different charging pull voltages of different sub-pixels, which is prone to the risk of screen flickering and requires compensation design of Cgs and Cst.
- the overlapping area between the first electrode 141 of the transistor 140 of the second color sub-pixel 120 and the common electrode line 230 is smaller than the overlapping area between the first electrode 141 of the transistor 140 of the other color sub-pixels and the common electrode line 230.
- the other color sub-pixels may be red sub-pixels and blue sub-pixels.
- the overlapping area between the first electrode 141 of the transistor 140 of the first color sub-pixel 110 and the common electrode line 230 is equal to the overlapping area between the first electrode 141 of the transistor 140 of the third color sub-pixel 130 and the common electrode line 230.
- the charge pull voltage ⁇ Vp of the red sub-pixel is 3.829V
- the charge pull voltage ⁇ Vp of the green sub-pixel is 2.48V
- the charge pull voltage ⁇ Vp of the blue sub-pixel is 3.829V
- the charge pull voltage ⁇ Vp of the red sub-pixel is 2.829V
- the charge pull voltage ⁇ Vp of the green sub-pixel is 2.829V
- the charge pull voltage ⁇ Vp of the blue sub-pixel is 2.829V.
- the charge pull voltage can be reduced as much as possible while achieving consistency of the charge pull voltage ⁇ Vp of each sub-pixel to avoid the risk of screen flicker.
- the difference between the charge pull voltage of the red sub-pixel and the blue sub-pixel before and after compensation is about 26%
- the difference between the charge pull voltage of the green sub-pixel before and after compensation is about 14%.
- Adjusting the size of the sub-pixel area of different color sub-pixels in the first direction is likely to cause inconsistency in the charge pull voltage of different sub-pixels, resulting in the occurrence of a flickering screen problem.
- the problem of inconsistent charge pull voltage can be alleviated by setting the overlapping area of the first pole of the transistor and the common electrode line, considering the limitation of the layout space, the difference in charge pull voltage by adjusting the overlapping area needs to be guaranteed to be within a certain proportion, such as within 35%, otherwise the charge pull voltage of sub-pixels of different colors will be difficult to compensate to be consistent. Therefore, when adjusting the size ratio of the sub-pixel area of different color sub-pixels in the first direction, it is also necessary to consider that the difference in charge pull voltage before and after compensation should be guaranteed to be within a certain proportion.
- the size of the portion of the first electrode 141 of the transistor 140 of the green sub-pixel 120 in the array substrate that overlaps with the common electrode line 230 in the second direction is a first width
- the size of the portion of the first electrode 141 of the transistor 140 of the green sub-pixel 120 in the array substrate that overlaps with the common electrode line 230 in the second direction is a second width
- the first width is greater than the second width
- the size of the portion of the first electrode 141 of the transistor 140 of the blue sub-pixel 130 in the array substrate that overlaps with the common electrode line 230 in the second direction is a third width
- the size of the portion of the first electrode 141 of the transistor 140 of the blue sub-pixel 130 in the array substrate that overlaps with the common electrode line 230 in the second direction is a fourth width
- the third width is less than the fourth width
- the pixel aperture ratio of the red sub-pixel, the pixel aperture ratio of the green sub-pixel, and the pixel aperture ratio of the blue sub-pixel are 13.86%, 13.86%, and 13.86%, respectively, and the transmittance of the array substrate before and after ACC debugging is 3.31% and 3.18%, respectively, a decrease of 4%.
- the pixel aperture ratios of the sub-pixels of different colors in the same pixel area are reset to obtain the pixel aperture ratios of the red sub-pixel, the green sub-pixel, and the blue sub-pixel.
- the pixel opening rates of the pixels are 10.78%, 20.00% and 10.78% respectively.
- the pixel opening rates of the above-mentioned sub-pixels of each color match the second spectrum of the backlight source shown in Figure 6 and the spectrum of the color film shown in Figure 8.
- the color film adopts the red light spectrum corresponding to 03R shown in Figure 8, the green light spectrum corresponding to 46G and the blue light spectrum corresponding to 100B.
- the second spectrum shown in FIG6 used by the backlight source corresponding to the array substrate shown in FIG4 adjusts the spectral intensity and peak position of red light, green light and blue light relative to the first spectrum used by the backlight source corresponding to the array substrate shown in FIG2.
- the second spectrum of the backlight source includes a red light peak, a green light peak and a blue light peak, and the peak value of the red light peak is higher than the peak value of the green light peak.
- the peak value of the above peaks is the spectral intensity shown in FIG6.
- the spectral intensity of the blue light peak is equivalent, and the blue light peak of the second spectrum is displaced a certain distance in the long-wave direction relative to the blue light peak of the first spectrum.
- the spectral intensity of the green light peak of the second spectrum is less than the spectral intensity of the green light peak of the first spectrum, and the green light peak of the second spectrum is displaced a certain distance in the short-wave direction relative to the green light peak of the first spectrum.
- the spectral intensity of the red light peak of the second spectrum is greater than the spectral intensity of the red light peak of the first spectrum, and the red light peak of the second spectrum is displaced a certain distance in the short-wave direction relative to the red light peak of the first spectrum.
- the peak ratio of the blue light peak to the red light peak is 1.8 to 2.8.
- the peak ratio of the blue light peak to the red light peak is 2 to 2.6.
- the peak ratio of the blue light peak to the red light peak is 2.3 to 2.5.
- the color film corresponding to the array substrate shown in FIG4 adjusts the spectral intensity and peak position of green light with the color film corresponding to the array substrate shown in FIG2.
- the spectral intensity of green light of the color film corresponding to the array substrate shown in FIG4 is greater than the spectral intensity of green light of the color film corresponding to the array substrate shown in FIG2, and the peak of green light of the color film corresponding to the array substrate shown in FIG4 is displaced by a certain distance in the long-wave direction relative to the peak of green light of the color film corresponding to the array substrate shown in FIG2.
- the pixel aperture ratio, color film and backlight scheme can be perfectly matched, and the preset white point balance coordinates can be met without ACC.
- the transmittance is about 4.49%, compared with the scheme in which different sub-pixels have the same pixel aperture ratio and require ACC debugging.
- the size difference of the effective light-emitting areas of different color sub-pixels in the array substrate in the first direction can be further increased, and the transmittance can be increased by more than 30%.
- FIG7 is a spectrum diagram of another backlight source.
- the spectrum shown in FIG7 can be the light of the phosphor backlight source.
- the phosphor backlight source may include potassium fluorosilicate (KSF).
- KSF phosphor is a red phosphor.
- the fourth spectrum shown in FIG7 is a spectrum adjusted based on the third spectrum to adapt to the pixel aperture ratio of the present application. The fourth spectrum mainly adjusts the spectral intensity and peak position of the blue light and the green light, and does not adjust the spectrum of the red light.
- the spectrum of the backlight source is adjusted, such as being adjusted to the fourth spectrum shown in Figure 7; at the same time, the spectrum of the color film is adjusted accordingly, and the color film adopts the red light spectrum corresponding to 03R shown in Figure 8, the green light spectrum corresponding to GBA01 and the blue light spectrum corresponding to 100B.
- the fourth spectrum includes a red light peak, a green light peak, and a blue light peak
- the peak ratio of the blue light peak to the red light peak is 0.7 to 0.9
- the peak ratio of the green light peak to the red light peak is 0.15 to 0.28.
- the spectral intensity of the blue light peak of the fourth spectrum is less than the spectral intensity of the blue light peak of the third spectrum
- the blue light peak of the fourth spectrum is displaced a certain distance in the long-wave direction relative to the blue light peak of the third spectrum.
- the spectral intensity of the green light peak of the fourth spectrum is less than the spectral intensity of the green light peak of the third spectrum, and the green light peak of the fourth spectrum is displaced a certain distance in the long-wave direction relative to the green light peak of the third spectrum.
- the fourth spectrum includes a red light peak, a green light peak, and a blue light peak, the peak ratio of the blue light peak to the red light peak is 0.75-0.85, and the peak ratio of the green light peak to the red light peak is 0.18-0.25.
- the fourth spectrum includes a red light peak, a green light peak, and a blue light peak, the peak ratio of the blue light peak to the red light peak is 0.78-0.8, and the peak ratio of the green light peak to the red light peak is 0.2-0.23.
- the pixel aperture ratio By adjusting the pixel aperture ratio, the spectrum of the backlight source, and the spectrum of the color film, the pixel aperture ratio, color film, and backlight solution can be perfectly matched.
- the white point Spec can be met without ACC, and the transmittance can be improved.
- the transmittance is about 4.14%, and the transmittance can be improved by about 30%.
- Fig. 9 is a schematic diagram of a partial structure of an array substrate provided according to another example of an embodiment of the present disclosure.
- Fig. 10 is a schematic diagram of the sub-pixel shown in Fig. 9 before the sub-pixel area size is adjusted.
- Fig. 11 is a schematic diagram of the sub-pixel shown in Fig. 9 after the sub-pixel area size is adjusted.
- the difference between the array substrate shown in FIG. 9 and the array substrate shown in FIG. 1 is that the array substrate shown in FIG. 9 adopts a single-gate (signal gate) design.
- each pixel region 20 includes a first color sub-pixel 110, a second color sub-pixel 120, and a third color sub-pixel 130;
- the pixel electrode 102 of the color sub-pixel 110 has the largest size in the first direction.
- the size of the pixel electrode 102 of the second color sub-pixel 120 is larger than the size of the pixel electrode 102 of the third color sub-pixel 130, and the difference between the pixel electrode 102 of the first color sub-pixel 110 and the pixel electrode 102 of the second color sub-pixel 120 is a first difference, and the difference between the pixel electrode 102 of the second color sub-pixel 120 and the pixel electrode 102 of the third color sub-pixel 130 is a second difference, and the ratio of the first difference to the second difference is 0.9 to 1.1.
- the first difference is the same as the second difference.
- the plurality of data lines 210 are non-uniformly distributed in the first direction, and the plurality of gate lines 220 are uniformly distributed in the second direction.
- the size of the sub-pixel area of each color sub-pixel in the first direction is the same, such as 62 microns.
- the pixel opening rates of the red sub-pixel 110, the green sub-pixel 120 and the blue sub-pixel in the array substrate shown in FIG10 are 11.97%, 16.53% and 14.51% respectively.
- the array substrate shown in FIG10 matches the first spectrum of the backlight source shown in FIG6 and the color film shown in FIG8 (including the red light spectrum corresponding to 03R, the green light spectrum corresponding to G6800 and the blue light spectrum corresponding to 100B), since the ACC debugging is not performed, the emitted white light does not meet the preset white point balance coordinates, so the ACC debugging is required, and the transmittance is 3.74% and 3.30% respectively after the ACC debugging.
- the size of the sub-pixel area of the red sub-pixel 110, the green sub-pixel 120 and the blue sub-pixel 130 in the first direction are 68 microns, 60 microns and 58 microns respectively.
- the pixel opening rates of the red sub-pixel 110, the green sub-pixel 120 and the blue sub-pixel 130 are 13.20%, 15.48% and 13.60% respectively.
- the array substrate shown in FIG11 can perfectly match the first spectrum of the backlight source shown in FIG6 and the color film shown in FIG8 (including the red light spectrum corresponding to 03R, the green light spectrum corresponding to G6800 and the blue light spectrum corresponding to 100B), and the emitted white light can meet the preset white point balance coordinates without ACC debugging.
- the transmittance is 3.61%, which is 9.4% higher than the solution shown in FIG10.
- the array substrate shown in FIG. 11 may adopt a design similar to that of FIG. 3 and FIG. 5 , such as compensating the capacitor Cst to achieve a consistent charging voltage pull of sub-pixels of different colors.
- the array substrate can also achieve further improvement in transmittance by matching the above-mentioned backlight source and color film with other spectrums.
- FIG12 is a schematic diagram of a partial structure of a display device provided according to another embodiment of the present disclosure.
- the display device includes an array substrate 010, an opposing substrate 020, a liquid crystal layer 030, and a backlight source 040.
- the opposing substrate 020 is arranged opposite to the array substrate 010, and the opposing substrate 020 includes a color film 021; the liquid crystal layer 030 is located between the array substrate 010 and the opposing substrate 020; and the backlight source 040 is located on the side of the array substrate 010 away from the liquid crystal layer 030.
- the ratio of the size of the effective light-emitting area of at least two different color sub-pixels in the pixel area in the first direction is 1 to 2 so that the display device does not undergo color temperature correction and adjustment, and the white light emitted by the display device meets the preset white balance coordinates.
- the array substrate included in the display device may be the array substrate in any of the above examples.
- the backlight source included in the display device may be a backlight source having the spectrum shown in Figures 6 to 7, such as a quantum dot backlight source or a fluorescent backlight source.
- the color film included in the display device may be a color film having the spectrum shown in Figure 8.
- the display device provided by the present disclosure can adjust the spectrum of the color film, the spectrum of the backlight source, and the size of the sub-pixel area of the sub-pixel in the first direction so as to increase the transmittance of the display device by at least 10%, such as more than 30%, while satisfying the white balance.
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
本公开提供一种阵列基板以及显示装置。阵列基板包括衬底基板以及位于衬底基板上的多个子像素。多个子像素沿第一方向和第二方向阵列排布,第一方向与第二方向相交。阵列基板包括多个像素区,每个像素区包括沿第一方向排列的不同颜色子像素,不同像素区的面积相同;同一像素区中,至少两个不同颜色子像素的子像素区在第一方向上的尺寸不同,且至少两个不同颜色子像素的子像素区在第一方向上的尺寸之比为1~2,子像素区包括有效出光区。本公开提供的阵列基板通过对不同颜色子像素的子像素区在第一方向上的尺寸之比进行设置,可以使得无需ACC调试即可使得出射光满足要求的白平衡,使得该阵列基板应用于显示装置时透过率可提升至少10%。
Description
本公开实施例涉及一种阵列基板以及显示装置。
目前,液晶显示装置广泛地应用于人们的生活中。大尺寸液晶电视产品对分辨率、白平衡以及透过率等显示特性指标具有越来越高的要求。
发明内容
本公开实施例提供一种阵列基板以及显示装置。
本公开实施例提供的阵列基板包括:衬底基板;多个子像素,位于所述衬底基板上,且沿第一方向和第二方向阵列排布,所述第一方向与所述第二方向相交。所述阵列基板包括多个像素区,每个像素区包括沿所述第一方向排列的不同颜色子像素,不同像素区的面积相同;同一像素区中,至少两个不同颜色子像素的子像素区在所述第一方向上的尺寸不同,且所述至少两个不同颜色子像素的子像素区在所述第一方向上的尺寸之比为1~2,所述子像素区包括有效出光区。
例如,根据本公开实施例,阵列基板还包括:多条数据线,沿所述第一方向排列;以及多条栅线,沿所述第二方向排列。所述多条数据线与所述多条栅线交叉设置以围绕所述多个子像素的有效出光区。
例如,根据本公开实施例,各子像素包括层叠设置的像素电极和公共电极,同一像素区中,所述至少两个不同颜色子像素的像素电极在所述第一方向上的尺寸不同。
例如,根据本公开实施例,所述多条数据线在所述第一方向上非均匀分布,且所述多条栅线在所述第二方向上均匀分布。
例如,根据本公开实施例,所述至少两个不同颜色子像素的像素电极在所述第一方向上的尺寸之比不大于2。
例如,根据本公开实施例,同一像素区中,所述至少两个不同颜色子像素的子像素区在所述第二方向上的尺寸之比为0.9~1.1。
例如,根据本公开实施例,每个像素区包括第一颜色子像素、第二颜色子像素以及第三颜色子像素;同一像素区中,所述第二颜色子像素的子像素区在所述第一方向上的尺寸最大。
例如,根据本公开实施例,所述第二颜色子像素的所述像素电极在所述第一方向上的尺寸最大。
例如,根据本公开实施例,同一像素区中,所述第一颜色子像素的子像素区和所述第三颜色子像素的子像素区在所述第一方向上的尺寸之比为0.9~1.1。
例如,根据本公开实施例,同一像素区中,所述第一颜色子像素的所述像素电极和所述第三颜色子像素的所述像素电极在所述第一方向上的尺寸之比为0.9~1.1。
例如,根据本公开实施例,各子像素还包括晶体管,所述晶体管的第一极与所述像素电极连接;所述阵列基板还包括与所述公共电极电连接的公共电极线,在垂直于所述衬底基板上,各子像素的所述晶体管的第一极与所述公共电极线交叠,所述第二颜色子像素的所述晶体管的第一极与所述公共电极线的交叠面积小于其他颜色子像素的所述晶体管的第一极与所述公共电极线的交叠面积。
例如,根据本公开实施例,同一像素区中,任意两个不同颜色子像素的充电拉动电压δVp之比为0.9~1.1,δVp=[Cgs/(Cgs+Cst+Clc)]*(Vgh-Vgl),Cgs为所述晶体管的第一极与栅极之间的电容,Cst为所述子像素的存储电容,Clc为液晶电容,Vgh为栅线电位上升至高电平的电位,Vgl为栅线电位下降至低电平的电位。
例如,根据本公开实施例,所述公共电极线中与所述晶体管的第一极交叠的第一部分沿所述第二方向延伸,且所述第二颜色子像素的所述晶体管的第一极与所述第一部分的交叠部分在所述第二方向上的尺寸小于其他颜色子像素的所述晶体管的第一极与所述第一部分的交叠部分在所述第二方向上的尺寸。
例如,根据本公开实施例,所述公共电极线的所述第一部分与所述数据线沿所述第一方向交替设置,所述晶体管的第一极与所述数据线同层设置,所述第一部分与所述像素电极同层设置。
例如,根据本公开实施例,所述多个子像素排列为多行多列子像素,位于同一行的子像素沿所述第一方向排列,位于同一列的子像素沿所述第二方向排列,相邻两行子像素之间设置有两条栅线,相邻两条数据线之间设置有两列子
像素;所述公共电极线中位于所述两列子像素之间设置的第二部分与所述栅线同层设置,所述公共电极线的所述第一部分与所述栅线交叠。
例如,根据本公开实施例,所述两条栅线组成栅线对,所述多条栅线包括多个栅线对,所述多个栅线对在所述第二方向上均匀分布。
例如,根据本公开实施例,每个像素区包括第一颜色子像素、第二颜色子像素以及第三颜色子像素;同一像素区中,所述第一颜色子像素的像素电极在所述第一方向上的尺寸最大。
例如,根据本公开实施例,在所述第一方向上,所述第二颜色子像素的像素电极的尺寸大于所述第三颜色子像素的像素电极的尺寸,且所述第一颜色子像素的像素电极与所述第二颜色子像素的像素电极差值为第一差值,所述第二颜色子像素的像素电极与所述第三颜色子像素的像素电极的差值为第二差值,所述第一差值与所述第二差值之比为0.9~1.1。
例如,根据本公开实施例,所述多个子像素排列为多行多列子像素,位于同一行的子像素沿所述第一方向排列,位于同一列的子像素沿所述第二方向排列,相邻两行子像素之间设置有一条栅线,相邻两列子像素之间设置有一条数据线。
例如,根据本公开实施例,所述第一颜色子像素为红色子像素,所述第二颜色子像素为绿色子像素,所述第三颜色子像素为蓝色子像素。
本公开另一实施例提供一种显示装置,包括上述任一阵列基板;对置基板,与所述阵列基板相对设置,且所述对置基板包括彩膜;液晶层,位于所述阵列基板与所述对置基板之间;背光源,位于所述阵列基板远离所述液晶层的一侧。所述像素区中所述至少两个不同颜色子像素的子像素区在所述第一方向上的尺寸之比为1~2以使所述显示装置不经过色温矫正调试而使所述显示装置出射的白光满足预设白平衡坐标。
例如,根据本公开实施例,所述背光源包括量子点材料或者荧光材料。
例如,根据本公开实施例,所述背光源包括量子点材料,所述背光源的光谱包括红光波峰、绿光波峰以及蓝光波峰,所述红光波峰的峰值高于所述绿光波峰的峰值。
例如,根据本公开实施例,所述蓝光波峰的峰值与所述红光波峰的峰值比为1.8~2.8。
例如,根据本公开实施例,所述背光源包括荧光材料,所述背光源的光谱
包括红光波峰、绿光波峰以及蓝光波峰,所述蓝光波峰的峰值与所述红光波峰的峰值比为0.7~0.9,所述绿光波峰与所述红光波峰的峰值比为0.15~0.28。
为了更清楚地说明本公开实施例的技术方案,下面将对实施例的附图作简单地介绍,显而易见地,下面描述中的附图仅仅涉及本公开的一些实施例,而非对本公开的限制。
图1为根据本公开实施例提供的阵列基板的局部结构示意图。
图2为图1所示一示例中的部分子像素以及信号线的示意图。
图3为图2所示子像素以及信号线的局部结构示意图。
图4为图1所示另一示例中的部分子像素以及信号线的示意图。
图5为图4所示子像素以及信号线的局部结构示意图。
图6为图2所示阵列基板应用于显示装置时采用的背光源的光谱与图4所示阵列基板应用于显示装置时采用的背光源的光谱对比图。
图7为另一种背光源的光谱图。
图8为不同彩膜的光谱对比图。
图9为根据本公开实施例的另一示例提供的阵列基板的局部结构示意图。
图10为图9所示子像素在调整子像素区尺寸之前的示意图。
图11为图9所示子像素在调整子像素区尺寸之后的示意图。
图12为根据本公开另一实施例提供的显示装置的局部结构示意图。
为使本公开实施例的目的、技术方案和优点更加清楚,下面将结合本公开实施例的附图,对本公开实施例的技术方案进行清楚、完整地描述。显然,所描述的实施例是本公开的一部分实施例,而不是全部的实施例。基于所描述的本公开的实施例,本领域普通技术人员在无需创造性劳动的前提下所获得的所有其它实施例,都属于本公开保护的范围。
除非另外定义,本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物
件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其他元件或者物件。本公开实施例中使用的“平行”、“垂直”以及“相同”等特征均包括严格意义的“平行”、“垂直”、“相同”等特征,以及“大致平行”、“大致垂直”、“大致相同”等包含一定误差的情况,考虑到测量和与特定量的测量相关的误差(例如,测量系统的限制),表示在本领域的普通技术人员所确定的对于特定值的可接受的偏差范围内。例如,“大致”能够表示在一个或多个标准偏差内,或者在所述值的10%或者5%内。在本公开实施例的下文中没有特别指出一个成分的数量时,意味着该成分可以是一个也可以是多个,或可理解为至少一个。“至少一个”指一个或多个,“多个”指至少两个。本公开中所称的“同层设置”是指两种(或两种以上)结构通过同一道沉积工艺形成并通过同一道构图工艺得以图案化而形成的结构,它们的材料可以相同或不同。本公开中的“一体化设置的结构”是指两种(或两种以上)结构通过同一道沉积工艺形成并通过同一道构图工艺得以图案化而形成的彼此连接的结构,它们的材料可以相同或不同。
在研究中,本申请的发明人发现,随着电视(TV)产品对分辨率的要求越来越高,产品的透过率面临很大挑战。基于具有8K分辨率以及65寸屏幕为显示装置为例,考虑在某一种或两种颜色子像素周围设置隔离柱(PS)后,红色子像素、绿色子像素以及蓝色子像素的开口率差异较大,对显示面板进行色温矫正(Accurate Color Capture,ACC)调试后透过率(Tr)损失较大。如上述8K分辨率产品的像素结构设计中,红色子像素、绿色子像素以及蓝色子像素各自所在的子像素区(即像素点,dot)在行方向上的尺寸相同,如各子像素的原开口率可以定义为有效出光区面积与子像素区的面积的比值,各子像素的原开口率设置无法完美匹配彩膜和背光的特性,显示面板需要经过ACC调试后才能符合预设白平衡坐标,如特定值(x=0.28,y=0.29),此时透过率损失较大。此外,受色域等规格参数限制,上述各子像素区在行方向上尺寸相同的像素结构无法使用某些高透彩膜,导致显示面板的透过率的提升受限。
为了使不同灰阶具有同样的色彩表现力,需要进行ACC调试,使得色彩分布更加均匀。ACC是根据要求对色温进行校正,使画面更为自然。面板一般在伽马(Gamma)曲线调整好后,再采用ACC调试来更细腻化地微调色坐标与Gamma,通过不同灰阶下红绿蓝(RGB)的配比使色温和Gamma曲线达到要求。
本公开提供一种阵列基板以及显示装置。阵列基板包括衬底基板以及位于
衬底基板上的多个子像素。多个子像素沿第一方向和第二方向阵列排布,第一方向与第二方向相交。阵列基板包括多个像素区,每个像素区包括沿第一方向排列的不同颜色子像素,不同像素区的面积相同;同一像素区中,至少两个不同颜色子像素的子像素区在第一方向上的尺寸不同,且至少两个不同颜色子像素的子像素区在第一方向上的尺寸之比为1~2,子像素区包括有效出光区。本公开提供的阵列基板通过对不同颜色子像素的子像素区在第一方向上的尺寸之比进行设置,可以使得包括阵列基板的显示装置无需ACC调试即可使得出射光满足要求的白平衡,使得该阵列基板应用于显示装置时透过率可提升至少10%。
下面结合附图对本公开实施例提供的阵列基板以及显示装置进行描述。
图1为根据本公开实施例提供的阵列基板的局部结构示意图。图2为图1所示一示例中的部分子像素以及信号线的示意图。图3为图2所示子像素以及信号线的局部结构示意图。
如图1至图3所示,阵列基板包括衬底基板10以及位于衬底基板10上的多个子像素100。多个子像素100沿第一方向和第二方向阵列排布,第一方向与第二方向相交。例如,第一方向可以为图1所示X方向,第二方向可以为图1所示Y方向,第一方向与第二方向可以互换。例如,第一方向与第二方向之间的夹角可以为80~100度。例如,第一方向与第二方向之间的夹角可以为85~95度。例如,第一方向与第二方向垂直。例如,第一方向可以为行方向,第二方向可以为列方向。
例如,多个子像素100所在的区域可以为阵列基板中用于显示图像的显示区,阵列基板还包括围绕显示区的周边区。
如图1至图3所示,阵列基板包括多个像素区20,每个像素区20包括沿第一方向排列的不同颜色子像素100,不同像素区20的面积相同。例如,多个像素区20可以沿第一方向和第二方向阵列排布。例如,不同像素区20包括的子像素100的数量相同,如三个不同颜色子像素100。例如,每个子像素100所在区域可以为子像素区1001,即像素点dot,每个像素区20包括多个子像素区1001,如每个像素区20的面积可以为其包括的多个子像素区1000的面积和,像素区20的面积可以设置为一定值。例如,像素区20的总像素开口率可以为子像素100的有效出光区面积和与像素区20的面积比,各子像素100的像素开口率可以为各子像素100的有效出光区101的面积与像素区20的面积
比。这里的像素开口率的定义不同于前述原开口率的定义。上述有效出光区101可以为图2所示黑色方框示出的区域,有效出光区101以外的区域设置有黑矩阵1002。子像素区1001包括有效出光区101以及围绕有效出光区101的非出光区,非出光区与黑矩阵正对。上述有效出光区指子像素的开口区,如光能够透过子像素的开口区。
如图1至图3所示,同一像素区20中,至少两个不同颜色子像素100的子像素区1001在第一方向上的尺寸不同,且至少两个不同颜色子像素100的子像素区1001在第一方向上的尺寸之比为1~2。例如,至少两个不同颜色子像素100的子像素区1001在第一方向上的尺寸之比为1.01~1.99,或者1.1~1.7,或者1.2~1.9,或者1.3~1.5,或者1.4~1.8等。
例如,如图1至图3所示,同一像素区20中,至少两个不同颜色子像素100的有效出光区101在第一方向上的尺寸不同,且至少两个不同颜色子像素100的有效出光区101在第一方向上的尺寸之比为1~2。例如,至少两个不同颜色子像素100的有效出光区101在第一方向上的尺寸之比为1.01~1.99,或者1.1~1.7,或者1.2~1.9,或者1.3~1.5,或者1.4~1.8等。
例如,不同颜色子像素的子像素区在第一方向上的尺寸均相同的情况下,各颜色子像素的像素开口率设置不能完美匹配彩膜和背光的特性,导致白点坐标(x,y)不符合预设的白平衡坐标(x=0.28,y=0.29),由此需要对显示面板进行ACC调试以调整上述白点坐标,使其满足预设的白平衡坐标(Spec),该过程将导致显示面板的透过率降低。通过模拟可得,白点坐标(x,y)的变化与红色子像素的像素开口率、绿色子像素的像素开口率以及蓝色子像素的像素开口率的大小存在一定的规律性:(1)若蓝色子像素的像素开口率减小,白点坐标(x,y)均增大;若蓝色子像素的像素开口率增大,则白点坐标(x,y)均减小;(2)若绿色子像素的像素开口率减小,主要使得y减小,而x也会有很小幅度的减小;绿色子像素的像素开口率增大,主要影响y增大,而x也会有很小幅度的增大;(3)若红色子像素的像素开口率减小,主要影响x减小,而y也会有很小幅度的减小;红色子像素的像素开口率增大,主要影响x增大,而y也会有很小幅度的增大。按照这个规律,保证总像素开口率不变,不同子像素区的长度不变(如子像素区在列方向上的尺寸),通过改变不同子像素区的宽度(如子像素区在行方向上的尺寸),进行子像素区宽度差异化设计,使得不同子像素区宽度之比在1~2之间,如可根据背光和彩膜的特性,重新分配红色子像素、绿色子像
素以及蓝色子像素各自的像素开口率大小,使其完美匹配任何彩膜和背光方案,不需要ACC调试,就可以将白点坐标调整到Spec值,有利于实现透过率的最大化,例如透过率可提升10%。
相对于不同颜色子像素的子像素区在第一方向上尺寸均相同的情况,本公开通过将不同颜色子像素的子像素区在第一方向上的尺寸设置为不同,且设置在1~2之间,可以使得该阵列基板无需ACC调试即可使得出射光满足要求的白平衡,使得该阵列基板应用于显示装置时透过率可提升至少10%。该阵列基板可以有效解决8k分辨率的电视产品在面板进行ACC后透过率损失较大的问题。
在一些示例中,如图1至图3所示,阵列基板还包括沿第一方向排列的多条数据线210以及沿第二方向排列的多条栅线220。多条数据线210与多条栅线220交叉设置以围绕多个子像素100的有效出光区101。
在一些示例中,如图1至图3所示,多个子像素100排列为多行多列子像素100,位于同一行的子像素100沿第一方向排列,位于同一列的子像素100沿第二方向排列,相邻两行子像素100之间设置有两条栅线220,相邻两条数据线210之间设置有两列子像素100。
在一些示例中,如图1至图3所示,两条栅线220组成栅线对222,多条栅线220包括多个栅线对222。
在一些示例中,如图1至图3所示,各子像素100包括层叠设置的像素电极102和公共电极103。例如,像素电极102和公共电极103之一可以为板状电极,另一个可以包括狭缝电极,如包括多个条状电极。
在一些示例中,如图1至图3所示,阵列基板还包括与公共电极103电连接的公共电极线230。例如,阵列基板包括多条公共电极线230,多条公共电极线230与多条数据线210沿第一方向交替排列。
例如,如图1至图3所示,上述各子像素100的子像素区可以为公共电极线230的中心线、数据线210的中心线以及栅线对222的中心线围绕的区域。
上述限定以双栅(dual gate)结构为例进行描述,但不限于此,对于单栅(signal gate)结构(如图9所示),上述各子像素的子像素区可以为数据线的中心线与栅线的中心线围绕的区域。
上述数据线、公共电极线和栅线称为信号线,在信号线为直线时,中心线为信号线的中心线;在信号线为弯折线时,中心线可以为经过弯折线的距离最
远的两条边缘之间连线的中点的线,这两条边缘沿该弯折线的整体延伸方向延伸。
在一些示例中,如图1至图3所示,多条数据线210在第一方向上非均匀分布,多个栅线对222在第二方向上均匀分布。例如,多条公共电极线230在第一方向上非均匀分布。通过对数据线、公共电极线和栅线对的位置关系的设置可以实现各像素区中子像素的子像素区的尺寸的调节。
在一些示例中,如图1至图3所示,同一像素区20中,至少两个不同颜色子像素100的子像素区1001在第二方向上的尺寸之比为0.9~1.1。例如,不同颜色子像素100的子像素区1001在第二方向上的尺寸可以相等。
例如,显示屏幕尺寸和分辨率决定各像素区20在第一方向上的尺寸和在第二方向上的尺寸均为定值,由于像素区20在第二方向上仅设置一个子像素100,像素区20在第一方向上设置多个子像素100,因此子像素100的子像素区在第二方向上的尺寸不变,通过调节不同子像素区在第一方向上的尺寸实现无需ACC调试即可使得出射光满足要求的白平衡,以提高该阵列基板应用于显示装置时的透过率。
在一些示例中,如图1至图3所示,同一像素区20中,至少两个不同颜色子像素100的像素电极102在第一方向上的尺寸不同,以适应不同子像素区在第一方向上的不同尺寸。
在一些示例中,如图1至图3所示,同一像素区20中,至少两个不同颜色子像素100的像素电极102在第一方向上的尺寸之比不大于2。例如,至少两个不同颜色子像素100的像素电极102在第一方向上的尺寸之比可以为1.01~1.99,或者1.1~1.5,或者1.2~1.9,或者1.3~1.7,或者1.4~1.8等。例如,不同颜色子像素100的像素电极102在第一方向上的尺寸之比与该不同颜色子像素100所在子像素区1001在第一方向上的尺寸之比可以相同,也可以不同,如两者不同,两者差值与其一的比例不大于10%。
在一些示例中,如图1至图3所示,每个像素区20包括第一颜色子像素110、第二颜色子像素120以及第三颜色子像素130;同一像素区20中,第二颜色子像素120的子像素区1001在第一方向上的尺寸最大。例如,第二颜色子像素120的有效出光区101在第一方向上的尺寸最大。
第二颜色子像素可以为对阵列基板透过率影响最大的子像素,通过将第二颜色子像素的子像素区的面积设置为大于其他颜色子像素的子像素区的面积,
有利于提高阵列基板的透过率。
例如,如图1至图3所示,第二颜色子像素120的像素开口率最大。
在一些示例中,如图1至图3所示,第二颜色子像素120的像素电极102在第一方向上的尺寸最大。
相对于各颜色子像素的子像素区在第一方向上尺寸(如宽度)均相同的情况,本公开提供的阵列基板中像素区在第一方向上的尺寸不变,通过将第二颜色子像素的子像素区的宽度设置较大的同时,将第一颜色子像素和第三颜色子像素的子像素区的宽度设置较小,可以实现无需ACC调试即可使得出射光满足要求的白平衡,以提高该阵列基板应用于显示装置时的透过率。
在一些示例中,如图1至图3所示,同一像素区20中,第一颜色子像素110的子像素区1001和第三颜色子像素130的子像素区1001在第一方向上的尺寸之比为0.9~1.1。例如,第一颜色子像素110的子像素区1001和第三颜色子像素130的子像素区1001在第一方向上的尺寸可以相同,有利于方便后续充电拉动电压的调节补偿。
例如,如图2所示,第二颜色子像素120的子像素区1001和第一颜色子像素110的子像素区1001在第一方向上的尺寸之比可以为1.13。
在一些示例中,如图1至图3所示,同一像素区20中,第一颜色子像素110的像素电极102和第三颜色子像素130的像素电极102在第一方向上的尺寸之比为0.9~1.1。例如,第一颜色子像素110的像素电极102和第三颜色子像素130的像素电极102在第一方向上的尺寸可以相同。
例如,如图1至图3所示,同一像素区20中,第一颜色子像素110的子像素区和第三颜色子像素130的有效出光区在第一方向上的尺寸之比为0.9~1.1。例如,同一像素区20中,第一颜色子像素110的子像素区和第三颜色子像素130的有效出光区在第一方向上的尺寸相同。
在一些示例中,如图1至图3所示,第一颜色子像素110为红色子像素,第二颜色子像素120为绿色子像素,第三颜色子像素130为蓝色子像素。当然,本公开实施例不限于此,第一颜色子像素和第三颜色子像素的颜色可以互换。本公开实施例示意性的以第二颜色子像素为绿色子像素,但不限于此,第二颜色子像素也可以是其他对阵列基板透过率影响最大的子像素,也可以是功耗最大的子像素,或者人眼最敏感的子像素等需要将开口率设置较大的子像素。
例如,如图1至图3所示,红色子像素(R)和蓝色子像素(B)的子像素
区1001在第一方向上的尺寸(图中黑色箭头标注的尺寸)可以均为59.45微米,绿色子像素(G)的子像素区1001在第一方向上的尺寸(图中黑色箭头标注的尺寸)可以为67.09微米。
图3所示阵列基板对应的各颜色子像素的子像素区在第一方向上尺寸(如宽度)均相同的情况下,红色子像素的像素开口率、绿色子像素的像素开口率以及蓝色子像素的像素开口率分别为13.86%、13.86%和13.86%,阵列基板透过率在ACC调试前后分别为3.31%和3.18%,下降了4%。采用图3提供的方案将同一像素区内的不同颜色子像素的像素开口率重新设置后得到红色子像素的像素开口率、绿色子像素的像素开口率以及蓝色子像素的像素开口率分别为13.13%、15.26%和13.17%,可完美匹配彩膜和背光的特性,不需要ACC调试即可符合预设白点平衡坐标,此时透过率约为3.50%,相比上述经过ACC调试后的透过率可提升10.1%。
上述像素开口率重置前后的彩膜和背光没有改变,如彩膜采用图8所示03R对应的红光光谱,G6800对应的绿光光谱以及100B对应的蓝光光谱,背光采用量子点背光源,该量子点背光源的光谱如图6所示第一光谱。
在一些示例中,如图1至图3所示,各子像素100还包括晶体管140,晶体管140的第一极141与像素电极102连接。例如,晶体管140包括第二极142以及控制极143,晶体管140的第二极142与数据线210连接,晶体管140的控制极143与栅线220连接。
在一些示例中,如图1至图3所示,在垂直于衬底基板10上,各子像素100的晶体管140的第一极141与公共电极线230交叠,第二颜色子像素120的晶体管140的第一极141与公共电极线230的交叠面积小于其他颜色子像素的晶体管140的第一极141与公共电极线230的交叠面积。例如,其他颜色子像素可以为红色子像素和蓝色子像素。例如,第一颜色子像素110的晶体管140的第一极141与公共电极线230的交叠面积与第三颜色子像素130的晶体管140的第一极141与公共电极线230的交叠面积相等。
例如,相对于各子像素的子像素区在第一方向上尺寸相同的情况,本公开提供的阵列基板中将红色子像素和蓝色子像素中晶体管第一极与公共电极线交叠面积增加以实现绿色子像素的上述交叠面积小于其他颜色子像素的上述交叠面积。
例如,红色子像素中晶体管的上述交叠面积与绿色子像素的上述交叠面积
之比为2~2.5。
例如,各子像素的充电拉动电压δVp=[Cgs/(Cgs+Cst+Clc)]*(Vgh-Vgl),Cgs为晶体管的第一极(如源极)与栅极之间的电容,Cst为子像素的存储电容,Clc为液晶电容,Vgh为栅线电位上升至高电平的电位,Vgl为栅线电位下降至低电平的电位。存储电容指像素电极和公共电极之间的电容,像素电极与公共电极之间形成的侧向电场经过液晶形成了上述液晶电容。
上述充电拉动电压可以指在时段T1开始时,栅线电位上升至Vgh,晶体管打开,数据线上传输的正极性电压数据Vp为液晶电容和存储电容进行充电;时段T1终了时,栅线电位下降至低电平Vgl,在晶体管关闭的瞬间,正极性电压数据Vp下降δVp,δVp与上述三个电容值有关。δVp的值不能太大,不同颜色子像素的δVp差异不能太大。
当不同颜色子像素的子像素区在第一方向上的尺寸设置为不同时,不同颜色子像素的存储电容存在差异,进而导致不同颜色子像素的充电拉动电压不同,容易出现闪屏风险,需要进行Cgs和Cst的补偿设计。
通过将子像素区尺寸较大的第二颜色子像素中晶体管的第一极与公共电极线的交叠面积设置为小于其他颜色子像素的晶体管的第一极与公共电极线的交叠面积,有利于提高其他颜色子像素的存储电容,降低其他颜色子像素充电拉动电压,在版图空间允许的情况下,既能尽量降低δVp的值,还可以使得不同颜色子像素的充电拉动电压基本保持一致,避免出现闪屏风险。
在一些示例中,如图1至图3所示,同一像素区20中,任意两个不同颜色子像素100的充电拉动电压δVp之比为0.9~1.1。例如,任意两个不同颜色子像素100的充电拉动电压δVp相同。
例如,在补偿前,红色子像素的充电拉动电压δVp为2.58V,绿色子像素的充电拉动电压δVp为1.83V,蓝色子像素的充电拉动电压δVp为2.58V;补偿后,红色子像素的充电拉动电压δVp为1.83V,绿色子像素的充电拉动电压δVp为1.83V,蓝色子像素的充电拉动电压δVp为1.83V。通过将红色子像素和蓝色子像素的充电拉动电压δVp下调为与绿色子像素的充电拉动电压δVp,可以在实现各子像素充电拉动电压δVp达到一致以避免出现闪屏风险的同时,尽量降低充电拉动电压,降低栅线电压开关对子像素的影响。例如,充电拉动电压在补偿前后的差异约为29%。
对不同颜色子像素的子像素区在第一方向上的尺寸调节容易导致不同子
像素的充电拉动电压不一致而导致闪屏问题的发生,虽然可以通过对晶体管的第一极与公共电极线的交叠面积进行设置以缓解充电拉动电压不一致的问题,但是考虑到版图空间的限制,调节交叠面积以调节充电拉动电压的差异需要保证在一定比例以内,如35%以内,否则将出现不同颜色子像素的充电拉动电压难以补偿到一致的问题。因此,在调节不同颜色子像素的子像素区在第一方向上的尺寸比例时,还需要考虑充电拉动电压在补偿前后的差异应保证在一定比例以内。
在一些示例中,如图1至图3所示,公共电极线230中与晶体管140的第一极141交叠的第一部分沿第二方向延伸,公共电极线230中位于两列子像素100之间设置的第二部分与栅线220同层设置,公共电极线230的第一部分与栅线220交叠。例如,公共电极线230的第一部分可以与像素电极102同层设置。
在一些示例中,如图1至图3所示,公共电极线230的第一部分与数据线210沿第一方向交替设置,晶体管140的第一极141与数据线210同层设置,公共电极线230的第一部分与像素电极102同层设置。
通过对公共电极线、数据线、晶体管的第一极以及栅线的层叠关系进行设置以防止公共电极线与栅线、晶体管的第一极出现干涉。
在一些示例中,如图1至图3所示,第二颜色子像素120的晶体管140的第一极141与公共电极线230的第一部分的交叠部分在第二方向上的尺寸小于其他颜色子像素的晶体管140的第一极141与公共电极线230的第一部分的交叠部分在第二方向上的尺寸。通过对不同子像素的晶体管的第一极中与公共电极线交叠的部分在第二方向上的尺寸进行设置,以实现对两者交叠面积的调节。
图4为图1所示另一示例中的部分子像素以及信号线的示意图。图5为图4所示子像素以及信号线的局部结构示意图。图6为图2所示阵列基板应用于显示装置时采用的背光源的光谱与图4所示阵列基板应用于显示装置时采用的背光源的光谱对比图。图7为另一种背光源的光谱图。图8为不同彩膜的光谱对比图。
图6所示光谱可以为量子点(Quantum dot,QD)背光源的光谱,图7所示光谱可以为荧光背光源的光谱。
例如,背光源中可以包括发光芯片,该发光芯片发出第一颜色光,量子点的材料或者荧光材料受到第一颜色光的激发而发射其他颜色的光。例如,背光
源中可以包括多种量子点材料,发光芯片发出蓝光,不同量子点材料受到蓝光的激发而发射红光和绿光以形成白光。
图4所示示例中的阵列基板与图2所示阵列基板的区别在于各颜色子像素的子像素区在第一方向上的尺寸不同,例如,图4所示阵列基板中不同颜色子像素的子像素区在第一方向上的尺寸差异化大于图2所示阵列基板中不同颜色子像素的子像素区在第一方向上的尺寸差异化。
例如,如图1至图5所示,像素区20在第一方向上的尺寸可以为一定值,如约186微米。例如,如图4所示,红色子像素(R)和蓝色子像素(B)的子像素区在第一方向上的尺寸可以均为50.65微米,绿色子像素(G)的有子像素区在第一方向上的尺寸可以为84.7微米。
例如,图2和图4所示阵列基板均可以应用于具有65寸显示屏幕的显示装置。
与图2所示阵列基板相比,图4所示阵列基板中在像素区20在第一方向上的尺寸一定的情况下,绿色子像素的子像素区在第一方向上的尺寸调整变大的同时,蓝色子像素和红色子像素的子像素区在第一方向上的尺寸调整变小。
例如,如图4和图5所示,第二颜色子像素120的子像素区和第一颜色子像素110的子像素区在第一方向上的尺寸之比可以为1.67。
与图2所示阵列基板相似,图4和图5所示阵列基板中子像素区尺寸的设置方式也会导致不同颜色子像素的存储电容存在差异,进而导致不同子像素的充电拉动电压不同,容易出现闪屏风险,需要进行Cgs和Cst的补偿设计。
例如,如图4和图5所示,第二颜色子像素120的晶体管140的第一极141与公共电极线230的交叠面积小于其他颜色子像素的晶体管140的第一极141与公共电极线230的交叠面积。例如,其他颜色子像素可以为红色子像素和蓝色子像素。例如,第一颜色子像素110的晶体管140的第一极141与公共电极线230的交叠面积与第三颜色子像素130的晶体管140的第一极141与公共电极线230的交叠面积相等。
通过将子像素区在第一方向上尺寸较大的第二颜色子像素中晶体管的第一极与公共电极线的交叠面积设置为小于其他颜色子像素的晶体管的第一极与公共电极线的交叠面积,有利于提高其他颜色子像素的存储电容,降低充电拉动电压,以使得不同颜色子像素的充电拉动电压基本保持一致,避免出现闪屏风险。
例如,在补偿前,红色子像素的充电拉动电压δVp为3.829V,绿色子像素的充电拉动电压δVp为2.48V,蓝色子像素的充电拉动电压δVp为3.829V;补偿后,红色子像素的充电拉动电压δVp为2.829V,绿色子像素的充电拉动电压δVp为2.829V,蓝色子像素的充电拉动电压δVp为2.829V。通过将红色子像素和蓝色子像素的充电拉动电压δVp下调为2.829V,且将绿色子像素的充电拉动电压δVp上调为2.829V,可以在实现各子像素充电拉动电压δVp达到一致以避免出现闪屏风险的同时,尽量降低充电拉动电压。例如,红色子像素和蓝色子像素的充电拉动电压在补偿前后的差异约为26%,绿色子像素的充电拉动电压在补偿前后的差异约为14%。
对不同颜色子像素的子像素区在第一方向上的尺寸调节容易导致不同子像素的充电拉动电压不一致而导致闪屏问题的发生,虽然可以通过对晶体管的第一极与公共电极线的交叠面积进行设置以缓解充电拉动电压不一致的问题,但是考虑到版图空间的限制,调节交叠面积以调节充电拉动电压的差异需要保证在一定比例以内,如35%以内,否则将出现不同颜色子像素的充电拉动电压难以补偿到一致的问题。因此,在调节不同颜色子像素的子像素区在第一方向上的尺寸比例时,还需要考虑充电拉动电压在补偿前后的差异应保证在一定比例以内。
例如,如图3所示阵列基板中的绿色子像素120的晶体管140的第一极141的与公共电极线230交叠部分在第二方向上的尺寸为第一宽度,图5所示阵列基板中的绿色子像素120的晶体管140的第一极141的与公共电极线230交叠部分在第二方向上的尺寸为第二宽度,第一宽度大于第二宽度。图3所示阵列基板中的蓝色子像素130的晶体管140的第一极141的与公共电极线230交叠部分在第二方向上的尺寸为第三宽度,图5所示阵列基板中的蓝色子像素130的晶体管140的第一极141的与公共电极线230交叠部分在第二方向上的尺寸为第四宽度,第三宽度小于第四宽度。
图5所示阵列基板对应的各颜色子像素的子像素区在第一方向上尺寸(如宽度)均相同的情况下,红色子像素的像素开口率、绿色子像素的像素开口率以及蓝色子像素的像素开口率分别为13.86%、13.86%和13.86%,阵列基板透过率在ACC调试前后分别为3.31%和3.18%,下降了4%。
采用图5提供的方案将同一像素区内的不同颜色子像素的像素开口率重新设置后得到红色子像素的像素开口率、绿色子像素的像素开口率以及蓝色子像
素的像素开口率分别为10.78%、20.00%和10.78%,上述各颜色子像素的像素开口率匹配图6所示背光源的第二光谱以及图8所示彩膜的光谱,如该彩膜采用图8所示03R对应的红光光谱,46G对应的绿光光谱以及100B对应的蓝光光谱。
例如,图4所示阵列基板对应的背光源采用的图6所示第二光谱相对于图2所示阵列基板对应的背光源采用的第一光谱调整了红光、绿光以及蓝光的光谱强度以及波峰位置。例如,如图6所示第二光谱,背光源的第二光谱包括红光波峰、绿光波峰以及蓝光波峰,红光波峰的峰值高于绿光波峰的峰值。上述波峰的峰值即为图6所示光谱强度。例如,第一光谱与第二光谱中,蓝光波峰的光谱强度相当,第二光谱的蓝光波峰的相对于第一光谱的蓝光波峰向长波方向位移一定距离。例如,第二光谱的绿光波峰的光谱强度小于第一光谱的绿光波峰的光谱强度,且第二光谱的绿光波峰相对于第一光谱的绿光波峰向短波方向位移一定距离。例如,第二光谱的红光波峰的光谱强度大于第一光谱的红光波峰的光谱强度,且第二光谱的红光波峰相对于第一光谱的红光波峰向短波方向位移一定距离。例如,蓝光波峰的峰值与红光波峰的峰值比为1.8~2.8。例如,蓝光波峰的峰值与红光波峰的峰值比为2~2.6。例如,蓝光波峰的峰值与红光波峰的峰值比为2.3~2.5。
例如,图4所示阵列基板对应的彩膜与图2所示阵列基板对应的彩膜调整了绿光的光谱强度和波峰位置。例如,如图8所示,图4所示阵列基板对应的彩膜的绿光的光谱强度大于图2所示阵列基板对应的彩膜的绿光的光谱强度,图4所示阵列基板对应的彩膜的绿光的波峰相对于图2所示阵列基板对应的彩膜的绿光的峰值向长波方向位移一定距离。
通过上述背光光谱和彩膜光谱的调整,可使像素开口率、彩膜和背光方案完美匹配,不需要ACC即可符合预设白点平衡坐标,透过率约为4.49%,相比不同子像素的像素开口率相同且需要进行ACC调试后的方案,图4所示阵列基板结合图6所示背光源的第二光谱特征以及图8所示包括46G对应的绿光光谱的彩膜后,透过率可提升约41%。
由此,在满足色域等其他规格的前提下,结合调整后的背光以及调整后的彩膜,可进一步增加阵列基板中不同颜色子像素的有效出光区在第一方向上的尺寸差异,此时透过率可以提升30%以上。
图7为另一种背光源的光谱图。图7所示光谱可以为荧光粉背光源的光
谱。例如,荧光粉背光源可以包括氟硅酸钾(KSF)。KSF荧光粉为红色荧光粉。图7所示第四光谱为在第三光谱的基础上为适应本申请的像素开口率而调整的光谱,第四光谱中主要调整了蓝光和绿光的光谱强度以及波峰位置,没有调整红光的光谱。
基于图5所示阵列基板中红色子像素的像素开口率、绿色子像素的像素开口率以及蓝色子像素的像素开口率分别为10.78%、20.00%和10.78%的情况,通过对背光源的光谱进行调整,如调整为图7所示第四光谱;同时,对彩膜的光谱进行了相应调整,该彩膜采用图8所示03R对应的红光光谱,GBA01对应的绿光光谱以及100B对应的蓝光光谱。
例如,如图7所示,第四光谱包括红光波峰、绿光波峰以及蓝光波峰,所述蓝光波峰的峰值与所述红光波峰的峰值比为0.7~0.9,所述绿光波峰与所述红光波峰的峰值比为0.15~0.28。例如,第四光谱的蓝光波峰的光谱强度小于第三光谱的蓝光波峰的光谱强度,第四光谱的蓝光波峰相对于第三光谱的蓝光波峰向长波方向位移一定距离。例如,第四光谱的绿光波峰的光谱强度小于第三光谱的绿光波峰的光谱强度,第四光谱的绿光波峰相对于第三光谱的绿光波峰向长波方向位移一定距离。
例如,第四光谱包括红光波峰、绿光波峰以及蓝光波峰,所述蓝光波峰的峰值与所述红光波峰的峰值比为0.75~0.85,所述绿光波峰与所述红光波峰的峰值比为0.18~0.25。例如,第四光谱包括红光波峰、绿光波峰以及蓝光波峰,所述蓝光波峰的峰值与所述红光波峰的峰值比为0.78~0.8,所述绿光波峰与所述红光波峰的峰值比为0.2~0.23。
通过对像素开口率、背光源的光谱以及彩膜的光谱进行调节,可以使像素开口率、彩膜和背光方案完美匹配,不需要ACC即可符合白点Spec,实现透过率的提升,如该透过率约为4.14%,透过率可提升约30%。
图9为根据本公开实施例的另一示例提供的阵列基板的局部结构示意图。图10为图9所示子像素在调整子像素区尺寸之前的示意图。图11为图9所示子像素在调整子像素区尺寸之后的示意图。
图9所示阵列基板与图1所示阵列基板的不同之处在于图9所示阵列基板采用单栅(signal gate)设计。
在一些示例中,如图9至图11所示,每个像素区20包括第一颜色子像素110、第二颜色子像素120以及第三颜色子像素130;同一像素区20中,第一
颜色子像素110的像素电极102在第一方向上的尺寸最大。
在一些示例中,如图9至图11所示,在第一方向上,第二颜色子像素120的像素电极102的尺寸大于第三颜色子像素130的像素电极102的尺寸,且第一颜色子像素110的像素电极102与第二颜色子像素120的像素电极102差值为第一差值,第二颜色子像素120的像素电极102与第三颜色子像素130的像素电极102的差值为第二差值,第一差值与第二差值之比为0.9~1.1。例如,第一差值与第二差值相同。
在一些示例中,如图9至图11所示,多条数据线210在第一方向上非均匀分布,且多条栅线220在第二方向上均匀分布。
例如,如图10所示,在对各颜色子像素的子像素区在第一方向上的尺寸进行调整之前,各颜色子像素的子像素区在第一方向上的尺寸(如图10所示黑色双箭头标注的尺寸)均相同,如均为62微米。图10所示阵列基板中红色子像素110、绿色子像素120以及蓝色子像素的像素开口率分别为11.97%、16.53%和14.51%。在图10所示阵列基板匹配图6所示背光源的第一光谱以及图8所示彩膜(包括03R对应的红光光谱,G6800对应的绿光光谱以及100B对应的蓝光光谱)后,由于不进行ACC调试会导致出射的白光不符合预设白点平衡坐标,因此需要进行ACC调试,透光率在ACC调试后分别为3.74%和3.30%。
例如,如图11所示,在对各颜色子像素的子像素区在第一方向上的尺寸进行调整后,红色子像素110、绿色子像素120以及蓝色子像素130的子像素区在第一方向上的尺寸(图中所示黑色双箭头标注)分别为68微米、60微米以及58微米。红色子像素110、绿色子像素120以及蓝色子像素130的像素开口率分别为13.20%、15.48%和13.60%,图11所示阵列基板可以完美匹配图6所示背光源的第一光谱以及图8所示彩膜(包括03R对应的红光光谱,G6800对应的绿光光谱以及100B对应的蓝光光谱),而无需ACC调试即可使得出射的白光符合预设白点平衡坐标,此时透过率为3.61%,相对于图10所示方案提升9.4%。
例如,图11所示阵列基板中可以采用与上述图3和图5相似的设计,如对电容Cst进行补偿以实现不同颜色子像素的充电电压拉动的一致。
例如,如图11所示阵列基板也可以通过匹配上述具有其他光谱的背光源以及彩膜而实现透过率的进一步提升。
图12为根据本公开另一实施例提供的显示装置的局部结构示意图。如图12所示,显示装置包括阵列基板010、对置基板020、液晶层030以及背光源040。对置基板020与阵列基板010相对设置,且对置基板020包括彩膜021;液晶层030位于阵列基板010与对置基板020之间;背光源040位于阵列基板010远离液晶层030的一侧。像素区中至少两个不同颜色子像素的有效出光区在第一方向上的尺寸之比为1~2以使显示装置不经过色温矫正调试而使显示装置出射的白光满足预设白平衡坐标。
该显示装置包括的阵列基板可以采用上述任一示例中的阵列基板。该显示装置包括的背光源可以采用具有上述图6至图7所示光谱的背光源,如量子点背光源或者荧光背光源。该显示装置包括的彩膜可以采用具有上述图8所述光谱的彩膜。
本公开提供的显示装置可以通过对彩膜的光谱、背光源的光谱以及子像素的子像素区在第一方向上的尺寸进行调节以在满足白平衡的基础上,使得显示装置的透过率提高至少10%,如提高30%以上。
有以下几点需要说明:
(1)本公开的实施例附图中,只涉及到与本公开实施例涉及到的结构,其他结构可参考通常设计。
(2)在不冲突的情况下,本公开的同一实施例及不同实施例中的特征可以相互组合。
以上所述仅是本公开的示范性实施方式,而非用于限制本公开的保护范围,本公开的保护范围由所附的权利要求确定。
Claims (25)
- 一种阵列基板,包括:衬底基板;多个子像素,位于所述衬底基板上,且沿第一方向和第二方向阵列排布,所述第一方向与所述第二方向相交;其中,所述阵列基板包括多个像素区,每个像素区包括沿所述第一方向排列的不同颜色子像素,不同像素区的面积相同;同一像素区中,至少两个不同颜色子像素的子像素区在所述第一方向上的尺寸不同,且所述至少两个不同颜色子像素的子像素区在所述第一方向上的尺寸之比为1~2,所述子像素区包括有效出光区。
- 根据权利要求1所述的阵列基板,还包括:多条数据线,沿所述第一方向排列;以及多条栅线,沿所述第二方向排列,其中,所述多条数据线与所述多条栅线交叉设置以围绕所述多个子像素的有效出光区。
- 根据权利要求2所述的阵列基板,其中,各子像素包括层叠设置的像素电极和公共电极,同一像素区中,所述至少两个不同颜色子像素的像素电极在所述第一方向上的尺寸不同。
- 根据权利要求2或3所述的阵列基板,其中,所述多条数据线在所述第一方向上非均匀分布,且所述多条栅线在所述第二方向上均匀分布。
- 根据权利要求4所述的阵列基板,其中,所述至少两个不同颜色子像素的像素电极在所述第一方向上的尺寸之比不大于2。
- 根据权利要求1-5任一项所述的阵列基板,其中,同一像素区中,所述至少两个不同颜色子像素的子像素区在所述第二方向上的尺寸之比为0.9~1.1。
- 根据权利要求3所述的阵列基板,其中,每个像素区包括第一颜色子像素、第二颜色子像素以及第三颜色子像素;同一像素区中,所述第二颜色子像素的子像素区在所述第一方向上的尺寸最大。
- 根据权利要求7所述的阵列基板,其中,所述第二颜色子像素的所述像素电极在所述第一方向上的尺寸最大。
- 根据权利要求7或8所述的阵列基板,其中,同一像素区中,所述第 一颜色子像素的子像素区和所述第三颜色子像素的子像素区在所述第一方向上的尺寸之比为0.9~1.1。
- 根据权利要求9所述的阵列基板,其中,同一像素区中,所述第一颜色子像素的所述像素电极和所述第三颜色子像素的所述像素电极在所述第一方向上的尺寸之比为0.9~1.1。
- 根据权利要求7-10任一项所述的阵列基板,其中,各子像素还包括晶体管,所述晶体管的第一极与所述像素电极连接;所述阵列基板还包括与所述公共电极电连接的公共电极线,在垂直于所述衬底基板上,各子像素的所述晶体管的第一极与所述公共电极线交叠,所述第二颜色子像素的所述晶体管的第一极与所述公共电极线的交叠面积小于其他颜色子像素的所述晶体管的第一极与所述公共电极线的交叠面积。
- 根据权利要求11所述的阵列基板,其中,同一像素区中,任意两个不同颜色子像素的充电拉动电压δVp之比为0.9~1.1,δVp=[Cgs/(Cgs+Cst+Clc)]*(Vgh-Vgl),Cgs为所述晶体管的第一极与栅极之间的电容,Cst为所述子像素的存储电容,Clc为液晶电容,Vgh为栅线电位上升至高电平的电位,Vgl为栅线电位下降至低电平的电位。
- 根据权利要求11或12所述的阵列基板,其中,所述公共电极线中与所述晶体管的第一极交叠的第一部分沿所述第二方向延伸,且所述第二颜色子像素的所述晶体管的第一极与所述第一部分的交叠部分在所述第二方向上的尺寸小于其他颜色子像素的所述晶体管的第一极与所述第一部分的交叠部分在所述第二方向上的尺寸。
- 根据权利要求12所述的阵列基板,其中,所述公共电极线的所述第一部分与所述数据线沿所述第一方向交替设置,所述晶体管的第一极与所述数据线同层设置,所述第一部分与所述像素电极同层设置。
- 根据权利要求13所述阵列基板,其中,所述多个子像素排列为多行多列子像素,位于同一行的子像素沿所述第一方向排列,位于同一列的子像素沿所述第二方向排列,相邻两行子像素之间设置有两条栅线,相邻两条数据线之间设置有两列子像素;所述公共电极线中位于所述两列子像素之间设置的第二部分与所述栅线同层设置,所述公共电极线的所述第一部分与所述栅线交叠。
- 根据权利要求15所述的阵列基板,其中,所述两条栅线组成栅线对, 所述多条栅线包括多个栅线对,所述多个栅线对在所述第二方向上均匀分布。
- 根据权利要求3或4所述的阵列基板,其中,每个像素区包括第一颜色子像素、第二颜色子像素以及第三颜色子像素;同一像素区中,所述第一颜色子像素的像素电极在所述第一方向上的尺寸最大。
- 根据权利要求17所述的阵列基板,其中,在所述第一方向上,所述第二颜色子像素的像素电极的尺寸大于所述第三颜色子像素的像素电极的尺寸,且所述第一颜色子像素的像素电极与所述第二颜色子像素的像素电极差值为第一差值,所述第二颜色子像素的像素电极与所述第三颜色子像素的像素电极的差值为第二差值,所述第一差值与所述第二差值之比为0.9~1.1。
- 根据权利要求17或18所述的阵列基板,其中,所述多个子像素排列为多行多列子像素,位于同一行的子像素沿所述第一方向排列,位于同一列的子像素沿所述第二方向排列,相邻两行子像素之间设置有一条栅线,相邻两列子像素之间设置有一条数据线。
- 根据权利要求7-19任一项所述的阵列基板,其中,所述第一颜色子像素为红色子像素,所述第二颜色子像素为绿色子像素,所述第三颜色子像素为蓝色子像素。
- 一种显示装置,包括:权利要求1-20任一项所述的阵列基板;对置基板,与所述阵列基板相对设置,且所述对置基板包括彩膜;液晶层,位于所述阵列基板与所述对置基板之间;背光源,位于所述阵列基板远离所述液晶层的一侧,其中,所述像素区中所述至少两个不同颜色子像素的子像素区在所述第一方向上的尺寸之比为1~2以使所述显示装置不经过色温矫正调试而使所述显示装置出射的白光满足预设白平衡坐标。
- 根据权利要求21所述的显示装置,其中,所述背光源包括量子点材料或者荧光材料。
- 根据权利要求22所述的显示装置,其中,所述背光源包括量子点材料,所述背光源的光谱包括红光波峰、绿光波峰以及蓝光波峰,所述红光波峰的峰值高于所述绿光波峰的峰值。
- 根据权利要求23所述的显示装置,其中,所述蓝光波峰的峰值与所述红光波峰的峰值比为1.8~2.8。
- 根据权利要求22所述的显示装置,其中,所述背光源包括荧光材料,所述背光源的光谱包括红光波峰、绿光波峰以及蓝光波峰,所述蓝光波峰的峰值与所述红光波峰的峰值比为0.7~0.9,所述绿光波峰与所述红光波峰的峰值比为0.15~0.28。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202380008002.2A CN118901037A (zh) | 2023-03-03 | 2023-03-03 | 阵列基板以及显示装置 |
EP23925641.5A EP4589375A1 (en) | 2023-03-03 | 2023-03-03 | Array substrate and display apparatus |
PCT/CN2023/079449 WO2024182913A1 (zh) | 2023-03-03 | 2023-03-03 | 阵列基板以及显示装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/CN2023/079449 WO2024182913A1 (zh) | 2023-03-03 | 2023-03-03 | 阵列基板以及显示装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2024182913A1 true WO2024182913A1 (zh) | 2024-09-12 |
Family
ID=92674031
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/CN2023/079449 WO2024182913A1 (zh) | 2023-03-03 | 2023-03-03 | 阵列基板以及显示装置 |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP4589375A1 (zh) |
CN (1) | CN118901037A (zh) |
WO (1) | WO2024182913A1 (zh) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009229791A (ja) * | 2008-03-24 | 2009-10-08 | Hitachi Displays Ltd | 液晶表示装置 |
JP2010243522A (ja) * | 2009-04-01 | 2010-10-28 | Sony Corp | 液晶表示装置および電子機器 |
CN202916564U (zh) * | 2010-01-29 | 2013-05-01 | 夏普株式会社 | 液晶显示装置 |
CN104932137A (zh) * | 2015-07-03 | 2015-09-23 | 京东方科技集团股份有限公司 | 一种彩膜基板、阵列基板、显示面板及显示装置 |
CN114077085A (zh) * | 2020-08-17 | 2022-02-22 | 京东方科技集团股份有限公司 | 显示面板、显示装置及电子设备 |
-
2023
- 2023-03-03 WO PCT/CN2023/079449 patent/WO2024182913A1/zh active Application Filing
- 2023-03-03 CN CN202380008002.2A patent/CN118901037A/zh active Pending
- 2023-03-03 EP EP23925641.5A patent/EP4589375A1/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009229791A (ja) * | 2008-03-24 | 2009-10-08 | Hitachi Displays Ltd | 液晶表示装置 |
JP2010243522A (ja) * | 2009-04-01 | 2010-10-28 | Sony Corp | 液晶表示装置および電子機器 |
CN202916564U (zh) * | 2010-01-29 | 2013-05-01 | 夏普株式会社 | 液晶显示装置 |
CN104932137A (zh) * | 2015-07-03 | 2015-09-23 | 京东方科技集团股份有限公司 | 一种彩膜基板、阵列基板、显示面板及显示装置 |
CN114077085A (zh) * | 2020-08-17 | 2022-02-22 | 京东方科技集团股份有限公司 | 显示面板、显示装置及电子设备 |
Also Published As
Publication number | Publication date |
---|---|
CN118901037A (zh) | 2024-11-05 |
EP4589375A1 (en) | 2025-07-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP3323015B1 (en) | Array substrate, display panel and display apparatus having the same | |
US8816350B2 (en) | Array substrate, liquid crystal panel, liquid crystal display device, and television receiver | |
RU2510066C1 (ru) | Жидкокристаллическое устройство отображения | |
TWI471666B (zh) | 用以產生均勻亮度畫面之顯示器 | |
JPWO2007105700A1 (ja) | アクティブマトリクス基板およびそれを用いた表示装置 | |
US12228829B2 (en) | Display substrate and display device | |
WO2018054138A1 (zh) | 阵列基板、显示面板、显示装置及显示面板的设计方法 | |
CN103744207B (zh) | 显示面板 | |
US10901273B2 (en) | Display apparatus | |
CN111929952B (zh) | 显示面板 | |
JPH07230104A (ja) | アクティブマトリクス型表示素子及びその製造方法 | |
JP5387950B2 (ja) | 液晶表示素子及びそれを用いた画像表示装置 | |
US20030020067A1 (en) | Structure of a thin film transistor (TFT) array | |
CN101308297A (zh) | 液晶显示面板及应用其的液晶显示装置 | |
CN102298227A (zh) | 内嵌式触控显示面板的像素结构及其形成方法 | |
JP7045794B2 (ja) | 表示パネル | |
KR20020050910A (ko) | 액정 디스플레이 패널 | |
WO2021223488A1 (zh) | 显示基板、显示面板及显示装置 | |
WO2024182913A1 (zh) | 阵列基板以及显示装置 | |
TW432060B (en) | Bis(acridinecarboxamide) or bis(phenazinecarboxamide) derivative, process for producing the same and pharmaceutical composition containing said derivative, and acridinecarboxylic acid or 9-aza acridine carboxylic acid and process for producing it | |
TWI461807B (zh) | 內嵌式觸控顯示面板之畫素結構及其形成方法 | |
WO2018082169A1 (zh) | 液晶面板及其阵列基板 | |
JP5594637B2 (ja) | 液晶表示素子及びそれを用いた画像表示装置 | |
US20070058112A1 (en) | Liquid crystal display panel, color filter, and manufacturing method thereof | |
JP2000147539A (ja) | 液晶表示装置の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 23925641 Country of ref document: EP Kind code of ref document: A1 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2023925641 Country of ref document: EP |
|
ENP | Entry into the national phase |
Ref document number: 2023925641 Country of ref document: EP Effective date: 20250417 |